; -------------------------------------------------------------------------------- ; @Title: CY8C5XXX On-Chip Peripherals ; @Props: Released ; @Author: ADI, FIL ; @Changelog: 2010-01-25 ; @Manufacturer: CYPRESS - Cypress Semiconductor Corporation ; @Doc: 001-54631_0A_V.pdf(Rev. *A) ; Cypress-PSoC3-5-ArchTRM-001-50235_0D_V.pdf(Rev. *D) ; @Core: Cortex-M3 ; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: percy8c5xxx.per 17736 2024-04-08 09:26:07Z kwisniewski $ tree.close "Core Registers (Cortex-M3)" AUTOINDENT.PUSH AUTOINDENT.OFF tree "System Control" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 11. group 0x10--0x1b line.long 0x00 "SYST_CSR,SysTick Control and Status Register" bitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted" bitfld.long 0x00 2. " CLKSOURCE ,Clock Source" "External,Core" bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "Not SysTick,SysTick" textline " " bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled" ;group 0x14++0x03 line.long 0x04 "SYST_RVR,SysTick Reload Value Register" hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0" ;group 0x18++0x03 line.long 0x08 "SYST_CVR,SysTick Current Value Register" hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Current Value" rgroup 0x1c++0x03 line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register" bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented" bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact" hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing" textline " " rgroup 0xd00++0x03 line.long 0x00 "CPUID,CPU ID Base Register" hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer Code" bitfld.long 0x00 20.--23. " VARIANT ,Implementation Defined Variant Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " CONSTANT ,Constant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Number of Processor" bitfld.long 0x00 0.--3. " REVISION ,Implementation Defined Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group 0xd04--0xd17 line.long 0x00 "ICSR,Interrupt Control State Register" bitfld.long 0x00 31. " NMIPENDSET ,Set Pending NMI Bit" "Not set,Set" bitfld.long 0x00 28. " PENDSVSET ,Set Pending pendSV Bit" "Not set,Set" bitfld.long 0x00 27. " PENDSVCLR ,Clear Pending pendSV Bit" "Not cleared,Cleared" textline " " bitfld.long 0x00 26. " PENDSTSET ,Set Pending SysTick Bit" "Not set,Set" bitfld.long 0x00 25. " PENDSTCLR ,Clear Pending SysTick Bit" "Not cleared,Cleared" bitfld.long 0x00 23. " ISRPREEMPT ,Use Only at Debug Time" "Not active,Active" textline " " bitfld.long 0x00 22. " ISRPENDING ,Interrupt Pending Flag" "Not pending,Pending" hexmask.long.word 0x00 12.--21. 1. " VECTPENDING ,Pending ISR Number Field" bitfld.long 0x00 11. " RETTOBASE ,Interrupt Exception" "Active,Not active" textline " " hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,Active ISR Number Field" ;group 0xd08++0x03 line.long 0x04 "VTOR,Vector Table Offset Register" bitfld.long 0x04 29. " TBLBASE ,Table Base" "Code,RAM" hexmask.long.tbyte 0x04 7.--28. 1. " TBLOFF ,Vector Table Base Offset Field" ;group 0xd0c++0x03 line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register" hexmask.long.word 0x08 16.--31. 1. " VECTKEY ,Register Key" rbitfld.long 0x08 15. " ENDIANESS ,Data endianness Bit" "Little,Big" bitfld.long 0x08 8.--10. " PRIGROUP ,Interrupt Priority Grouping Field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" textline " " bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested" bitfld.long 0x08 1. " VECTCLRACTIVE ,Clear Active Vector Bit" "Not cleared,Cleared all" bitfld.long 0x08 0. " VECTRESET ,System Reset" "No reset,Reset" ;group 0xd10++0x03 line.long 0x0c "SCR,System Control Register" bitfld.long 0x0c 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup" bitfld.long 0x0c 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep" textline " " bitfld.long 0x0c 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled" ;group 0xd14++0x03 line.long 0x10 "CCR,Configuration Control Register" bitfld.long 0x10 9. " STKALIGN ,8-byte Stack Frame Alignment" "4-byte,8-byte" bitfld.long 0x10 8. " BFHFNMIGN ,Enable NMI, Hard Fault and FAULTMASK to Ignore Bus Fault" "Disabled,Enabled" textline " " bitfld.long 0x10 4. " DIV_0_TRP ,Trap Divide by Zero" "Disabled,Enabled" bitfld.long 0x10 3. " UNALIGN_TRP ,Trap for Unaligned Access" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " USERSETMPEND ,Enable User Access to the Software Trigger Exception Register" "Disabled,Enabled" bitfld.long 0x10 0. " NONEBASETHRDENA ,Control Entry to Thread Mode" "Only from last exception,Any level" group 0xd18--0xd23 line.long 0x00 "SHPR1,SSystem Handler Priority Register 1" hexmask.long.byte 0x00 24.--31. 1. " PRI_7 ,Priority of System Handler 7" hexmask.long.byte 0x00 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)" hexmask.long.byte 0x00 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)" textline " " hexmask.long.byte 0x00 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)" line.long 0x04 "SHPR2,System Handler Priority Register 2" hexmask.long.byte 0x04 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)" hexmask.long.byte 0x04 16.--23. 1. " PRI_10 ,Priority of System Handler 10" hexmask.long.byte 0x04 8.--15. 1. " PRI_9 ,Priority of System Handler 9" textline " " hexmask.long.byte 0x04 0.--7. 1. " PRI_8 ,Priority of System Handler 8" line.long 0x08 "SHPR3,System Handler Priority Register 3" hexmask.long.byte 0x08 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)" hexmask.long.byte 0x08 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)" hexmask.long.byte 0x08 8.--15. 1. " PRI_13 ,Priority of System Handler 13" textline " " hexmask.long.byte 0x08 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)" group 0xd24++0x3 line.long 0x00 "SHCSR,System Handler Control and State Register" bitfld.long 0x00 18. " USGFAULTENA ,USGFAULTENA" "Disabled,Enabled" bitfld.long 0x00 17. " BUSFAULTENA ,BUSFAULTENA" "Disabled,Enabled" bitfld.long 0x00 16. " MEMFAULTENA ,MEMFAULTENA" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " SVCALLPENDED ,SVCall is Pended Started" "Not replaced,Replaced" bitfld.long 0x00 14. " BUSFAULTPENDED ,BusFault is Pended Started" "Not replaced,Replaced" bitfld.long 0x00 13. " MEMFAULTPENDED ,MemManage is Pended Started" "Not replaced,Replaced" textline " " bitfld.long 0x00 11. " SYSTICKACT ,SysTick is Active" "Not active,Active" bitfld.long 0x00 10. " PENDSVACT ,PendSV is Active" "Not active,Active" bitfld.long 0x00 8. " MONITORACT ,Monitor is Active" "Not active,Active" textline " " bitfld.long 0x00 7. " SVCALLACT ,SVCall is Active" "Not active,Active" bitfld.long 0x00 3. " USGFAULTACT ,UsageFault is Active" "Not active,Active" bitfld.long 0x00 1. " BUSFAULTACT ,BusFault is Active" "Not active,Active" textline " " bitfld.long 0x00 0. " MEMFAULTACT ,MemManage is Active" "Not active,Active" group 0xd28--0xd3b line.byte 0x0 "MMFSR,Memory Manage Fault Status Register" bitfld.byte 0x0 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid" bitfld.byte 0x0 4. " MSTKERR ,Stacking Access Violations" "No error,Error" bitfld.byte 0x0 3. " MUNSTKERR ,Unstack Access Violations" "No error,Error" textline " " bitfld.byte 0x0 1. " DACCVIOL ,Data Access Violation" "No error,Error" bitfld.byte 0x0 0. " IACCVIOL ,Instruction Access Violation" "No error,Error" ;group 0xd29++0x00 line.byte 0x01 "BFSR,Bus Fault Status Register" bitfld.byte 0x01 7. " BFARVALID ,Address Valid" "Not valid,Valid" bitfld.byte 0x01 4. " STKERR ,Stacking from Exception has Caused Bus Faults" "No error,Error" bitfld.byte 0x01 3. " UNSTKERR ,Unstack from Exception Return has Caused Bus Faults" "No error,Error" textline " " bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise Data Bus Error" "No error,Error" bitfld.byte 0x01 1. " PRECISERR ,Precise Data Bus Error Return" "No error,Error" bitfld.byte 0x01 0. " IBUSERR ,Instruction Bus Error Flag" "No error,Error" ;group 0xd2a++0x01 line.word 0x02 "USAFAULT,Usage Fault Status Register" bitfld.word 0x02 9. " DIVBYZERO ,Illegal PC Load" "No error,Error" bitfld.word 0x02 8. " UNALIGNED ,Illegal Unaligned Access" "No error,Error" bitfld.word 0x02 3. " NOCP ,Attempt to use a coprocessor instruction" "No error,Error" textline " " bitfld.word 0x02 2. " INVPC ,Attempt to Load EXC_RETURN into PC Illegally" "No error,Error" bitfld.word 0x02 1. " INVSTATE , Invalid Combination of EPSR and Instruction" "No error,Error" bitfld.word 0x02 0. " UNDEFINSTR ,Illegal Processor State" "No error,Error" ;group 0xd2c++0x03 line.long 0x04 "HFSR,Hard Fault Status Register" bitfld.long 0x04 31. " DEBUGEVT ,This Bit is Set if There is a Fault Related to Debug" "No error,Error" bitfld.long 0x04 30. " FORCED ,Hard Fault Activated" "No error,Error" bitfld.long 0x04 1. " VECTTBL ,Bus Fault" "No error,Error" ;group 0xd30++0x03 line.long 0x08 "DFSR,Debug Fault Status Register" bitfld.long 0x08 4. " EXTERNAL ,External Debug Request Flag" "Not asserted,Asserted" bitfld.long 0x08 3. " VCATCH ,Vector Catch Flag" "Not occurred,Occurred" bitfld.long 0x08 2. " DWTTRAP ,Data Watchpoint and Trace (DWT) Flag" "Not matched,Matched" textline " " bitfld.long 0x08 1. " BKPT ,BKPT Flag" "Not executed,Executed" bitfld.long 0x08 0. " HALTED ,Halt Request Flag" "Not requested,Requested" ;group 0xd34++0x03 line.long 0xc "MMFAR,Memory Manage Fault Address Register" ;group 0xd38++0x03 line.long 0x10 "BFAR,Bus Fault Address Register" wgroup 0xf00++0x03 line.long 0x00 "STIR,Software Trigger Interrupt Register" hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered" tree "Feature Registers" width 10. rgroup.long 0xD40++0x0B line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..." bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..." line.long 0x04 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..." line.long 0x08 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..." hgroup.long 0xD4C++0x03 hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0" rgroup.long 0xD50++0x03 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..." bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..." bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..." textline " " bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored" bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..." hgroup.long 0xD54++0x03 hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" rgroup.long 0xD58++0x03 line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2" bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..." rgroup.long 0xD60++0x13 line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0" bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..." bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..." bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..." textline " " bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..." bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..." bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..." line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1" bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..." bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..." bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..." textline " " bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..." line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2" bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..." bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..." bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..." textline " " bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..." bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..." bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..." textline " " bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..." line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3" bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..." bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..." bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..." textline " " bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..." bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..." textline " " bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..." line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4" bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..." bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..." textline " " bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..." bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..." bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..." tree.end tree "CoreSight Identification Registers" width 6. rgroup.long 0xFE0++0x0F line.long 0x00 "PID0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "PID1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "PID2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "PID3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "CID0,Component ID0 (Preamble)" line.long 0x04 "CID1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble" line.long 0x08 "CID2,Component ID2" line.long 0x0c "CID3,Component ID3" tree.end else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Memory Protection Unit" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 15. rgroup.long 0xD90++0x03 line.long 0x00 "MPU_TYPE,MPU Type Register" bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported" group.long 0xD94++0x03 line.long 0x00 "MPU_CTRL,MPU Control Register" bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled" bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled" bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled" group.long 0xD98++0x03 line.long 0x00 "MPU_RNR,MPU Region Number Register" hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR" tree.close "MPU regions" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0 group.long 0xD9C++0x03 "Region 0" saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 0 (not implemented)" saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1 group.long 0xD9C++0x03 "Region 1" saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 1 (not implemented)" saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2 group.long 0xD9C++0x03 "Region 2" saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 2 (not implemented)" saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3 group.long 0xD9C++0x03 "Region 3" saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 3 (not implemented)" saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4 group.long 0xD9C++0x03 "Region 4" saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 4 (not implemented)" saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5 group.long 0xD9C++0x03 "Region 5" saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 5 (not implemented)" saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6 group.long 0xD9C++0x03 "Region 6" saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 6 (not implemented)" saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7 group.long 0xD9C++0x03 "Region 7" saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 7 (not implemented)" saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8 group.long 0xD9C++0x03 "Region 8" saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 8 (not implemented)" saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9 group.long 0xD9C++0x03 "Region 9" saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 9 (not implemented)" saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA group.long 0xD9C++0x03 "Region 10" saveout 0xD98 %l 0xA line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xA line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 10 (not implemented)" saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB group.long 0xD9C++0x03 "Region 11" saveout 0xD98 %l 0xB line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xB line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 11 (not implemented)" saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC group.long 0xD9C++0x03 "Region 12" saveout 0xD98 %l 0xC line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xC line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 12 (not implemented)" saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD group.long 0xD9C++0x03 "Region 13" saveout 0xD98 %l 0xD line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xD line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 13 (not implemented)" saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE group.long 0xD9C++0x03 "Region 14" saveout 0xD98 %l 0xE line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xE line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 14 (not implemented)" saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF group.long 0xD9C++0x03 "Region 15" saveout 0xD98 %l 0xF line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xF line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 15 (not implemented)" saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15" textline " " textline " " endif tree.end width 0x0b else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Nested Vectored Interrupt Controller" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 6. rgroup.long 0x04++0x03 line.long 0x00 "ICTR,Interrupt Controller Type Register" bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..." tree "Interrupt Enable Registers" width 23. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x100++0x03 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x100++0x7 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x100++0x0B line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x100++0x0F line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x100++0x13 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x100++0x17 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x100++0x1B line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x100++0x1F line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x100++0x1F hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register" endif tree.end tree "Interrupt Pending Registers" width 23. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x200++0x03 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x200++0x07 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x200++0x0B line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x200++0x0F line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x200++0x13 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x200++0x17 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x200++0x1B line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x200++0x1F line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x200++0x1F hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register" endif tree.end tree "Interrupt Active Bit Registers" width 9. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) rgroup.long 0x300++0x03 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) rgroup.long 0x300++0x07 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) rgroup.long 0x300++0x0B line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) rgroup.long 0x300++0x0F line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) rgroup.long 0x300++0x13 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) rgroup.long 0x300++0x17 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) rgroup.long 0x300++0x1B line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" line.long 0x18 "ACTIVE7,Active Bit Register 7" bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) rgroup.long 0x300++0x1F line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" line.long 0x18 "ACTIVE7,Active Bit Register 7" bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active" line.long 0x1c "ACTIVE8,Active Bit Register 8" bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x300++0x1F hide.long 0x00 "ACTIVE1,Active Bit Register 1" hide.long 0x04 "ACTIVE2,Active Bit Register 2" hide.long 0x08 "ACTIVE3,Active Bit Register 3" hide.long 0x0c "ACTIVE4,Active Bit Register 4" hide.long 0x10 "ACTIVE5,Active Bit Register 5" hide.long 0x14 "ACTIVE6,Active Bit Register 6" hide.long 0x18 "ACTIVE7,Active Bit Register 7" hide.long 0x1c "ACTIVE8,Active Bit Register 8" endif tree.end tree "Interrupt Priority Registers" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x400++0x1F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x400++0x3F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x400++0x5F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x400++0x7F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x400++0x9F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x400++0xBF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x400++0xDF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" line.long 0xC0 "IPR48,Interrupt Priority Register" hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority" hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority" hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority" hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority" line.long 0xC4 "IPR49,Interrupt Priority Register" hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority" hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority" hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority" hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority" line.long 0xC8 "IPR50,Interrupt Priority Register" hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority" hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority" hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority" hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority" line.long 0xCC "IPR51,Interrupt Priority Register" hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority" hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority" hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority" hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority" line.long 0xD0 "IPR52,Interrupt Priority Register" hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority" hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority" hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority" hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority" line.long 0xD4 "IPR53,Interrupt Priority Register" hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority" hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority" hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority" hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority" line.long 0xD8 "IPR54,Interrupt Priority Register" hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority" hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority" hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority" hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority" line.long 0xDC "IPR55,Interrupt Priority Register" hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority" hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority" hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority" hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x400++0xEF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" line.long 0xC0 "IPR48,Interrupt Priority Register" hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority" hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority" hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority" hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority" line.long 0xC4 "IPR49,Interrupt Priority Register" hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority" hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority" hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority" hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority" line.long 0xC8 "IPR50,Interrupt Priority Register" hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority" hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority" hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority" hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority" line.long 0xCC "IPR51,Interrupt Priority Register" hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority" hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority" hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority" hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority" line.long 0xD0 "IPR52,Interrupt Priority Register" hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority" hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority" hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority" hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority" line.long 0xD4 "IPR53,Interrupt Priority Register" hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority" hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority" hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority" hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority" line.long 0xD8 "IPR54,Interrupt Priority Register" hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority" hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority" hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority" hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority" line.long 0xDC "IPR55,Interrupt Priority Register" hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority" hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority" hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority" hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority" line.long 0xE0 "IPR56,Interrupt Priority Register" hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority" hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority" hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority" hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority" line.long 0xE4 "IPR57,Interrupt Priority Register" hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority" hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority" hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority" hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority" line.long 0xE8 "IPR58,Interrupt Priority Register" hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority" hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority" hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority" hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority" line.long 0xEC "IPR59,Interrupt Priority Register" hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority" hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority" hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority" hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority" else hgroup.long 0x400++0xEF hide.long 0x0 "IPR0,Interrupt Priority Register" hide.long 0x4 "IPR1,Interrupt Priority Register" hide.long 0x8 "IPR2,Interrupt Priority Register" hide.long 0xC "IPR3,Interrupt Priority Register" hide.long 0x10 "IPR4,Interrupt Priority Register" hide.long 0x14 "IPR5,Interrupt Priority Register" hide.long 0x18 "IPR6,Interrupt Priority Register" hide.long 0x1C "IPR7,Interrupt Priority Register" hide.long 0x20 "IPR8,Interrupt Priority Register" hide.long 0x24 "IPR9,Interrupt Priority Register" hide.long 0x28 "IPR10,Interrupt Priority Register" hide.long 0x2C "IPR11,Interrupt Priority Register" hide.long 0x30 "IPR12,Interrupt Priority Register" hide.long 0x34 "IPR13,Interrupt Priority Register" hide.long 0x38 "IPR14,Interrupt Priority Register" hide.long 0x3C "IPR15,Interrupt Priority Register" hide.long 0x40 "IPR16,Interrupt Priority Register" hide.long 0x44 "IPR17,Interrupt Priority Register" hide.long 0x48 "IPR18,Interrupt Priority Register" hide.long 0x4C "IPR19,Interrupt Priority Register" hide.long 0x50 "IPR20,Interrupt Priority Register" hide.long 0x54 "IPR21,Interrupt Priority Register" hide.long 0x58 "IPR22,Interrupt Priority Register" hide.long 0x5C "IPR23,Interrupt Priority Register" hide.long 0x60 "IPR24,Interrupt Priority Register" hide.long 0x64 "IPR25,Interrupt Priority Register" hide.long 0x68 "IPR26,Interrupt Priority Register" hide.long 0x6C "IPR27,Interrupt Priority Register" hide.long 0x70 "IPR28,Interrupt Priority Register" hide.long 0x74 "IPR29,Interrupt Priority Register" hide.long 0x78 "IPR30,Interrupt Priority Register" hide.long 0x7C "IPR31,Interrupt Priority Register" hide.long 0x80 "IPR32,Interrupt Priority Register" hide.long 0x84 "IPR33,Interrupt Priority Register" hide.long 0x88 "IPR34,Interrupt Priority Register" hide.long 0x8C "IPR35,Interrupt Priority Register" hide.long 0x90 "IPR36,Interrupt Priority Register" hide.long 0x94 "IPR37,Interrupt Priority Register" hide.long 0x98 "IPR38,Interrupt Priority Register" hide.long 0x9C "IPR39,Interrupt Priority Register" hide.long 0xA0 "IPR40,Interrupt Priority Register" hide.long 0xA4 "IPR41,Interrupt Priority Register" hide.long 0xA8 "IPR42,Interrupt Priority Register" hide.long 0xAC "IPR43,Interrupt Priority Register" hide.long 0xB0 "IPR44,Interrupt Priority Register" hide.long 0xB4 "IPR45,Interrupt Priority Register" hide.long 0xB8 "IPR46,Interrupt Priority Register" hide.long 0xBC "IPR47,Interrupt Priority Register" hide.long 0xC0 "IPR48,Interrupt Priority Register" hide.long 0xC4 "IPR49,Interrupt Priority Register" hide.long 0xC8 "IPR50,Interrupt Priority Register" hide.long 0xCC "IPR51,Interrupt Priority Register" hide.long 0xD0 "IPR52,Interrupt Priority Register" hide.long 0xD4 "IPR53,Interrupt Priority Register" hide.long 0xD8 "IPR54,Interrupt Priority Register" hide.long 0xDC "IPR55,Interrupt Priority Register" hide.long 0xE0 "IPR56,Interrupt Priority Register" hide.long 0xE4 "IPR57,Interrupt Priority Register" hide.long 0xE8 "IPR58,Interrupt Priority Register" hide.long 0xEC "IPR59,Interrupt Priority Register" endif tree.end width 0x0b else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Debug" tree "Core Debug" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 7. if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x20000) group 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running" bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked" bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted" textline " " bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x20001) group 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running" bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 5. " C_SNAPSTALL ,Halting debug to gain control of the core" "Disabled,Enabled" bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked" textline " " bitfld.long 0x00 2. " C_STEP ,Core Step" "No step,Step" bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted" textline " " bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x0) group 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running" bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted" textline " " bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x00001) group 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running" bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 2. " C_STEP ,Core Step" "No step,Step" bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted" textline " " bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" endif wgroup 0xDF4++0x03 line.long 0x00 "DCRSR,Debug Core Register Selector Register" bitfld.long 0x00 16. " REGWNR ,Register Read/Write" "Read,Write" bitfld.long 0x00 0.--4. " REGSEL ,Register Selection" "R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,R13,R14,R15,xPSR/ Flags,MSP,PSP,RAZ/WI,CONTROL/FAULTMASK/BASEPRI/PRIMASK,?..." group 0xDF8++0x03 line.long 0x00 "DCRDR,Debug Core Register Data Register" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000) group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step" textline " " bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" else group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" textline " " bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" endif else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Flash Patch and Breakpoint Unit (FPB)" sif COMPonent.AVAILABLE("FPB") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1)) width 10. group 0x00--0x27 line.long 0x00 "FP_CTRL,Flash Patch Control Register" bitfld.long 0x00 8.--11. " NUM_LIT ,Number of Literal Slots Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " NUM_CODE ,Number of Code Slots Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1. " KEY ,Key Field" "Low,High" bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled" ;group 0x04++0x03 line.long 0x04 "FP_REMAP,Flash Patch Remap Register" hexmask.long.tbyte 0x04 5.--28. 1. " REMAP ,Remap Base Address Field" ;group 0x08++0x03 line.long 0x8 "FP_COMP0,Flash Patch Comparator Register 0" bitfld.long 0x8 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x8 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x8 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0xC "FP_COMP1,Flash Patch Comparator Register 1" bitfld.long 0xC 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0xC 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0xC 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0x10 "FP_COMP2,Flash Patch Comparator Register 2" bitfld.long 0x10 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x10 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x10 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0x14 "FP_COMP3,Flash Patch Comparator Register 3" bitfld.long 0x14 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x14 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x14 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0x18 "FP_COMP4,Flash Patch Comparator Register 4" bitfld.long 0x18 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x18 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x18 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0x1C "FP_COMP5,Flash Patch Comparator Register 5" bitfld.long 0x1C 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x1C 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x1C 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0x20 "FP_COMP6,Flash Patch Comparator Register 6" bitfld.long 0x20 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x20 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x20 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0x24 "FP_COMP7,Flash Patch Comparator Register 7" bitfld.long 0x24 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x24 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x24 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" tree "Coresight Management Registers" rgroup 0xfd0--0xfff line.long 0x00 "PID4,Peripheral ID4" line.long 0x04 "PID5,Peripheral ID5" line.long 0x08 "PID6,Peripheral ID6" line.long 0x0c "PID7,Peripheral ID7" line.long 0x10 "PID0,Peripheral ID0" line.long 0x14 "PID1,Peripheral ID1" line.long 0x18 "PID2,Peripheral ID2" line.long 0x1c "PID3,Peripheral ID3" line.long 0x20 "CID0,Component ID0" line.long 0x24 "CID1,Component ID1" line.long 0x28 "CID2,Component ID2" line.long 0x2c "CID3,Component ID3" tree.end else newline textline "FPB component base address not specified" newline endif tree.end tree "Data Watchpoint and Trace Unit (DWT)" sif COMPonent.AVAILABLE("DWT") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)) width 15. group 0x00--0x1B line.long 0x00 "DWT_CTRL,DWT Control Register" bitfld.long 0x00 28.--31. " NUMCOMP ,Number of Comparators Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 22. " CYCEVTENA ,Enables Cycle Count Event" "Disabled,Enabled" bitfld.long 0x00 21. " FOLDEVTENA ,Enables Folded Instruction Count Event" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " LSUEVTENA ,Enables LSU Count Event" "Disabled,Enabled" bitfld.long 0x00 19. " SLEEPEVTENA ,Enables Sleep Count Event" "Disabled,Enabled" bitfld.long 0x00 18. " EXCEVTENA ,Enables Interrupt Overhead Event" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " CPIEVTENA ,Enables CPI Count Event" "Disabled,Enabled" bitfld.long 0x00 16. " EXCTRCENA ,Enables Interrupt Event Tracing" "Disabled,Enabled" bitfld.long 0x00 12. " PCSAMPLEENA ,Enables PC Sampling Event" "Disabled,Enabled" textline " " bitfld.long 0x00 10.--11. " SYNCTAP ,Feed Synchronization Pulse to the ITM SYNCEN Control" "Disabled,24,26,28" bitfld.long 0x00 9. " CYCTAP ,Selects a Tap on the DWT_CYCCNT Register" "Bit 6,Bit 10" bitfld.long 0x00 5.--8. " POSTCNT ,Post-Scalar Counter for CYCTAP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1.--4. " POSTPRESET ,Reload Value for POSTCNT Post-Scalar Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CYCCNTENA ,Enable the DWT_CYCCNT Counter" "Disabled,Enabled" ;group 0x04++0x03 line.long 0x04 "DWT_CYCCNT,Cycle Count register" ;group 0x08++0x03 line.long 0x08 "DWT_CPICNT,DWT CPI Count Register" hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter" ;group 0x0c++0x03 line.long 0x0c "DWT_EXCCNT,DWT Exception Overhead Count Register" hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter" ;group 0x10++0x03 line.long 0x10 "DWT_SLEEPCNT,DWT Sleep Count Register" hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter" ;group 0x14++0x03 line.long 0x14 "DWT_LSUCNT,DWT LSU Count Register" hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter" ;group 0x18++0x03 line.long 0x18 "DWT_FOLDCNT,DWT Fold Count Register" hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter" group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" group.long 0x24++0x03 line.long 0x00 "DWT_MASK0,DWT Mask Registers 0" bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x34++0x03 line.long 0x00 "DWT_MASK1,DWT Mask Registers 1" bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x44++0x03 line.long 0x00 "DWT_MASK2,DWT Mask Registers 2" bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x54++0x03 line.long 0x00 "DWT_MASK3,DWT Mask Registers 3" bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x20)==0x00) group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." else group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." endif if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x38))&0x20)==0x00) group.long 0x38++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." else group.long 0x38++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." endif if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x48))&0x20)==0x00) group.long 0x48++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." else group.long 0x48++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." endif if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x58))&0x20)==0x00) group.long 0x58++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." else group.long 0x58++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." endif tree "Coresight Management Registers" rgroup 0xfd0--0xfff line.long 0x00 "PID4,Peripheral ID4" line.long 0x04 "PID5,Peripheral ID5" line.long 0x08 "PID6,Peripheral ID6" line.long 0x0c "PID7,Peripheral ID7" line.long 0x10 "PID0,Peripheral ID1" line.long 0x14 "PID1,Peripheral ID2" line.long 0x18 "PID2,Peripheral ID3" line.long 0x1c "PID3,Peripheral ID4" line.long 0x20 "CID0,Component ID0" line.long 0x24 "CID1,Component ID1" line.long 0x28 "CID2,Component ID2" line.long 0x2c "CID3,Component ID3" tree.end else newline textline "DWT component base address not specified" newline endif tree.end tree.end AUTOINDENT.POP tree.end config 16. 8. tree "SRAM" base ad:0x1FFF8000 width 9. group.byte 0x00++0x00 line.byte 0x00 "CODE64K,Code System Memory Bank" button "Code" "d 0x1FFF8000--(0x1FFF8000+0x3fff) /byte" group.byte 0x4000++0x00 line.byte 0x00 "CODE32K,Code System Memory Bank" button "Code" "d (0x1FFF8000+0x4000)--(0x1FFF8000+0x5fff) /byte" group.byte 0x6000++0x00 line.byte 0x00 "CODE16K,Code System Memory Bank" button "Code" "d (0x1FFF8000+0x6000)--(0x1FFF8000+0x6fff) /byte" group.byte 0x7000++0x00 line.byte 0x00 "CODE,Code System Memory Bank" button "Code" "d (0x1FFF8000+0x7000)--(0x1FFF8000+0x7fff) /byte" group.byte 0x8000++0x00 line.byte 0x00 "DATA,Data System Memory Bank" button "Data" "d (0x1FFF8000+0x8000)--(0x1FFF8000+0x8fff) /byte" group.byte 0x9000++0x00 line.byte 0x00 "DATA16K,Data System Memory Bank" button "Data" "d (0x1FFF8000+0x9000)--(0x1FFF8000+0x9fff) /byte" group.byte 0xa000++0x00 line.byte 0x00 "DATA32K,Data System Memory Bank" button "Data" "d (0x1FFF8000+0xa000)--(0x1FFF8000+0xbfff) /byte" group.byte 0xc000++0x00 line.byte 0x00 "DATA64K,Data System Memory Bank" button "Data" "d (0x1FFF8000+0xc000)--(0x1FFF8000+0xffff) /byte" width 0x0B tree.end tree "CLKDIST" base ad:0x40004000 width 12. group.byte 0x00++0x0c line.byte 0x00 "CR,Configuration Register" bitfld.byte 0x00 6. " IMO2X_SRC ,Select the input source to IMO doubler" "DSI,XTAL" bitfld.byte 0x00 4.--5. " IMO_OUT ,Select the IMO output source to clock distribution" "IMO,IMO2X,IMO36,?..." bitfld.byte 0x00 2.--3. " ILO_OUT ,Select the ILO output source to clock distribution" "ILO100K,ILO33K,ILO1K,?..." bitfld.byte 0x00 0.--1. " PLL_SRC ,Select the PLL reference clock input" "IMO,XTAL,DIGK,?..." textline " " line.byte 0x01 "LD,LOAD Register" bitfld.byte 0x01 2. " DISABLE ,Locally disable all unmasked dividers" "No,Yes" bitfld.byte 0x01 1. " SYNC_EN ,Restart all unmasked dividers in phase" "Disabled,Enabled" bitfld.byte 0x01 0. " LOAD ,Load all unmasked dividers with a common shadow divider value" "Not copied,Copied" line.byte 0x02 "WRK0,LSB Shadow Divider Value Register" line.byte 0x03 "WRK1,MSB Shadow Divider Value Register" line.byte 0x04 "MSTR0,Master clock Divider Value Register" line.byte 0x05 "MSTR1,Master Configuration Register/CPU Divider Value" bitfld.byte 0x05 0.--1. " SRC_SEL ,Master clock source selection" "IMO,PLL,XTAL,DSI" line.byte 0x06 "BCFG0,CLK_BUS LSB Divider Value Register" line.byte 0x07 "BCFG1,CLK_BUS MSB Divider Value Register" line.byte 0x08 "BCFG2,CLK_BUS Configuration Register" bitfld.byte 0x08 7. " MASK ,Mask bits to enable shadow loads" "Disabled,Enabled" bitfld.byte 0x08 6. " SSS ,Sync source same as output frequency" "Disabled,Enabled" bitfld.byte 0x08 5. " EARLY ,Set the early phase mode, with rising edge near the half-count of the divider" "Disabled,Enabled" bitfld.byte 0x08 4. " DUTY ,Force duty cycle to 50%" "Disabled,Enabled" textline " " bitfld.byte 0x08 3. " SYNC ,Select output synchronization to master clock" "Disabled,Enabled" line.byte 0x09 "UCFG,USB Configuration Register" bitfld.byte 0x09 4. " TMODE ,Enable monitoring of clk_usb through DSI routing" "Disabled,Enabled" bitfld.byte 0x09 3. " GPIPE ,Global DSI input pipeline configuration" "Bypassed,Enabled" bitfld.byte 0x09 2. " DIV2 ,USB clock divide source by two" "Disabled,Enabled" bitfld.byte 0x09 0.--1. " SRC_SEL ,USB clock source selection" "IMO2X,IMO,PLL,DSI" line.byte 0x0a "DLY0,Delay block Configuration Register" bitfld.byte 0x0a 5.--6. " CTRIM ,Course trim bits for delay block" "0(Highest),1,2,3(Lowest)" bitfld.byte 0x0a 0.--4. " FTRIM ,Fine trim bits for delay block" "0(Lowest),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31(Highest)" line.byte 0x0b "DLY1,USB Configuration Register" bitfld.byte 0x0b 2. " EN ,Enable the delay for clk_d_sync" "Disabled,Enabled" bitfld.byte 0x0b 1. " ISEL ,Reference current selection" "BANDGAP,INTERNAL" bitfld.byte 0x0b 0. " MODE ,Clock mode" "DELAY,RING" group.byte 0x10++0x00 line.byte 0x00 "DMASK,Digital Clock Mask Register" bitfld.byte 0x00 7. " DMASK[7] ,Mask bit 7 to enable shadow loads" "Disabled,Enabled" bitfld.byte 0x00 6. " DMASK[6] ,Mask bit 6 to enable shadow loads" "Disabled,Enabled" bitfld.byte 0x00 5. " DMASK[5] ,Mask bit 5 to enable shadow loads" "Disabled,Enabled" bitfld.byte 0x00 4. " DMASK[4] ,Mask bit 4 to enable shadow loads" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " DMASK[3] ,Mask bit 3 to enable shadow loads" "Disabled,Enabled" bitfld.byte 0x00 2. " DMASK[2] ,Mask bit 2 to enable shadow loads" "Disabled,Enabled" bitfld.byte 0x00 1. " DMASK[1] ,Mask bit 1 to enable shadow loads" "Disabled,Enabled" bitfld.byte 0x00 0. " DMASK[0] ,Mask bit 0 to enable shadow loads" "Disabled,Enabled" group.byte 0x14++0x00 line.byte 0x00 "AMASK,Analog Clock Mask Register" bitfld.byte 0x00 3. " AMASK[3] ,Mask bit 3 to enable shadow loads" "Disabled,Enabled" bitfld.byte 0x00 2. " AMASK[2] ,Mask bit 2 to enable shadow loads" "Disabled,Enabled" bitfld.byte 0x00 1. " AMASK[1] ,Mask bit 1 to enable shadow loads" "Disabled,Enabled" bitfld.byte 0x00 0. " AMASK[0] ,Mask bit 0 to enable shadow loads" "Disabled,Enabled" group.byte 0x80++0x02 line.byte 0x00 "DCFG0_CFG0,LSB Divider Value Register" line.byte 0x01 "DCFG0_CFG1,MSB Divider Value Register" line.byte 0x02 "DCFG0_CFG2,Configuration Register" bitfld.byte 0x02 7. " PIPE ,DSI input pipeline configuration" "Bypassed,Enabled" bitfld.byte 0x02 6. " SSS ,Sync source same as output frequency" "Disabled,Enabled" bitfld.byte 0x02 5. " EARLY ,Set the early phase mode, with rising edge near the half-count of the divider" "Disabled,Enabled" bitfld.byte 0x02 4. " DUTY ,Force duty cycle to 50%" "Disabled,Enabled" textline " " bitfld.byte 0x02 3. " SYNC ,Select output synchronization to master clock" "Disabled,Enabled" bitfld.byte 0x02 0.--2. " SRC_SEL ,Clock source selection" "clk_sync_d,imo,xtal_mhz,ilo,pll,xtal_khz,dsi_g,dsi_d" group.byte 0x84++0x02 line.byte 0x00 "DCFG1_CFG0,LSB Divider Value Register" line.byte 0x01 "DCFG1_CFG1,MSB Divider Value Register" line.byte 0x02 "DCFG1_CFG2,Configuration Register" bitfld.byte 0x02 7. " PIPE ,DSI input pipeline configuration" "Bypassed,Enabled" bitfld.byte 0x02 6. " SSS ,Sync source same as output frequency" "Disabled,Enabled" bitfld.byte 0x02 5. " EARLY ,Set the early phase mode, with rising edge near the half-count of the divider" "Disabled,Enabled" bitfld.byte 0x02 4. " DUTY ,Force duty cycle to 50%" "Disabled,Enabled" textline " " bitfld.byte 0x02 3. " SYNC ,Select output synchronization to master clock" "Disabled,Enabled" bitfld.byte 0x02 0.--2. " SRC_SEL ,Clock source selection" "clk_sync_d,imo,xtal_mhz,ilo,pll,xtal_khz,dsi_g,dsi_d" group.byte 0x88++0x02 line.byte 0x00 "DCFG2_CFG0,LSB Divider Value Register" line.byte 0x01 "DCFG2_CFG1,MSB Divider Value Register" line.byte 0x02 "DCFG2_CFG2,Configuration Register" bitfld.byte 0x02 7. " PIPE ,DSI input pipeline configuration" "Bypassed,Enabled" bitfld.byte 0x02 6. " SSS ,Sync source same as output frequency" "Disabled,Enabled" bitfld.byte 0x02 5. " EARLY ,Set the early phase mode, with rising edge near the half-count of the divider" "Disabled,Enabled" bitfld.byte 0x02 4. " DUTY ,Force duty cycle to 50%" "Disabled,Enabled" textline " " bitfld.byte 0x02 3. " SYNC ,Select output synchronization to master clock" "Disabled,Enabled" bitfld.byte 0x02 0.--2. " SRC_SEL ,Clock source selection" "clk_sync_d,imo,xtal_mhz,ilo,pll,xtal_khz,dsi_g,dsi_d" group.byte 0x8C++0x02 line.byte 0x00 "DCFG3_CFG0,LSB Divider Value Register" line.byte 0x01 "DCFG3_CFG1,MSB Divider Value Register" line.byte 0x02 "DCFG3_CFG2,Configuration Register" bitfld.byte 0x02 7. " PIPE ,DSI input pipeline configuration" "Bypassed,Enabled" bitfld.byte 0x02 6. " SSS ,Sync source same as output frequency" "Disabled,Enabled" bitfld.byte 0x02 5. " EARLY ,Set the early phase mode, with rising edge near the half-count of the divider" "Disabled,Enabled" bitfld.byte 0x02 4. " DUTY ,Force duty cycle to 50%" "Disabled,Enabled" textline " " bitfld.byte 0x02 3. " SYNC ,Select output synchronization to master clock" "Disabled,Enabled" bitfld.byte 0x02 0.--2. " SRC_SEL ,Clock source selection" "clk_sync_d,imo,xtal_mhz,ilo,pll,xtal_khz,dsi_g,dsi_d" group.byte 0x90++0x02 line.byte 0x00 "DCFG4_CFG0,LSB Divider Value Register" line.byte 0x01 "DCFG4_CFG1,MSB Divider Value Register" line.byte 0x02 "DCFG4_CFG2,Configuration Register" bitfld.byte 0x02 7. " PIPE ,DSI input pipeline configuration" "Bypassed,Enabled" bitfld.byte 0x02 6. " SSS ,Sync source same as output frequency" "Disabled,Enabled" bitfld.byte 0x02 5. " EARLY ,Set the early phase mode, with rising edge near the half-count of the divider" "Disabled,Enabled" bitfld.byte 0x02 4. " DUTY ,Force duty cycle to 50%" "Disabled,Enabled" textline " " bitfld.byte 0x02 3. " SYNC ,Select output synchronization to master clock" "Disabled,Enabled" bitfld.byte 0x02 0.--2. " SRC_SEL ,Clock source selection" "clk_sync_d,imo,xtal_mhz,ilo,pll,xtal_khz,dsi_g,dsi_d" group.byte 0x94++0x02 line.byte 0x00 "DCFG5_CFG0,LSB Divider Value Register" line.byte 0x01 "DCFG5_CFG1,MSB Divider Value Register" line.byte 0x02 "DCFG5_CFG2,Configuration Register" bitfld.byte 0x02 7. " PIPE ,DSI input pipeline configuration" "Bypassed,Enabled" bitfld.byte 0x02 6. " SSS ,Sync source same as output frequency" "Disabled,Enabled" bitfld.byte 0x02 5. " EARLY ,Set the early phase mode, with rising edge near the half-count of the divider" "Disabled,Enabled" bitfld.byte 0x02 4. " DUTY ,Force duty cycle to 50%" "Disabled,Enabled" textline " " bitfld.byte 0x02 3. " SYNC ,Select output synchronization to master clock" "Disabled,Enabled" bitfld.byte 0x02 0.--2. " SRC_SEL ,Clock source selection" "clk_sync_d,imo,xtal_mhz,ilo,pll,xtal_khz,dsi_g,dsi_d" group.byte 0x98++0x02 line.byte 0x00 "DCFG6_CFG0,LSB Divider Value Register" line.byte 0x01 "DCFG6_CFG1,MSB Divider Value Register" line.byte 0x02 "DCFG6_CFG2,Configuration Register" bitfld.byte 0x02 7. " PIPE ,DSI input pipeline configuration" "Bypassed,Enabled" bitfld.byte 0x02 6. " SSS ,Sync source same as output frequency" "Disabled,Enabled" bitfld.byte 0x02 5. " EARLY ,Set the early phase mode, with rising edge near the half-count of the divider" "Disabled,Enabled" bitfld.byte 0x02 4. " DUTY ,Force duty cycle to 50%" "Disabled,Enabled" textline " " bitfld.byte 0x02 3. " SYNC ,Select output synchronization to master clock" "Disabled,Enabled" bitfld.byte 0x02 0.--2. " SRC_SEL ,Clock source selection" "clk_sync_d,imo,xtal_mhz,ilo,pll,xtal_khz,dsi_g,dsi_d" group.byte 0x9C++0x02 line.byte 0x00 "DCFG7_CFG0,LSB Divider Value Register" line.byte 0x01 "DCFG7_CFG1,MSB Divider Value Register" line.byte 0x02 "DCFG7_CFG2,Configuration Register" bitfld.byte 0x02 7. " PIPE ,DSI input pipeline configuration" "Bypassed,Enabled" bitfld.byte 0x02 6. " SSS ,Sync source same as output frequency" "Disabled,Enabled" bitfld.byte 0x02 5. " EARLY ,Set the early phase mode, with rising edge near the half-count of the divider" "Disabled,Enabled" bitfld.byte 0x02 4. " DUTY ,Force duty cycle to 50%" "Disabled,Enabled" textline " " bitfld.byte 0x02 3. " SYNC ,Select output synchronization to master clock" "Disabled,Enabled" bitfld.byte 0x02 0.--2. " SRC_SEL ,Clock source selection" "clk_sync_d,imo,xtal_mhz,ilo,pll,xtal_khz,dsi_g,dsi_d" group.byte 0x100++0x03 line.byte 0x00 "ACFG0_CFG0,LSB Divider Value Register" line.byte 0x01 "ACFG0_CFG1,MSB Divider Value Register" line.byte 0x02 "ACFG0_CFG2,Configuration Register" bitfld.byte 0x02 7. " PIPE ,DSI input pipeline configuration" "Bypassed,Enabled" bitfld.byte 0x02 6. " SSS ,Sync source same as output frequency" "Disabled,Enabled" bitfld.byte 0x02 5. " EARLY ,Set the early phase mode, with rising edge near the half-count of the divider" "Disabled,Enabled" bitfld.byte 0x02 4. " DUTY ,Force duty cycle to 50%" "Disabled,Enabled" textline " " bitfld.byte 0x02 3. " SYNC ,Select output synchronization to master clock" "Disabled,Enabled" bitfld.byte 0x02 0.--2. " SRC_SEL ,Clock source selection" "clk_sync_d,imo,xtal_mhz,ilo,pll,xtal_khz,dsi_g,dsi_d" line.byte 0x03 "ACFG0_CFG3,Analog clocks Configuration Register" bitfld.byte 0x03 0.--3. " PHASE_DLY ,Phase delay selection" "Disabled,2.5ns,3.5ns,4.5ns,5.5ns,6.5ns,7.5ns,8.5ns,9.5ns,10.5ns,11.5ns,12.5ns,Disabled,Disabled,Disabled,Disabled" group.byte 0x104++0x03 line.byte 0x00 "ACFG1_CFG0,LSB Divider Value Register" line.byte 0x01 "ACFG1_CFG1,MSB Divider Value Register" line.byte 0x02 "ACFG1_CFG2,Configuration Register" bitfld.byte 0x02 7. " PIPE ,DSI input pipeline configuration" "Bypassed,Enabled" bitfld.byte 0x02 6. " SSS ,Sync source same as output frequency" "Disabled,Enabled" bitfld.byte 0x02 5. " EARLY ,Set the early phase mode, with rising edge near the half-count of the divider" "Disabled,Enabled" bitfld.byte 0x02 4. " DUTY ,Force duty cycle to 50%" "Disabled,Enabled" textline " " bitfld.byte 0x02 3. " SYNC ,Select output synchronization to master clock" "Disabled,Enabled" bitfld.byte 0x02 0.--2. " SRC_SEL ,Clock source selection" "clk_sync_d,imo,xtal_mhz,ilo,pll,xtal_khz,dsi_g,dsi_d" line.byte 0x03 "ACFG1_CFG3,Analog clocks Configuration Register" bitfld.byte 0x03 0.--3. " PHASE_DLY ,Phase delay selection" "Disabled,2.5ns,3.5ns,4.5ns,5.5ns,6.5ns,7.5ns,8.5ns,9.5ns,10.5ns,11.5ns,12.5ns,Disabled,Disabled,Disabled,Disabled" group.byte 0x108++0x03 line.byte 0x00 "ACFG2_CFG0,LSB Divider Value Register" line.byte 0x01 "ACFG2_CFG1,MSB Divider Value Register" line.byte 0x02 "ACFG2_CFG2,Configuration Register" bitfld.byte 0x02 7. " PIPE ,DSI input pipeline configuration" "Bypassed,Enabled" bitfld.byte 0x02 6. " SSS ,Sync source same as output frequency" "Disabled,Enabled" bitfld.byte 0x02 5. " EARLY ,Set the early phase mode, with rising edge near the half-count of the divider" "Disabled,Enabled" bitfld.byte 0x02 4. " DUTY ,Force duty cycle to 50%" "Disabled,Enabled" textline " " bitfld.byte 0x02 3. " SYNC ,Select output synchronization to master clock" "Disabled,Enabled" bitfld.byte 0x02 0.--2. " SRC_SEL ,Clock source selection" "clk_sync_d,imo,xtal_mhz,ilo,pll,xtal_khz,dsi_g,dsi_d" line.byte 0x03 "ACFG2_CFG3,Analog clocks Configuration Register" bitfld.byte 0x03 0.--3. " PHASE_DLY ,Phase delay selection" "Disabled,2.5ns,3.5ns,4.5ns,5.5ns,6.5ns,7.5ns,8.5ns,9.5ns,10.5ns,11.5ns,12.5ns,Disabled,Disabled,Disabled,Disabled" group.byte 0x10C++0x03 line.byte 0x00 "ACFG3_CFG0,LSB Divider Value Register" line.byte 0x01 "ACFG3_CFG1,MSB Divider Value Register" line.byte 0x02 "ACFG3_CFG2,Configuration Register" bitfld.byte 0x02 7. " PIPE ,DSI input pipeline configuration" "Bypassed,Enabled" bitfld.byte 0x02 6. " SSS ,Sync source same as output frequency" "Disabled,Enabled" bitfld.byte 0x02 5. " EARLY ,Set the early phase mode, with rising edge near the half-count of the divider" "Disabled,Enabled" bitfld.byte 0x02 4. " DUTY ,Force duty cycle to 50%" "Disabled,Enabled" textline " " bitfld.byte 0x02 3. " SYNC ,Select output synchronization to master clock" "Disabled,Enabled" bitfld.byte 0x02 0.--2. " SRC_SEL ,Clock source selection" "clk_sync_d,imo,xtal_mhz,ilo,pll,xtal_khz,dsi_g,dsi_d" line.byte 0x03 "ACFG3_CFG3,Analog clocks Configuration Register" bitfld.byte 0x03 0.--3. " PHASE_DLY ,Phase delay selection" "Disabled,2.5ns,3.5ns,4.5ns,5.5ns,6.5ns,7.5ns,8.5ns,9.5ns,10.5ns,11.5ns,12.5ns,Disabled,Disabled,Disabled,Disabled" width 0x0B tree.end tree "FASTCLK" base ad:0x40004200 width 11. if (((per.byte(ad:0x40004200))&0x08)==0x08) group.byte 0x00++0x00 line.byte 0x00 "IMO_CR,Internal Main Oscillator Control Register" bitfld.byte 0x00 6. " USBCLK_ON ,IMO for higher precision configure" "Normal,USB clock-locking" bitfld.byte 0x00 5. " XCLKEN ,External clock enable for the IMO doubler" "IMOCLK,Selected 'external' clk" bitfld.byte 0x00 4. " F2XON ,IMO Doubler enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " FIMO_EN ,Enable IMO fast startup" "Normal,Fast" bitfld.byte 0x00 0.--2. " F_RANGE ,Frequency range setting for the IMO" ",12 MHz,24 MHz,12 MHz,48 MHz,67 MHz,48 MHz,48 MHz" else group.byte 0x00++0x00 line.byte 0x00 "IMO_CR,Internal Main Oscillator Control Register" bitfld.byte 0x00 6. " USBCLK_ON ,IMO for higher precision configure" "Normal,USB clock-locking" bitfld.byte 0x00 5. " XCLKEN ,External clock enable for the IMO doubler" "IMOCLK,Selected 'external' clk" bitfld.byte 0x00 4. " F2XON ,IMO Doubler enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " FIMO_EN ,Enable IMO fast startup" "Normal,Fast" bitfld.byte 0x00 0.--2. " F_RANGE ,Frequency range setting for the IMO" "12 MHz,6 MHz,24 MHz,3 MHz,48 MHz,67 MHz,80 MHz,96 MHz" endif textline " " group.byte 0x10++0x03 line.byte 0x00 "XMHZ_CSR,External 4-33 MHz Crystal Oscillator Status and Control Register" bitfld.byte 0x00 7. " XERR ,High output indicates oscillator failure" "Not failed,Failed" bitfld.byte 0x00 6. " XPROT ,Enable External Crystal Oscillator (XMHZ) fault recovery circuitry" "Disabled,Enabled" bitfld.byte 0x00 4. " XSTART ,Selects the start-up mode for the oscillator" "Internal,Clock close" bitfld.byte 0x00 3. " XPUMP_DIS ,Disables voltage pumps for switches that enable the crystal oscillator" "No,Yes" textline " " bitfld.byte 0x00 2. " XFB_DIS ,Disables an amplitude monitor on the oscillator signal" "No,Yes" bitfld.byte 0x00 1. " XTO_DIS ,Disables time-out monitor on the oscillator signal" "No,Yes" bitfld.byte 0x00 0. " EN ,4 - 33 MHz crystal oscillator circuit enable" "Disabled,Enabled" line.byte 0x01 "XMHZ_TST,External 4-33 MHz Crystal Oscillator Test Register" bitfld.byte 0x01 0.--3. " TEST ,test" "Tri-state,Trim current & test amplifier,Check startup pulses & watchdog,Check amplifier NMOS,Check feedback resistor,Check charge pump clk & pump output,Check charge pump output using external clk,Tri-state,Tri-state,Brings dc portion of amplitude detect out; vdc,Brings the peak of amplitude detect out; vmax,Brings amplitude of amplitude detect block out; vamp,Brings selected reference voltage; vrefout; onto test,Buffered version of clk divider output; clk_div is put,Allows external voltage to be applied to the comparator,Checks that iadj counts down/External clk to trigger" line.byte 0x02 "XMHZ_CFG0,External 4-33 MHz Crystal Oscillator Configuration Register 0" bitfld.byte 0x02 0.--4. " XCFG ,Selects statup settings(f_crystal/quality)" "Min/Spare,Low/Spare,Low/Spare,Low/Spare,Low/Spare,4/Good,4/Bad,5/Good,5/Bad,6/Good,6/Bad,8/Good,8/Bad,10/Good,10/Bad,12/Good,12/Bad,16/Good,16/Bad,20/Good,20/Bad,25/Good,25/Bad,27/Good,27/Bad,33/Good,33/Bad,High/Spare,High/Spare,High/Spare,High/Spare,Max/Max" line.byte 0x03 "XMHZ_CFG1,External 4-33 MHz Crystal Oscillator Configuration Register 1" bitfld.byte 0x03 0.--3. " VREF ,Selects reference level" "79 mV,90 mV,106 mV,127 mV,143 mV,175 mV,204 mV,234 mV,286 mV,349 mV,413 mV,493 mV,588 mV,702 mV,838 mV,1002 mV" group.byte 0x20++0x04 line.byte 0x00 "PLL_CFG0,PLL Configuration Register" bitfld.byte 0x00 6.--7. " WAIT ,Lock detect wait time before declaring lock (PFD-clock periods)" "7,15,23,31" bitfld.byte 0x00 4.--5. " DELAY ,Lock detect delay time" "3 ns,5 ns,7 ns,8 ns" bitfld.byte 0x00 0. " EN ,Enable PLL" "Disabled,Enabled" line.byte 0x01 "PLL_CFG1,PLL Control Register" bitfld.byte 0x01 4.--6. " ICPSEL ,Charge Pump current select" "0,1,2,3,4,5,6,7" bitfld.byte 0x01 0.--1. " VCO_GAIN ,VCO loop gain" "0,1,2,3" line.byte 0x02 "PLL_P,PLL P-Counter Configuration Register" line.byte 0x03 "PLL_Q,PLL Q-Counter Configuration Register" bitfld.byte 0x03 0.--3. " Q ,Q-Counter divide value" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16" textline " " line.byte 0x04 "PLL_TST,PLL Test Register" bitfld.byte 0x04 0.--2. " TEST ,Test Modes for the PLL" "PLL_TEST_NORMAL,PLL_TEST_PFD_DISABLE,PLL_TEST_VCTRL_INT,PLL_TEST_VCTRL_EXT,PLL_TEST_SENSE,PLL_TEST_NORMAL_SLOW,PLL_TEST_NORMAL_PLUS,PLL_TEST_CP_CURRENT" textline " " rgroup.byte 0x25++0x00 line.byte 0x00 "PLL_SR,PLL Status Register" bitfld.byte 0x00 1. " ILOCK ,Instantaneous lock signal" "Low,High" bitfld.byte 0x00 0. " LOCKDET ,Lock Status" "Not locked,Locked" width 0x0B tree.end tree "SLOWCLK" base ad:0x40004300 width 9. group.byte 0x00++0x01 line.byte 0x00 "ILO_CR0,Internal Low-speed Oscillator Control Register 0" bitfld.byte 0x00 5. " DIV3EN ,Divide-by-3 enable for 100 kHz output" "Disabled,Enabled" bitfld.byte 0x00 4. " PD_MODE ,Power down mode for ILO" "Faster,Slower" bitfld.byte 0x00 2. " EN_100K ,Enables 100kHz ILO clock output when set" "Disabled,Enabled" bitfld.byte 0x00 1. " EN_1K ,Enables 1kHz ILO clock output when set" "Disabled,Enabled" line.byte 0x01 "ILO_CR1,Internal Low-speed Oscillator Control Register 1" bitfld.byte 0x01 2. " FREQ_SEL ,Frequency select for CLK100K" "100 kHz,32 kHz" bitfld.byte 0x01 1. " BIAS_OPT ,Alternate bias for ILO" "Sub-threshold,Saturated" bitfld.byte 0x01 0. " DIS_TURBO ,Start-up speed control" "Enabled,Disabled" group.byte 0x08++0x02 line.byte 0x00 "X32_CR,External 32kHz Crystal Oscillator Control Register" bitfld.byte 0x00 5. " ANA_STAT ,Oscillator status, using internal analog measurement" "Not stable,Stable" bitfld.byte 0x00 4. " DIG_STAT ,Oscillator status, using test against a reference clock" "Not stable,Stable" bitfld.byte 0x00 1. " LPM ,Power setting for 32K crystal oscillator" "High Power,Low Power" bitfld.byte 0x00 0. " X32EN ,32K Crystal Oscillator Enable" "Disabled,Enabled" line.byte 0x01 "X32_CFG,External 32kHz Crystal Oscillator Configuration Register" bitfld.byte 0x01 7. " LP_ALLOW ,Low power oscillator mode configuration" "Sleep,Active" bitfld.byte 0x01 2.--3. " LP ,GM Setting for LPM=1" "LP_MIN,LP_DEFAULT,,LP_MAX" bitfld.byte 0x01 1. " TEST ,Enables a test mode to bring the internal current reference out" "Normal,Enabled" bitfld.byte 0x01 0. " XREFCLK ,Allows external clock to be driving into the crystal oscillator input" "Normal,Allowed" line.byte 0x02 "X32_TST,External 32kHz Crystal Oscillator Test Register" width 0x0B tree.end tree "BOOST" base ad:0x40004320 width 5. if (((per.b(ad:0x40004320+0x01))&0x08)==0x08) group.byte 0x00++0x00 line.byte 0x00 "CR0,Boost Control 0" bitfld.byte 0x00 7. " THUMP ,Generate a 1us pulse on 0->1 transition" "Not generated,Generated" bitfld.byte 0x00 5.--6. " MODE ,Boost mode select" "Sleep,Standby,,Active" bitfld.byte 0x00 0.--4. " VSEL ,Boost voltage selection" "Off,1.60V,1.70V,1.80V,1.90V,2.00V,2.10V,2.20V,2.30V,2.40V,2.50V,2.60V,2.70V,2.80V,2.90V,3.00V,3.10V,3.20V,3.30V,3.40V,3.50V,3.60V,,,4.00V,4.25V,4.50V,4.75V,5.00V,5.25V,5.50V,?..." else group.byte 0x00++0x00 line.byte 0x00 "CR0,Boost Control 0" bitfld.byte 0x00 7. " THUMP ,Generate a 1us pulse on 0->1 transition" "Not generated,Generated" bitfld.byte 0x00 5.--6. " MODE ,Boost mode select" "Sleep,Standby,,Active" bitfld.byte 0x00 0.--4. " VSEL ,Boost voltage selection" "Off,1.60V,1.70V,1.80V,1.90V,2.00V,2.10V,2.20V,2.30V,2.40V,2.50V,2.60V,2.70V,2.80V,2.90V,3.00V,3.10V,3.20V,3.30V,3.40V,3.50V,3.60V,?..." endif group.byte 0x01++0x03 line.byte 0x00 "CR1,Boost Control 1" bitfld.byte 0x00 4.--7. " TST ,Test mode for IV char of drive transistors" "Off,,,,NMOS on (weak),NMOS on (strong),PMOS on (weak),PMOS on (strong),?..." bitfld.byte 0x00 3. " BOOSTEN ,Enables boost operation" "Disabled,Enabled" bitfld.byte 0x00 2. " EXTMODE ,Enables mode control from xmode[1:0] instead of control register" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CLK ,Boost clock frequency" "2.0 MHz,0.5 MHz,0.125 MHz,External" line.byte 0x01 "CR2,Boost Control 2" bitfld.byte 0x01 7. " DISC ,Discontinuous mode" "Disabled,Enabled" bitfld.byte 0x01 6. " BOOSTING ,Converter boost" "Not boosted,Boosted" bitfld.byte 0x01 5. " EQUAL ,Converter bypass" "Not bypassed,Bypassed" bitfld.byte 0x01 4. " BUCKING ,Converter is bucking" "No,Yes" textline " " bitfld.byte 0x01 3. " EREFSEL ,selects external reference" "Internal,External 800mv precision" textline " " bitfld.byte 0x01 2. " LIMOFF ,Turns off skip cycle current limiter" "On,Off" bitfld.byte 0x01 1. " EQOFF ,Disables auto battery connect to output when Vin=Vsel" "No,Yes" bitfld.byte 0x01 0. " ENATM ,Enables automatic standby regulator" "Disabled,Enabled" line.byte 0x02 "CR3,Boost Control 3" line.byte 0x03 "SR,Boost Status" bitfld.byte 0x03 7. " READY ,Internal circuits initialize" "Not initialized,Initialized" bitfld.byte 0x03 6. " START ,Startup mode" "Disabled,Enabled" bitfld.byte 0x03 5. " NOBAT ,Battery input grounded (no battery present)" "Present,No battery" bitfld.byte 0x03 4. " OV ,Output above overvoltage limit" "Below,Above" textline " " bitfld.byte 0x03 3. " VHI ,Output is above vhigh limit" "Below,Above" bitfld.byte 0x03 2. " VNOM ,Output is above nominal" "Below,Above" bitfld.byte 0x03 1. " VLO ,Output is above vlow limit" "Below,Above" bitfld.byte 0x03 0. " UV ,Output is above undervoltage limit" "Below,Above" width 0x0B tree.end tree "PWRSYS (Power system)" base ad:0x40004330 width 5. group.byte 0x00++0x01 line.byte 0x00 "CR0,Power System Control Register 0" bitfld.byte 0x00 5. " EXT_VCCD ,Core digital (vccd) pin is driven with an externally regulated voltage" "Not driven,Driven" bitfld.byte 0x00 4. " EXT_VCCA ,Core analog (vcca) pin is driven with an externally regulated voltage" "Not driven,Driven" bitfld.byte 0x00 0. " RBBNW_DIS ,Disables the nwell reverse biasing during low power modes" "No,Yes" line.byte 0x01 "CR1,Power System Control Register 1" bitfld.byte 0x01 2. " I2CREG_EN ,Enables the I2C regulator" "Disabled,Enabled" bitfld.byte 0x01 1. " LDOA_DIS ,Disables the analog LDO regulator" "No,Yes" bitfld.byte 0x01 0. " LVREF_ON_LDOD ,LV reference (bandgap) is supplied by the digital LDO" "Not supplied,Supplied" textline " " base ad:0x40004680 width 9. group.byte 0x00++0x08 line.byte 0x00 "HIB_TR0,Hibernate Trim Register 0" bitfld.byte 0x00 4.--7. " TRIM ,Hibernate regulator trim" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " BIASG ,Hibernate regulator biasg tweak trim" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.byte 0x01 "HIB_TR1,Hibernate Trim Register 1" bitfld.byte 0x01 7. " DIS_HIBERNATE ,Disable hibernate mode" "No,Yes" bitfld.byte 0x01 4.--6. " RBB_TRIM ,Reverse body bias generator trim" "0,1,2,3,4,5,6,7" bitfld.byte 0x01 3. " ENLEG[3] ,Enable current leg of the hibernate regulator for the keepalive supply 3" "Disabled,Enabled" bitfld.byte 0x01 2. " ENLEG[2] ,Enable current leg of the hibernate regulator for the keepalive supply 2" "Disabled,Enabled" textline " " bitfld.byte 0x01 1. " ENLEG[1] ,Enable current leg of the hibernate regulator for the keepalive supply 1" "Disabled,Enabled" bitfld.byte 0x01 0. " ENLEG[0] ,Enable current leg of the hibernate regulator for the keepalive supply 0" "Disabled,Enabled" line.byte 0x02 "I2C_TR,I2C Regulator Trim Register 1" bitfld.byte 0x02 4.--6. " RESTRIM ,I2C regulator series resistor trim" "0,1,2,3,4,5,6,7" bitfld.byte 0x02 0.--1. " TRIM ,I2C regulator trim" "0,1,2,3" textline " " line.byte 0x03 "SLP_TR,Sleep Regulator Trim Register" bitfld.byte 0x03 5.--7. " HIBSLP_HOLDOFF ,Number of 1kHz ILO clocks before the hibernate/sleep regulator is ready after a chip reset" "0 clk => 0ms,1 clk => 1ms,2 clk => 2ms,3 clk => 3ms,4 clk => 4ms,5 clk => 5ms,6 clk => 6ms,7 clk => 7ms" bitfld.byte 0x03 4. " BYPASS ,Disables the sleep regulator and shorts vccd to vpwrsleep" "No,Yes" bitfld.byte 0x03 0.--3. " TRIM ,Sleep regulator trim" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.byte 0x04 "BUZZ_TR,Power Mode Buzz Trim Register" bitfld.byte 0x04 4.--7. " IDLE_BUZZ ,Buzz rate for digital and analog LDOs during idle mode" "2ms,4ms,8ms,16ms,32ms,64ms,128ms,256ms,512ms,?..." bitfld.byte 0x04 0.--3. " SLP_BUZZ ,Buzz rate for digital and analog LDOs during sleep mode" "2ms,4ms,8ms,16ms,32ms,64ms,128ms,256ms,512ms,?..." line.byte 0x05 "WAKE_TR0,Power Mode Wakeup Trim Register" bitfld.byte 0x05 4.--7. " WAKE_HO_INTERVAL ,Holdoff time to wait until sampling PRES-A/D" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x05 0.--3. " WAKE_TO_TAP ,Timeout time to wait until releasing the ignore_pres* conditioning for the PRES-A/D" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.byte 0x06 "WAKE_TR1,Power Mode Wakeup Trim Register" bitfld.byte 0x06 3.--5. " WAKE_PRECNT ,Wakeup precounter timeout used for wakeup holdoffs in {PWRSYS.WAKE_TR0}" "0,1,2,3,4,5,6,7" bitfld.byte 0x06 0.--2. " WAKE_IMOFREQ ,IMO frequency used during chip wakeup from a low power mode" "12 MHz,,24 MHz,,48 MHz,?..." line.byte 0x07 "BREF_TR,Boot Reference Trim Register" bitfld.byte 0x07 3. " BREF_TESTMODE ,Cootref test mode" "Disabled,Enabled" bitfld.byte 0x07 2. " BREF_FORCE_TURBO ,Boot reference is forced to turbo mode" "Not forced,Forced" bitfld.byte 0x07 1. " BREF_FORCE_OUTEN ,Boot reference output is forced enabled" "Not forced,Forced" textline " " bitfld.byte 0x07 0. " BREF_FORCE_REFSW ,Power system references are forced to come from the bootref" "Not forced,Forced" line.byte 0x08 "BG_TR,Bandgap Trim" bitfld.byte 0x08 5.--6. " INL_CTRL ,Current Bandgap - nonlinear current control" "0,1,2,3" bitfld.byte 0x08 0.--4. " TRIMBUF_LSB ,Bandgap Trim Buffer - LSB trim bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" width 0x0B tree.end tree "PM (Power management)" base ad:0x40004380 width 13. group.byte 0x00++0x04 line.byte 0x00 "TW_CFG0,Timewheel Configuration Register 0" bitfld.byte 0x00 0.--4. " FTW_INTERVAL ,Fast timewheel interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.byte 0x01 "TW_CFG1,Timewheel Configuration Register 1" bitfld.byte 0x01 0.--3. " CTW_INTERVAL ,Central timewheel interval" "Not supported,2ms,4ms,8ms,16ms,32ms,64ms,128ms,256ms,512ms,1024ms,2048ms,4096ms,?..." line.byte 0x02 "TW_CFG2,Timewheel Configuration Register 2" bitfld.byte 0x02 5. " ONEPPS_IE ,One pulse-per-second interrupt issue" "Not issued,Issued" bitfld.byte 0x02 4. " ONEPPS_EN ,One pulse-per-second enable" "Disabled,Enabled" bitfld.byte 0x02 3. " CTW_IE ,Central timewheel interrupt issue" "Not issued,Issued" textline " " bitfld.byte 0x02 2. " CTW_EN ,Central timewheel enable" "Disabled,Enabled" bitfld.byte 0x02 1. " FTW_IE ,Fast timewheel interrupt enable" "Disabled,Enabled" bitfld.byte 0x02 0. " FTW_EN ,Fast timewheel enable" "Disabled,Enabled" line.byte 0x03 "WDT_CFG,Watchdog Timer Configuration Register" bitfld.byte 0x03 7. " CTW_RESET ,Central timewheel counter reset" "No reset,Reset" bitfld.byte 0x03 4. " WDR_EN ,Watchdog reset enable" "Disabled,Enabled" bitfld.byte 0x03 0.--1. " WDT_INTERVAL ,Central timewheel taps that control the WDT period" "4ms-6ms,32ms-48ms,256ms-384ms,2.048s-3.072s" line.byte 0x04 "WDT_CR,Watchdog Timer Control Register" hgroup.byte 0x10++0x00 hide.byte 0x00 "INT_SR,Power Manager Interrupt Status Register" in group.byte 0x11++0x02 line.byte 0x00 "MODE_CFG0,Power Mode Configuration Register 0" textline " " line.byte 0x01 "MODE_CFG1,Power Mode Configuration Register 1" bitfld.byte 0x01 4. " DIS_SIMPWR ,Disable simulated power modes during test mode" "No,Yes" bitfld.byte 0x01 3. " LIMACT_IE ,Limited active interrupt issue" "Not issued,Issued" bitfld.byte 0x01 2. " LP_WAKE ,Deactivate all subsystems when returning from hibernate, sleep, or idle modes" "Not deactivated,Deactivated" textline " " bitfld.byte 0x01 1. " LPA_FIE ,Interrupts return the system to active mode" "Held off,Returned" bitfld.byte 0x01 0. " LPA_EN ,LPA mode enable" "Disabled,Enabled" line.byte 0x02 "MODE_CSR,Power Mode Control/Status Register" bitfld.byte 0x02 7. " NONRET_RST ,Non-retention reset occured for some chip registers" "Not occurred,Occurred" bitfld.byte 0x02 6. " LIMACT_MODE ,Limited active mode" "Disabled,Enabled" bitfld.byte 0x02 4. " REACTIVATE ,Reactivates subsystems with pending availability" "Not reactivated,Reactivated" textline " " bitfld.byte 0x02 3. " SIM_MODE ,Simulating power mode" "Disabled,Enabled" textline " " bitfld.byte 0x02 0.--2. " LP_MODE ,Global power mode" "Active,Standby,Idle,Sleep,Hibernate,,Hibernate+timewheels,?..." textline " " group.byte 0x18++0x01 line.byte 0x00 "WAKEUP_CFG0,Power Mode Wakeup Mask Configuration Register 0" bitfld.byte 0x00 6. " MASK_CLKPM ,PM internal timers can return the chip to active mode" "Not masked,Masked" bitfld.byte 0x00 5. " MASK_BOOST ,Boost undervoltage can return the chip to active mode" "Not masked,Masked" bitfld.byte 0x00 3. " MASK_I2C ,I2C can return the chip to active mode" "Not masked,Masked" textline " " bitfld.byte 0x00 2. " MASK_PICU ,PICU can return the chip to active mode" "Not masked,Masked" bitfld.byte 0x00 1. " MASK_DEBUG ,Debug on Chip can return the chip to active mode" "Not masked,Masked" bitfld.byte 0x00 0. " MASK_INT ,On-chip interrupts can return the chip to active mode" "Not masked,Masked" line.byte 0x01 "WAKEUP_CFG1,Power Mode Wakeup Mask Configuration Register 1" bitfld.byte 0x01 3. " MASK_CMP3 ,Comparator 3 can return the chip to active mode" "Not masked,Masked" bitfld.byte 0x01 2. " MASK_CMP2 ,Comparator 2 can return the chip to active mode" "Not masked,Masked" bitfld.byte 0x01 1. " MASK_CMP1 ,Comparator 1 can return the chip to active mode" "Not masked,Masked" textline " " bitfld.byte 0x01 0. " MASK_CMP0 ,Comparator 0 can return the chip to active mode" "Not masked,Masked" textline " " group.byte 0x20++0x0b line.byte 0x00 "ACT_CFG0,Active Power Mode Configuration Register 0" bitfld.byte 0x00 7. " EN_FM_EE ,Global enable for flash/EE" "Disabled,Enabled" bitfld.byte 0x00 6. " EN_UDBARRAY ,Global enable for UDB array" "Disabled,Enabled" bitfld.byte 0x00 5. " EN_IMO36M ,Enable IMO SPC clock source" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " EN_IMO ,Enable IMO clock source" "Disabled,Enabled" bitfld.byte 0x00 3. " EN_CLK_SPC ,Enable clk_spc" "Disabled,Enabled" bitfld.byte 0x00 2. " EN_CLK_BUS ,Enable clk_bus" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " EN_CPU ,Enable CPU" "Disabled,Enabled" bitfld.byte 0x00 0. " EN_IC ,Enable interrupt controller" "Disabled,Enabled" line.byte 0x01 "ACT_CFG1,Active Power Mode Configuration Register 1" bitfld.byte 0x01 3. " EN_CLK_A[3] ,Enable clk_a 3" "Disabled,Enabled" bitfld.byte 0x01 2. " EN_CLK_A[2] ,Enable clk_a 2" "Disabled,Enabled" bitfld.byte 0x01 1. " EN_CLK_A[1] ,Enable clk_a 1" "Disabled,Enabled" textline " " bitfld.byte 0x01 0. " EN_CLK_A[0] ,Enable clk_a 0" "Disabled,Enabled" line.byte 0x02 "ACT_CFG2,Active Power Mode Configuration Register 2" bitfld.byte 0x02 7. " EN_CLK_D[7] ,Enable clk_d 7" "Disabled,Enabled" bitfld.byte 0x02 6. " EN_CLK_D[6] ,Enable clk_d 6" "Disabled,Enabled" bitfld.byte 0x02 5. " EN_CLK_D[5] ,Enable clk_d 5" "Disabled,Enabled" textline " " bitfld.byte 0x02 4. " EN_CLK_D[4] ,Enable clk_d 4" "Disabled,Enabled" bitfld.byte 0x02 3. " EN_CLK_D[3] ,Enable clk_d 3" "Disabled,Enabled" bitfld.byte 0x02 2. " EN_CLK_D[2] ,Enable clk_d 2" "Disabled,Enabled" textline " " bitfld.byte 0x02 1. " EN_CLK_D[1] ,Enable clk_d 1" "Disabled,Enabled" bitfld.byte 0x02 0. " EN_CLK_D[0] ,Enable clk_d 0" "Disabled,Enabled" line.byte 0x03 "ACT_CFG3,Active Power Mode Configuration Register 3" bitfld.byte 0x03 3. " EN_TIMER[3] ,Enable timer/counter 3" "Disabled,Enabled" bitfld.byte 0x03 2. " EN_TIMER[2] ,Enable timer/counter 2" "Disabled,Enabled" bitfld.byte 0x03 1. " EN_TIMER[1] ,Enable timer/counter 1" "Disabled,Enabled" textline " " bitfld.byte 0x03 0. " EN_TIMER[0] ,Enable timer/counter 0" "Disabled,Enabled" line.byte 0x04 "ACT_CFG4,Active Power Mode Configuration Register 4" bitfld.byte 0x04 3. " EN_ABUF[3] ,Enable analog linear output buffer 3" "Disabled,Enabled" bitfld.byte 0x04 2. " EN_ABUF[2] ,Enable analog linear output buffer 2" "Disabled,Enabled" bitfld.byte 0x04 1. " EN_ABUF[1] ,Enable analog linear output buffer 1" "Disabled,Enabled" textline " " bitfld.byte 0x04 0. " EN_ABUF[0] ,Enable analog linear output buffer 0" "Disabled,Enabled" line.byte 0x05 "ACT_CFG5,Active Power Mode Configuration Register 5" bitfld.byte 0x05 6. " EN_EMIF ,Enable EMIF" "Disabled,Enabled" bitfld.byte 0x05 4. " EN_LCD ,Enable LCD" "Disabled,Enabled" bitfld.byte 0x05 2. " EN_I2C ,Enable I2C block" "Disabled,Enabled" textline " " bitfld.byte 0x05 0. " EN_FSUSB ,Enable FS-USB" "Disabled,Enabled" line.byte 0x06 "ACT_CFG6,Active Power Mode Configuration Register 6" bitfld.byte 0x06 4. " EN_DFB ,Enable DFB" "Disabled,Enabled" bitfld.byte 0x06 0. " EN_CAN ,Enable CAN block" "Disabled,Enabled" line.byte 0x07 "ACT_CFG7,Active Power Mode Configuration Register 7" bitfld.byte 0x07 3. " EN_CMP[3] ,Enable comparator 3" "Disabled,Enabled" bitfld.byte 0x07 2. " EN_CMP[2] ,Enable comparator 2" "Disabled,Enabled" bitfld.byte 0x07 1. " EN_CMP[1] ,Enable comparator 1" "Disabled,Enabled" textline " " bitfld.byte 0x07 0. " EN_CMP[0] ,Enable comparator 0" "Disabled,Enabled" line.byte 0x08 "ACT_CFG8,Active Power Mode Configuration Register 8" bitfld.byte 0x08 3. " EN_DAC[3] ,Enable DAC block 3" "Disabled,Enabled" bitfld.byte 0x08 2. " EN_DAC[2] ,Enable DAC block 2" "Disabled,Enabled" bitfld.byte 0x08 1. " EN_DAC[1] ,Enable DAC block 1" "Disabled,Enabled" textline " " bitfld.byte 0x08 0. " EN_DAC[0] ,Enable DAC block 0" "Disabled,Enabled" line.byte 0x09 "ACT_CFG9,Active Power Mode Configuration Register 9" bitfld.byte 0x09 3. " EN_SWCAP[3] ,Enable switchcap block 3" "Disabled,Enabled" bitfld.byte 0x09 2. " EN_SWCAP[2] ,Enable switchcap block 2" "Disabled,Enabled" bitfld.byte 0x09 1. " EN_SWCAP[1] ,Enable switchcap block 1" "Disabled,Enabled" textline " " bitfld.byte 0x09 0. " EN_SWCAP[0] ,Enable switchcap block 0" "Disabled,Enabled" line.byte 0x0a "ACT_CFG10,Active Power Mode Configuration Register 10" bitfld.byte 0x0a 0. " EN_DEC ,Enable decimator" "Disabled,Enabled" line.byte 0x0b "ACT_CFG11,Active Power Mode Configuration Register 11" bitfld.byte 0x0b 5. " EN_REFBUFR ,Enable RIGHT analog reference buffer" "Disabled,Enabled" bitfld.byte 0x0b 4. " EN_REFBUFL ,Enable LEFT analog reference buffer" "Disabled,Enabled" bitfld.byte 0x0b 1. " EN_SARP[1] ,Enable SAR 1" "Disabled,Enabled" textline " " bitfld.byte 0x0b 0. " EN_SARP[0] ,Enable SAR 0" "Disabled,Enabled" group.byte 0x30++0x0b line.byte 0x00 "STBY_CFG0,Standby Power Mode Configuration Register 0" bitfld.byte 0x00 7. " EN_FM_EE ,Global enable for flash/EE" "Disabled,Enabled" bitfld.byte 0x00 6. " EN_UDBARRAY ,Global enable for UDB array" "Disabled,Enabled" bitfld.byte 0x00 5. " EN_IMO36M ,Enable IMO SPC clock source" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " EN_IMO ,Enable IMO clock source" "Disabled,Enabled" bitfld.byte 0x00 3. " EN_CLK_SPC ,Enable clk_spc" "Disabled,Enabled" bitfld.byte 0x00 2. " EN_CLK_BUS ,Enable clk_bus" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " EN_CPU ,Enable CPU" "Disabled,Enabled" bitfld.byte 0x00 0. " EN_IC ,Enable interrupt controller" "Disabled,Enabled" line.byte 0x01 "STBY_CFG1,Standby Power Mode Configuration Register 1" bitfld.byte 0x01 3. " EN_CLK_A[3] ,Enable clk_a 3" "Disabled,Enabled" bitfld.byte 0x01 2. " EN_CLK_A[2] ,Enable clk_a 2" "Disabled,Enabled" bitfld.byte 0x01 1. " EN_CLK_A[1] ,Enable clk_a 1" "Disabled,Enabled" textline " " bitfld.byte 0x01 0. " EN_CLK_A[0] ,Enable clk_a 0" "Disabled,Enabled" line.byte 0x02 "STBY_CFG2,Standby Power Mode Configuration Register 2" bitfld.byte 0x02 7. " EN_CLK_D[7] ,Enable clk_d 7" "Disabled,Enabled" bitfld.byte 0x02 6. " EN_CLK_D[6] ,Enable clk_d 6" "Disabled,Enabled" bitfld.byte 0x02 5. " EN_CLK_D[5] ,Enable clk_d 5" "Disabled,Enabled" textline " " bitfld.byte 0x02 4. " EN_CLK_D[4] ,Enable clk_d 4" "Disabled,Enabled" bitfld.byte 0x02 3. " EN_CLK_D[3] ,Enable clk_d 3" "Disabled,Enabled" bitfld.byte 0x02 2. " EN_CLK_D[2] ,Enable clk_d 2" "Disabled,Enabled" textline " " bitfld.byte 0x02 1. " EN_CLK_D[1] ,Enable clk_d 1" "Disabled,Enabled" bitfld.byte 0x02 0. " EN_CLK_D[0] ,Enable clk_d 0" "Disabled,Enabled" line.byte 0x03 "STBY_CFG3,Standby Power Mode Configuration Register 3" bitfld.byte 0x03 3. " EN_TIMER[3] ,Enable timer/counter 3" "Disabled,Enabled" bitfld.byte 0x03 2. " EN_TIMER[2] ,Enable timer/counter 2" "Disabled,Enabled" bitfld.byte 0x03 1. " EN_TIMER[1] ,Enable timer/counter 1" "Disabled,Enabled" textline " " bitfld.byte 0x03 0. " EN_TIMER[0] ,Enable timer/counter 0" "Disabled,Enabled" line.byte 0x04 "STBY_CFG4,Standby Power Mode Configuration Register 4" bitfld.byte 0x04 3. " EN_ABUF[3] ,Enable analog linear output buffer 3" "Disabled,Enabled" bitfld.byte 0x04 2. " EN_ABUF[2] ,Enable analog linear output buffer 2" "Disabled,Enabled" bitfld.byte 0x04 1. " EN_ABUF[1] ,Enable analog linear output buffer 1" "Disabled,Enabled" textline " " bitfld.byte 0x04 0. " EN_ABUF[0] ,Enable analog linear output buffer 0" "Disabled,Enabled" line.byte 0x05 "STBY_CFG5,Standby Power Mode Configuration Register 5" bitfld.byte 0x05 6. " EN_EMIF ,Enable EMIF" "Disabled,Enabled" bitfld.byte 0x05 4. " EN_LCD ,Enable LCD" "Disabled,Enabled" bitfld.byte 0x05 2. " EN_I2C ,Enable I2C block" "Disabled,Enabled" textline " " bitfld.byte 0x05 0. " EN_FSUSB ,Enable FS-USB" "Disabled,Enabled" line.byte 0x06 "STBY_CFG6,Standby Power Mode Configuration Register 6" bitfld.byte 0x06 4. " EN_DFB ,Enable DFB" "Disabled,Enabled" bitfld.byte 0x06 0. " EN_CAN ,Enable CAN block" "Disabled,Enabled" line.byte 0x07 "STBY_CFG7,Standby Power Mode Configuration Register 7" bitfld.byte 0x07 3. " EN_CMP[3] ,Enable comparator 3" "Disabled,Enabled" bitfld.byte 0x07 2. " EN_CMP[2] ,Enable comparator 2" "Disabled,Enabled" bitfld.byte 0x07 1. " EN_CMP[1] ,Enable comparator 1" "Disabled,Enabled" textline " " bitfld.byte 0x07 0. " EN_CMP[0] ,Enable comparator 0" "Disabled,Enabled" line.byte 0x08 "STBY_CFG8,Standby Power Mode Configuration Register 8" bitfld.byte 0x08 3. " EN_DAC[3] ,Enable DAC block 3" "Disabled,Enabled" bitfld.byte 0x08 2. " EN_DAC[2] ,Enable DAC block 2" "Disabled,Enabled" bitfld.byte 0x08 1. " EN_DAC[1] ,Enable DAC block 1" "Disabled,Enabled" textline " " bitfld.byte 0x08 0. " EN_DAC[0] ,Enable DAC block 0" "Disabled,Enabled" line.byte 0x09 "STBY_CFG9,Standby Power Mode Configuration Register 9" bitfld.byte 0x09 3. " EN_SWCAP[3] ,Enable switchcap block 3" "Disabled,Enabled" bitfld.byte 0x09 2. " EN_SWCAP[2] ,Enable switchcap block 2" "Disabled,Enabled" bitfld.byte 0x09 1. " EN_SWCAP[1] ,Enable switchcap block 1" "Disabled,Enabled" textline " " bitfld.byte 0x09 0. " EN_SWCAP[0] ,Enable switchcap block 0" "Disabled,Enabled" line.byte 0x0a "STBY_CFG10,Standby Power Mode Configuration Register 10" bitfld.byte 0x0a 0. " EN_DEC ,Enable decimator" "Disabled,Enabled" line.byte 0x0b "STBY_CFG11,Standby Power Mode Configuration Register 11" bitfld.byte 0x0b 5. " EN_REFBUFR ,Enable RIGHT analog reference buffer" "Disabled,Enabled" bitfld.byte 0x0b 4. " EN_REFBUFL ,Enable LEFT analog reference buffer" "Disabled,Enabled" bitfld.byte 0x0b 1. " EN_SARP[1] ,Enable SAR 1" "Disabled,Enabled" textline " " bitfld.byte 0x0b 0. " EN_SARP[0] ,Enable SAR 0" "Disabled,Enabled" textline " " group.byte 0x40++0x06 line.byte 0x00 "AVAIL_CR0,Power Mode Available Subsystem Control Register 0" bitfld.byte 0x00 3. " EN_FM[3] ,Requests flash macro be available 3" "Not requested,Requested" bitfld.byte 0x00 2. " EN_FM[2] ,Requests flash macro be available 2" "Not requested,Requested" bitfld.byte 0x00 1. " EN_FM[1] ,Requests flash macro be available 1" "Not requested,Requested" textline " " bitfld.byte 0x00 0. " EN_FM[0] ,Requests flash macro be available 0" "Not requested,Requested" line.byte 0x01 "AVAIL_CR1,Power Mode Available Subsystem Control Register 1" bitfld.byte 0x01 3. " EN_SYSMEM[3] ,Requests sysmem macro be available 3" "Not requested,Requested" bitfld.byte 0x01 2. " EN_SYSMEM[2] ,Requests sysmem macro be available 2" "Not requested,Requested" bitfld.byte 0x01 1. " EN_SYSMEM[1] ,Requests sysmem macro be available 1" "Not requested,Requested" textline " " bitfld.byte 0x01 0. " EN_SYSMEM[0] ,Requests sysmem macro be available 0" "Not requested,Requested" line.byte 0x02 "AVAIL_CR2,Power Mode Available Subsystem Control Register 2" bitfld.byte 0x02 4. " EN_UDB ,Requests a UDB bank be available" "Not requested,Requested" bitfld.byte 0x02 0. " EN_EE ,Requests a EEPROM macro be available" "Not requested,Requested" line.byte 0x03 "AVAIL_CR3,Power Mode Available Subsystem Control Register 3" bitfld.byte 0x03 0. " EN_DFB ,Requests a DFB be available" "Not requested,Requested" line.byte 0x04 "AVAIL_CR4,Power Mode Available Subsystem Control Register 4" bitfld.byte 0x04 4. " EN_I2C ,Requests I2C be available" "Not requested,Requested" bitfld.byte 0x04 2. " EN_MAIN ,Requests main domain be available" "Not requested,Requested" bitfld.byte 0x04 0. " EN_SPC ,Requests SPC be available" "Not requested,Requested" line.byte 0x05 "AVAIL_CR5,Power Mode Available Subsystem Control Register 5" bitfld.byte 0x05 0. " EN_DSM ,Requests a delsig channel be available" "Not requested,Requested" line.byte 0x06 "AVAIL_CR6,Power Mode Available Subsystem Control Register 6" bitfld.byte 0x06 4. " EN_FSUSBIO ,Requests FSUSB IO be available" "Not requested,Requested" bitfld.byte 0x06 2. " EN_ANALCD ,Requests LCD be available" "Not requested,Requested" bitfld.byte 0x06 1. " EN_ANAPUMP ,Requests analog pump be available" "Not requested,Requested" textline " " bitfld.byte 0x06 0. " EN_ANAMISC ,Requests miscellaneous analog be available" "Not requested,Requested" rgroup.byte 0x50++0x06 line.byte 0x00 "AVAIL_SR0,Power Mode Available Subsystem Status Register 0" bitfld.byte 0x00 3. " EN_FM[3] ,Available flash macro 3" "Not available,Available" bitfld.byte 0x00 2. " EN_FM[2] ,Available flash macro 2" "Not available,Available" bitfld.byte 0x00 1. " EN_FM[1] ,Available flash macro 1" "Not available,Available" textline " " bitfld.byte 0x00 0. " EN_FM[0] ,Available flash macro 0" "Not available,Available" line.byte 0x01 "AVAIL_SR1,Power Mode Available Subsystem Status Register 1" bitfld.byte 0x01 3. " EN_SYSMEM[3] ,Available sysmem macro 3" "Not available,Available" bitfld.byte 0x01 2. " EN_SYSMEM[2] ,Available sysmem macro 2" "Not available,Available" bitfld.byte 0x01 1. " EN_SYSMEM[1] ,Available sysmem macro 1" "Not available,Available" textline " " bitfld.byte 0x01 0. " EN_SYSMEM[0] ,Available sysmem macro 0" "Not available,Available" line.byte 0x02 "AVAIL_SR2,Power Mode Available Subsystem Status Register 2" bitfld.byte 0x02 4. " EN_UDB ,Available UDB bank" "Not available,Available" bitfld.byte 0x02 0. " EN_EE ,Available EEPROM macro" "Not available,Available" line.byte 0x03 "AVAIL_SR3,Power Mode Available Subsystem Status Register 3" bitfld.byte 0x03 0. " EN_DFB ,Available DFB" "Not available,Available" line.byte 0x04 "AVAIL_SR4,Power Mode Available Subsystem Status Register 4" bitfld.byte 0x04 4. " EN_I2C ,Available I2C" "Not available,Available" bitfld.byte 0x04 2. " EN_MAIN ,Available main domain" "Not available,Available" bitfld.byte 0x04 0. " EN_SPC ,Available SPC" "Not available,Available" line.byte 0x05 "AVAIL_SR5,Power Mode Available Subsystem Status Register 5" bitfld.byte 0x05 0. " EN_DSM ,Available delsig channel" "Not available,Available" line.byte 0x06 "AVAIL_SR6,Power Mode Available Subsystem Status Register 6" bitfld.byte 0x06 4. " EN_FSUSBIO ,Available FSUSB IO" "Not available,Available" bitfld.byte 0x06 2. " EN_ANALCD ,Available LCD" "Not available,Available" bitfld.byte 0x06 1. " EN_ANAPUMP ,Available analog pump" "Not available,Available" textline " " bitfld.byte 0x06 0. " EN_ANAMISC ,Available miscellaneous analog" "Not available,Available" width 0x0B tree.end tree.open "PICU (Ports interrupt control)" tree "PICU 0" base ad:0x40004500 width 11. group.byte 0x0++0x00 line.byte 0x00 "INTTYPE0,Port Interrupt Control Type Register 0" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x1++0x00 line.byte 0x00 "INTTYPE1,Port Interrupt Control Type Register 1" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x2++0x00 line.byte 0x00 "INTTYPE2,Port Interrupt Control Type Register 2" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x3++0x00 line.byte 0x00 "INTTYPE3,Port Interrupt Control Type Register 3" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x4++0x00 line.byte 0x00 "INTTYPE4,Port Interrupt Control Type Register 4" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x5++0x00 line.byte 0x00 "INTTYPE5,Port Interrupt Control Type Register 5" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x6++0x00 line.byte 0x00 "INTTYPE6,Port Interrupt Control Type Register 6" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x7++0x00 line.byte 0x00 "INTTYPE7,Port Interrupt Control Type Register 7" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" base ad:0x40004580 hgroup.byte 0x00++0x00 hide.byte 0x00 "INTSTAT,Port Interrupt Control Status Register" in rgroup.byte 0x10++0x00 line.byte 0x00 "SNAP,Port Interrupt Control Snap Shot Register" width 0x0B tree.end tree "PICU 1" base ad:0x40004508 width 11. group.byte 0x0++0x00 line.byte 0x00 "INTTYPE0,Port Interrupt Control Type Register 0" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x1++0x00 line.byte 0x00 "INTTYPE1,Port Interrupt Control Type Register 1" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x2++0x00 line.byte 0x00 "INTTYPE2,Port Interrupt Control Type Register 2" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x3++0x00 line.byte 0x00 "INTTYPE3,Port Interrupt Control Type Register 3" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x4++0x00 line.byte 0x00 "INTTYPE4,Port Interrupt Control Type Register 4" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x5++0x00 line.byte 0x00 "INTTYPE5,Port Interrupt Control Type Register 5" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x6++0x00 line.byte 0x00 "INTTYPE6,Port Interrupt Control Type Register 6" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x7++0x00 line.byte 0x00 "INTTYPE7,Port Interrupt Control Type Register 7" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" base ad:0x40004581 hgroup.byte 0x00++0x00 hide.byte 0x00 "INTSTAT,Port Interrupt Control Status Register" in rgroup.byte 0x10++0x00 line.byte 0x00 "SNAP,Port Interrupt Control Snap Shot Register" width 0x0B tree.end tree "PICU 2" base ad:0x40004510 width 11. group.byte 0x0++0x00 line.byte 0x00 "INTTYPE0,Port Interrupt Control Type Register 0" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x1++0x00 line.byte 0x00 "INTTYPE1,Port Interrupt Control Type Register 1" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x2++0x00 line.byte 0x00 "INTTYPE2,Port Interrupt Control Type Register 2" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x3++0x00 line.byte 0x00 "INTTYPE3,Port Interrupt Control Type Register 3" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x4++0x00 line.byte 0x00 "INTTYPE4,Port Interrupt Control Type Register 4" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x5++0x00 line.byte 0x00 "INTTYPE5,Port Interrupt Control Type Register 5" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x6++0x00 line.byte 0x00 "INTTYPE6,Port Interrupt Control Type Register 6" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x7++0x00 line.byte 0x00 "INTTYPE7,Port Interrupt Control Type Register 7" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" base ad:0x40004582 hgroup.byte 0x00++0x00 hide.byte 0x00 "INTSTAT,Port Interrupt Control Status Register" in rgroup.byte 0x10++0x00 line.byte 0x00 "SNAP,Port Interrupt Control Snap Shot Register" width 0x0B tree.end tree "PICU 3" base ad:0x40004518 width 11. group.byte 0x0++0x00 line.byte 0x00 "INTTYPE0,Port Interrupt Control Type Register 0" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x1++0x00 line.byte 0x00 "INTTYPE1,Port Interrupt Control Type Register 1" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x2++0x00 line.byte 0x00 "INTTYPE2,Port Interrupt Control Type Register 2" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x3++0x00 line.byte 0x00 "INTTYPE3,Port Interrupt Control Type Register 3" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x4++0x00 line.byte 0x00 "INTTYPE4,Port Interrupt Control Type Register 4" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x5++0x00 line.byte 0x00 "INTTYPE5,Port Interrupt Control Type Register 5" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x6++0x00 line.byte 0x00 "INTTYPE6,Port Interrupt Control Type Register 6" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x7++0x00 line.byte 0x00 "INTTYPE7,Port Interrupt Control Type Register 7" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" base ad:0x40004583 hgroup.byte 0x00++0x00 hide.byte 0x00 "INTSTAT,Port Interrupt Control Status Register" in rgroup.byte 0x10++0x00 line.byte 0x00 "SNAP,Port Interrupt Control Snap Shot Register" width 0x0B tree.end tree "PICU 4" base ad:0x40004520 width 11. group.byte 0x0++0x00 line.byte 0x00 "INTTYPE0,Port Interrupt Control Type Register 0" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x1++0x00 line.byte 0x00 "INTTYPE1,Port Interrupt Control Type Register 1" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x2++0x00 line.byte 0x00 "INTTYPE2,Port Interrupt Control Type Register 2" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x3++0x00 line.byte 0x00 "INTTYPE3,Port Interrupt Control Type Register 3" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x4++0x00 line.byte 0x00 "INTTYPE4,Port Interrupt Control Type Register 4" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x5++0x00 line.byte 0x00 "INTTYPE5,Port Interrupt Control Type Register 5" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x6++0x00 line.byte 0x00 "INTTYPE6,Port Interrupt Control Type Register 6" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x7++0x00 line.byte 0x00 "INTTYPE7,Port Interrupt Control Type Register 7" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" base ad:0x40004584 hgroup.byte 0x00++0x00 hide.byte 0x00 "INTSTAT,Port Interrupt Control Status Register" in rgroup.byte 0x10++0x00 line.byte 0x00 "SNAP,Port Interrupt Control Snap Shot Register" width 0x0B tree.end tree "PICU 5" base ad:0x40004528 width 11. group.byte 0x0++0x00 line.byte 0x00 "INTTYPE0,Port Interrupt Control Type Register 0" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x1++0x00 line.byte 0x00 "INTTYPE1,Port Interrupt Control Type Register 1" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x2++0x00 line.byte 0x00 "INTTYPE2,Port Interrupt Control Type Register 2" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x3++0x00 line.byte 0x00 "INTTYPE3,Port Interrupt Control Type Register 3" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x4++0x00 line.byte 0x00 "INTTYPE4,Port Interrupt Control Type Register 4" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x5++0x00 line.byte 0x00 "INTTYPE5,Port Interrupt Control Type Register 5" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x6++0x00 line.byte 0x00 "INTTYPE6,Port Interrupt Control Type Register 6" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x7++0x00 line.byte 0x00 "INTTYPE7,Port Interrupt Control Type Register 7" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" base ad:0x40004585 hgroup.byte 0x00++0x00 hide.byte 0x00 "INTSTAT,Port Interrupt Control Status Register" in rgroup.byte 0x10++0x00 line.byte 0x00 "SNAP,Port Interrupt Control Snap Shot Register" width 0x0B tree.end tree "PICU 6" base ad:0x40004530 width 11. group.byte 0x0++0x00 line.byte 0x00 "INTTYPE0,Port Interrupt Control Type Register 0" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x1++0x00 line.byte 0x00 "INTTYPE1,Port Interrupt Control Type Register 1" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x2++0x00 line.byte 0x00 "INTTYPE2,Port Interrupt Control Type Register 2" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x3++0x00 line.byte 0x00 "INTTYPE3,Port Interrupt Control Type Register 3" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x4++0x00 line.byte 0x00 "INTTYPE4,Port Interrupt Control Type Register 4" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x5++0x00 line.byte 0x00 "INTTYPE5,Port Interrupt Control Type Register 5" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x6++0x00 line.byte 0x00 "INTTYPE6,Port Interrupt Control Type Register 6" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x7++0x00 line.byte 0x00 "INTTYPE7,Port Interrupt Control Type Register 7" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" base ad:0x40004586 hgroup.byte 0x00++0x00 hide.byte 0x00 "INTSTAT,Port Interrupt Control Status Register" in rgroup.byte 0x10++0x00 line.byte 0x00 "SNAP,Port Interrupt Control Snap Shot Register" width 0x0B tree.end tree "PICU 12" base ad:0x40004560 width 11. group.byte 0x0++0x00 line.byte 0x00 "INTTYPE0,Port Interrupt Control Type Register 0" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x1++0x00 line.byte 0x00 "INTTYPE1,Port Interrupt Control Type Register 1" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x2++0x00 line.byte 0x00 "INTTYPE2,Port Interrupt Control Type Register 2" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x3++0x00 line.byte 0x00 "INTTYPE3,Port Interrupt Control Type Register 3" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x4++0x00 line.byte 0x00 "INTTYPE4,Port Interrupt Control Type Register 4" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x5++0x00 line.byte 0x00 "INTTYPE5,Port Interrupt Control Type Register 5" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x6++0x00 line.byte 0x00 "INTTYPE6,Port Interrupt Control Type Register 6" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x7++0x00 line.byte 0x00 "INTTYPE7,Port Interrupt Control Type Register 7" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" base ad:0x4000458C hgroup.byte 0x00++0x00 hide.byte 0x00 "INTSTAT,Port Interrupt Control Status Register" in rgroup.byte 0x10++0x00 line.byte 0x00 "SNAP,Port Interrupt Control Snap Shot Register" width 0x0B tree.end tree "PICU 15" base ad:0x40004578 width 11. group.byte 0x0++0x00 line.byte 0x00 "INTTYPE0,Port Interrupt Control Type Register 0" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x1++0x00 line.byte 0x00 "INTTYPE1,Port Interrupt Control Type Register 1" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x2++0x00 line.byte 0x00 "INTTYPE2,Port Interrupt Control Type Register 2" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x3++0x00 line.byte 0x00 "INTTYPE3,Port Interrupt Control Type Register 3" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x4++0x00 line.byte 0x00 "INTTYPE4,Port Interrupt Control Type Register 4" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x5++0x00 line.byte 0x00 "INTTYPE5,Port Interrupt Control Type Register 5" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x6++0x00 line.byte 0x00 "INTTYPE6,Port Interrupt Control Type Register 6" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" group.byte 0x7++0x00 line.byte 0x00 "INTTYPE7,Port Interrupt Control Type Register 7" bitfld.byte 0x00 0.--1. " INTTYPE ,Type of interrupt type enabled" "DISABLE,RISING_EDGE,FALLING_EDGE,CHANGE_MODE" base ad:0x4000458F hgroup.byte 0x00++0x00 hide.byte 0x00 "INTSTAT,Port Interrupt Control Status Register" in rgroup.byte 0x10++0x00 line.byte 0x00 "SNAP,Port Interrupt Control Snap Shot Register" width 0x0B tree.end tree.end tree.open "CMP (Comparator)" tree "Miscellaneous" base ad:0x40005B90 width 6. rgroup.byte 0x00++0x00 line.byte 0x00 "WRK,Comparator output working register" bitfld.byte 0x00 3. " CMP3_OUT ,Comparator Output 3" "Low,High" bitfld.byte 0x00 2. " CMP2_OUT ,Comparator Output 2" "Low,High" bitfld.byte 0x00 1. " CMP1_OUT ,Comparator Output 1" "Low,High" bitfld.byte 0x00 0. " CMP0_OUT ,Comparator Output 0" "Low,High" group.byte 0x01++0x00 line.byte 0x00 "LTRI,Comparator LTRI working register" bitfld.byte 0x00 2.--3. " CMP_MXDFT ,Comparator Test Point selection" "cmp0_out_tr,cmp1_out_tr,cmp2_out_tr,cmp3_out_tr" bitfld.byte 0x00 0. " LTRI ,Enables/latches the comparator output for transient time measurement purposes" "Disabled,Enabled" width 0x0B tree.end tree "CMP 0" base ad:0x40004600 width 5. group.byte 0x00++0x00 line.byte 0x00 "TR,Comparator Trim Register" bitfld.byte 0x00 4.--7. " TR2 ,Trim value to be added to the N-type load for offset calibration" "Not added,~1mV to negative,~2mV to negative,~3mV to negative,~4mV to negative,~5mV to negative,~6mV to negative,~7mV to negative,Not added,~1mV to positive,~2mV to positive,~3mV to positive,~4mV to positive,~5mV to positive,~6mV to positive,~7mV to positive" bitfld.byte 0x00 0.--3. " TR1 ,Trim value to be added to the P-type load for offset calibration" "Not added,~1mV to positive,~2mV to positive,~3mV to positive,~4mV to positive,~5mV to positive,~6mV to positive,~7mV to positive,~1mV to negative,~2mV to negative,~3mV to negative,~4mV to negative,~5mV to negative,~6mV to negative,~7mV to negative,~8mV to negative" base ad:0x40005840 group.byte 0x00++0x00 line.byte 0x00 "CR,Comparator Control Register" bitfld.byte 0x00 6. " FILT ,Enables a glitch filter at the output of the comparator" "Disabled,Enabled" bitfld.byte 0x00 5. " HYST ,Enables a hysteresis of 10mV typ" "Disabled,Enabled" bitfld.byte 0x00 4. " CAL_EN ,Enables shorting of the two comparator inputs for trim calibration purposes" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " MX_AO ,Comparator sleep always-on logic mux control" "Bypassed,Enabled" bitfld.byte 0x00 2. " PD_OVERRIDE ,Power down override to allow comparator to continue operating during sleep" "Not overridden,Overridden" bitfld.byte 0x00 0.--1. " SEL ,Selects the mode of operation of the comparator" "Slow,Fast,Ultra low power,Illegal" base ad:0x40005AC0 group.byte 0x00++0x00 line.byte 0x00 "SW0,Comparator Analog Routing Register 0" bitfld.byte 0x00 7. " VP_AG7 ,Connect positive voltage input to analog global of same side 7" "Not connected,Connected" bitfld.byte 0x00 6. " VP_AG6 ,Connect positive voltage input to analog global of same side 6" "Not connected,Connected" bitfld.byte 0x00 5. " VP_AG5 ,Connect positive voltage input to analog global of same side 5" "Not connected,Connected" textline " " bitfld.byte 0x00 4. " VP_AG4 ,Connect positive voltage input to analog global of same side 4" "Not connected,Connected" bitfld.byte 0x00 3. " VP_AG3 ,Connect positive voltage input to analog global of same side 3" "Not connected,Connected" bitfld.byte 0x00 2. " VP_AG2 ,Connect positive voltage input to analog global of same side 2" "Not connected,Connected" textline " " bitfld.byte 0x00 1. " VP_AG1 ,Connect positive voltage input to analog global of same side 1" "Not connected,Connected" bitfld.byte 0x00 0. " VP_AG0 ,Connect positive voltage input to analog global of same side 0" "Not connected,Connected" group.byte 0x02++0x02 line.byte 0x00 "SW2,Comparator Analog Routing Register 2" bitfld.byte 0x00 1. " VP_ABUS1 ,Connect positive voltage input to analog bus of the same side 1" "Not connected,Connected" bitfld.byte 0x00 0. " VP_ABUS0 ,Connect positive voltage input to analog bus of the same side 0" "Not connected,Connected" line.byte 0x01 "SW3,Comparator Analog Routing Register 3" bitfld.byte 0x01 6. " VN_VREF1 ,Connect negative voltage input to Voltage Reference 0" "Not connected,Connected" bitfld.byte 0x01 5. " VN_VREF0 ,Connect negative voltage input to Voltage Reference 1" "Not connected,Connected" bitfld.byte 0x01 4. " VN_AMX ,Connect negative voltage input to Analog Mux Bus" "Not connected,Connected" textline " " bitfld.byte 0x01 3. " VP_REFBUF ,Connect positive voltage input to CapSense reference buffer channel" "Not connected,Connected" bitfld.byte 0x01 0. " VP_AMX ,Connect positive voltage input to Analog Mux Bus" "Not connected,Connected" line.byte 0x02 "SW4,Comparator Analog Routing Register 4" bitfld.byte 0x02 6. " VN_AG6 ,Connect negative voltage input to analog global of same side 6" "Not connected,Connected" bitfld.byte 0x02 4. " VN_AG4 ,Connect negative voltage input to analog global of same side 4" "Not connected,Connected" bitfld.byte 0x02 2. " VN_AG2 ,Connect negative voltage input to analog global of same side 2" "Not connected,Connected" textline " " bitfld.byte 0x02 0. " VN_AG0 ,Connect negative voltage input to analog global of same side 0" "Not connected,Connected" group.byte 0x06++0x01 line.byte 0x00 "SW6,Comparator Analog Routing Register 6" bitfld.byte 0x00 3. " VN_ABUS3 ,Connect negative voltage input to analog bus of the same side 3" "Not connected,Connected" bitfld.byte 0x00 2. " VN_ABUS2 ,Connect negative voltage input to analog bus of the same side 2" "Not connected,Connected" line.byte 0x01 "CLK,Comparator Clock Control Register" bitfld.byte 0x01 4. " BYPASS_SYNC ,Bypass Synchronization" "Not bypassed,Bypassed" bitfld.byte 0x01 3. " CLK_EN ,Clock gating control" "Disabled,Enabled" bitfld.byte 0x01 0.--2. " MX_CLK ,Clock Selection" "clk_a0 & clk_a0_dig,clk_a1 & clk_a1_dig,clk_a2 & clk_a2_dig,clk_a3 & clk_a3_dig,UDB gen. clk,?..." width 0x0B tree.end tree "CMP 1" base ad:0x40004601 width 5. group.byte 0x00++0x00 line.byte 0x00 "TR,Comparator Trim Register" bitfld.byte 0x00 4.--7. " TR2 ,Trim value to be added to the N-type load for offset calibration" "Not added,~1mV to negative,~2mV to negative,~3mV to negative,~4mV to negative,~5mV to negative,~6mV to negative,~7mV to negative,Not added,~1mV to positive,~2mV to positive,~3mV to positive,~4mV to positive,~5mV to positive,~6mV to positive,~7mV to positive" bitfld.byte 0x00 0.--3. " TR1 ,Trim value to be added to the P-type load for offset calibration" "Not added,~1mV to positive,~2mV to positive,~3mV to positive,~4mV to positive,~5mV to positive,~6mV to positive,~7mV to positive,~1mV to negative,~2mV to negative,~3mV to negative,~4mV to negative,~5mV to negative,~6mV to negative,~7mV to negative,~8mV to negative" base ad:0x40005841 group.byte 0x00++0x00 line.byte 0x00 "CR,Comparator Control Register" bitfld.byte 0x00 6. " FILT ,Enables a glitch filter at the output of the comparator" "Disabled,Enabled" bitfld.byte 0x00 5. " HYST ,Enables a hysteresis of 10mV typ" "Disabled,Enabled" bitfld.byte 0x00 4. " CAL_EN ,Enables shorting of the two comparator inputs for trim calibration purposes" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " MX_AO ,Comparator sleep always-on logic mux control" "Bypassed,Enabled" bitfld.byte 0x00 2. " PD_OVERRIDE ,Power down override to allow comparator to continue operating during sleep" "Not overridden,Overridden" bitfld.byte 0x00 0.--1. " SEL ,Selects the mode of operation of the comparator" "Slow,Fast,Ultra low power,Illegal" base ad:0x40005AC8 group.byte 0x00++0x00 line.byte 0x00 "SW0,Comparator Analog Routing Register 0" bitfld.byte 0x00 7. " VP_AG7 ,Connect positive voltage input to analog global of same side 7" "Not connected,Connected" bitfld.byte 0x00 6. " VP_AG6 ,Connect positive voltage input to analog global of same side 6" "Not connected,Connected" bitfld.byte 0x00 5. " VP_AG5 ,Connect positive voltage input to analog global of same side 5" "Not connected,Connected" textline " " bitfld.byte 0x00 4. " VP_AG4 ,Connect positive voltage input to analog global of same side 4" "Not connected,Connected" bitfld.byte 0x00 3. " VP_AG3 ,Connect positive voltage input to analog global of same side 3" "Not connected,Connected" bitfld.byte 0x00 2. " VP_AG2 ,Connect positive voltage input to analog global of same side 2" "Not connected,Connected" textline " " bitfld.byte 0x00 1. " VP_AG1 ,Connect positive voltage input to analog global of same side 1" "Not connected,Connected" bitfld.byte 0x00 0. " VP_AG0 ,Connect positive voltage input to analog global of same side 0" "Not connected,Connected" group.byte 0x02++0x02 line.byte 0x00 "SW2,Comparator Analog Routing Register 2" bitfld.byte 0x00 1. " VP_ABUS1 ,Connect positive voltage input to analog bus of the same side 1" "Not connected,Connected" bitfld.byte 0x00 0. " VP_ABUS0 ,Connect positive voltage input to analog bus of the same side 0" "Not connected,Connected" line.byte 0x01 "SW3,Comparator Analog Routing Register 3" bitfld.byte 0x01 6. " VN_VREF1 ,Connect negative voltage input to Voltage Reference 0" "Not connected,Connected" bitfld.byte 0x01 5. " VN_VREF0 ,Connect negative voltage input to Voltage Reference 1" "Not connected,Connected" bitfld.byte 0x01 4. " VN_AMX ,Connect negative voltage input to Analog Mux Bus" "Not connected,Connected" textline " " bitfld.byte 0x01 3. " VP_REFBUF ,Connect positive voltage input to CapSense reference buffer channel" "Not connected,Connected" bitfld.byte 0x01 0. " VP_AMX ,Connect positive voltage input to Analog Mux Bus" "Not connected,Connected" line.byte 0x02 "SW4,Comparator Analog Routing Register 4" bitfld.byte 0x02 6. " VN_AG6 ,Connect negative voltage input to analog global of same side 6" "Not connected,Connected" bitfld.byte 0x02 4. " VN_AG4 ,Connect negative voltage input to analog global of same side 4" "Not connected,Connected" bitfld.byte 0x02 2. " VN_AG2 ,Connect negative voltage input to analog global of same side 2" "Not connected,Connected" textline " " bitfld.byte 0x02 0. " VN_AG0 ,Connect negative voltage input to analog global of same side 0" "Not connected,Connected" group.byte 0x06++0x01 line.byte 0x00 "SW6,Comparator Analog Routing Register 6" bitfld.byte 0x00 3. " VN_ABUS3 ,Connect negative voltage input to analog bus of the same side 3" "Not connected,Connected" bitfld.byte 0x00 2. " VN_ABUS2 ,Connect negative voltage input to analog bus of the same side 2" "Not connected,Connected" line.byte 0x01 "CLK,Comparator Clock Control Register" bitfld.byte 0x01 4. " BYPASS_SYNC ,Bypass Synchronization" "Not bypassed,Bypassed" bitfld.byte 0x01 3. " CLK_EN ,Clock gating control" "Disabled,Enabled" bitfld.byte 0x01 0.--2. " MX_CLK ,Clock Selection" "clk_a0 & clk_a0_dig,clk_a1 & clk_a1_dig,clk_a2 & clk_a2_dig,clk_a3 & clk_a3_dig,UDB gen. clk,?..." width 0x0B tree.end sif (!cpuis("CY8C524*")) tree "CMP 2" base ad:0x40004602 width 5. group.byte 0x00++0x00 line.byte 0x00 "TR,Comparator Trim Register" bitfld.byte 0x00 4.--7. " TR2 ,Trim value to be added to the N-type load for offset calibration" "Not added,~1mV to negative,~2mV to negative,~3mV to negative,~4mV to negative,~5mV to negative,~6mV to negative,~7mV to negative,Not added,~1mV to positive,~2mV to positive,~3mV to positive,~4mV to positive,~5mV to positive,~6mV to positive,~7mV to positive" bitfld.byte 0x00 0.--3. " TR1 ,Trim value to be added to the P-type load for offset calibration" "Not added,~1mV to positive,~2mV to positive,~3mV to positive,~4mV to positive,~5mV to positive,~6mV to positive,~7mV to positive,~1mV to negative,~2mV to negative,~3mV to negative,~4mV to negative,~5mV to negative,~6mV to negative,~7mV to negative,~8mV to negative" base ad:0x40005842 group.byte 0x00++0x00 line.byte 0x00 "CR,Comparator Control Register" bitfld.byte 0x00 6. " FILT ,Enables a glitch filter at the output of the comparator" "Disabled,Enabled" bitfld.byte 0x00 5. " HYST ,Enables a hysteresis of 10mV typ" "Disabled,Enabled" bitfld.byte 0x00 4. " CAL_EN ,Enables shorting of the two comparator inputs for trim calibration purposes" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " MX_AO ,Comparator sleep always-on logic mux control" "Bypassed,Enabled" bitfld.byte 0x00 2. " PD_OVERRIDE ,Power down override to allow comparator to continue operating during sleep" "Not overridden,Overridden" bitfld.byte 0x00 0.--1. " SEL ,Selects the mode of operation of the comparator" "Slow,Fast,Ultra low power,Illegal" base ad:0x40005AD0 group.byte 0x00++0x00 line.byte 0x00 "SW0,Comparator Analog Routing Register 0" bitfld.byte 0x00 7. " VP_AG7 ,Connect positive voltage input to analog global of same side 7" "Not connected,Connected" bitfld.byte 0x00 6. " VP_AG6 ,Connect positive voltage input to analog global of same side 6" "Not connected,Connected" bitfld.byte 0x00 5. " VP_AG5 ,Connect positive voltage input to analog global of same side 5" "Not connected,Connected" textline " " bitfld.byte 0x00 4. " VP_AG4 ,Connect positive voltage input to analog global of same side 4" "Not connected,Connected" bitfld.byte 0x00 3. " VP_AG3 ,Connect positive voltage input to analog global of same side 3" "Not connected,Connected" bitfld.byte 0x00 2. " VP_AG2 ,Connect positive voltage input to analog global of same side 2" "Not connected,Connected" textline " " bitfld.byte 0x00 1. " VP_AG1 ,Connect positive voltage input to analog global of same side 1" "Not connected,Connected" bitfld.byte 0x00 0. " VP_AG0 ,Connect positive voltage input to analog global of same side 0" "Not connected,Connected" group.byte 0x02++0x02 line.byte 0x00 "SW2,Comparator Analog Routing Register 2" bitfld.byte 0x00 1. " VP_ABUS1 ,Connect positive voltage input to analog bus of the same side 1" "Not connected,Connected" bitfld.byte 0x00 0. " VP_ABUS0 ,Connect positive voltage input to analog bus of the same side 0" "Not connected,Connected" line.byte 0x01 "SW3,Comparator Analog Routing Register 3" bitfld.byte 0x01 6. " VN_VREF1 ,Connect negative voltage input to Voltage Reference 0" "Not connected,Connected" bitfld.byte 0x01 5. " VN_VREF0 ,Connect negative voltage input to Voltage Reference 1" "Not connected,Connected" bitfld.byte 0x01 4. " VN_AMX ,Connect negative voltage input to Analog Mux Bus" "Not connected,Connected" textline " " bitfld.byte 0x01 3. " VP_REFBUF ,Connect positive voltage input to CapSense reference buffer channel" "Not connected,Connected" bitfld.byte 0x01 0. " VP_AMX ,Connect positive voltage input to Analog Mux Bus" "Not connected,Connected" line.byte 0x02 "SW4,Comparator Analog Routing Register 4" bitfld.byte 0x02 7. " VN_AG7 ,Connect negative voltage input to analog global of same side 7" "Not connected,Connected" bitfld.byte 0x02 5. " VN_AG5 ,Connect negative voltage input to analog global of same side 5" "Not connected,Connected" bitfld.byte 0x02 3. " VN_AG3 ,Connect negative voltage input to analog global of same side 3" "Not connected,Connected" textline " " bitfld.byte 0x02 1. " VN_AG1 ,Connect negative voltage input to analog global of same side 1" "Not connected,Connected" group.byte 0x06++0x01 line.byte 0x00 "SW6,Comparator Analog Routing Register 6" bitfld.byte 0x00 3. " VN_ABUS3 ,Connect negative voltage input to analog bus of the same side 3" "Not connected,Connected" bitfld.byte 0x00 2. " VN_ABUS2 ,Connect negative voltage input to analog bus of the same side 2" "Not connected,Connected" line.byte 0x01 "CLK,Comparator Clock Control Register" bitfld.byte 0x01 4. " BYPASS_SYNC ,Bypass Synchronization" "Not bypassed,Bypassed" bitfld.byte 0x01 3. " CLK_EN ,Clock gating control" "Disabled,Enabled" bitfld.byte 0x01 0.--2. " MX_CLK ,Clock Selection" "clk_a0 & clk_a0_dig,clk_a1 & clk_a1_dig,clk_a2 & clk_a2_dig,clk_a3 & clk_a3_dig,UDB gen. clk,?..." width 0x0B tree.end tree "CMP 3" base ad:0x40004603 width 5. group.byte 0x00++0x00 line.byte 0x00 "TR,Comparator Trim Register" bitfld.byte 0x00 4.--7. " TR2 ,Trim value to be added to the N-type load for offset calibration" "Not added,~1mV to negative,~2mV to negative,~3mV to negative,~4mV to negative,~5mV to negative,~6mV to negative,~7mV to negative,Not added,~1mV to positive,~2mV to positive,~3mV to positive,~4mV to positive,~5mV to positive,~6mV to positive,~7mV to positive" bitfld.byte 0x00 0.--3. " TR1 ,Trim value to be added to the P-type load for offset calibration" "Not added,~1mV to positive,~2mV to positive,~3mV to positive,~4mV to positive,~5mV to positive,~6mV to positive,~7mV to positive,~1mV to negative,~2mV to negative,~3mV to negative,~4mV to negative,~5mV to negative,~6mV to negative,~7mV to negative,~8mV to negative" base ad:0x40005843 group.byte 0x00++0x00 line.byte 0x00 "CR,Comparator Control Register" bitfld.byte 0x00 6. " FILT ,Enables a glitch filter at the output of the comparator" "Disabled,Enabled" bitfld.byte 0x00 5. " HYST ,Enables a hysteresis of 10mV typ" "Disabled,Enabled" bitfld.byte 0x00 4. " CAL_EN ,Enables shorting of the two comparator inputs for trim calibration purposes" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " MX_AO ,Comparator sleep always-on logic mux control" "Bypassed,Enabled" bitfld.byte 0x00 2. " PD_OVERRIDE ,Power down override to allow comparator to continue operating during sleep" "Not overridden,Overridden" bitfld.byte 0x00 0.--1. " SEL ,Selects the mode of operation of the comparator" "Slow,Fast,Ultra low power,Illegal" base ad:0x40005AD8 group.byte 0x00++0x00 line.byte 0x00 "SW0,Comparator Analog Routing Register 0" bitfld.byte 0x00 7. " VP_AG7 ,Connect positive voltage input to analog global of same side 7" "Not connected,Connected" bitfld.byte 0x00 6. " VP_AG6 ,Connect positive voltage input to analog global of same side 6" "Not connected,Connected" bitfld.byte 0x00 5. " VP_AG5 ,Connect positive voltage input to analog global of same side 5" "Not connected,Connected" textline " " bitfld.byte 0x00 4. " VP_AG4 ,Connect positive voltage input to analog global of same side 4" "Not connected,Connected" bitfld.byte 0x00 3. " VP_AG3 ,Connect positive voltage input to analog global of same side 3" "Not connected,Connected" bitfld.byte 0x00 2. " VP_AG2 ,Connect positive voltage input to analog global of same side 2" "Not connected,Connected" textline " " bitfld.byte 0x00 1. " VP_AG1 ,Connect positive voltage input to analog global of same side 1" "Not connected,Connected" bitfld.byte 0x00 0. " VP_AG0 ,Connect positive voltage input to analog global of same side 0" "Not connected,Connected" group.byte 0x02++0x02 line.byte 0x00 "SW2,Comparator Analog Routing Register 2" bitfld.byte 0x00 1. " VP_ABUS1 ,Connect positive voltage input to analog bus of the same side 1" "Not connected,Connected" bitfld.byte 0x00 0. " VP_ABUS0 ,Connect positive voltage input to analog bus of the same side 0" "Not connected,Connected" line.byte 0x01 "SW3,Comparator Analog Routing Register 3" bitfld.byte 0x01 6. " VN_VREF1 ,Connect negative voltage input to Voltage Reference 0" "Not connected,Connected" bitfld.byte 0x01 5. " VN_VREF0 ,Connect negative voltage input to Voltage Reference 1" "Not connected,Connected" bitfld.byte 0x01 4. " VN_AMX ,Connect negative voltage input to Analog Mux Bus" "Not connected,Connected" textline " " bitfld.byte 0x01 3. " VP_REFBUF ,Connect positive voltage input to CapSense reference buffer channel" "Not connected,Connected" bitfld.byte 0x01 0. " VP_AMX ,Connect positive voltage input to Analog Mux Bus" "Not connected,Connected" line.byte 0x02 "SW4,Comparator Analog Routing Register 4" bitfld.byte 0x02 7. " VN_AG7 ,Connect negative voltage input to analog global of same side 7" "Not connected,Connected" bitfld.byte 0x02 5. " VN_AG5 ,Connect negative voltage input to analog global of same side 5" "Not connected,Connected" bitfld.byte 0x02 3. " VN_AG3 ,Connect negative voltage input to analog global of same side 3" "Not connected,Connected" textline " " bitfld.byte 0x02 1. " VN_AG1 ,Connect negative voltage input to analog global of same side 1" "Not connected,Connected" group.byte 0x06++0x01 line.byte 0x00 "SW6,Comparator Analog Routing Register 6" bitfld.byte 0x00 3. " VN_ABUS3 ,Connect negative voltage input to analog bus of the same side 3" "Not connected,Connected" bitfld.byte 0x00 2. " VN_ABUS2 ,Connect negative voltage input to analog bus of the same side 2" "Not connected,Connected" line.byte 0x01 "CLK,Comparator Clock Control Register" bitfld.byte 0x01 4. " BYPASS_SYNC ,Bypass Synchronization" "Not bypassed,Bypassed" bitfld.byte 0x01 3. " CLK_EN ,Clock gating control" "Disabled,Enabled" bitfld.byte 0x01 0.--2. " MX_CLK ,Clock Selection" "clk_a0 & clk_a0_dig,clk_a1 & clk_a1_dig,clk_a2 & clk_a2_dig,clk_a3 & clk_a3_dig,UDB gen. clk,?..." width 0x0B tree.end endif tree.end sif (!cpuis("CY8C524*")) tree.open "DAC" tree "DAC 0" base ad:0x40004608 width 4. group.byte 0x00++0x00 line.byte 0x00 "TR,DAC Block Trim Register" base ad:0x40005820 group.byte 0x00++0x02 line.byte 0x00 "CR0,DAC Block Control Register 0" bitfld.byte 0x00 4. " MODE ,Mode Bit" "Voltage DAC,Current DAC" textline " " bitfld.byte 0x00 2.--3. " RANGE ,Ranges for VDAC/IDAC modes" "0V - 4*vref (1.024V); 0 - 31.875uA,0V - 16*vref (4.096V); 0 - 255uA,0V - 4*vref (1.024V); 0 - 2.040mA,0V - 16*vref (4.096V); Not used" textline " " bitfld.byte 0x00 1. " HS ,High Speed Bit" "Regular,High speed" textline " " line.byte 0x01 "CR1,DAC Block Control Register 1" bitfld.byte 0x01 5. " MX_DATA ,Select DATA source" "Register,UDB" bitfld.byte 0x01 4. " RESET_UDB_EN ,DAC reset enable" "Disabled,Enabled" bitfld.byte 0x01 3. " MX_IDIR ,Mux selection for DAC current direction control" "Register idirbit,UDB ictrl" bitfld.byte 0x01 2. " IDIRBIT ,Register source for DAC current direction" "Low,High" textline " " bitfld.byte 0x01 1. " MX_IOFF ,Mux selection for DAC current off control" "Register ioffbit,UDB ictrl" bitfld.byte 0x01 0. " IOFFBIT ,Register source for DAC current off" "Low,High" textline " " line.byte 0x02 "TST,DAC Block Test Register" bitfld.byte 0x02 0.--4. " TEST ,5 test-select bits for bringing out internal nodes through an analog mux" "N/A | no operation,en_hv | level-shifted enable,hs_hv | level-shifted high-speed,en_vref | level-shifted vmode enable,en_iref | level-shifted imode enable,vref | vref input level,vfb | vref level across reference resistor,en_1v | level-shifted 1V vmode range,en_4v | level-shifted 4V vmode range,mode_hv | level-shifted mode,en_1x_source | level-shifted enable bit for 1X output current source,en_7x_source | level-shifted enable bit for 7X output current source,en_63x_source | level-shifted enable bit for 63X output current source,en_1x_sink | level-shifted enable bit for 1X output current sink,en_7x_sink | level-shifted enable bit for 7X output current sink,en_63x_sink | level-shifted enable bit for 63X output current sink,en_cal[7] | Internal calibration select bit [7],en_cal[6] | Internal calibration select bit [6],en_cal[5] | Internal calibration select bit [5],en_cal[4] | Internal calibration select bit [4],en_cal[3] | Internal calibration select bit [3],en_cal[2] | Internal calibration select bit [2],en_cal[1] | Internal calibration select bit [1],en_cal[0] | Internal calibration select bit [0],vb | bias voltage from reference DAC to mirror DAC,vhv | Measure locally to estimate IR drop,vpwr | Measure locally to estimate IR drop,vgnd | Measure locally to estimate IR drop,resetb | inverted reset signal to reset FF's,dac_iout | measure DAC current output,dac_vout | measure DAC voltage output,i_dac_out | measure internal DAC current output" textline " " base ad:0x40005A80 width 8. group.byte 0x00++0x00 line.byte 0x00 "SW0,DAC Analog Routing Register 0" bitfld.byte 0x00 1. " V_AG1 ,Connect voltage output to analog global of same side 1" "Not connected,Connected" bitfld.byte 0x00 0. " V_AG0 ,Connect voltage output to analog global of same side 2" "Not connected,Connected" group.byte 0x02++0x02 line.byte 0x00 "SW2,DAC Analog Routing Register 2" bitfld.byte 0x00 3. " V_ABUS3 ,Connect voltage output to analog bus of the same side 3" "Not connected,Connected" bitfld.byte 0x00 1. " V_ABUS1 ,Connect voltage output to analog bus of the same side 1" "Not connected,Connected" line.byte 0x01 "SW3,DAC Analog Routing Register 3" bitfld.byte 0x01 7. " IOUT ,Connect current output to pad" "Not connected,Connected" bitfld.byte 0x01 4. " I_AMX ,Connect current output to Analog Mux Bus" "Not connected,Connected" textline " " bitfld.byte 0x01 0. " V_AMX ,Connect voltage output to Analog Mux Bus" "Not connected,Connected" line.byte 0x02 "SW4,DAC Analog Routing Register 4" bitfld.byte 0x02 1. " I_AG1 ,Connect current output to analog global of same side 1" "Not connected,Connected" bitfld.byte 0x02 0. " I_AG0 ,Connect current output to analog global of same side 0" "Not connected,Connected" group.byte 0x07++0x00 line.byte 0x00 "STROBE,DAC Strobe Register" bitfld.byte 0x00 3. " STROBE_EN ,Strobe gating control" "Disabled,Enabled" bitfld.byte 0x00 0.--2. " MX_STROBE ,Strobe source selection" "Bus write strobe,UDB strobe,Not connected,Not connected,clk_a0_dig,clk_a1_dig,clk_a2_dig,clk_a3_dig" textline " " base ad:0x40005B80 group.byte 0x00++0x00 line.byte 0x00 "D,DAC Data Register" bitfld.byte 0x00 7. " DATA[7] ,8 DAC Data bit 7" "Low,High" bitfld.byte 0x00 6. " DATA[6] ,8 DAC Data bit 6" "Low,High" bitfld.byte 0x00 5. " DATA[5] ,8 DAC Data bit 5" "Low,High" bitfld.byte 0x00 4. " DATA[4] ,8 DAC Data bit 4" "Low,High" textline " " bitfld.byte 0x00 3. " DATA[3] ,8 DAC Data bit 3" "Low,High" bitfld.byte 0x00 2. " DATA[2] ,8 DAC Data bit 2" "Low,High" bitfld.byte 0x00 1. " DATA[1] ,8 DAC Data bit 1" "Low,High" bitfld.byte 0x00 0. " DATA[0] ,8 DAC Data bit 0" "Low,High" width 0xb tree.end tree "DAC 1" base ad:0x40004609 width 4. group.byte 0x00++0x00 line.byte 0x00 "TR,DAC Block Trim Register" base ad:0x40005824 group.byte 0x00++0x02 line.byte 0x00 "CR0,DAC Block Control Register 0" bitfld.byte 0x00 4. " MODE ,Mode Bit" "Voltage DAC,Current DAC" textline " " bitfld.byte 0x00 2.--3. " RANGE ,Ranges for VDAC/IDAC modes" "0V - 4*vref (1.024V); 0 - 31.875uA,0V - 16*vref (4.096V); 0 - 255uA,0V - 4*vref (1.024V); 0 - 2.040mA,0V - 16*vref (4.096V); Not used" textline " " bitfld.byte 0x00 1. " HS ,High Speed Bit" "Regular,High speed" textline " " line.byte 0x01 "CR1,DAC Block Control Register 1" bitfld.byte 0x01 5. " MX_DATA ,Select DATA source" "Register,UDB" bitfld.byte 0x01 4. " RESET_UDB_EN ,DAC reset enable" "Disabled,Enabled" bitfld.byte 0x01 3. " MX_IDIR ,Mux selection for DAC current direction control" "Register idirbit,UDB ictrl" bitfld.byte 0x01 2. " IDIRBIT ,Register source for DAC current direction" "Low,High" textline " " bitfld.byte 0x01 1. " MX_IOFF ,Mux selection for DAC current off control" "Register ioffbit,UDB ictrl" bitfld.byte 0x01 0. " IOFFBIT ,Register source for DAC current off" "Low,High" textline " " line.byte 0x02 "TST,DAC Block Test Register" bitfld.byte 0x02 0.--4. " TEST ,5 test-select bits for bringing out internal nodes through an analog mux" "N/A | no operation,en_hv | level-shifted enable,hs_hv | level-shifted high-speed,en_vref | level-shifted vmode enable,en_iref | level-shifted imode enable,vref | vref input level,vfb | vref level across reference resistor,en_1v | level-shifted 1V vmode range,en_4v | level-shifted 4V vmode range,mode_hv | level-shifted mode,en_1x_source | level-shifted enable bit for 1X output current source,en_7x_source | level-shifted enable bit for 7X output current source,en_63x_source | level-shifted enable bit for 63X output current source,en_1x_sink | level-shifted enable bit for 1X output current sink,en_7x_sink | level-shifted enable bit for 7X output current sink,en_63x_sink | level-shifted enable bit for 63X output current sink,en_cal[7] | Internal calibration select bit [7],en_cal[6] | Internal calibration select bit [6],en_cal[5] | Internal calibration select bit [5],en_cal[4] | Internal calibration select bit [4],en_cal[3] | Internal calibration select bit [3],en_cal[2] | Internal calibration select bit [2],en_cal[1] | Internal calibration select bit [1],en_cal[0] | Internal calibration select bit [0],vb | bias voltage from reference DAC to mirror DAC,vhv | Measure locally to estimate IR drop,vpwr | Measure locally to estimate IR drop,vgnd | Measure locally to estimate IR drop,resetb | inverted reset signal to reset FF's,dac_iout | measure DAC current output,dac_vout | measure DAC voltage output,i_dac_out | measure internal DAC current output" textline " " base ad:0x40005A88 width 8. group.byte 0x00++0x00 line.byte 0x00 "SW0,DAC Analog Routing Register 0" bitfld.byte 0x00 1. " V_AG1 ,Connect voltage output to analog global of same side 1" "Not connected,Connected" bitfld.byte 0x00 0. " V_AG0 ,Connect voltage output to analog global of same side 2" "Not connected,Connected" group.byte 0x02++0x02 line.byte 0x00 "SW2,DAC Analog Routing Register 2" bitfld.byte 0x00 3. " V_ABUS3 ,Connect voltage output to analog bus of the same side 3" "Not connected,Connected" bitfld.byte 0x00 1. " V_ABUS1 ,Connect voltage output to analog bus of the same side 1" "Not connected,Connected" line.byte 0x01 "SW3,DAC Analog Routing Register 3" bitfld.byte 0x01 7. " IOUT ,Connect current output to pad" "Not connected,Connected" bitfld.byte 0x01 4. " I_AMX ,Connect current output to Analog Mux Bus" "Not connected,Connected" textline " " bitfld.byte 0x01 0. " V_AMX ,Connect voltage output to Analog Mux Bus" "Not connected,Connected" line.byte 0x02 "SW4,DAC Analog Routing Register 4" bitfld.byte 0x02 1. " I_AG1 ,Connect current output to analog global of same side 1" "Not connected,Connected" bitfld.byte 0x02 0. " I_AG0 ,Connect current output to analog global of same side 0" "Not connected,Connected" group.byte 0x07++0x00 line.byte 0x00 "STROBE,DAC Strobe Register" bitfld.byte 0x00 3. " STROBE_EN ,Strobe gating control" "Disabled,Enabled" bitfld.byte 0x00 0.--2. " MX_STROBE ,Strobe source selection" "Bus write strobe,UDB strobe,Not connected,Not connected,clk_a0_dig,clk_a1_dig,clk_a2_dig,clk_a3_dig" textline " " base ad:0x40005B81 group.byte 0x00++0x00 line.byte 0x00 "D,DAC Data Register" bitfld.byte 0x00 7. " DATA[7] ,8 DAC Data bit 7" "Low,High" bitfld.byte 0x00 6. " DATA[6] ,8 DAC Data bit 6" "Low,High" bitfld.byte 0x00 5. " DATA[5] ,8 DAC Data bit 5" "Low,High" bitfld.byte 0x00 4. " DATA[4] ,8 DAC Data bit 4" "Low,High" textline " " bitfld.byte 0x00 3. " DATA[3] ,8 DAC Data bit 3" "Low,High" bitfld.byte 0x00 2. " DATA[2] ,8 DAC Data bit 2" "Low,High" bitfld.byte 0x00 1. " DATA[1] ,8 DAC Data bit 1" "Low,High" bitfld.byte 0x00 0. " DATA[0] ,8 DAC Data bit 0" "Low,High" width 0xb tree.end sif (!cpuis("CY8C538*")) tree "DAC 2" base ad:0x4000460a width 4. group.byte 0x00++0x00 line.byte 0x00 "TR,DAC Block Trim Register" base ad:0x40005828 group.byte 0x00++0x02 line.byte 0x00 "CR0,DAC Block Control Register 0" bitfld.byte 0x00 4. " MODE ,Mode Bit" "Voltage DAC,Current DAC" textline " " bitfld.byte 0x00 2.--3. " RANGE ,Ranges for VDAC/IDAC modes" "0V - 4*vref (1.024V); 0 - 31.875uA,0V - 16*vref (4.096V); 0 - 255uA,0V - 4*vref (1.024V); 0 - 2.040mA,0V - 16*vref (4.096V); Not used" textline " " bitfld.byte 0x00 1. " HS ,High Speed Bit" "Regular,High speed" textline " " line.byte 0x01 "CR1,DAC Block Control Register 1" bitfld.byte 0x01 5. " MX_DATA ,Select DATA source" "Register,UDB" bitfld.byte 0x01 4. " RESET_UDB_EN ,DAC reset enable" "Disabled,Enabled" bitfld.byte 0x01 3. " MX_IDIR ,Mux selection for DAC current direction control" "Register idirbit,UDB ictrl" bitfld.byte 0x01 2. " IDIRBIT ,Register source for DAC current direction" "Low,High" textline " " bitfld.byte 0x01 1. " MX_IOFF ,Mux selection for DAC current off control" "Register ioffbit,UDB ictrl" bitfld.byte 0x01 0. " IOFFBIT ,Register source for DAC current off" "Low,High" textline " " line.byte 0x02 "TST,DAC Block Test Register" bitfld.byte 0x02 0.--4. " TEST ,5 test-select bits for bringing out internal nodes through an analog mux" "N/A | no operation,en_hv | level-shifted enable,hs_hv | level-shifted high-speed,en_vref | level-shifted vmode enable,en_iref | level-shifted imode enable,vref | vref input level,vfb | vref level across reference resistor,en_1v | level-shifted 1V vmode range,en_4v | level-shifted 4V vmode range,mode_hv | level-shifted mode,en_1x_source | level-shifted enable bit for 1X output current source,en_7x_source | level-shifted enable bit for 7X output current source,en_63x_source | level-shifted enable bit for 63X output current source,en_1x_sink | level-shifted enable bit for 1X output current sink,en_7x_sink | level-shifted enable bit for 7X output current sink,en_63x_sink | level-shifted enable bit for 63X output current sink,en_cal[7] | Internal calibration select bit [7],en_cal[6] | Internal calibration select bit [6],en_cal[5] | Internal calibration select bit [5],en_cal[4] | Internal calibration select bit [4],en_cal[3] | Internal calibration select bit [3],en_cal[2] | Internal calibration select bit [2],en_cal[1] | Internal calibration select bit [1],en_cal[0] | Internal calibration select bit [0],vb | bias voltage from reference DAC to mirror DAC,vhv | Measure locally to estimate IR drop,vpwr | Measure locally to estimate IR drop,vgnd | Measure locally to estimate IR drop,resetb | inverted reset signal to reset FF's,dac_iout | measure DAC current output,dac_vout | measure DAC voltage output,i_dac_out | measure internal DAC current output" textline " " base ad:0x40005A90 width 8. group.byte 0x00++0x00 line.byte 0x00 "SW0,DAC Analog Routing Register 0" bitfld.byte 0x00 5. " V_AG5 ,Connect voltage output to analog global of same side 5" "Not connected,Connected" bitfld.byte 0x00 4. " V_AG4 ,Connect voltage output to analog global of same side 4" "Not connected,Connected" group.byte 0x02++0x02 line.byte 0x00 "SW2,DAC Analog Routing Register 2" bitfld.byte 0x00 2. " V_ABUS2 ,Connect voltage output to analog bus of the same side 2" "Not connected,Connected" bitfld.byte 0x00 0. " V_ABUS0 ,Connect voltage output to analog bus of the same side 0" "Not connected,Connected" line.byte 0x01 "SW3,DAC Analog Routing Register 3" bitfld.byte 0x01 7. " IOUT ,Connect current output to pad" "Not connected,Connected" bitfld.byte 0x01 4. " I_AMX ,Connect current output to Analog Mux Bus" "Not connected,Connected" textline " " bitfld.byte 0x01 0. " V_AMX ,Connect voltage output to Analog Mux Bus" "Not connected,Connected" line.byte 0x02 "SW4,DAC Analog Routing Register 4" bitfld.byte 0x02 5. " I_AG5 ,Connect current output to analog global of same side 5" "Not connected,Connected" bitfld.byte 0x02 4. " I_AG4 ,Connect current output to analog global of same side 4" "Not connected,Connected" group.byte 0x07++0x00 line.byte 0x00 "STROBE,DAC Strobe Register" bitfld.byte 0x00 3. " STROBE_EN ,Strobe gating control" "Disabled,Enabled" bitfld.byte 0x00 0.--2. " MX_STROBE ,Strobe source selection" "Bus write strobe,UDB strobe,Not connected,Not connected,clk_a0_dig,clk_a1_dig,clk_a2_dig,clk_a3_dig" textline " " base ad:0x40005B82 group.byte 0x00++0x00 line.byte 0x00 "D,DAC Data Register" bitfld.byte 0x00 7. " DATA[7] ,8 DAC Data bit 7" "Low,High" bitfld.byte 0x00 6. " DATA[6] ,8 DAC Data bit 6" "Low,High" bitfld.byte 0x00 5. " DATA[5] ,8 DAC Data bit 5" "Low,High" bitfld.byte 0x00 4. " DATA[4] ,8 DAC Data bit 4" "Low,High" textline " " bitfld.byte 0x00 3. " DATA[3] ,8 DAC Data bit 3" "Low,High" bitfld.byte 0x00 2. " DATA[2] ,8 DAC Data bit 2" "Low,High" bitfld.byte 0x00 1. " DATA[1] ,8 DAC Data bit 1" "Low,High" bitfld.byte 0x00 0. " DATA[0] ,8 DAC Data bit 0" "Low,High" width 0xb tree.end tree "DAC 3" base ad:0x4000460b width 4. group.byte 0x00++0x00 line.byte 0x00 "TR,DAC Block Trim Register" base ad:0x4000582c group.byte 0x00++0x02 line.byte 0x00 "CR0,DAC Block Control Register 0" bitfld.byte 0x00 4. " MODE ,Mode Bit" "Voltage DAC,Current DAC" textline " " bitfld.byte 0x00 2.--3. " RANGE ,Ranges for VDAC/IDAC modes" "0V - 4*vref (1.024V); 0 - 31.875uA,0V - 16*vref (4.096V); 0 - 255uA,0V - 4*vref (1.024V); 0 - 2.040mA,0V - 16*vref (4.096V); Not used" textline " " bitfld.byte 0x00 1. " HS ,High Speed Bit" "Regular,High speed" textline " " line.byte 0x01 "CR1,DAC Block Control Register 1" bitfld.byte 0x01 5. " MX_DATA ,Select DATA source" "Register,UDB" bitfld.byte 0x01 4. " RESET_UDB_EN ,DAC reset enable" "Disabled,Enabled" bitfld.byte 0x01 3. " MX_IDIR ,Mux selection for DAC current direction control" "Register idirbit,UDB ictrl" bitfld.byte 0x01 2. " IDIRBIT ,Register source for DAC current direction" "Low,High" textline " " bitfld.byte 0x01 1. " MX_IOFF ,Mux selection for DAC current off control" "Register ioffbit,UDB ictrl" bitfld.byte 0x01 0. " IOFFBIT ,Register source for DAC current off" "Low,High" textline " " line.byte 0x02 "TST,DAC Block Test Register" bitfld.byte 0x02 0.--4. " TEST ,5 test-select bits for bringing out internal nodes through an analog mux" "N/A | no operation,en_hv | level-shifted enable,hs_hv | level-shifted high-speed,en_vref | level-shifted vmode enable,en_iref | level-shifted imode enable,vref | vref input level,vfb | vref level across reference resistor,en_1v | level-shifted 1V vmode range,en_4v | level-shifted 4V vmode range,mode_hv | level-shifted mode,en_1x_source | level-shifted enable bit for 1X output current source,en_7x_source | level-shifted enable bit for 7X output current source,en_63x_source | level-shifted enable bit for 63X output current source,en_1x_sink | level-shifted enable bit for 1X output current sink,en_7x_sink | level-shifted enable bit for 7X output current sink,en_63x_sink | level-shifted enable bit for 63X output current sink,en_cal[7] | Internal calibration select bit [7],en_cal[6] | Internal calibration select bit [6],en_cal[5] | Internal calibration select bit [5],en_cal[4] | Internal calibration select bit [4],en_cal[3] | Internal calibration select bit [3],en_cal[2] | Internal calibration select bit [2],en_cal[1] | Internal calibration select bit [1],en_cal[0] | Internal calibration select bit [0],vb | bias voltage from reference DAC to mirror DAC,vhv | Measure locally to estimate IR drop,vpwr | Measure locally to estimate IR drop,vgnd | Measure locally to estimate IR drop,resetb | inverted reset signal to reset FF's,dac_iout | measure DAC current output,dac_vout | measure DAC voltage output,i_dac_out | measure internal DAC current output" textline " " base ad:0x40005A98 width 8. group.byte 0x00++0x00 line.byte 0x00 "SW0,DAC Analog Routing Register 0" bitfld.byte 0x00 5. " V_AG5 ,Connect voltage output to analog global of same side 5" "Not connected,Connected" bitfld.byte 0x00 4. " V_AG4 ,Connect voltage output to analog global of same side 4" "Not connected,Connected" group.byte 0x02++0x02 line.byte 0x00 "SW2,DAC Analog Routing Register 2" bitfld.byte 0x00 2. " V_ABUS2 ,Connect voltage output to analog bus of the same side 2" "Not connected,Connected" bitfld.byte 0x00 0. " V_ABUS0 ,Connect voltage output to analog bus of the same side 0" "Not connected,Connected" line.byte 0x01 "SW3,DAC Analog Routing Register 3" bitfld.byte 0x01 7. " IOUT ,Connect current output to pad" "Not connected,Connected" bitfld.byte 0x01 4. " I_AMX ,Connect current output to Analog Mux Bus" "Not connected,Connected" textline " " bitfld.byte 0x01 0. " V_AMX ,Connect voltage output to Analog Mux Bus" "Not connected,Connected" line.byte 0x02 "SW4,DAC Analog Routing Register 4" bitfld.byte 0x02 5. " I_AG5 ,Connect current output to analog global of same side 5" "Not connected,Connected" bitfld.byte 0x02 4. " I_AG4 ,Connect current output to analog global of same side 4" "Not connected,Connected" group.byte 0x07++0x00 line.byte 0x00 "STROBE,DAC Strobe Register" bitfld.byte 0x00 3. " STROBE_EN ,Strobe gating control" "Disabled,Enabled" bitfld.byte 0x00 0.--2. " MX_STROBE ,Strobe source selection" "Bus write strobe,UDB strobe,Not connected,Not connected,clk_a0_dig,clk_a1_dig,clk_a2_dig,clk_a3_dig" textline " " base ad:0x40005B83 group.byte 0x00++0x00 line.byte 0x00 "D,DAC Data Register" bitfld.byte 0x00 7. " DATA[7] ,8 DAC Data bit 7" "Low,High" bitfld.byte 0x00 6. " DATA[6] ,8 DAC Data bit 6" "Low,High" bitfld.byte 0x00 5. " DATA[5] ,8 DAC Data bit 5" "Low,High" bitfld.byte 0x00 4. " DATA[4] ,8 DAC Data bit 4" "Low,High" textline " " bitfld.byte 0x00 3. " DATA[3] ,8 DAC Data bit 3" "Low,High" bitfld.byte 0x00 2. " DATA[2] ,8 DAC Data bit 2" "Low,High" bitfld.byte 0x00 1. " DATA[1] ,8 DAC Data bit 1" "Low,High" bitfld.byte 0x00 0. " DATA[0] ,8 DAC Data bit 0" "Low,High" width 0xb tree.end endif tree.end endif tree "NPUMP (Negative Pump Trim)" base ad:0x40004610 width 9. group.byte 0x00++0x00 line.byte 0x00 "DSM_TR0,Delta Sigma Modulator (DSM) Negative Pump Trim Register 0" bitfld.byte 0x00 0.--1. " NPUMP_DSM_TRIM ,Delta Sigma Modulator (DSM) Negative Pump Trim" "0,1,2,3" group.byte 0x02++0x00 line.byte 0x00 "ABUF_TR0,Analog Linear Output Buffer (ABUF) Negative Pump Trim Register 0" bitfld.byte 0x00 0.--1. " NPUMP_ABUF_TRIM ,Analog Linear Output Buffer (ABUF) Negative Pump Trim" "0,1,2,3" width 0x0B tree.end tree.open "SAR" tree "SAR 0" base ad:0x40004614 width 5. group.byte 0x00++0x00 line.byte 0x00 "TR0,SAR trim register 0" bitfld.byte 0x00 3. " TRIMUNIT ,Trim" "Default attenuation cap,Increase by 6fF" bitfld.byte 0x00 0.--2. " CAP_TRIM ,Capacitance Trim" "0,0.5 LSB,2*0.5 LSB = 1 LSB,3*0.5 LSB = 1.5 LSB,4*0.5 LSB = 2 LSB,5*0.5 LSB = 2.5 LSB,6*0.5 LSB = 3.0 LSB,7*0.5 LSB = 3.5 LSB" base ad:0x40005900 group.byte 0x00++0x00 line.byte 0x00 "CSR0,SAR status and control register 0" bitfld.byte 0x00 6.--7. " ICONT ,Current control" "Full,1/2,1/3,1/4" bitfld.byte 0x00 5. " RESET_SOFT ,Firmware reset" "No reset,Reset" bitfld.byte 0x00 3. " HIZ ,Sample time HiZ" "Retained,Cleared" bitfld.byte 0x00 2. " MX_SOF ,Start-of-Frame (sof) source selection" "sof_bit,UDB" textline " " bitfld.byte 0x00 1. " SOF_MODE ,Start-of-Frame (sof) mode" "Level-sensitive,Edge-sensitive" bitfld.byte 0x00 0. " SOF_BIT ,Start-of-Frame (sof) register source;enable conversion" "Disabled,Enabled" hgroup.byte 0x01++0x00 hide.byte 0x00 "CSR1,SAR status and control register 1" in textline " " group.byte 0x02++0x05 line.byte 0x00 "CSR2,SAR status and control register 2" bitfld.byte 0x00 6.--7. " RESOLUTION ,8b,10b,12b resolution selection" "12-bit,8-bit,10-bit,12-bit" bitfld.byte 0x00 3.--5. " SAMPLE_WIDTH_MSB ,Sample time down counter start value MSB" "+1,+2,+3,+4,+5,+6,+7,+8" bitfld.byte 0x00 0.--2. " SAMPLE_WIDTH_LSB ,Sample time down counter start value LSB" "+1,+2,+3,+4,+5,+6,+7,+8" line.byte 0x01 "CSR3,SAR status and control register 3" bitfld.byte 0x01 7. " EN_CP ,Enable SAR charge pump" "Disabled,Enabled" bitfld.byte 0x01 6. " EN_RESVDA ,Enable SAR vda resister ladder divider" "Disabled,Enabled" bitfld.byte 0x01 4.--5. " PWR_CTRL_VCM ,SAR VCM reference power control" "0,1,2,3" textline " " bitfld.byte 0x01 2.--3. " PWR_CTRL_VREF ,SAR VREF reference power control" "Max,/2,/3,/4" bitfld.byte 0x01 1. " EN_BUF_VCM ,Enable SAR VCM reference buffer" "Disabled,Enabled" bitfld.byte 0x01 0. " EN_BUF_VREF ,Enable SAR VREF reference buffer" "Disabled,Enabled" line.byte 0x02 "CSR4,SAR status and control register 4" bitfld.byte 0x02 6. " DFT_OUTC_2 ,DFT observe point enable" "Disabled,Enabled" bitfld.byte 0x02 5. " DFT_OUTC_1 ,DFT observe point enable" "Disabled,Enabled" bitfld.byte 0x02 4. " DFT_OUTC_0 ,DFT observe point enable" "Disabled,Enabled" textline " " bitfld.byte 0x02 3. " DFT_INC_3 ,DFT control point enable" "Disabled,Enabled" bitfld.byte 0x02 2. " DFT_INC_2 ,DFT control point enable" "Disabled,Enabled" bitfld.byte 0x02 1. " DFT_INC_1 ,DFT control point enable" "Disabled,Enabled" textline " " bitfld.byte 0x02 0. " DFT_INC_0 ,DFT control point enable" "Disabled,Enabled" line.byte 0x03 "CSR5,SAR status and control register 5" bitfld.byte 0x03 7. " OVERRUN_DET_EN ,Enable data overrun detection" "Disabled,Enabled" bitfld.byte 0x03 6. " DLY_INC ,Control for delay circuits" "Low,High" bitfld.byte 0x03 5. " DCEN ,Short AC coupling in comparator for DFT" "Not shorted,Shorted" textline " " bitfld.byte 0x03 4. " EN_CSEL_DFT ,Enable for sel_csel_dft" "Normal,Test" bitfld.byte 0x03 0.--3. " SEL_CSEL_DFT ,Test value" "0(Min),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(Max)" textline " " line.byte 0x04 "CSR6,SAR status and control register 6" bitfld.byte 0x04 7. " S_7 ,Enable reference switch 7" "Disabled,Enabled" bitfld.byte 0x04 6. " S_6 ,Enable reference switch 6" "Disabled,Enabled" bitfld.byte 0x04 5. " S_5 ,Enable reference switch 5" "Disabled,Enabled" bitfld.byte 0x04 4. " S_4 ,Enable reference switch 4" "Disabled,Enabled" textline " " bitfld.byte 0x04 3. " S_3 ,Enable reference switch 3" "Disabled,Enabled" bitfld.byte 0x04 2. " S_2 ,Enable reference switch 2" "Disabled,Enabled" bitfld.byte 0x04 1. " S_1 ,Enable reference switch 1" "Disabled,Enabled" bitfld.byte 0x04 0. " S_0 ,Enable reference switch 0" "Disabled,Enabled" line.byte 0x05 "CSR7,SAR status and control register 7" bitfld.byte 0x05 5. " S_13 ,Enable reference switch 13" "Disabled,Enabled" bitfld.byte 0x05 4. " S_12 ,Enable reference switch 12" "Disabled,Enabled" bitfld.byte 0x05 3. " S_11 ,Enable reference switch 11" "Disabled,Enabled" bitfld.byte 0x05 2. " S_10 ,Enable reference switch 10" "Disabled,Enabled" textline " " bitfld.byte 0x05 1. " S_9 ,Enable reference switch 9" "Disabled,Enabled" bitfld.byte 0x05 0. " S_8 ,Enable reference switch 8" "Disabled,Enabled" textline " " base ad:0x40005B20 group.byte 0x00++0x00 line.byte 0x00 "SW0,SAR Analog Routing Register 0" bitfld.byte 0x00 7. " VP_AG7 ,Connect positive voltage input to analog global of same side 7" "Not connected,Connected" bitfld.byte 0x00 6. " VP_AG6 ,Connect positive voltage input to analog global of same side 6" "Not connected,Connected" bitfld.byte 0x00 5. " VP_AG5 ,Connect positive voltage input to analog global of same side 5" "Not connected,Connected" textline " " bitfld.byte 0x00 4. " VP_AG4 ,Connect positive voltage input to analog global of same side 4" "Not connected,Connected" bitfld.byte 0x00 3. " VP_AG3 ,Connect positive voltage input to analog global of same side 3" "Not connected,Connected" bitfld.byte 0x00 2. " VP_AG2 ,Connect positive voltage input to analog global of same side 2" "Not connected,Connected" textline " " bitfld.byte 0x00 1. " VP_AG1 ,Connect positive voltage input to analog global of same side 1" "Not connected,Connected" bitfld.byte 0x00 0. " VP_AG0 ,Connect positive voltage input to analog global of same side 0" "Not connected,Connected" group.byte 0x02++0x02 line.byte 0x00 "SW2,SAR Analog Routing Register 2" bitfld.byte 0x00 2. " VP_ABUS2 ,Connect positive voltage input to analog bus of the same side" "Not connected,Connected" bitfld.byte 0x00 0. " VP_ABUS0 ,Connect positive voltage input to analog bus of the same side" "Not connected,Connected" line.byte 0x01 "SW3,SAR Analog Routing Register 3" bitfld.byte 0x01 6. " VN_VSSA ,Connect negative voltage input to vssa" "Not connected,Connected" bitfld.byte 0x01 5. " VN_VREF ,Connect negative voltage input to Voltage Reference" "Not connected,Connected" bitfld.byte 0x01 4. " VN_AMX ,Connect negative voltage input to Analog Mux Bus" "Not connected,Connected" textline " " bitfld.byte 0x01 2. " VP_VSSA ,Connect positive voltage input to vssa" "Not connected,Connected" line.byte 0x02 "SW4,SAR Analog Routing Register 4" bitfld.byte 0x02 6. " VN_AG6 ,Connect negative voltage input to analog global of same side 6" "Not connected,Connected" bitfld.byte 0x02 4. " VN_AG4 ,Connect negative voltage input to analog global of same side 4" "Not connected,Connected" bitfld.byte 0x02 2. " VN_AG2 ,Connect negative voltage input to analog global of same side 2" "Not connected,Connected" textline " " bitfld.byte 0x02 0. " VN_AG0 ,Connect negative voltage input to analog global of same side 0" "Not connected,Connected" group.byte 0x06++0x01 line.byte 0x00 "SW6,SAR Analog Routing Register 6" bitfld.byte 0x00 3. " VN_ABUS3 ,Connect negative voltage input to analog bus of the same side" "Not connected,Connected" bitfld.byte 0x00 1. " VN_ABUS1 ,Connect negative voltage input to analog bus of the same side" "Not connected,Connected" line.byte 0x01 "CLK,SAR Clock Selection Register" bitfld.byte 0x01 5.--7. " MX_PUMPCLK ,Pump Clock Selection" "clk_a0 & clk_a0_dig,clk_a1 & clk_a1_dig,clk_a2 & clk_a2_dig,clk_a3 & clk_a3_dig,UDB gen. clk,?..." bitfld.byte 0x01 4. " BYPASS_SYNC ,Bypass Synchronization" "Not bypassed,Bypassed" bitfld.byte 0x01 3. " CLK_EN ,Clock gating control" "Disabled,Enabled" textline " " bitfld.byte 0x01 0.--2. " MX_CLK ,Clock Selection" "clk_a0 & clk_a0_dig,clk_a1 & clk_a1_dig,clk_a2 & clk_a2_dig,clk_a3 & clk_a3_dig,UDB gen. clk,?..." textline " " base ad:0x40005BA0 rgroup.byte 0x00++0x00 line.byte 0x00 "WRK0,SAR working register 0" bitfld.byte 0x00 7. " DATA_OUT_7_0[7] ,Data_out 7" "Low,High" bitfld.byte 0x00 6. " DATA_OUT_7_0[6] ,Data_out 6" "Low,High" bitfld.byte 0x00 5. " DATA_OUT_7_0[5] ,Data_out 5" "Low,High" bitfld.byte 0x00 4. " DATA_OUT_7_0[4] ,Data_out 4" "Low,High" textline " " bitfld.byte 0x00 3. " DATA_OUT_7_0[3] ,Data_out 3" "Low,High" bitfld.byte 0x00 2. " DATA_OUT_7_0[2] ,Data_out 2" "Low,High" bitfld.byte 0x00 1. " DATA_OUT_7_0[1] ,Data_out 1" "Low,High" bitfld.byte 0x00 0. " DATA_OUT_7_0[0] ,Data_out 0" "Low,High" hgroup.byte 0x01++0x00 hide.byte 0x00 "WRK1,SAR register 1" in width 0x0B tree.end sif (cpuis("CY8C548*")) tree "SAR 1" base ad:0x40004616 width 5. group.byte 0x00++0x00 line.byte 0x00 "TR0,SAR trim register 0" bitfld.byte 0x00 3. " TRIMUNIT ,Trim" "Default attenuation cap,Increase by 6fF" bitfld.byte 0x00 0.--2. " CAP_TRIM ,Capacitance Trim" "0,0.5 LSB,2*0.5 LSB = 1 LSB,3*0.5 LSB = 1.5 LSB,4*0.5 LSB = 2 LSB,5*0.5 LSB = 2.5 LSB,6*0.5 LSB = 3.0 LSB,7*0.5 LSB = 3.5 LSB" base ad:0x40005908 group.byte 0x00++0x00 line.byte 0x00 "CSR0,SAR status and control register 0" bitfld.byte 0x00 6.--7. " ICONT ,Current control" "Full,1/2,1/3,1/4" bitfld.byte 0x00 5. " RESET_SOFT ,Firmware reset" "No reset,Reset" bitfld.byte 0x00 3. " HIZ ,Sample time HiZ" "Retained,Cleared" bitfld.byte 0x00 2. " MX_SOF ,Start-of-Frame (sof) source selection" "sof_bit,UDB" textline " " bitfld.byte 0x00 1. " SOF_MODE ,Start-of-Frame (sof) mode" "Level-sensitive,Edge-sensitive" bitfld.byte 0x00 0. " SOF_BIT ,Start-of-Frame (sof) register source;enable conversion" "Disabled,Enabled" hgroup.byte 0x01++0x00 hide.byte 0x00 "CSR1,SAR status and control register 1" in textline " " group.byte 0x02++0x05 line.byte 0x00 "CSR2,SAR status and control register 2" bitfld.byte 0x00 6.--7. " RESOLUTION ,8b,10b,12b resolution selection" "12-bit,8-bit,10-bit,12-bit" bitfld.byte 0x00 3.--5. " SAMPLE_WIDTH_MSB ,Sample time down counter start value MSB" "+1,+2,+3,+4,+5,+6,+7,+8" bitfld.byte 0x00 0.--2. " SAMPLE_WIDTH_LSB ,Sample time down counter start value LSB" "+1,+2,+3,+4,+5,+6,+7,+8" line.byte 0x01 "CSR3,SAR status and control register 3" bitfld.byte 0x01 7. " EN_CP ,Enable SAR charge pump" "Disabled,Enabled" bitfld.byte 0x01 6. " EN_RESVDA ,Enable SAR vda resister ladder divider" "Disabled,Enabled" bitfld.byte 0x01 4.--5. " PWR_CTRL_VCM ,SAR VCM reference power control" "0,1,2,3" textline " " bitfld.byte 0x01 2.--3. " PWR_CTRL_VREF ,SAR VREF reference power control" "Max,/2,/3,/4" bitfld.byte 0x01 1. " EN_BUF_VCM ,Enable SAR VCM reference buffer" "Disabled,Enabled" bitfld.byte 0x01 0. " EN_BUF_VREF ,Enable SAR VREF reference buffer" "Disabled,Enabled" line.byte 0x02 "CSR4,SAR status and control register 4" bitfld.byte 0x02 6. " DFT_OUTC_2 ,DFT observe point enable" "Disabled,Enabled" bitfld.byte 0x02 5. " DFT_OUTC_1 ,DFT observe point enable" "Disabled,Enabled" bitfld.byte 0x02 4. " DFT_OUTC_0 ,DFT observe point enable" "Disabled,Enabled" textline " " bitfld.byte 0x02 3. " DFT_INC_3 ,DFT control point enable" "Disabled,Enabled" bitfld.byte 0x02 2. " DFT_INC_2 ,DFT control point enable" "Disabled,Enabled" bitfld.byte 0x02 1. " DFT_INC_1 ,DFT control point enable" "Disabled,Enabled" textline " " bitfld.byte 0x02 0. " DFT_INC_0 ,DFT control point enable" "Disabled,Enabled" line.byte 0x03 "CSR5,SAR status and control register 5" bitfld.byte 0x03 7. " OVERRUN_DET_EN ,Enable data overrun detection" "Disabled,Enabled" bitfld.byte 0x03 6. " DLY_INC ,Control for delay circuits" "Low,High" bitfld.byte 0x03 5. " DCEN ,Short AC coupling in comparator for DFT" "Not shorted,Shorted" textline " " bitfld.byte 0x03 4. " EN_CSEL_DFT ,Enable for sel_csel_dft" "Normal,Test" bitfld.byte 0x03 0.--3. " SEL_CSEL_DFT ,Test value" "0(Min),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(Max)" textline " " line.byte 0x04 "CSR6,SAR status and control register 6" bitfld.byte 0x04 7. " S_7 ,Enable reference switch 7" "Disabled,Enabled" bitfld.byte 0x04 6. " S_6 ,Enable reference switch 6" "Disabled,Enabled" bitfld.byte 0x04 5. " S_5 ,Enable reference switch 5" "Disabled,Enabled" bitfld.byte 0x04 4. " S_4 ,Enable reference switch 4" "Disabled,Enabled" textline " " bitfld.byte 0x04 3. " S_3 ,Enable reference switch 3" "Disabled,Enabled" bitfld.byte 0x04 2. " S_2 ,Enable reference switch 2" "Disabled,Enabled" bitfld.byte 0x04 1. " S_1 ,Enable reference switch 1" "Disabled,Enabled" bitfld.byte 0x04 0. " S_0 ,Enable reference switch 0" "Disabled,Enabled" line.byte 0x05 "CSR7,SAR status and control register 7" bitfld.byte 0x05 5. " S_13 ,Enable reference switch 13" "Disabled,Enabled" bitfld.byte 0x05 4. " S_12 ,Enable reference switch 12" "Disabled,Enabled" bitfld.byte 0x05 3. " S_11 ,Enable reference switch 11" "Disabled,Enabled" bitfld.byte 0x05 2. " S_10 ,Enable reference switch 10" "Disabled,Enabled" textline " " bitfld.byte 0x05 1. " S_9 ,Enable reference switch 9" "Disabled,Enabled" bitfld.byte 0x05 0. " S_8 ,Enable reference switch 8" "Disabled,Enabled" textline " " base ad:0x40005B28 group.byte 0x00++0x00 line.byte 0x00 "SW0,SAR Analog Routing Register 0" bitfld.byte 0x00 7. " VP_AG7 ,Connect positive voltage input to analog global of same side 7" "Not connected,Connected" bitfld.byte 0x00 6. " VP_AG6 ,Connect positive voltage input to analog global of same side 6" "Not connected,Connected" bitfld.byte 0x00 5. " VP_AG5 ,Connect positive voltage input to analog global of same side 5" "Not connected,Connected" textline " " bitfld.byte 0x00 4. " VP_AG4 ,Connect positive voltage input to analog global of same side 4" "Not connected,Connected" bitfld.byte 0x00 3. " VP_AG3 ,Connect positive voltage input to analog global of same side 3" "Not connected,Connected" bitfld.byte 0x00 2. " VP_AG2 ,Connect positive voltage input to analog global of same side 2" "Not connected,Connected" textline " " bitfld.byte 0x00 1. " VP_AG1 ,Connect positive voltage input to analog global of same side 1" "Not connected,Connected" bitfld.byte 0x00 0. " VP_AG0 ,Connect positive voltage input to analog global of same side 0" "Not connected,Connected" group.byte 0x02++0x02 line.byte 0x00 "SW2,SAR Analog Routing Register 2" bitfld.byte 0x00 2. " VP_ABUS2 ,Connect positive voltage input to analog bus of the same side" "Not connected,Connected" bitfld.byte 0x00 0. " VP_ABUS0 ,Connect positive voltage input to analog bus of the same side" "Not connected,Connected" line.byte 0x01 "SW3,SAR Analog Routing Register 3" bitfld.byte 0x01 6. " VN_VSSA ,Connect negative voltage input to vssa" "Not connected,Connected" bitfld.byte 0x01 5. " VN_VREF ,Connect negative voltage input to Voltage Reference" "Not connected,Connected" bitfld.byte 0x01 4. " VN_AMX ,Connect negative voltage input to Analog Mux Bus" "Not connected,Connected" textline " " bitfld.byte 0x01 2. " VP_VSSA ,Connect positive voltage input to vssa" "Not connected,Connected" line.byte 0x02 "SW4,SAR Analog Routing Register 4" bitfld.byte 0x02 6. " VN_AG6 ,Connect negative voltage input to analog global of same side 6" "Not connected,Connected" bitfld.byte 0x02 4. " VN_AG4 ,Connect negative voltage input to analog global of same side 4" "Not connected,Connected" bitfld.byte 0x02 2. " VN_AG2 ,Connect negative voltage input to analog global of same side 2" "Not connected,Connected" textline " " bitfld.byte 0x02 0. " VN_AG0 ,Connect negative voltage input to analog global of same side 0" "Not connected,Connected" group.byte 0x06++0x01 line.byte 0x00 "SW6,SAR Analog Routing Register 6" bitfld.byte 0x00 3. " VN_ABUS3 ,Connect negative voltage input to analog bus of the same side" "Not connected,Connected" bitfld.byte 0x00 1. " VN_ABUS1 ,Connect negative voltage input to analog bus of the same side" "Not connected,Connected" line.byte 0x01 "CLK,SAR Clock Selection Register" bitfld.byte 0x01 5.--7. " MX_PUMPCLK ,Pump Clock Selection" "clk_a0 & clk_a0_dig,clk_a1 & clk_a1_dig,clk_a2 & clk_a2_dig,clk_a3 & clk_a3_dig,UDB gen. clk,?..." bitfld.byte 0x01 4. " BYPASS_SYNC ,Bypass Synchronization" "Not bypassed,Bypassed" bitfld.byte 0x01 3. " CLK_EN ,Clock gating control" "Disabled,Enabled" textline " " bitfld.byte 0x01 0.--2. " MX_CLK ,Clock Selection" "clk_a0 & clk_a0_dig,clk_a1 & clk_a1_dig,clk_a2 & clk_a2_dig,clk_a3 & clk_a3_dig,UDB gen. clk,?..." textline " " base ad:0x40005BA2 rgroup.byte 0x00++0x00 line.byte 0x00 "WRK0,SAR working register 0" bitfld.byte 0x00 7. " DATA_OUT_7_0[7] ,Data_out 7" "Low,High" bitfld.byte 0x00 6. " DATA_OUT_7_0[6] ,Data_out 6" "Low,High" bitfld.byte 0x00 5. " DATA_OUT_7_0[5] ,Data_out 5" "Low,High" bitfld.byte 0x00 4. " DATA_OUT_7_0[4] ,Data_out 4" "Low,High" textline " " bitfld.byte 0x00 3. " DATA_OUT_7_0[3] ,Data_out 3" "Low,High" bitfld.byte 0x00 2. " DATA_OUT_7_0[2] ,Data_out 2" "Low,High" bitfld.byte 0x00 1. " DATA_OUT_7_0[1] ,Data_out 1" "Low,High" bitfld.byte 0x00 0. " DATA_OUT_7_0[0] ,Data_out 0" "Low,High" hgroup.byte 0x01++0x00 hide.byte 0x00 "WRK1,SAR register 1" in width 0x0B tree.end endif tree.end tree.open "ABUF (Analog Buffer)" tree "ABUF 0" base ad:0x40004620 width 5. group.byte 0x00++0x01 line.byte 0x00 "TR0,Analog Output Buffer Trim Register 0" bitfld.byte 0x00 0.--4. " OFFSET_TRIM ,Offset Trim" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.byte 0x01 "TR1,Analog Output Buffer Trim Register 1" bitfld.byte 0x01 0.--1. " NC ,To be removed - CDT 36833" "0,1,2,3" base ad:0x40005858 group.byte 0x00++0x00 line.byte 0x00 "CR,Analog Output Buffer Configuration Register" bitfld.byte 0x00 0.--1. " PWR_MODE ,Power mode" "Fast,Slow,Medium,Fast" base ad:0x40005B40 group.byte 0x00++0x01 line.byte 0x00 "MX,Analog Buffer Input Selection Register" bitfld.byte 0x00 4.--5. " MX_VN ,Mux Select VN" "Not connected,AGL[4],AGL[6],?..." bitfld.byte 0x00 0.--3. " MX_VP ,Mux Select VP" "Not connected,AGL[4],AGL[5],AGL[6],AGL[7],ABUSL[0],ABUSL[1],ABUSL[2],ABUSL[3],ABUF Voltage Reference,?..." line.byte 0x01 "SW,Analog Buffer Routing Switch Register" bitfld.byte 0x01 2. " SWINP ,Switch Enable Positive Input" "Disabled,Enabled" bitfld.byte 0x01 1. " SWINN ,Switch Enable Negative Input" "Disabled,Enabled" bitfld.byte 0x01 0. " SWFOL ,Switch Enable Follow" "Disabled,Enabled" width 0x0B tree.end tree "ABUF 1" base ad:0x40004622 width 5. group.byte 0x00++0x01 line.byte 0x00 "TR0,Analog Output Buffer Trim Register 0" bitfld.byte 0x00 0.--4. " OFFSET_TRIM ,Offset Trim" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.byte 0x01 "TR1,Analog Output Buffer Trim Register 1" bitfld.byte 0x01 0.--1. " NC ,To be removed - CDT 36833" "0,1,2,3" base ad:0x4000585A group.byte 0x00++0x00 line.byte 0x00 "CR,Analog Output Buffer Configuration Register" bitfld.byte 0x00 0.--1. " PWR_MODE ,Power mode" "Fast,Slow,Medium,Fast" base ad:0x40005B42 group.byte 0x00++0x01 line.byte 0x00 "MX,Analog Buffer Input Selection Register" bitfld.byte 0x00 4.--5. " MX_VN ,Mux Select VN" "Not connected,AGR[4],AGR[6],?..." bitfld.byte 0x00 0.--3. " MX_VP ,Mux Select VP" "Not connected,AGR[4],AGR[5],AGR[6],AGR[7],ABUSR[0],ABUSR[1],ABUSR[2],ABUSR[3],ABUF Voltage Reference,?..." line.byte 0x01 "SW,Analog Buffer Routing Switch Register" bitfld.byte 0x01 2. " SWINP ,Switch Enable Positive Input" "Disabled,Enabled" bitfld.byte 0x01 1. " SWINN ,Switch Enable Negative Input" "Disabled,Enabled" bitfld.byte 0x01 0. " SWFOL ,Switch Enable Follow" "Disabled,Enabled" width 0x0B tree.end tree "ABUF 2" base ad:0x40004624 width 5. group.byte 0x00++0x01 line.byte 0x00 "TR0,Analog Output Buffer Trim Register 0" bitfld.byte 0x00 0.--4. " OFFSET_TRIM ,Offset Trim" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.byte 0x01 "TR1,Analog Output Buffer Trim Register 1" bitfld.byte 0x01 0.--1. " NC ,To be removed - CDT 36833" "0,1,2,3" base ad:0x4000585C group.byte 0x00++0x00 line.byte 0x00 "CR,Analog Output Buffer Configuration Register" bitfld.byte 0x00 0.--1. " PWR_MODE ,Power mode" "Fast,Slow,Medium,Fast" base ad:0x40005B44 group.byte 0x00++0x01 line.byte 0x00 "MX,Analog Buffer Input Selection Register" bitfld.byte 0x00 4.--5. " MX_VN ,Mux Select VN" "Not connected,AGL[5],AGL[7],?..." bitfld.byte 0x00 0.--3. " MX_VP ,Mux Select VP" "Not connected,AGL[4],AGL[5],AGL[6],AGL[7],ABUSL[0],ABUSL[1],ABUSL[2],ABUSL[3],ABUF Voltage Reference,?..." line.byte 0x01 "SW,Analog Buffer Routing Switch Register" bitfld.byte 0x01 2. " SWINP ,Switch Enable Positive Input" "Disabled,Enabled" bitfld.byte 0x01 1. " SWINN ,Switch Enable Negative Input" "Disabled,Enabled" bitfld.byte 0x01 0. " SWFOL ,Switch Enable Follow" "Disabled,Enabled" width 0x0B tree.end tree "ABUF 3" base ad:0x40004626 width 5. group.byte 0x00++0x01 line.byte 0x00 "TR0,Analog Output Buffer Trim Register 0" bitfld.byte 0x00 0.--4. " OFFSET_TRIM ,Offset Trim" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.byte 0x01 "TR1,Analog Output Buffer Trim Register 1" bitfld.byte 0x01 0.--1. " NC ,To be removed - CDT 36833" "0,1,2,3" base ad:0x4000585E group.byte 0x00++0x00 line.byte 0x00 "CR,Analog Output Buffer Configuration Register" bitfld.byte 0x00 0.--1. " PWR_MODE ,Power mode" "Fast,Slow,Medium,Fast" base ad:0x40005B46 group.byte 0x00++0x01 line.byte 0x00 "MX,Analog Buffer Input Selection Register" bitfld.byte 0x00 4.--5. " MX_VN ,Mux Select VN" "Not connected,AGR[5],AGR[7],?..." bitfld.byte 0x00 0.--3. " MX_VP ,Mux Select VP" "Not connected,AGR[4],AGR[5],AGR[6],AGR[7],ABUSR[0],ABUSR[1],ABUSR[2],ABUSR[3],ABUF Voltage Reference,?..." line.byte 0x01 "SW,Analog Buffer Routing Switch Register" bitfld.byte 0x01 2. " SWINP ,Switch Enable Positive Input" "Disabled,Enabled" bitfld.byte 0x01 1. " SWINN ,Switch Enable Negative Input" "Disabled,Enabled" bitfld.byte 0x01 0. " SWFOL ,Switch Enable Follow" "Disabled,Enabled" width 0x0B tree.end tree.end tree "ILO (Internal Low-speed Oscillator)" base ad:0x40004690 width 5. group.byte 0x00++0x01 line.byte 0x00 "TR0,Internal Low-speed Oscillator Trim Register" bitfld.byte 0x00 4.--7. " TR_100K ,Trim setting for 100 kHz output" "0(Min),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(Max)" bitfld.byte 0x00 0.--3. " TR_1K ,Trim setting for 1 kHz output" "0(Min),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(Max)" line.byte 0x01 "TR1,Internal Low-speed Oscillator Coarse Trim Register" bitfld.byte 0x01 2. " CT_RANGE ,Coarse Trim Range select for ILO" "Normal,Lower current" bitfld.byte 0x01 0.--1. " CTRIM ,Coarse Trim Setting for ILO" "Full,3/4*R,1/2*R,1/4*R" width 0x0B tree.end tree "X32" base ad:0x40004698 width 4. group.byte 0x00++0x00 line.byte 0x00 "TR,32 kHz Watch Crystal Oscillator Trim Register" bitfld.byte 0x00 0.--2. " XGM ,Amplifier GM setting" "Lowest,,,,Defaul,,,Highest" width 0x0B tree.end tree "IMO (Internal Main Oscillator)" base ad:0x400046A0 width 6. group.byte 0x00++0x04 line.byte 0x00 "TR0,Internal Main Oscillator Trim Register 0" bitfld.byte 0x00 5.--7. " IMO_LSB ,3 LSB of the IMO frequency trim" "0(Min),1,2,3,4,5,6,7(Max)" line.byte 0x01 "TR1,Internal Main Oscillator Trim Register 1" line.byte 0x02 "GAIN,Internal Main Oscillator Gain Trim Register" bitfld.byte 0x02 0.--5. " GAIN ,Gain trim for the IMO" "0(Min),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63(Max)" line.byte 0x03 "C36M,Internal Main Oscillator 36 MHz clock control register" bitfld.byte 0x03 0.--3. " TR36 ,Frequency trim for the 36 MHz SPC clock" "0(Min),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(Max)" line.byte 0x04 "TR2,Internal Main Oscillator Trim Register 2" bitfld.byte 0x04 7. " PLL_TRIM ,PLL trim" "Low,High" bitfld.byte 0x04 0.--5. " FIMO_TRIM ,Frequency trim for the IMO in fastwake mode (FIMO)" "0(Min),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63(Max)" width 0x0B tree.end tree "XMHZ" base ad:0x400046A8 width 4. group.byte 0x00++0x00 line.byte 0x00 "TR,External 4-25 MHz Crystal Oscillator Trim Register" bitfld.byte 0x00 0.--3. " IREF ,Adjusts the output current of the oscillator circuit" "13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28" width 0x0B tree.end tree "MLOGIC" base ad:0x400046E0 width 10. rgroup.byte 0x02++0x00 line.byte 0x00 "DMP_DMY,Dumpster Register" group.byte 0x04++0x01 line.byte 0x00 "SEG_CR,Segment Control Register" line.byte 0x01 "SEG_CFG0,Segment Configuration Register" bitfld.byte 0x01 7. " LOCK_PROTECT_3 ,Segment Lock Protect" "Not protected,Protected" bitfld.byte 0x01 6. " LOCK_3 ,Segment Lock" "Not locked,Locked" bitfld.byte 0x01 5. " LOCK_PROTECT_2 ,Segment Lock Protect" "Not protected,Protected" textline " " bitfld.byte 0x01 4. " LOCK_2 ,Segment Lock" "Not locked,Locked" bitfld.byte 0x01 3. " LOCK_PROTECT_1 ,Segment Lock Protect" "Not protected,Protected" bitfld.byte 0x01 2. " LOCK_1 ,Segment Lock" "Not locked,Locked" textline " " bitfld.byte 0x01 1. " LOCK_PROTECT_0 ,Segment Lock Protect" "Not protected,Protected" bitfld.byte 0x01 0. " LOCK_0 ,Segment Lock" "Not locked,Locked" group.byte 0x08++0x00 line.byte 0x00 "DBG_DBE,Debug Enable Register" bitfld.byte 0x00 1. " MEN_TST_ACC ,Allows access to TC registers" "Not allowed,Allowed" bitfld.byte 0x00 0. " DEBUG_ENABLE ,Debug Enable" "Disabled,Enabled" group.byte 0x0a++0x00 line.byte 0x00 "CPU_SCR,System Status and Control Register" bitfld.byte 0x00 3. " WOL ,Write Once Latch Status" "Disabled,Enabled" bitfld.byte 0x00 2. " BOOT ,Boot" "Low,High" bitfld.byte 0x00 1. " TMODE ,Test Mode Status" "Disabled,Enabled" width 0x0B tree.end tree "RESET" base ad:0x400046F0 width 10. wgroup.byte 0x0++0x00 line.byte 0x00 "IPOR_CR0,Imprecise Power On Reset Control Register 0" wgroup.byte 0x1++0x00 line.byte 0x00 "IPOR_CR1,Imprecise Power On Reset Control Register 1" wgroup.byte 0x2++0x00 line.byte 0x00 "IPOR_CR2,Imprecise Power On Reset Control Register 2" wgroup.byte 0x3++0x00 line.byte 0x00 "IPOR_CR3,Imprecise Power On Reset Control Register 3" group.byte 0x04++0x03 line.byte 0x00 "CR0,LVI Set Point Control Register" bitfld.byte 0x00 4.--7. " LVI_A ,Trip point of the detector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " LVI_D ,Trip point of the detector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.byte 0x01 "CR1,Reset System Control Register" bitfld.byte 0x01 5. " DIS_HBR1 ,HBR circuit disable" "No,Yes" bitfld.byte 0x01 4. " DIS_PRES1 ,PRES-A and PRES-D circuits disable" "No,Yes" bitfld.byte 0x01 3. " VMON_HVI_SEL ,Enables the vmon to look at the VDDD" "Disabled,Enabled" bitfld.byte 0x01 2. " EN_HVI_A ,Enables the high-voltage-interrupt feature on the external analog supply" "Disabled,Enabled" textline " " bitfld.byte 0x01 1. " EN_LVI_A ,Enables the low-voltage-interrupt feature on the external analog supply" "Disabled,Enabled" bitfld.byte 0x01 0. " EN_LVI_D ,Enables the low-voltage-interrupt feature on the external digital supply" "Disabled,Enabled" line.byte 0x02 "CR2,Software Reset Control Register" bitfld.byte 0x02 0. " SWR ,System reset" "No reset,Reset" line.byte 0x03 "CR3,LVD/POR Test Mode Control Register" bitfld.byte 0x03 4. " DIS_HBR2 ,HBR circuit disable" "No,Yes" bitfld.byte 0x03 3. " DIS_PRES2 ,PRES-A and PRES-D circuits disable" "No,Yes" bitfld.byte 0x03 0.--2. " TMUX_SEL ,Circuit output to steer to the 'tmuxout' pin" "Normal,pres-d,pres_a,lvi_d,lvi_a,hvi_a,?..." hgroup.byte 0x08++0x00 hide.byte 0x00 "SR0,Reset and Voltage Detection Status Register 0" in hgroup.byte 0x09++0x00 hide.byte 0x00 "SR1,Reset and Voltage Detection Status Register 1" in hgroup.byte 0x0a++0x00 hide.byte 0x00 "SR2,Reset and Voltage Detection Status Register 2" in group.byte 0x0b++0x00 line.byte 0x00 "TR,PRES Trim Register" bitfld.byte 0x00 4.--7. " PRES_A ,Trim for PRES-A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " PRES_D ,Trim for PRES-D" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "SPC (System performance controller)" base ad:0x40004700 width 16. group.byte 0x00++0x02 line.byte 0x00 "FM_EE_CR,FM_EE_CR" bitfld.byte 0x00 5. " EE_AWAKE ,EEPROM array awake" "0,1" bitfld.byte 0x00 4. " EE_SLP_REQ ,Request for user firmware to put the EEPROM array into sleep mode" "Not requested,Requested" bitfld.byte 0x00 3. " FM_KEEP_AWAKE ,Flash Macro Keep Awake" "Not prevented,Prevented" textline " " bitfld.byte 0x00 1. " EE_PRIORITY ,Priority between the PHUB and the SPC" "PHUB,SPC" bitfld.byte 0x00 0. " FM_PRIORITY ,priority between the cache controller and the SPC" "Cache controller,SPC" line.byte 0x01 "FM_EE_WAKE_CNT,Flash/EEPROM Wake Count Register" line.byte 0x02 "EE_SCR,EEPROM Status & Control Register" bitfld.byte 0x02 1. " EE_AHB_ACK ,EEPROM available to be read across the PHUB interface" "Not available,Available" bitfld.byte 0x02 0. " AHB_EE_REQ ,Read access of the EEPROM request" "Not requested,Requested" hgroup.byte 0x03++0x00 hide.byte 0x00 "EE_ERR,EEPROM Error Register" in group.byte 0x20++0x01 line.byte 0x00 "CPU_DATA,SPC CPU Data Register" line.byte 0x01 "DMA_DATA,SPC DMA Data Register" rgroup.byte 0x22++0x00 line.byte 0x00 "SR,SPC Status Register" bitfld.byte 0x00 2.--7. " STATUS_CODE ,Status Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.byte 0x00 1. " SPC_IDLE ,Indicates whether or not the SPC is currently executing an instruction" "SPC,Idle & not busy" textline " " bitfld.byte 0x00 0. " DATA_READY ,SPC data ready to be read" "Not ready,Ready" group.byte 0x23++0x00 line.byte 0x00 "CR,SPC Control Register" bitfld.byte 0x00 2. " ADC_ATT_EN ,Path through the attenuator" "Direct,Attenuator" bitfld.byte 0x00 1. " SPC_BUSCLOCK_FREQUENCY ,Frequency of the bus (AHB) clock" "50,>=,?..." textline " " bitfld.byte 0x00 0. " IRQ_SEL ,Irq selection" "Raw IRQ,Status IRQ" endif group.byte 0x02++0x01 line.byte 0x00 "PER0,Timer Period Register PER0" line.byte 0x01 "PER1,Timer Period Register PER1" if (((per.b(ad:0x40004F00))&0x02)==0x00) group.byte 0x04++0x01 line.byte 0x00 "CNT0,Count value CNT0" line.byte 0x01 "CNT1,Count value CNT1" rgroup.byte 0x06++0x01 line.byte 0x00 "CAP0,Capture Value CAP0" line.byte 0x01 "CAP1,Capture Value CAP1" else wgroup.byte 0x04++0x01 line.byte 0x00 "CMP0,Comparator value CMP0" line.byte 0x01 "CMP1,Comparator value CMP1" hgroup.byte 0x06++0x01 hide.byte 0x00 "CAP0,Capture Value CAP0" hide.byte 0x00 "CAP1,Capture Value CAP1" endif hgroup.byte 0x08++0x00 hide.byte 0x00 "SR0,Status Register SR0" in textline " " group.byte 0x09++0x01 line.byte 0x00 "RT0,Configuration Register RT0" bitfld.byte 0x00 6.--7. " TIMER_RST_SRC_SEL ,Selects the driver for the timer reset signal" "dsi_in0,dsi_in1,dsi_in2,dsi_in3" bitfld.byte 0x00 4.--5. " TIMER_EN_SRC_SEL ,] Selects the driver for the timer enable signal" "dsi_in0,dsi_in1,dsi_in2,dsi_in3" bitfld.byte 0x00 2.--3. " CAPTURE_SRC_SEL ,Selects the driver for the capture signal" "dsi_in0,dsi_in1,dsi_in2,dsi_in3" textline " " bitfld.byte 0x00 0.--1. " KILL_SRC_SEL ,Selects the driver for the kill signal" "dsi_in0,dsi_in1,dsi_in2,dsi_in3" textline " " line.byte 0x01 "RT1,Configuration Register RT1" bitfld.byte 0x01 5. " SYNCTC ,Synchronize TC/TC-IRQ to selected clk_bus_en" "Not synchronized,Synchronized" bitfld.byte 0x01 4. " SYNCCMP ,Synchronize CMP/CMPB output to selected clk_bus_en" "Not synchronized,Synchronized" bitfld.byte 0x01 3. " SYNCDSI3 ,Synchronize DSI input, dsi_in3, to clk_bus" "Not synchronized,Synchronized" textline " " bitfld.byte 0x01 2. " SYNCDSI2 ,Synchronize DSI input, dsi_in2, to clk_bus" "Not synchronized,Synchronized" bitfld.byte 0x01 1. " SYNCDSI1 ,Synchronize DSI input, dsi_in1, to clk_bus" "Not synchronized,Synchronized" bitfld.byte 0x01 0. " SYNCDSI0 ,Synchronize DSI input, dsi_in0, to clk_bus" "Not synchronized,Synchronized" width 0x0B tree.end tree "TMR 1" base ad:0x40004F0C width 10. group.byte 0x00++0x00 line.byte 0x00 "CFG0,Configuration Register CFG0" bitfld.byte 0x00 6.--7. " DEADBAND_PERIOD ,Deadband Period" "0,1,2,3" bitfld.byte 0x00 5. " DB ,Deadband mode" "Terminal Count,CMPB" bitfld.byte 0x00 4. " INV ,Invert sense of TIMEREN signal" "Not inverted,Inverted" textline " " bitfld.byte 0x00 3. " CMP_BUFF ,Buffer compare register" "Low,High" bitfld.byte 0x00 2. " ONESHOT ,Timer stops upon reaching stop condition defined by MODE_CFG bits" "Not stopped,Stopped" bitfld.byte 0x00 1. " MODE ,Mode" "Timer,Comparator" textline " " bitfld.byte 0x00 0. " EN ,Enables timer/comparator" "Disabled,Enabled" textline " " if (((per.b(ad:0x40004F0C))&0x02)==0x00) group.byte 0x01++0x00 line.byte 0x00 "CFG1,Configuration Register CFG1" bitfld.byte 0x00 7. " BUS_CLK_SEL ,Bus Clock selection" "clk_d,clk_bus" bitfld.byte 0x00 4.--6. " CLK_BUS_EN_SEL ,Digital Global Clock selection" "clk_d0,clk_d1,clk_d2,clk_d3,clk_d4,clk_d5,clk_d6,clk_d7" bitfld.byte 0x00 1.--3. " MODE_CFG ,Timer configuration" "Continuous,Pulsewidth,Period,Irq,?..." textline " " bitfld.byte 0x00 0. " IRQ_SEL ,Irq selection" "Raw IRQ,Status IRQ" else group.byte 0x01++0x00 line.byte 0x00 "CFG1,Configuration Register CFG1" bitfld.byte 0x00 7. " BUS_CLK_SEL ,Bus Clock selection" "clk_d,clk_bus" bitfld.byte 0x00 4.--6. " CLK_BUS_EN_SEL ,Digital Global Clock selection" "clk_d0,clk_d1,clk_d2,clk_d3,clk_d4,clk_d5,clk_d6,clk_d7" bitfld.byte 0x00 1.--3. " MODE_CFG ,IRQ Comparator configuration" "==,<,<=,>,>=,?..." textline " " bitfld.byte 0x00 0. " IRQ_SEL ,Irq selection" "Raw IRQ,Status IRQ" endif group.byte 0x02++0x01 line.byte 0x00 "PER0,Timer Period Register PER0" line.byte 0x01 "PER1,Timer Period Register PER1" if (((per.b(ad:0x40004F0C))&0x02)==0x00) group.byte 0x04++0x01 line.byte 0x00 "CNT0,Count value CNT0" line.byte 0x01 "CNT1,Count value CNT1" rgroup.byte 0x06++0x01 line.byte 0x00 "CAP0,Capture Value CAP0" line.byte 0x01 "CAP1,Capture Value CAP1" else wgroup.byte 0x04++0x01 line.byte 0x00 "CMP0,Comparator value CMP0" line.byte 0x01 "CMP1,Comparator value CMP1" hgroup.byte 0x06++0x01 hide.byte 0x00 "CAP0,Capture Value CAP0" hide.byte 0x00 "CAP1,Capture Value CAP1" endif hgroup.byte 0x08++0x00 hide.byte 0x00 "SR0,Status Register SR0" in textline " " group.byte 0x09++0x01 line.byte 0x00 "RT0,Configuration Register RT0" bitfld.byte 0x00 6.--7. " TIMER_RST_SRC_SEL ,Selects the driver for the timer reset signal" "dsi_in0,dsi_in1,dsi_in2,dsi_in3" bitfld.byte 0x00 4.--5. " TIMER_EN_SRC_SEL ,] Selects the driver for the timer enable signal" "dsi_in0,dsi_in1,dsi_in2,dsi_in3" bitfld.byte 0x00 2.--3. " CAPTURE_SRC_SEL ,Selects the driver for the capture signal" "dsi_in0,dsi_in1,dsi_in2,dsi_in3" textline " " bitfld.byte 0x00 0.--1. " KILL_SRC_SEL ,Selects the driver for the kill signal" "dsi_in0,dsi_in1,dsi_in2,dsi_in3" textline " " line.byte 0x01 "RT1,Configuration Register RT1" bitfld.byte 0x01 5. " SYNCTC ,Synchronize TC/TC-IRQ to selected clk_bus_en" "Not synchronized,Synchronized" bitfld.byte 0x01 4. " SYNCCMP ,Synchronize CMP/CMPB output to selected clk_bus_en" "Not synchronized,Synchronized" bitfld.byte 0x01 3. " SYNCDSI3 ,Synchronize DSI input, dsi_in3, to clk_bus" "Not synchronized,Synchronized" textline " " bitfld.byte 0x01 2. " SYNCDSI2 ,Synchronize DSI input, dsi_in2, to clk_bus" "Not synchronized,Synchronized" bitfld.byte 0x01 1. " SYNCDSI1 ,Synchronize DSI input, dsi_in1, to clk_bus" "Not synchronized,Synchronized" bitfld.byte 0x01 0. " SYNCDSI0 ,Synchronize DSI input, dsi_in0, to clk_bus" "Not synchronized,Synchronized" width 0x0B tree.end tree "TMR 2" base ad:0x40004F18 width 10. group.byte 0x00++0x00 line.byte 0x00 "CFG0,Configuration Register CFG0" bitfld.byte 0x00 6.--7. " DEADBAND_PERIOD ,Deadband Period" "0,1,2,3" bitfld.byte 0x00 5. " DB ,Deadband mode" "Terminal Count,CMPB" bitfld.byte 0x00 4. " INV ,Invert sense of TIMEREN signal" "Not inverted,Inverted" textline " " bitfld.byte 0x00 3. " CMP_BUFF ,Buffer compare register" "Low,High" bitfld.byte 0x00 2. " ONESHOT ,Timer stops upon reaching stop condition defined by MODE_CFG bits" "Not stopped,Stopped" bitfld.byte 0x00 1. " MODE ,Mode" "Timer,Comparator" textline " " bitfld.byte 0x00 0. " EN ,Enables timer/comparator" "Disabled,Enabled" textline " " if (((per.b(ad:0x40004F18))&0x02)==0x00) group.byte 0x01++0x00 line.byte 0x00 "CFG1,Configuration Register CFG1" bitfld.byte 0x00 7. " BUS_CLK_SEL ,Bus Clock selection" "clk_d,clk_bus" bitfld.byte 0x00 4.--6. " CLK_BUS_EN_SEL ,Digital Global Clock selection" "clk_d0,clk_d1,clk_d2,clk_d3,clk_d4,clk_d5,clk_d6,clk_d7" bitfld.byte 0x00 1.--3. " MODE_CFG ,Timer configuration" "Continuous,Pulsewidth,Period,Irq,?..." textline " " bitfld.byte 0x00 0. " IRQ_SEL ,Irq selection" "Raw IRQ,Status IRQ" else group.byte 0x01++0x00 line.byte 0x00 "CFG1,Configuration Register CFG1" bitfld.byte 0x00 7. " BUS_CLK_SEL ,Bus Clock selection" "clk_d,clk_bus" bitfld.byte 0x00 4.--6. " CLK_BUS_EN_SEL ,Digital Global Clock selection" "clk_d0,clk_d1,clk_d2,clk_d3,clk_d4,clk_d5,clk_d6,clk_d7" bitfld.byte 0x00 1.--3. " MODE_CFG ,IRQ Comparator configuration" "==,<,<=,>,>=,?..." textline " " bitfld.byte 0x00 0. " IRQ_SEL ,Irq selection" "Raw IRQ,Status IRQ" endif group.byte 0x02++0x01 line.byte 0x00 "PER0,Timer Period Register PER0" line.byte 0x01 "PER1,Timer Period Register PER1" if (((per.b(ad:0x40004F18))&0x02)==0x00) group.byte 0x04++0x01 line.byte 0x00 "CNT0,Count value CNT0" line.byte 0x01 "CNT1,Count value CNT1" rgroup.byte 0x06++0x01 line.byte 0x00 "CAP0,Capture Value CAP0" line.byte 0x01 "CAP1,Capture Value CAP1" else wgroup.byte 0x04++0x01 line.byte 0x00 "CMP0,Comparator value CMP0" line.byte 0x01 "CMP1,Comparator value CMP1" hgroup.byte 0x06++0x01 hide.byte 0x00 "CAP0,Capture Value CAP0" hide.byte 0x00 "CAP1,Capture Value CAP1" endif hgroup.byte 0x08++0x00 hide.byte 0x00 "SR0,Status Register SR0" in textline " " group.byte 0x09++0x01 line.byte 0x00 "RT0,Configuration Register RT0" bitfld.byte 0x00 6.--7. " TIMER_RST_SRC_SEL ,Selects the driver for the timer reset signal" "dsi_in0,dsi_in1,dsi_in2,dsi_in3" bitfld.byte 0x00 4.--5. " TIMER_EN_SRC_SEL ,] Selects the driver for the timer enable signal" "dsi_in0,dsi_in1,dsi_in2,dsi_in3" bitfld.byte 0x00 2.--3. " CAPTURE_SRC_SEL ,Selects the driver for the capture signal" "dsi_in0,dsi_in1,dsi_in2,dsi_in3" textline " " bitfld.byte 0x00 0.--1. " KILL_SRC_SEL ,Selects the driver for the kill signal" "dsi_in0,dsi_in1,dsi_in2,dsi_in3" textline " " line.byte 0x01 "RT1,Configuration Register RT1" bitfld.byte 0x01 5. " SYNCTC ,Synchronize TC/TC-IRQ to selected clk_bus_en" "Not synchronized,Synchronized" bitfld.byte 0x01 4. " SYNCCMP ,Synchronize CMP/CMPB output to selected clk_bus_en" "Not synchronized,Synchronized" bitfld.byte 0x01 3. " SYNCDSI3 ,Synchronize DSI input, dsi_in3, to clk_bus" "Not synchronized,Synchronized" textline " " bitfld.byte 0x01 2. " SYNCDSI2 ,Synchronize DSI input, dsi_in2, to clk_bus" "Not synchronized,Synchronized" bitfld.byte 0x01 1. " SYNCDSI1 ,Synchronize DSI input, dsi_in1, to clk_bus" "Not synchronized,Synchronized" bitfld.byte 0x01 0. " SYNCDSI0 ,Synchronize DSI input, dsi_in0, to clk_bus" "Not synchronized,Synchronized" width 0x0B tree.end tree "TMR 3" base ad:0x40004F24 width 10. group.byte 0x00++0x00 line.byte 0x00 "CFG0,Configuration Register CFG0" bitfld.byte 0x00 6.--7. " DEADBAND_PERIOD ,Deadband Period" "0,1,2,3" bitfld.byte 0x00 5. " DB ,Deadband mode" "Terminal Count,CMPB" bitfld.byte 0x00 4. " INV ,Invert sense of TIMEREN signal" "Not inverted,Inverted" textline " " bitfld.byte 0x00 3. " CMP_BUFF ,Buffer compare register" "Low,High" bitfld.byte 0x00 2. " ONESHOT ,Timer stops upon reaching stop condition defined by MODE_CFG bits" "Not stopped,Stopped" bitfld.byte 0x00 1. " MODE ,Mode" "Timer,Comparator" textline " " bitfld.byte 0x00 0. " EN ,Enables timer/comparator" "Disabled,Enabled" textline " " if (((per.b(ad:0x40004F24))&0x02)==0x00) group.byte 0x01++0x00 line.byte 0x00 "CFG1,Configuration Register CFG1" bitfld.byte 0x00 7. " BUS_CLK_SEL ,Bus Clock selection" "clk_d,clk_bus" bitfld.byte 0x00 4.--6. " CLK_BUS_EN_SEL ,Digital Global Clock selection" "clk_d0,clk_d1,clk_d2,clk_d3,clk_d4,clk_d5,clk_d6,clk_d7" bitfld.byte 0x00 1.--3. " MODE_CFG ,Timer configuration" "Continuous,Pulsewidth,Period,Irq,?..." textline " " bitfld.byte 0x00 0. " IRQ_SEL ,Irq selection" "Raw IRQ,Status IRQ" else group.byte 0x01++0x00 line.byte 0x00 "CFG1,Configuration Register CFG1" bitfld.byte 0x00 7. " BUS_CLK_SEL ,Bus Clock selection" "clk_d,clk_bus" bitfld.byte 0x00 4.--6. " CLK_BUS_EN_SEL ,Digital Global Clock selection" "clk_d0,clk_d1,clk_d2,clk_d3,clk_d4,clk_d5,clk_d6,clk_d7" bitfld.byte 0x00 1.--3. " MODE_CFG ,IRQ Comparator configuration" "==,<,<=,>,>=,?..." textline " " bitfld.byte 0x00 0. " IRQ_SEL ,Irq selection" "Raw IRQ,Status IRQ" endif group.byte 0x02++0x01 line.byte 0x00 "PER0,Timer Period Register PER0" line.byte 0x01 "PER1,Timer Period Register PER1" if (((per.b(ad:0x40004F24))&0x02)==0x00) group.byte 0x04++0x01 line.byte 0x00 "CNT0,Count value CNT0" line.byte 0x01 "CNT1,Count value CNT1" rgroup.byte 0x06++0x01 line.byte 0x00 "CAP0,Capture Value CAP0" line.byte 0x01 "CAP1,Capture Value CAP1" else wgroup.byte 0x04++0x01 line.byte 0x00 "CMP0,Comparator value CMP0" line.byte 0x01 "CMP1,Comparator value CMP1" hgroup.byte 0x06++0x01 hide.byte 0x00 "CAP0,Capture Value CAP0" hide.byte 0x00 "CAP1,Capture Value CAP1" endif hgroup.byte 0x08++0x00 hide.byte 0x00 "SR0,Status Register SR0" in textline " " group.byte 0x09++0x01 line.byte 0x00 "RT0,Configuration Register RT0" bitfld.byte 0x00 6.--7. " TIMER_RST_SRC_SEL ,Selects the driver for the timer reset signal" "dsi_in0,dsi_in1,dsi_in2,dsi_in3" bitfld.byte 0x00 4.--5. " TIMER_EN_SRC_SEL ,] Selects the driver for the timer enable signal" "dsi_in0,dsi_in1,dsi_in2,dsi_in3" bitfld.byte 0x00 2.--3. " CAPTURE_SRC_SEL ,Selects the driver for the capture signal" "dsi_in0,dsi_in1,dsi_in2,dsi_in3" textline " " bitfld.byte 0x00 0.--1. " KILL_SRC_SEL ,Selects the driver for the kill signal" "dsi_in0,dsi_in1,dsi_in2,dsi_in3" textline " " line.byte 0x01 "RT1,Configuration Register RT1" bitfld.byte 0x01 5. " SYNCTC ,Synchronize TC/TC-IRQ to selected clk_bus_en" "Not synchronized,Synchronized" bitfld.byte 0x01 4. " SYNCCMP ,Synchronize CMP/CMPB output to selected clk_bus_en" "Not synchronized,Synchronized" bitfld.byte 0x01 3. " SYNCDSI3 ,Synchronize DSI input, dsi_in3, to clk_bus" "Not synchronized,Synchronized" textline " " bitfld.byte 0x01 2. " SYNCDSI2 ,Synchronize DSI input, dsi_in2, to clk_bus" "Not synchronized,Synchronized" bitfld.byte 0x01 1. " SYNCDSI1 ,Synchronize DSI input, dsi_in1, to clk_bus" "Not synchronized,Synchronized" bitfld.byte 0x01 0. " SYNCDSI0 ,Synchronize DSI input, dsi_in0, to clk_bus" "Not synchronized,Synchronized" width 0x0B tree.end tree.end tree "PRT (Ports interrupt control)" base ad:0x40005000 tree "PRT 0" width 16. group.byte (0x08*0)++0x07 line.byte 0x0 "PC0,Port Pin Configuration Registers 0" bitfld.byte 0x0 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x0 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x0 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x0 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x0 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x0 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x0 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x0 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x1 "PC1,Port Pin Configuration Registers 1" bitfld.byte 0x1 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x1 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x1 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x1 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x1 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x1 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x1 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x1 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x2 "PC2,Port Pin Configuration Registers 2" bitfld.byte 0x2 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x2 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x2 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x2 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x2 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x2 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x2 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x2 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x3 "PC3,Port Pin Configuration Registers 3" bitfld.byte 0x3 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x3 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x3 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x3 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x3 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x3 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x3 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x3 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x4 "PC4,Port Pin Configuration Registers 4" bitfld.byte 0x4 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x4 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x4 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x4 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x4 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x4 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x4 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x4 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x5 "PC5,Port Pin Configuration Registers 5" bitfld.byte 0x5 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x5 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x5 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x5 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x5 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x5 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x5 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x5 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x6 "PC6,Port Pin Configuration Registers 6" bitfld.byte 0x6 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x6 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x6 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x6 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x6 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x6 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x6 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x6 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x7 "PC7,Port Pin Configuration Registers 7" bitfld.byte 0x7 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x7 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x7 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x7 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x7 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x7 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x7 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x7 0. " DATA_OUT ,Data out bit" "Low,High" textline " " group.byte (0x80+0x01*0)++0x00 line.byte 0x00 "DR_ALIAS,Aliased Port Data Output Register" bitfld.byte 0x00 7. " DATAREG_ALIAS[7] ,High/Low state for the GPIO pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,High/Low state for the GPIO pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,High/Low state for the GPIO pin 5" "Low,High" textline " " bitfld.byte 0x00 4. " [4] ,High/Low state for the GPIO pin 4" "Low,High" bitfld.byte 0x00 3. " [3] ,High/Low state for the GPIO pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,High/Low state for the GPIO pin 2" "Low,High" textline " " bitfld.byte 0x00 1. " [1] ,High/Low state for the GPIO pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,High/Low state for the GPIO pin 0" "Low,High" textline " " group.byte (0x90+0x01*0)++0x00 line.byte 0x00 "PS_ALIAS,Aliased Port Pin State Register" bitfld.byte 0x00 7. " PINSTATE_ALIAS[7] ,Logical state of the I/O pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,Logical state of the I/O pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,Logical state of the I/O pin 5" "Low,High" textline " " bitfld.byte 0x00 4. " [4] ,Logical state of the I/O pin 4" "Low,High" bitfld.byte 0x00 3. " [3] ,Logical state of the I/O pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,Logical state of the I/O pin 2" "Low,High" textline " " bitfld.byte 0x00 1. " [1] ,Logical state of the I/O pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,Logical state of the I/O pin 0" "Low,High" textline " " group.byte (0x100+0x10*0)++0x00 line.byte 0x00 "DR,Port Data Output Register" bitfld.byte 0x00 7. " DATAREG[7] ,State for the GPIO pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,State for the GPIO pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,State for the GPIO pin 5" "Low,High" bitfld.byte 0x00 4. " [4] ,State for the GPIO pin 4" "Low,High" textline " " bitfld.byte 0x00 3. " [3] ,State for the GPIO pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,State for the GPIO pin 2" "Low,High" bitfld.byte 0x00 1. " [1] ,State for the GPIO pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,State for the GPIO pin 0" "Low,High" textline " " rgroup.byte (0x101+0x10*0)++0x00 line.byte 0x00 "PS,Port Pin State Register 1" bitfld.byte 0x00 7. " PINSTATE[7] ,Logical state of the I/O pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,Logical state of the I/O pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,Logical state of the I/O pin 5" "Low,High" bitfld.byte 0x00 4. " [4] ,Logical state of the I/O pin 4" "Low,High" textline " " bitfld.byte 0x00 3. " [3] ,Logical state of the I/O pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,Logical state of the I/O pin 2" "Low,High" bitfld.byte 0x00 1. " [1] ,Logical state of the I/O pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,Logical state of the I/O pin 0" "Low,High" textline " " group.byte (0x102+0x10*0)++0x02 line.byte 0x0 "DM0,Port Drive Mode Register 0" bitfld.byte 0x0 7. " DRIVEMODE[7] ,DM register 0 assertion bit 7" "Low,High" bitfld.byte 0x0 6. " [6] ,DM register 0 assertion bit 6" "Low,High" bitfld.byte 0x0 5. " [5] ,DM register 0 assertion bit 5" "Low,High" bitfld.byte 0x0 4. " [4] ,DM register 0 assertion bit 4" "Low,High" textline " " bitfld.byte 0x0 3. " [3] ,DM register 0 assertion bit 3" "Low,High" bitfld.byte 0x0 2. " [2] ,DM register 0 assertion bit 2" "Low,High" bitfld.byte 0x0 1. " [1] ,DM register 0 assertion bit 1" "Low,High" bitfld.byte 0x0 0. " [0] ,DM register 0 assertion bit 0" "Low,High" line.byte 0x1 "DM1,Port Drive Mode Register 1" bitfld.byte 0x1 7. " DRIVEMODE[7] ,DM register 1 assertion bit 7" "Low,High" bitfld.byte 0x1 6. " [6] ,DM register 1 assertion bit 6" "Low,High" bitfld.byte 0x1 5. " [5] ,DM register 1 assertion bit 5" "Low,High" bitfld.byte 0x1 4. " [4] ,DM register 1 assertion bit 4" "Low,High" textline " " bitfld.byte 0x1 3. " [3] ,DM register 1 assertion bit 3" "Low,High" bitfld.byte 0x1 2. " [2] ,DM register 1 assertion bit 2" "Low,High" bitfld.byte 0x1 1. " [1] ,DM register 1 assertion bit 1" "Low,High" bitfld.byte 0x1 0. " [0] ,DM register 1 assertion bit 0" "Low,High" line.byte 0x2 "DM2,Port Drive Mode Register 2" bitfld.byte 0x2 7. " DRIVEMODE[7] ,DM register 2 assertion bit 7" "Low,High" bitfld.byte 0x2 6. " [6] ,DM register 2 assertion bit 6" "Low,High" bitfld.byte 0x2 5. " [5] ,DM register 2 assertion bit 5" "Low,High" bitfld.byte 0x2 4. " [4] ,DM register 2 assertion bit 4" "Low,High" textline " " bitfld.byte 0x2 3. " [3] ,DM register 2 assertion bit 3" "Low,High" bitfld.byte 0x2 2. " [2] ,DM register 2 assertion bit 2" "Low,High" bitfld.byte 0x2 1. " [1] ,DM register 2 assertion bit 1" "Low,High" bitfld.byte 0x2 0. " [0] ,DM register 2 assertion bit 0" "Low,High" textline " " group.byte (0x105+0x10*0)++0x04 line.byte 0x00 "SLW,Port slew rate control" bitfld.byte 0x00 7. " SLWCTL[7] ,Output edge rate of the port 0 pin 7" "Fast,Slow" bitfld.byte 0x00 6. " [6] ,Output edge rate of the port 0 pin 6" "Fast,Slow" bitfld.byte 0x00 5. " [5] ,Output edge rate of the port 0 pin 5" "Fast,Slow" bitfld.byte 0x00 4. " [4] ,Output edge rate of the port 0 pin 4" "Fast,Slow" textline " " bitfld.byte 0x00 3. " [3] ,Output edge rate of the port 0 pin 3" "Fast,Slow" bitfld.byte 0x00 2. " [2] ,Output edge rate of the port 0 pin 2" "Fast,Slow" bitfld.byte 0x00 1. " [1] ,Output edge rate of the port 0 pin 1" "Fast,Slow" bitfld.byte 0x00 0. " [0] ,Output edge rate of the port 0 pin 0" "Fast,Slow" textline " " line.byte 0x01 "BYP,Port Bypass enable" bitfld.byte 0x01 7. " BYPASS[7] ,DSI drives the corresponding port 0 pin 7" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 6. " [6] ,DSI drives the corresponding port 0 pin 6" "Port Logic Data Register,Digital System Interconnect" textline " " bitfld.byte 0x01 5. " [5] ,DSI drives the corresponding port 0 pin 5" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 4. " [4] ,DSI drives the corresponding port 0 pin 4" "Port Logic Data Register,Digital System Interconnect" textline " " bitfld.byte 0x01 3. " [3] ,DSI drives the corresponding port 0 pin 3" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 2. " [2] ,DSI drives the corresponding port 0 pin 2" "Port Logic Data Register,Digital System Interconnect" textline " " bitfld.byte 0x01 1. " [1] ,DSI drives the corresponding port 0 pin 1" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 0. " [0] ,DSI drives the corresponding port 0 pin 0" "Port Logic Data Register,Digital System Interconnect" textline " " line.byte 0x02 "BIE,Port Bydirection enable" bitfld.byte 0x02 7. " BIDIRECTEN[7] ,Bidirectional mode of the port 0 pin 7" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 6. " [6] ,Bidirectional mode of the port 0 pin 6" "Drive mode,Dynamic control DSI" textline " " bitfld.byte 0x02 5. " [5] ,Bidirectional mode of the port 0 pin 5" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 4. " [4] ,Bidirectional mode of the port 0 pin 4" "Drive mode,Dynamic control DSI" textline " " bitfld.byte 0x02 3. " [3] ,Bidirectional mode of the port 0 pin 3" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 2. " [2] ,Bidirectional mode of the port 0 pin 2" "Drive mode,Dynamic control DSI" textline " " bitfld.byte 0x02 1. " [1] ,Bidirectional mode of the port 0 pin 1" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 0. " [0] ,Bidirectional mode of the port 0 pin 0" "Drive mode,Dynamic control DSI" textline " " line.byte 0x03 "INP_DIS,Input buffer disable override" bitfld.byte 0x03 7. " INP_DIS[7] ,Input buffer disable 7" "No,Yes" bitfld.byte 0x03 6. " [6] ,Input buffer disable 6" "No,Yes" bitfld.byte 0x03 5. " [5] ,Input buffer disable 5" "No,Yes" bitfld.byte 0x03 4. " [4] ,Input buffer disable 4" "No,Yes" textline " " bitfld.byte 0x03 3. " [3] ,Input buffer disable 3" "No,Yes" bitfld.byte 0x03 2. " [2] ,Input buffer disable 2" "No,Yes" bitfld.byte 0x03 1. " [1] ,Input buffer disable 1" "No,Yes" bitfld.byte 0x03 0. " [0] ,Input buffer disable 0" "No,Yes" textline " " line.byte 0x04 "CTL,Port wide control signals" bitfld.byte 0x04 1.--3. " portEmifCfg ,GPIO emif selection option" "NOT_EMIF,LSB_ADDR,UPR_ADDR,MSB_ADDR,Reserved,LSB_DATA,MSB_DATA,?..." bitfld.byte 0x04 0. " VTRIP_SEL ,CMOS/LVTTL input buffer" "CMOS,LVTTL" wgroup.byte (0x10a+0x10*0)++0x00 line.byte 0x00 "PRT,Port wide configuration register" bitfld.byte 0x00 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x00 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x00 5. " BIDIRECTEN ,BiDir Enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " DRIVEMODE2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x00 2. " DRIVEMODE1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x00 1. " DRIVEMODE0 ,Drive mode 0" "Disabled,Enabled" textline " " group.byte (0x10b+0x10*0)++0x04 line.byte 0x00 "BIT_MASK,Bit-mask for Aliased Register access" bitfld.byte 0x00 7. " BIT_MASK[7] ,Allow access to data register and pin state 7" "Not allowed,Allowed" bitfld.byte 0x00 6. " [6] ,Allow access to data register and pin state 6" "Not allowed,Allowed" bitfld.byte 0x00 5. " [5] ,Allow access to data register and pin state 5" "Not allowed,Allowed" textline " " bitfld.byte 0x00 4. " [4] ,Allow access to data register and pin state 4" "Not allowed,Allowed" bitfld.byte 0x00 3. " [3] ,Allow access to data register and pin state 3" "Not allowed,Allowed" bitfld.byte 0x00 2. " [2] ,Allow access to data register and pin state 2" "Not allowed,Allowed" textline " " bitfld.byte 0x00 1. " [1] ,Allow access to data register and pin state 1" "Not allowed,Allowed" bitfld.byte 0x00 0. " [0] ,Allow access to data register and pin state 0" "Not allowed,Allowed" textline " " line.byte 0x01 "AMUX,Port Analog global mux bus enable" bitfld.byte 0x01 7. " AMUX[7] ,Connects analog mux bus to the pad 7" "Not asserted,Asserted" bitfld.byte 0x01 6. " [6] ,Connects analog mux bus to the pad 6" "Not asserted,Asserted" bitfld.byte 0x01 5. " [5] ,Connects analog mux bus to the pad 5" "Not asserted,Asserted" textline " " bitfld.byte 0x01 4. " [4] ,Connects analog mux bus to the pad 4" "Not asserted,Asserted" bitfld.byte 0x01 3. " [3] ,Connects analog mux bus to the pad 3" "Not asserted,Asserted" bitfld.byte 0x01 2. " [2] ,Connects analog mux bus to the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x01 1. " [1] ,Connects analog mux bus to the pad 1" "Not asserted,Asserted" bitfld.byte 0x01 0. " [0] ,Connects analog mux bus to the pad 0" "Not asserted,Asserted" textline " " line.byte 0x02 "AG,Port Analog global enable" bitfld.byte 0x02 7. " ANALOGGLOBAL[7] ,Connects analog global to the pad 7" "Not asserted,Asserted" bitfld.byte 0x02 6. " [6] ,Connects analog global to the pad 6" "Not asserted,Asserted" textline " " bitfld.byte 0x02 5. " [5] ,Connects analog global to the pad 5" "Not asserted,Asserted" bitfld.byte 0x02 4. " [4] ,Connects analog global to the pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x02 3. " [3] ,Connects analog global to the pad 3" "Not asserted,Asserted" bitfld.byte 0x02 2. " [2] ,Connects analog global to the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x02 1. " [1] ,Connects analog global to the pad 1" "Not asserted,Asserted" bitfld.byte 0x02 0. " [0] ,Connects analog global to the pad 0" "Not asserted,Asserted" textline " " line.byte 0x03 "LCD_COM_SEG,Port LCD Com seg bits" bitfld.byte 0x03 7. " COM_SEG[7] ,Common or segment mode for pin 7" "Segment,Common" bitfld.byte 0x03 6. " [6] ,Common or segment mode for pin 6" "Segment,Common" bitfld.byte 0x03 5. " [5] ,Common or segment mode for pin 5" "Segment,Common" bitfld.byte 0x03 4. " [4] ,Common or segment mode for pin 4" "Segment,Common" textline " " bitfld.byte 0x03 3. " [3] ,Common or segment mode for pin 3" "Segment,Common" bitfld.byte 0x03 2. " [2] ,Common or segment mode for pin 2" "Segment,Common" bitfld.byte 0x03 1. " [1] ,Common or segment mode for pin 1" "Segment,Common" bitfld.byte 0x03 0. " [0] ,Common or segment mode for pin 0" "Segment,Common" textline " " line.byte 0x04 "LCD_EN,Port LCD enable register" bitfld.byte 0x04 7. " LCD_EN[7] ,Enable pin 7 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 6. " [6] ,Enable pin 6 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 5. " [5] ,Enable pin 5 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 4. " [4] ,Enable pin 4 for LCD mode" "Disabled,Enabled" textline " " bitfld.byte 0x04 3. " [3] ,Enable pin 3 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 2. " [2] ,Enable pin 2 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 1. " [1] ,Enable pin 1 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 0. " [0] ,Enable pin 0 for LCD mode" "Disabled,Enabled" textline " " group.byte (0x200+0x08*0)++0x01 line.byte 0x00 "OUT_SEL0,Digital System Interconnect Port 0 Pin Output Select Registers" bitfld.byte 0x00 7. " PORTOUTSEL[7] ,Available taps selection for I/O pin output 7" "0,1" bitfld.byte 0x00 6. " [6] ,Available taps selection for I/O pin output 6" "0,1" bitfld.byte 0x00 5. " [5] ,Available taps selection for I/O pin output 5" "0,1" bitfld.byte 0x00 4. " [4] ,Available taps selection for I/O pin output 4" "0,1" textline " " bitfld.byte 0x00 3. " [3] ,Available taps selection for I/O pin output 3" "0,1" bitfld.byte 0x00 2. " [2] ,Available taps selection for I/O pin output 2" "0,1" bitfld.byte 0x00 1. " [1] ,Available taps selection for I/O pin output 1" "0,1" bitfld.byte 0x00 0. " [0] ,Available taps selection for I/O pin output 0" "0,1" textline " " line.byte 0x01 "OUT_SEL1,Digital System Interconnect Port 0 Pin Output Select Registers" bitfld.byte 0x01 7. " PORTOUTSEL[7] ,Available taps selection for I/O pin output 7" "0,1" bitfld.byte 0x01 6. " [6] ,Available taps selection for I/O pin output 6" "0,1" bitfld.byte 0x01 5. " [5] ,Available taps selection for I/O pin output 5" "0,1" bitfld.byte 0x01 4. " [4] ,Available taps selection for I/O pin output 4" "0,1" textline " " bitfld.byte 0x01 3. " [3] ,Available taps selection for I/O pin output 3" "0,1" bitfld.byte 0x01 2. " [2] ,Available taps selection for I/O pin output 2" "0,1" bitfld.byte 0x01 1. " [1] ,Available taps selection for I/O pin output 1" "0,1" bitfld.byte 0x01 0. " [0] ,Available taps selection for I/O pin output 0" "0,1" textline " " group.byte (0x202+0x08*0)++0x03 line.byte 0x00 "OE_SEL0,Dynamic Drive Stength of Port 0 Output Enable Select registers" bitfld.byte 0x00 7. " PORTOESEL[7] ,Available taps selection for I/O pin 7" "0,1" bitfld.byte 0x00 6. " [6] ,Available taps selection for I/O pin 6" "0,1" textline " " bitfld.byte 0x00 5. " [5] ,Available taps selection for I/O pin 5" "0,1" bitfld.byte 0x00 4. " [4] ,Available taps selection for I/O pin 4" "0,1" textline " " bitfld.byte 0x00 3. " [3] ,Available taps selection for I/O pin 3" "0,1" bitfld.byte 0x00 2. " [2] ,Available taps selection for I/O pin 2" "0,1" textline " " bitfld.byte 0x00 1. " [1] ,Available taps selection for I/O pin 1" "0,1" bitfld.byte 0x00 0. " [0] ,Available taps selection for I/O pin 0" "0,1" line.byte 0x01 "OE_SEL1,Dynamic Drive Stength of Port Output Enable Select registers" bitfld.byte 0x01 7. " PORTOESEL[7] ,Available taps selection for I/O pin 7" "0,1" bitfld.byte 0x01 6. " [6] ,Available taps selection for I/O pin 6" "0,1" textline " " bitfld.byte 0x01 5. " [5] ,Available taps selection for I/O pin 5" "0,1" bitfld.byte 0x01 4. " [4] ,Available taps selection for I/O pin 4" "0,1" textline " " bitfld.byte 0x01 3. " [3] ,Available taps selection for I/O pin 3" "0,1" bitfld.byte 0x01 2. " [2] ,Available taps selection for I/O pin 2" "0,1" textline " " bitfld.byte 0x01 1. " [1] ,Available taps selection for I/O pin 1" "0,1" bitfld.byte 0x01 0. " [0] ,Available taps selection for I/O pin 0" "0,1" textline " " line.byte 0x02 "DBL_SYNC_IN,DSI double sync enable register" bitfld.byte 0x02 7. " DBL_SYNC_IN[7] ,Selects to synchronize the data in from the pad 7" "Not asserted,Asserted" bitfld.byte 0x02 6. " [6] ,Selects to synchronize the data in from the pad 6" "Not asserted,Asserted" textline " " bitfld.byte 0x02 5. " [5] ,Selects to synchronize the data in from the pad 5" "Not asserted,Asserted" bitfld.byte 0x02 4. " [4] ,Selects to synchronize the data in from the pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x02 3. " [3] ,Selects to synchronize the data in from the pad 3" "Not asserted,Asserted" bitfld.byte 0x02 2. " [2] ,Selects to synchronize the data in from the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x02 1. " [1] ,Selects to synchronize the data in from the pad 1" "Not asserted,Asserted" bitfld.byte 0x02 0. " [0] ,Selects to synchronize the data in from the pad 0" "Not asserted,Asserted" textline " " line.byte 0x03 "SYNC_OUT,DSI sync out enable register" bitfld.byte 0x03 7. " SYNC_OUT[7] ,Selects to synchronize data from DSI driving pad 7" "Not asserted,Asserted" bitfld.byte 0x03 6. " [6] ,Selects to synchronize data from DSI driving pad 6" "Not asserted,Asserted" textline " " bitfld.byte 0x03 5. " [5] ,Selects to synchronize data from DSI driving pad 5" "Not asserted,Asserted" bitfld.byte 0x03 4. " [4] ,Selects to synchronize data from DSI driving pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x03 3. " [3] ,Selects to synchronize data from DSI driving pad 3" "Not asserted,Asserted" bitfld.byte 0x03 2. " [2] ,Selects to synchronize data from DSI driving pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x03 1. " [1] ,Selects to synchronize data from DSI driving pad 1" "Not asserted,Asserted" bitfld.byte 0x03 0. " [0] ,Selects to synchronize data from DSI driving pad 0" "Not asserted,Asserted" group.byte (0x206+0x08*0)++0x00 line.byte 0x00 "CAPS_SEL,Global DSI select register" bitfld.byte 0x00 7. " CAPS_SEL[7] ,Selects global DSI to drive dig_glbl_ctl on the pad 7" "Not asserted,Asserted" bitfld.byte 0x00 6. " [6] ,Selects global DSI to drive dig_glbl_ctl on the pad 6" "Not asserted,Asserted" textline " " bitfld.byte 0x00 5. " [5] ,Selects global DSI to drive dig_glbl_ctl on the pad 5" "Not asserted,Asserted" bitfld.byte 0x00 4. " [4] ,Selects global DSI to drive dig_glbl_ctl on the pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x00 3. " [3] ,Selects global DSI to drive dig_glbl_ctl on the pad 3" "Not asserted,Asserted" bitfld.byte 0x00 2. " [2] ,Selects global DSI to drive dig_glbl_ctl on the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x00 1. " [1] ,Selects global DSI to drive dig_glbl_ctl on the pad 1" "Not asserted,Asserted" bitfld.byte 0x00 0. " [0] ,Selects global DSI to drive dig_glbl_ctl on the pad 0" "Not asserted,Asserted" width 0x0B tree.end tree "PRT 1" width 16. group.byte (0x08*1)++0x07 line.byte 0x0 "PC0,Port Pin Configuration Registers 0" bitfld.byte 0x0 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x0 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x0 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x0 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x0 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x0 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x0 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x0 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x1 "PC1,Port Pin Configuration Registers 1" bitfld.byte 0x1 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x1 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x1 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x1 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x1 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x1 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x1 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x1 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x2 "PC2,Port Pin Configuration Registers 2" bitfld.byte 0x2 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x2 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x2 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x2 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x2 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x2 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x2 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x2 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x3 "PC3,Port Pin Configuration Registers 3" bitfld.byte 0x3 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x3 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x3 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x3 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x3 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x3 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x3 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x3 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x4 "PC4,Port Pin Configuration Registers 4" bitfld.byte 0x4 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x4 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x4 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x4 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x4 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x4 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x4 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x4 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x5 "PC5,Port Pin Configuration Registers 5" bitfld.byte 0x5 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x5 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x5 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x5 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x5 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x5 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x5 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x5 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x6 "PC6,Port Pin Configuration Registers 6" bitfld.byte 0x6 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x6 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x6 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x6 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x6 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x6 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x6 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x6 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x7 "PC7,Port Pin Configuration Registers 7" bitfld.byte 0x7 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x7 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x7 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x7 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x7 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x7 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x7 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x7 0. " DATA_OUT ,Data out bit" "Low,High" textline " " group.byte (0x80+0x01*1)++0x00 line.byte 0x00 "DR_ALIAS,Aliased Port Data Output Register" bitfld.byte 0x00 7. " DATAREG_ALIAS[7] ,High/Low state for the GPIO pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,High/Low state for the GPIO pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,High/Low state for the GPIO pin 5" "Low,High" textline " " bitfld.byte 0x00 4. " [4] ,High/Low state for the GPIO pin 4" "Low,High" bitfld.byte 0x00 3. " [3] ,High/Low state for the GPIO pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,High/Low state for the GPIO pin 2" "Low,High" textline " " bitfld.byte 0x00 1. " [1] ,High/Low state for the GPIO pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,High/Low state for the GPIO pin 0" "Low,High" textline " " group.byte (0x90+0x01*1)++0x00 line.byte 0x00 "PS_ALIAS,Aliased Port Pin State Register" bitfld.byte 0x00 7. " PINSTATE_ALIAS[7] ,Logical state of the I/O pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,Logical state of the I/O pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,Logical state of the I/O pin 5" "Low,High" textline " " bitfld.byte 0x00 4. " [4] ,Logical state of the I/O pin 4" "Low,High" bitfld.byte 0x00 3. " [3] ,Logical state of the I/O pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,Logical state of the I/O pin 2" "Low,High" textline " " bitfld.byte 0x00 1. " [1] ,Logical state of the I/O pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,Logical state of the I/O pin 0" "Low,High" textline " " group.byte (0x100+0x10*1)++0x00 line.byte 0x00 "DR,Port Data Output Register" bitfld.byte 0x00 7. " DATAREG[7] ,State for the GPIO pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,State for the GPIO pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,State for the GPIO pin 5" "Low,High" bitfld.byte 0x00 4. " [4] ,State for the GPIO pin 4" "Low,High" textline " " bitfld.byte 0x00 3. " [3] ,State for the GPIO pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,State for the GPIO pin 2" "Low,High" bitfld.byte 0x00 1. " [1] ,State for the GPIO pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,State for the GPIO pin 0" "Low,High" textline " " rgroup.byte (0x101+0x10*1)++0x00 line.byte 0x00 "PS,Port Pin State Register 1" bitfld.byte 0x00 7. " PINSTATE[7] ,Logical state of the I/O pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,Logical state of the I/O pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,Logical state of the I/O pin 5" "Low,High" bitfld.byte 0x00 4. " [4] ,Logical state of the I/O pin 4" "Low,High" textline " " bitfld.byte 0x00 3. " [3] ,Logical state of the I/O pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,Logical state of the I/O pin 2" "Low,High" bitfld.byte 0x00 1. " [1] ,Logical state of the I/O pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,Logical state of the I/O pin 0" "Low,High" textline " " group.byte (0x102+0x10*1)++0x02 line.byte 0x0 "DM0,Port Drive Mode Register 0" bitfld.byte 0x0 7. " DRIVEMODE[7] ,DM register 0 assertion bit 7" "Low,High" bitfld.byte 0x0 6. " [6] ,DM register 0 assertion bit 6" "Low,High" bitfld.byte 0x0 5. " [5] ,DM register 0 assertion bit 5" "Low,High" bitfld.byte 0x0 4. " [4] ,DM register 0 assertion bit 4" "Low,High" textline " " bitfld.byte 0x0 3. " [3] ,DM register 0 assertion bit 3" "Low,High" bitfld.byte 0x0 2. " [2] ,DM register 0 assertion bit 2" "Low,High" bitfld.byte 0x0 1. " [1] ,DM register 0 assertion bit 1" "Low,High" bitfld.byte 0x0 0. " [0] ,DM register 0 assertion bit 0" "Low,High" line.byte 0x1 "DM1,Port Drive Mode Register 1" bitfld.byte 0x1 7. " DRIVEMODE[7] ,DM register 1 assertion bit 7" "Low,High" bitfld.byte 0x1 6. " [6] ,DM register 1 assertion bit 6" "Low,High" bitfld.byte 0x1 5. " [5] ,DM register 1 assertion bit 5" "Low,High" bitfld.byte 0x1 4. " [4] ,DM register 1 assertion bit 4" "Low,High" textline " " bitfld.byte 0x1 3. " [3] ,DM register 1 assertion bit 3" "Low,High" bitfld.byte 0x1 2. " [2] ,DM register 1 assertion bit 2" "Low,High" bitfld.byte 0x1 1. " [1] ,DM register 1 assertion bit 1" "Low,High" bitfld.byte 0x1 0. " [0] ,DM register 1 assertion bit 0" "Low,High" line.byte 0x2 "DM2,Port Drive Mode Register 2" bitfld.byte 0x2 7. " DRIVEMODE[7] ,DM register 2 assertion bit 7" "Low,High" bitfld.byte 0x2 6. " [6] ,DM register 2 assertion bit 6" "Low,High" bitfld.byte 0x2 5. " [5] ,DM register 2 assertion bit 5" "Low,High" bitfld.byte 0x2 4. " [4] ,DM register 2 assertion bit 4" "Low,High" textline " " bitfld.byte 0x2 3. " [3] ,DM register 2 assertion bit 3" "Low,High" bitfld.byte 0x2 2. " [2] ,DM register 2 assertion bit 2" "Low,High" bitfld.byte 0x2 1. " [1] ,DM register 2 assertion bit 1" "Low,High" bitfld.byte 0x2 0. " [0] ,DM register 2 assertion bit 0" "Low,High" textline " " group.byte (0x105+0x10*1)++0x04 line.byte 0x00 "SLW,Port slew rate control" bitfld.byte 0x00 7. " SLWCTL[7] ,Output edge rate of the port 1 pin 7" "Fast,Slow" bitfld.byte 0x00 6. " [6] ,Output edge rate of the port 1 pin 6" "Fast,Slow" bitfld.byte 0x00 5. " [5] ,Output edge rate of the port 1 pin 5" "Fast,Slow" bitfld.byte 0x00 4. " [4] ,Output edge rate of the port 1 pin 4" "Fast,Slow" textline " " bitfld.byte 0x00 3. " [3] ,Output edge rate of the port 1 pin 3" "Fast,Slow" bitfld.byte 0x00 2. " [2] ,Output edge rate of the port 1 pin 2" "Fast,Slow" bitfld.byte 0x00 1. " [1] ,Output edge rate of the port 1 pin 1" "Fast,Slow" bitfld.byte 0x00 0. " [0] ,Output edge rate of the port 1 pin 0" "Fast,Slow" textline " " line.byte 0x01 "BYP,Port Bypass enable" bitfld.byte 0x01 7. " BYPASS[7] ,DSI drives the corresponding port 1 pin 7" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 6. " [6] ,DSI drives the corresponding port 1 pin 6" "Port Logic Data Register,Digital System Interconnect" textline " " bitfld.byte 0x01 5. " [5] ,DSI drives the corresponding port 1 pin 5" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 4. " [4] ,DSI drives the corresponding port 1 pin 4" "Port Logic Data Register,Digital System Interconnect" textline " " bitfld.byte 0x01 3. " [3] ,DSI drives the corresponding port 1 pin 3" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 2. " [2] ,DSI drives the corresponding port 1 pin 2" "Port Logic Data Register,Digital System Interconnect" textline " " bitfld.byte 0x01 1. " [1] ,DSI drives the corresponding port 1 pin 1" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 0. " [0] ,DSI drives the corresponding port 1 pin 0" "Port Logic Data Register,Digital System Interconnect" textline " " line.byte 0x02 "BIE,Port Bydirection enable" bitfld.byte 0x02 7. " BIDIRECTEN[7] ,Bidirectional mode of the port 1 pin 7" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 6. " [6] ,Bidirectional mode of the port 1 pin 6" "Drive mode,Dynamic control DSI" textline " " bitfld.byte 0x02 5. " [5] ,Bidirectional mode of the port 1 pin 5" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 4. " [4] ,Bidirectional mode of the port 1 pin 4" "Drive mode,Dynamic control DSI" textline " " bitfld.byte 0x02 3. " [3] ,Bidirectional mode of the port 1 pin 3" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 2. " [2] ,Bidirectional mode of the port 1 pin 2" "Drive mode,Dynamic control DSI" textline " " bitfld.byte 0x02 1. " [1] ,Bidirectional mode of the port 1 pin 1" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 0. " [0] ,Bidirectional mode of the port 1 pin 0" "Drive mode,Dynamic control DSI" textline " " line.byte 0x03 "INP_DIS,Input buffer disable override" bitfld.byte 0x03 7. " INP_DIS[7] ,Input buffer disable 7" "No,Yes" bitfld.byte 0x03 6. " [6] ,Input buffer disable 6" "No,Yes" bitfld.byte 0x03 5. " [5] ,Input buffer disable 5" "No,Yes" bitfld.byte 0x03 4. " [4] ,Input buffer disable 4" "No,Yes" textline " " bitfld.byte 0x03 3. " [3] ,Input buffer disable 3" "No,Yes" bitfld.byte 0x03 2. " [2] ,Input buffer disable 2" "No,Yes" bitfld.byte 0x03 1. " [1] ,Input buffer disable 1" "No,Yes" bitfld.byte 0x03 0. " [0] ,Input buffer disable 0" "No,Yes" textline " " line.byte 0x04 "CTL,Port wide control signals" bitfld.byte 0x04 1.--3. " portEmifCfg ,GPIO emif selection option" "NOT_EMIF,LSB_ADDR,UPR_ADDR,MSB_ADDR,Reserved,LSB_DATA,MSB_DATA,?..." bitfld.byte 0x04 0. " VTRIP_SEL ,CMOS/LVTTL input buffer" "CMOS,LVTTL" wgroup.byte (0x10a+0x10*1)++0x00 line.byte 0x00 "PRT,Port wide configuration register" bitfld.byte 0x00 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x00 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x00 5. " BIDIRECTEN ,BiDir Enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " DRIVEMODE2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x00 2. " DRIVEMODE1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x00 1. " DRIVEMODE0 ,Drive mode 0" "Disabled,Enabled" textline " " group.byte (0x10b+0x10*1)++0x04 line.byte 0x00 "BIT_MASK,Bit-mask for Aliased Register access" bitfld.byte 0x00 7. " BIT_MASK[7] ,Allow access to data register and pin state 7" "Not allowed,Allowed" bitfld.byte 0x00 6. " [6] ,Allow access to data register and pin state 6" "Not allowed,Allowed" bitfld.byte 0x00 5. " [5] ,Allow access to data register and pin state 5" "Not allowed,Allowed" textline " " bitfld.byte 0x00 4. " [4] ,Allow access to data register and pin state 4" "Not allowed,Allowed" bitfld.byte 0x00 3. " [3] ,Allow access to data register and pin state 3" "Not allowed,Allowed" bitfld.byte 0x00 2. " [2] ,Allow access to data register and pin state 2" "Not allowed,Allowed" textline " " bitfld.byte 0x00 1. " [1] ,Allow access to data register and pin state 1" "Not allowed,Allowed" bitfld.byte 0x00 0. " [0] ,Allow access to data register and pin state 0" "Not allowed,Allowed" textline " " line.byte 0x01 "AMUX,Port Analog global mux bus enable" bitfld.byte 0x01 7. " AMUX[7] ,Connects analog mux bus to the pad 7" "Not asserted,Asserted" bitfld.byte 0x01 6. " [6] ,Connects analog mux bus to the pad 6" "Not asserted,Asserted" bitfld.byte 0x01 5. " [5] ,Connects analog mux bus to the pad 5" "Not asserted,Asserted" textline " " bitfld.byte 0x01 4. " [4] ,Connects analog mux bus to the pad 4" "Not asserted,Asserted" bitfld.byte 0x01 3. " [3] ,Connects analog mux bus to the pad 3" "Not asserted,Asserted" bitfld.byte 0x01 2. " [2] ,Connects analog mux bus to the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x01 1. " [1] ,Connects analog mux bus to the pad 1" "Not asserted,Asserted" bitfld.byte 0x01 0. " [0] ,Connects analog mux bus to the pad 0" "Not asserted,Asserted" textline " " line.byte 0x02 "AG,Port Analog global enable" bitfld.byte 0x02 7. " ANALOGGLOBAL[7] ,Connects analog global to the pad 7" "Not asserted,Asserted" bitfld.byte 0x02 6. " [6] ,Connects analog global to the pad 6" "Not asserted,Asserted" textline " " bitfld.byte 0x02 5. " [5] ,Connects analog global to the pad 5" "Not asserted,Asserted" bitfld.byte 0x02 4. " [4] ,Connects analog global to the pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x02 3. " [3] ,Connects analog global to the pad 3" "Not asserted,Asserted" bitfld.byte 0x02 2. " [2] ,Connects analog global to the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x02 1. " [1] ,Connects analog global to the pad 1" "Not asserted,Asserted" bitfld.byte 0x02 0. " [0] ,Connects analog global to the pad 0" "Not asserted,Asserted" textline " " line.byte 0x03 "LCD_COM_SEG,Port LCD Com seg bits" bitfld.byte 0x03 7. " COM_SEG[7] ,Common or segment mode for pin 7" "Segment,Common" bitfld.byte 0x03 6. " [6] ,Common or segment mode for pin 6" "Segment,Common" bitfld.byte 0x03 5. " [5] ,Common or segment mode for pin 5" "Segment,Common" bitfld.byte 0x03 4. " [4] ,Common or segment mode for pin 4" "Segment,Common" textline " " bitfld.byte 0x03 3. " [3] ,Common or segment mode for pin 3" "Segment,Common" bitfld.byte 0x03 2. " [2] ,Common or segment mode for pin 2" "Segment,Common" bitfld.byte 0x03 1. " [1] ,Common or segment mode for pin 1" "Segment,Common" bitfld.byte 0x03 0. " [0] ,Common or segment mode for pin 0" "Segment,Common" textline " " line.byte 0x04 "LCD_EN,Port LCD enable register" bitfld.byte 0x04 7. " LCD_EN[7] ,Enable pin 7 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 6. " [6] ,Enable pin 6 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 5. " [5] ,Enable pin 5 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 4. " [4] ,Enable pin 4 for LCD mode" "Disabled,Enabled" textline " " bitfld.byte 0x04 3. " [3] ,Enable pin 3 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 2. " [2] ,Enable pin 2 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 1. " [1] ,Enable pin 1 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 0. " [0] ,Enable pin 0 for LCD mode" "Disabled,Enabled" textline " " group.byte (0x200+0x08*1)++0x01 line.byte 0x00 "OUT_SEL0,Digital System Interconnect Port 1 Pin Output Select Registers" bitfld.byte 0x00 7. " PORTOUTSEL[7] ,Available taps selection for I/O pin output 7" "0,1" bitfld.byte 0x00 6. " [6] ,Available taps selection for I/O pin output 6" "0,1" bitfld.byte 0x00 5. " [5] ,Available taps selection for I/O pin output 5" "0,1" bitfld.byte 0x00 4. " [4] ,Available taps selection for I/O pin output 4" "0,1" textline " " bitfld.byte 0x00 3. " [3] ,Available taps selection for I/O pin output 3" "0,1" bitfld.byte 0x00 2. " [2] ,Available taps selection for I/O pin output 2" "0,1" bitfld.byte 0x00 1. " [1] ,Available taps selection for I/O pin output 1" "0,1" bitfld.byte 0x00 0. " [0] ,Available taps selection for I/O pin output 0" "0,1" textline " " line.byte 0x01 "OUT_SEL1,Digital System Interconnect Port 1 Pin Output Select Registers" bitfld.byte 0x01 7. " PORTOUTSEL[7] ,Available taps selection for I/O pin output 7" "0,1" bitfld.byte 0x01 6. " [6] ,Available taps selection for I/O pin output 6" "0,1" bitfld.byte 0x01 5. " [5] ,Available taps selection for I/O pin output 5" "0,1" bitfld.byte 0x01 4. " [4] ,Available taps selection for I/O pin output 4" "0,1" textline " " bitfld.byte 0x01 3. " [3] ,Available taps selection for I/O pin output 3" "0,1" bitfld.byte 0x01 2. " [2] ,Available taps selection for I/O pin output 2" "0,1" bitfld.byte 0x01 1. " [1] ,Available taps selection for I/O pin output 1" "0,1" bitfld.byte 0x01 0. " [0] ,Available taps selection for I/O pin output 0" "0,1" textline " " group.byte (0x202+0x08*1)++0x03 line.byte 0x00 "OE_SEL0,Dynamic Drive Stength of Port 1 Output Enable Select registers" bitfld.byte 0x00 7. " PORTOESEL[7] ,Available taps selection for I/O pin 7" "0,1" bitfld.byte 0x00 6. " [6] ,Available taps selection for I/O pin 6" "0,1" textline " " bitfld.byte 0x00 5. " [5] ,Available taps selection for I/O pin 5" "0,1" bitfld.byte 0x00 4. " [4] ,Available taps selection for I/O pin 4" "0,1" textline " " bitfld.byte 0x00 3. " [3] ,Available taps selection for I/O pin 3" "0,1" bitfld.byte 0x00 2. " [2] ,Available taps selection for I/O pin 2" "0,1" textline " " bitfld.byte 0x00 1. " [1] ,Available taps selection for I/O pin 1" "0,1" bitfld.byte 0x00 0. " [0] ,Available taps selection for I/O pin 0" "0,1" line.byte 0x01 "OE_SEL1,Dynamic Drive Stength of Port Output Enable Select registers" bitfld.byte 0x01 7. " PORTOESEL[7] ,Available taps selection for I/O pin 7" "0,1" bitfld.byte 0x01 6. " [6] ,Available taps selection for I/O pin 6" "0,1" textline " " bitfld.byte 0x01 5. " [5] ,Available taps selection for I/O pin 5" "0,1" bitfld.byte 0x01 4. " [4] ,Available taps selection for I/O pin 4" "0,1" textline " " bitfld.byte 0x01 3. " [3] ,Available taps selection for I/O pin 3" "0,1" bitfld.byte 0x01 2. " [2] ,Available taps selection for I/O pin 2" "0,1" textline " " bitfld.byte 0x01 1. " [1] ,Available taps selection for I/O pin 1" "0,1" bitfld.byte 0x01 0. " [0] ,Available taps selection for I/O pin 0" "0,1" textline " " line.byte 0x02 "DBL_SYNC_IN,DSI double sync enable register" bitfld.byte 0x02 7. " DBL_SYNC_IN[7] ,Selects to synchronize the data in from the pad 7" "Not asserted,Asserted" bitfld.byte 0x02 6. " [6] ,Selects to synchronize the data in from the pad 6" "Not asserted,Asserted" textline " " bitfld.byte 0x02 5. " [5] ,Selects to synchronize the data in from the pad 5" "Not asserted,Asserted" bitfld.byte 0x02 4. " [4] ,Selects to synchronize the data in from the pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x02 3. " [3] ,Selects to synchronize the data in from the pad 3" "Not asserted,Asserted" bitfld.byte 0x02 2. " [2] ,Selects to synchronize the data in from the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x02 1. " [1] ,Selects to synchronize the data in from the pad 1" "Not asserted,Asserted" bitfld.byte 0x02 0. " [0] ,Selects to synchronize the data in from the pad 0" "Not asserted,Asserted" textline " " line.byte 0x03 "SYNC_OUT,DSI sync out enable register" bitfld.byte 0x03 7. " SYNC_OUT[7] ,Selects to synchronize data from DSI driving pad 7" "Not asserted,Asserted" bitfld.byte 0x03 6. " [6] ,Selects to synchronize data from DSI driving pad 6" "Not asserted,Asserted" textline " " bitfld.byte 0x03 5. " [5] ,Selects to synchronize data from DSI driving pad 5" "Not asserted,Asserted" bitfld.byte 0x03 4. " [4] ,Selects to synchronize data from DSI driving pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x03 3. " [3] ,Selects to synchronize data from DSI driving pad 3" "Not asserted,Asserted" bitfld.byte 0x03 2. " [2] ,Selects to synchronize data from DSI driving pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x03 1. " [1] ,Selects to synchronize data from DSI driving pad 1" "Not asserted,Asserted" bitfld.byte 0x03 0. " [0] ,Selects to synchronize data from DSI driving pad 0" "Not asserted,Asserted" group.byte (0x206+0x08*1)++0x00 line.byte 0x00 "CAPS_SEL,Global DSI select register" bitfld.byte 0x00 7. " CAPS_SEL[7] ,Selects global DSI to drive dig_glbl_ctl on the pad 7" "Not asserted,Asserted" bitfld.byte 0x00 6. " [6] ,Selects global DSI to drive dig_glbl_ctl on the pad 6" "Not asserted,Asserted" textline " " bitfld.byte 0x00 5. " [5] ,Selects global DSI to drive dig_glbl_ctl on the pad 5" "Not asserted,Asserted" bitfld.byte 0x00 4. " [4] ,Selects global DSI to drive dig_glbl_ctl on the pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x00 3. " [3] ,Selects global DSI to drive dig_glbl_ctl on the pad 3" "Not asserted,Asserted" bitfld.byte 0x00 2. " [2] ,Selects global DSI to drive dig_glbl_ctl on the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x00 1. " [1] ,Selects global DSI to drive dig_glbl_ctl on the pad 1" "Not asserted,Asserted" bitfld.byte 0x00 0. " [0] ,Selects global DSI to drive dig_glbl_ctl on the pad 0" "Not asserted,Asserted" width 0x0B tree.end tree "PRT 2" width 16. group.byte (0x08*2)++0x07 line.byte 0x0 "PC0,Port Pin Configuration Registers 0" bitfld.byte 0x0 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x0 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x0 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x0 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x0 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x0 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x0 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x0 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x1 "PC1,Port Pin Configuration Registers 1" bitfld.byte 0x1 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x1 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x1 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x1 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x1 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x1 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x1 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x1 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x2 "PC2,Port Pin Configuration Registers 2" bitfld.byte 0x2 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x2 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x2 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x2 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x2 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x2 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x2 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x2 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x3 "PC3,Port Pin Configuration Registers 3" bitfld.byte 0x3 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x3 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x3 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x3 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x3 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x3 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x3 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x3 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x4 "PC4,Port Pin Configuration Registers 4" bitfld.byte 0x4 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x4 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x4 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x4 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x4 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x4 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x4 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x4 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x5 "PC5,Port Pin Configuration Registers 5" bitfld.byte 0x5 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x5 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x5 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x5 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x5 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x5 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x5 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x5 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x6 "PC6,Port Pin Configuration Registers 6" bitfld.byte 0x6 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x6 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x6 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x6 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x6 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x6 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x6 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x6 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x7 "PC7,Port Pin Configuration Registers 7" bitfld.byte 0x7 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x7 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x7 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x7 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x7 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x7 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x7 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x7 0. " DATA_OUT ,Data out bit" "Low,High" textline " " group.byte (0x80+0x01*2)++0x00 line.byte 0x00 "DR_ALIAS,Aliased Port Data Output Register" bitfld.byte 0x00 7. " DATAREG_ALIAS[7] ,High/Low state for the GPIO pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,High/Low state for the GPIO pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,High/Low state for the GPIO pin 5" "Low,High" textline " " bitfld.byte 0x00 4. " [4] ,High/Low state for the GPIO pin 4" "Low,High" bitfld.byte 0x00 3. " [3] ,High/Low state for the GPIO pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,High/Low state for the GPIO pin 2" "Low,High" textline " " bitfld.byte 0x00 1. " [1] ,High/Low state for the GPIO pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,High/Low state for the GPIO pin 0" "Low,High" textline " " group.byte (0x90+0x01*2)++0x00 line.byte 0x00 "PS_ALIAS,Aliased Port Pin State Register" bitfld.byte 0x00 7. " PINSTATE_ALIAS[7] ,Logical state of the I/O pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,Logical state of the I/O pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,Logical state of the I/O pin 5" "Low,High" textline " " bitfld.byte 0x00 4. " [4] ,Logical state of the I/O pin 4" "Low,High" bitfld.byte 0x00 3. " [3] ,Logical state of the I/O pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,Logical state of the I/O pin 2" "Low,High" textline " " bitfld.byte 0x00 1. " [1] ,Logical state of the I/O pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,Logical state of the I/O pin 0" "Low,High" textline " " group.byte (0x100+0x10*2)++0x00 line.byte 0x00 "DR,Port Data Output Register" bitfld.byte 0x00 7. " DATAREG[7] ,State for the GPIO pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,State for the GPIO pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,State for the GPIO pin 5" "Low,High" bitfld.byte 0x00 4. " [4] ,State for the GPIO pin 4" "Low,High" textline " " bitfld.byte 0x00 3. " [3] ,State for the GPIO pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,State for the GPIO pin 2" "Low,High" bitfld.byte 0x00 1. " [1] ,State for the GPIO pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,State for the GPIO pin 0" "Low,High" textline " " rgroup.byte (0x101+0x10*2)++0x00 line.byte 0x00 "PS,Port Pin State Register 1" bitfld.byte 0x00 7. " PINSTATE[7] ,Logical state of the I/O pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,Logical state of the I/O pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,Logical state of the I/O pin 5" "Low,High" bitfld.byte 0x00 4. " [4] ,Logical state of the I/O pin 4" "Low,High" textline " " bitfld.byte 0x00 3. " [3] ,Logical state of the I/O pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,Logical state of the I/O pin 2" "Low,High" bitfld.byte 0x00 1. " [1] ,Logical state of the I/O pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,Logical state of the I/O pin 0" "Low,High" textline " " group.byte (0x102+0x10*2)++0x02 line.byte 0x0 "DM0,Port Drive Mode Register 0" bitfld.byte 0x0 7. " DRIVEMODE[7] ,DM register 0 assertion bit 7" "Low,High" bitfld.byte 0x0 6. " [6] ,DM register 0 assertion bit 6" "Low,High" bitfld.byte 0x0 5. " [5] ,DM register 0 assertion bit 5" "Low,High" bitfld.byte 0x0 4. " [4] ,DM register 0 assertion bit 4" "Low,High" textline " " bitfld.byte 0x0 3. " [3] ,DM register 0 assertion bit 3" "Low,High" bitfld.byte 0x0 2. " [2] ,DM register 0 assertion bit 2" "Low,High" bitfld.byte 0x0 1. " [1] ,DM register 0 assertion bit 1" "Low,High" bitfld.byte 0x0 0. " [0] ,DM register 0 assertion bit 0" "Low,High" line.byte 0x1 "DM1,Port Drive Mode Register 1" bitfld.byte 0x1 7. " DRIVEMODE[7] ,DM register 1 assertion bit 7" "Low,High" bitfld.byte 0x1 6. " [6] ,DM register 1 assertion bit 6" "Low,High" bitfld.byte 0x1 5. " [5] ,DM register 1 assertion bit 5" "Low,High" bitfld.byte 0x1 4. " [4] ,DM register 1 assertion bit 4" "Low,High" textline " " bitfld.byte 0x1 3. " [3] ,DM register 1 assertion bit 3" "Low,High" bitfld.byte 0x1 2. " [2] ,DM register 1 assertion bit 2" "Low,High" bitfld.byte 0x1 1. " [1] ,DM register 1 assertion bit 1" "Low,High" bitfld.byte 0x1 0. " [0] ,DM register 1 assertion bit 0" "Low,High" line.byte 0x2 "DM2,Port Drive Mode Register 2" bitfld.byte 0x2 7. " DRIVEMODE[7] ,DM register 2 assertion bit 7" "Low,High" bitfld.byte 0x2 6. " [6] ,DM register 2 assertion bit 6" "Low,High" bitfld.byte 0x2 5. " [5] ,DM register 2 assertion bit 5" "Low,High" bitfld.byte 0x2 4. " [4] ,DM register 2 assertion bit 4" "Low,High" textline " " bitfld.byte 0x2 3. " [3] ,DM register 2 assertion bit 3" "Low,High" bitfld.byte 0x2 2. " [2] ,DM register 2 assertion bit 2" "Low,High" bitfld.byte 0x2 1. " [1] ,DM register 2 assertion bit 1" "Low,High" bitfld.byte 0x2 0. " [0] ,DM register 2 assertion bit 0" "Low,High" textline " " group.byte (0x105+0x10*2)++0x04 line.byte 0x00 "SLW,Port slew rate control" bitfld.byte 0x00 7. " SLWCTL[7] ,Output edge rate of the port 2 pin 7" "Fast,Slow" bitfld.byte 0x00 6. " [6] ,Output edge rate of the port 2 pin 6" "Fast,Slow" bitfld.byte 0x00 5. " [5] ,Output edge rate of the port 2 pin 5" "Fast,Slow" bitfld.byte 0x00 4. " [4] ,Output edge rate of the port 2 pin 4" "Fast,Slow" textline " " bitfld.byte 0x00 3. " [3] ,Output edge rate of the port 2 pin 3" "Fast,Slow" bitfld.byte 0x00 2. " [2] ,Output edge rate of the port 2 pin 2" "Fast,Slow" bitfld.byte 0x00 1. " [1] ,Output edge rate of the port 2 pin 1" "Fast,Slow" bitfld.byte 0x00 0. " [0] ,Output edge rate of the port 2 pin 0" "Fast,Slow" textline " " line.byte 0x01 "BYP,Port Bypass enable" bitfld.byte 0x01 7. " BYPASS[7] ,DSI drives the corresponding port 2 pin 7" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 6. " [6] ,DSI drives the corresponding port 2 pin 6" "Port Logic Data Register,Digital System Interconnect" textline " " bitfld.byte 0x01 5. " [5] ,DSI drives the corresponding port 2 pin 5" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 4. " [4] ,DSI drives the corresponding port 2 pin 4" "Port Logic Data Register,Digital System Interconnect" textline " " bitfld.byte 0x01 3. " [3] ,DSI drives the corresponding port 2 pin 3" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 2. " [2] ,DSI drives the corresponding port 2 pin 2" "Port Logic Data Register,Digital System Interconnect" textline " " bitfld.byte 0x01 1. " [1] ,DSI drives the corresponding port 2 pin 1" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 0. " [0] ,DSI drives the corresponding port 2 pin 0" "Port Logic Data Register,Digital System Interconnect" textline " " line.byte 0x02 "BIE,Port Bydirection enable" bitfld.byte 0x02 7. " BIDIRECTEN[7] ,Bidirectional mode of the port 2 pin 7" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 6. " [6] ,Bidirectional mode of the port 2 pin 6" "Drive mode,Dynamic control DSI" textline " " bitfld.byte 0x02 5. " [5] ,Bidirectional mode of the port 2 pin 5" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 4. " [4] ,Bidirectional mode of the port 2 pin 4" "Drive mode,Dynamic control DSI" textline " " bitfld.byte 0x02 3. " [3] ,Bidirectional mode of the port 2 pin 3" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 2. " [2] ,Bidirectional mode of the port 2 pin 2" "Drive mode,Dynamic control DSI" textline " " bitfld.byte 0x02 1. " [1] ,Bidirectional mode of the port 2 pin 1" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 0. " [0] ,Bidirectional mode of the port 2 pin 0" "Drive mode,Dynamic control DSI" textline " " line.byte 0x03 "INP_DIS,Input buffer disable override" bitfld.byte 0x03 7. " INP_DIS[7] ,Input buffer disable 7" "No,Yes" bitfld.byte 0x03 6. " [6] ,Input buffer disable 6" "No,Yes" bitfld.byte 0x03 5. " [5] ,Input buffer disable 5" "No,Yes" bitfld.byte 0x03 4. " [4] ,Input buffer disable 4" "No,Yes" textline " " bitfld.byte 0x03 3. " [3] ,Input buffer disable 3" "No,Yes" bitfld.byte 0x03 2. " [2] ,Input buffer disable 2" "No,Yes" bitfld.byte 0x03 1. " [1] ,Input buffer disable 1" "No,Yes" bitfld.byte 0x03 0. " [0] ,Input buffer disable 0" "No,Yes" textline " " line.byte 0x04 "CTL,Port wide control signals" bitfld.byte 0x04 1.--3. " portEmifCfg ,GPIO emif selection option" "NOT_EMIF,LSB_ADDR,UPR_ADDR,MSB_ADDR,Reserved,LSB_DATA,MSB_DATA,?..." bitfld.byte 0x04 0. " VTRIP_SEL ,CMOS/LVTTL input buffer" "CMOS,LVTTL" wgroup.byte (0x10a+0x10*2)++0x00 line.byte 0x00 "PRT,Port wide configuration register" bitfld.byte 0x00 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x00 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x00 5. " BIDIRECTEN ,BiDir Enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " DRIVEMODE2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x00 2. " DRIVEMODE1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x00 1. " DRIVEMODE0 ,Drive mode 0" "Disabled,Enabled" textline " " group.byte (0x10b+0x10*2)++0x04 line.byte 0x00 "BIT_MASK,Bit-mask for Aliased Register access" bitfld.byte 0x00 7. " BIT_MASK[7] ,Allow access to data register and pin state 7" "Not allowed,Allowed" bitfld.byte 0x00 6. " [6] ,Allow access to data register and pin state 6" "Not allowed,Allowed" bitfld.byte 0x00 5. " [5] ,Allow access to data register and pin state 5" "Not allowed,Allowed" textline " " bitfld.byte 0x00 4. " [4] ,Allow access to data register and pin state 4" "Not allowed,Allowed" bitfld.byte 0x00 3. " [3] ,Allow access to data register and pin state 3" "Not allowed,Allowed" bitfld.byte 0x00 2. " [2] ,Allow access to data register and pin state 2" "Not allowed,Allowed" textline " " bitfld.byte 0x00 1. " [1] ,Allow access to data register and pin state 1" "Not allowed,Allowed" bitfld.byte 0x00 0. " [0] ,Allow access to data register and pin state 0" "Not allowed,Allowed" textline " " line.byte 0x01 "AMUX,Port Analog global mux bus enable" bitfld.byte 0x01 7. " AMUX[7] ,Connects analog mux bus to the pad 7" "Not asserted,Asserted" bitfld.byte 0x01 6. " [6] ,Connects analog mux bus to the pad 6" "Not asserted,Asserted" bitfld.byte 0x01 5. " [5] ,Connects analog mux bus to the pad 5" "Not asserted,Asserted" textline " " bitfld.byte 0x01 4. " [4] ,Connects analog mux bus to the pad 4" "Not asserted,Asserted" bitfld.byte 0x01 3. " [3] ,Connects analog mux bus to the pad 3" "Not asserted,Asserted" bitfld.byte 0x01 2. " [2] ,Connects analog mux bus to the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x01 1. " [1] ,Connects analog mux bus to the pad 1" "Not asserted,Asserted" bitfld.byte 0x01 0. " [0] ,Connects analog mux bus to the pad 0" "Not asserted,Asserted" textline " " line.byte 0x02 "AG,Port Analog global enable" bitfld.byte 0x02 7. " ANALOGGLOBAL[7] ,Connects analog global to the pad 7" "Not asserted,Asserted" bitfld.byte 0x02 6. " [6] ,Connects analog global to the pad 6" "Not asserted,Asserted" textline " " bitfld.byte 0x02 5. " [5] ,Connects analog global to the pad 5" "Not asserted,Asserted" bitfld.byte 0x02 4. " [4] ,Connects analog global to the pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x02 3. " [3] ,Connects analog global to the pad 3" "Not asserted,Asserted" bitfld.byte 0x02 2. " [2] ,Connects analog global to the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x02 1. " [1] ,Connects analog global to the pad 1" "Not asserted,Asserted" bitfld.byte 0x02 0. " [0] ,Connects analog global to the pad 0" "Not asserted,Asserted" textline " " line.byte 0x03 "LCD_COM_SEG,Port LCD Com seg bits" bitfld.byte 0x03 7. " COM_SEG[7] ,Common or segment mode for pin 7" "Segment,Common" bitfld.byte 0x03 6. " [6] ,Common or segment mode for pin 6" "Segment,Common" bitfld.byte 0x03 5. " [5] ,Common or segment mode for pin 5" "Segment,Common" bitfld.byte 0x03 4. " [4] ,Common or segment mode for pin 4" "Segment,Common" textline " " bitfld.byte 0x03 3. " [3] ,Common or segment mode for pin 3" "Segment,Common" bitfld.byte 0x03 2. " [2] ,Common or segment mode for pin 2" "Segment,Common" bitfld.byte 0x03 1. " [1] ,Common or segment mode for pin 1" "Segment,Common" bitfld.byte 0x03 0. " [0] ,Common or segment mode for pin 0" "Segment,Common" textline " " line.byte 0x04 "LCD_EN,Port LCD enable register" bitfld.byte 0x04 7. " LCD_EN[7] ,Enable pin 7 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 6. " [6] ,Enable pin 6 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 5. " [5] ,Enable pin 5 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 4. " [4] ,Enable pin 4 for LCD mode" "Disabled,Enabled" textline " " bitfld.byte 0x04 3. " [3] ,Enable pin 3 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 2. " [2] ,Enable pin 2 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 1. " [1] ,Enable pin 1 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 0. " [0] ,Enable pin 0 for LCD mode" "Disabled,Enabled" textline " " group.byte (0x200+0x08*2)++0x01 line.byte 0x00 "OUT_SEL0,Digital System Interconnect Port 2 Pin Output Select Registers" bitfld.byte 0x00 7. " PORTOUTSEL[7] ,Available taps selection for I/O pin output 7" "0,1" bitfld.byte 0x00 6. " [6] ,Available taps selection for I/O pin output 6" "0,1" bitfld.byte 0x00 5. " [5] ,Available taps selection for I/O pin output 5" "0,1" bitfld.byte 0x00 4. " [4] ,Available taps selection for I/O pin output 4" "0,1" textline " " bitfld.byte 0x00 3. " [3] ,Available taps selection for I/O pin output 3" "0,1" bitfld.byte 0x00 2. " [2] ,Available taps selection for I/O pin output 2" "0,1" bitfld.byte 0x00 1. " [1] ,Available taps selection for I/O pin output 1" "0,1" bitfld.byte 0x00 0. " [0] ,Available taps selection for I/O pin output 0" "0,1" textline " " line.byte 0x01 "OUT_SEL1,Digital System Interconnect Port 2 Pin Output Select Registers" bitfld.byte 0x01 7. " PORTOUTSEL[7] ,Available taps selection for I/O pin output 7" "0,1" bitfld.byte 0x01 6. " [6] ,Available taps selection for I/O pin output 6" "0,1" bitfld.byte 0x01 5. " [5] ,Available taps selection for I/O pin output 5" "0,1" bitfld.byte 0x01 4. " [4] ,Available taps selection for I/O pin output 4" "0,1" textline " " bitfld.byte 0x01 3. " [3] ,Available taps selection for I/O pin output 3" "0,1" bitfld.byte 0x01 2. " [2] ,Available taps selection for I/O pin output 2" "0,1" bitfld.byte 0x01 1. " [1] ,Available taps selection for I/O pin output 1" "0,1" bitfld.byte 0x01 0. " [0] ,Available taps selection for I/O pin output 0" "0,1" textline " " group.byte (0x202+0x08*2)++0x03 line.byte 0x00 "OE_SEL0,Dynamic Drive Stength of Port 2 Output Enable Select registers" bitfld.byte 0x00 7. " PORTOESEL[7] ,Available taps selection for I/O pin 7" "0,1" bitfld.byte 0x00 6. " [6] ,Available taps selection for I/O pin 6" "0,1" textline " " bitfld.byte 0x00 5. " [5] ,Available taps selection for I/O pin 5" "0,1" bitfld.byte 0x00 4. " [4] ,Available taps selection for I/O pin 4" "0,1" textline " " bitfld.byte 0x00 3. " [3] ,Available taps selection for I/O pin 3" "0,1" bitfld.byte 0x00 2. " [2] ,Available taps selection for I/O pin 2" "0,1" textline " " bitfld.byte 0x00 1. " [1] ,Available taps selection for I/O pin 1" "0,1" bitfld.byte 0x00 0. " [0] ,Available taps selection for I/O pin 0" "0,1" line.byte 0x01 "OE_SEL1,Dynamic Drive Stength of Port Output Enable Select registers" bitfld.byte 0x01 7. " PORTOESEL[7] ,Available taps selection for I/O pin 7" "0,1" bitfld.byte 0x01 6. " [6] ,Available taps selection for I/O pin 6" "0,1" textline " " bitfld.byte 0x01 5. " [5] ,Available taps selection for I/O pin 5" "0,1" bitfld.byte 0x01 4. " [4] ,Available taps selection for I/O pin 4" "0,1" textline " " bitfld.byte 0x01 3. " [3] ,Available taps selection for I/O pin 3" "0,1" bitfld.byte 0x01 2. " [2] ,Available taps selection for I/O pin 2" "0,1" textline " " bitfld.byte 0x01 1. " [1] ,Available taps selection for I/O pin 1" "0,1" bitfld.byte 0x01 0. " [0] ,Available taps selection for I/O pin 0" "0,1" textline " " line.byte 0x02 "DBL_SYNC_IN,DSI double sync enable register" bitfld.byte 0x02 7. " DBL_SYNC_IN[7] ,Selects to synchronize the data in from the pad 7" "Not asserted,Asserted" bitfld.byte 0x02 6. " [6] ,Selects to synchronize the data in from the pad 6" "Not asserted,Asserted" textline " " bitfld.byte 0x02 5. " [5] ,Selects to synchronize the data in from the pad 5" "Not asserted,Asserted" bitfld.byte 0x02 4. " [4] ,Selects to synchronize the data in from the pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x02 3. " [3] ,Selects to synchronize the data in from the pad 3" "Not asserted,Asserted" bitfld.byte 0x02 2. " [2] ,Selects to synchronize the data in from the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x02 1. " [1] ,Selects to synchronize the data in from the pad 1" "Not asserted,Asserted" bitfld.byte 0x02 0. " [0] ,Selects to synchronize the data in from the pad 0" "Not asserted,Asserted" textline " " line.byte 0x03 "SYNC_OUT,DSI sync out enable register" bitfld.byte 0x03 7. " SYNC_OUT[7] ,Selects to synchronize data from DSI driving pad 7" "Not asserted,Asserted" bitfld.byte 0x03 6. " [6] ,Selects to synchronize data from DSI driving pad 6" "Not asserted,Asserted" textline " " bitfld.byte 0x03 5. " [5] ,Selects to synchronize data from DSI driving pad 5" "Not asserted,Asserted" bitfld.byte 0x03 4. " [4] ,Selects to synchronize data from DSI driving pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x03 3. " [3] ,Selects to synchronize data from DSI driving pad 3" "Not asserted,Asserted" bitfld.byte 0x03 2. " [2] ,Selects to synchronize data from DSI driving pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x03 1. " [1] ,Selects to synchronize data from DSI driving pad 1" "Not asserted,Asserted" bitfld.byte 0x03 0. " [0] ,Selects to synchronize data from DSI driving pad 0" "Not asserted,Asserted" group.byte (0x206+0x08*2)++0x00 line.byte 0x00 "CAPS_SEL,Global DSI select register" bitfld.byte 0x00 7. " CAPS_SEL[7] ,Selects global DSI to drive dig_glbl_ctl on the pad 7" "Not asserted,Asserted" bitfld.byte 0x00 6. " [6] ,Selects global DSI to drive dig_glbl_ctl on the pad 6" "Not asserted,Asserted" textline " " bitfld.byte 0x00 5. " [5] ,Selects global DSI to drive dig_glbl_ctl on the pad 5" "Not asserted,Asserted" bitfld.byte 0x00 4. " [4] ,Selects global DSI to drive dig_glbl_ctl on the pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x00 3. " [3] ,Selects global DSI to drive dig_glbl_ctl on the pad 3" "Not asserted,Asserted" bitfld.byte 0x00 2. " [2] ,Selects global DSI to drive dig_glbl_ctl on the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x00 1. " [1] ,Selects global DSI to drive dig_glbl_ctl on the pad 1" "Not asserted,Asserted" bitfld.byte 0x00 0. " [0] ,Selects global DSI to drive dig_glbl_ctl on the pad 0" "Not asserted,Asserted" width 0x0B tree.end tree "PRT 3" width 16. group.byte (0x08*3)++0x07 line.byte 0x0 "PC0,Port Pin Configuration Registers 0" bitfld.byte 0x0 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x0 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x0 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x0 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x0 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x0 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x0 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x0 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x1 "PC1,Port Pin Configuration Registers 1" bitfld.byte 0x1 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x1 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x1 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x1 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x1 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x1 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x1 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x1 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x2 "PC2,Port Pin Configuration Registers 2" bitfld.byte 0x2 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x2 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x2 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x2 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x2 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x2 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x2 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x2 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x3 "PC3,Port Pin Configuration Registers 3" bitfld.byte 0x3 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x3 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x3 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x3 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x3 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x3 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x3 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x3 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x4 "PC4,Port Pin Configuration Registers 4" bitfld.byte 0x4 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x4 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x4 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x4 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x4 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x4 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x4 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x4 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x5 "PC5,Port Pin Configuration Registers 5" bitfld.byte 0x5 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x5 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x5 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x5 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x5 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x5 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x5 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x5 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x6 "PC6,Port Pin Configuration Registers 6" bitfld.byte 0x6 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x6 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x6 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x6 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x6 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x6 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x6 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x6 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x7 "PC7,Port Pin Configuration Registers 7" bitfld.byte 0x7 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x7 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x7 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x7 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x7 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x7 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x7 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x7 0. " DATA_OUT ,Data out bit" "Low,High" textline " " group.byte (0x80+0x01*3)++0x00 line.byte 0x00 "DR_ALIAS,Aliased Port Data Output Register" bitfld.byte 0x00 7. " DATAREG_ALIAS[7] ,High/Low state for the GPIO pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,High/Low state for the GPIO pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,High/Low state for the GPIO pin 5" "Low,High" textline " " bitfld.byte 0x00 4. " [4] ,High/Low state for the GPIO pin 4" "Low,High" bitfld.byte 0x00 3. " [3] ,High/Low state for the GPIO pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,High/Low state for the GPIO pin 2" "Low,High" textline " " bitfld.byte 0x00 1. " [1] ,High/Low state for the GPIO pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,High/Low state for the GPIO pin 0" "Low,High" textline " " group.byte (0x90+0x01*3)++0x00 line.byte 0x00 "PS_ALIAS,Aliased Port Pin State Register" bitfld.byte 0x00 7. " PINSTATE_ALIAS[7] ,Logical state of the I/O pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,Logical state of the I/O pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,Logical state of the I/O pin 5" "Low,High" textline " " bitfld.byte 0x00 4. " [4] ,Logical state of the I/O pin 4" "Low,High" bitfld.byte 0x00 3. " [3] ,Logical state of the I/O pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,Logical state of the I/O pin 2" "Low,High" textline " " bitfld.byte 0x00 1. " [1] ,Logical state of the I/O pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,Logical state of the I/O pin 0" "Low,High" textline " " group.byte (0x100+0x10*3)++0x00 line.byte 0x00 "DR,Port Data Output Register" bitfld.byte 0x00 7. " DATAREG[7] ,State for the GPIO pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,State for the GPIO pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,State for the GPIO pin 5" "Low,High" bitfld.byte 0x00 4. " [4] ,State for the GPIO pin 4" "Low,High" textline " " bitfld.byte 0x00 3. " [3] ,State for the GPIO pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,State for the GPIO pin 2" "Low,High" bitfld.byte 0x00 1. " [1] ,State for the GPIO pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,State for the GPIO pin 0" "Low,High" textline " " rgroup.byte (0x101+0x10*3)++0x00 line.byte 0x00 "PS,Port Pin State Register 1" bitfld.byte 0x00 7. " PINSTATE[7] ,Logical state of the I/O pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,Logical state of the I/O pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,Logical state of the I/O pin 5" "Low,High" bitfld.byte 0x00 4. " [4] ,Logical state of the I/O pin 4" "Low,High" textline " " bitfld.byte 0x00 3. " [3] ,Logical state of the I/O pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,Logical state of the I/O pin 2" "Low,High" bitfld.byte 0x00 1. " [1] ,Logical state of the I/O pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,Logical state of the I/O pin 0" "Low,High" textline " " group.byte (0x102+0x10*3)++0x02 line.byte 0x0 "DM0,Port Drive Mode Register 0" bitfld.byte 0x0 7. " DRIVEMODE[7] ,DM register 0 assertion bit 7" "Low,High" bitfld.byte 0x0 6. " [6] ,DM register 0 assertion bit 6" "Low,High" bitfld.byte 0x0 5. " [5] ,DM register 0 assertion bit 5" "Low,High" bitfld.byte 0x0 4. " [4] ,DM register 0 assertion bit 4" "Low,High" textline " " bitfld.byte 0x0 3. " [3] ,DM register 0 assertion bit 3" "Low,High" bitfld.byte 0x0 2. " [2] ,DM register 0 assertion bit 2" "Low,High" bitfld.byte 0x0 1. " [1] ,DM register 0 assertion bit 1" "Low,High" bitfld.byte 0x0 0. " [0] ,DM register 0 assertion bit 0" "Low,High" line.byte 0x1 "DM1,Port Drive Mode Register 1" bitfld.byte 0x1 7. " DRIVEMODE[7] ,DM register 1 assertion bit 7" "Low,High" bitfld.byte 0x1 6. " [6] ,DM register 1 assertion bit 6" "Low,High" bitfld.byte 0x1 5. " [5] ,DM register 1 assertion bit 5" "Low,High" bitfld.byte 0x1 4. " [4] ,DM register 1 assertion bit 4" "Low,High" textline " " bitfld.byte 0x1 3. " [3] ,DM register 1 assertion bit 3" "Low,High" bitfld.byte 0x1 2. " [2] ,DM register 1 assertion bit 2" "Low,High" bitfld.byte 0x1 1. " [1] ,DM register 1 assertion bit 1" "Low,High" bitfld.byte 0x1 0. " [0] ,DM register 1 assertion bit 0" "Low,High" line.byte 0x2 "DM2,Port Drive Mode Register 2" bitfld.byte 0x2 7. " DRIVEMODE[7] ,DM register 2 assertion bit 7" "Low,High" bitfld.byte 0x2 6. " [6] ,DM register 2 assertion bit 6" "Low,High" bitfld.byte 0x2 5. " [5] ,DM register 2 assertion bit 5" "Low,High" bitfld.byte 0x2 4. " [4] ,DM register 2 assertion bit 4" "Low,High" textline " " bitfld.byte 0x2 3. " [3] ,DM register 2 assertion bit 3" "Low,High" bitfld.byte 0x2 2. " [2] ,DM register 2 assertion bit 2" "Low,High" bitfld.byte 0x2 1. " [1] ,DM register 2 assertion bit 1" "Low,High" bitfld.byte 0x2 0. " [0] ,DM register 2 assertion bit 0" "Low,High" textline " " group.byte (0x105+0x10*3)++0x04 line.byte 0x00 "SLW,Port slew rate control" bitfld.byte 0x00 7. " SLWCTL[7] ,Output edge rate of the port 3 pin 7" "Fast,Slow" bitfld.byte 0x00 6. " [6] ,Output edge rate of the port 3 pin 6" "Fast,Slow" bitfld.byte 0x00 5. " [5] ,Output edge rate of the port 3 pin 5" "Fast,Slow" bitfld.byte 0x00 4. " [4] ,Output edge rate of the port 3 pin 4" "Fast,Slow" textline " " bitfld.byte 0x00 3. " [3] ,Output edge rate of the port 3 pin 3" "Fast,Slow" bitfld.byte 0x00 2. " [2] ,Output edge rate of the port 3 pin 2" "Fast,Slow" bitfld.byte 0x00 1. " [1] ,Output edge rate of the port 3 pin 1" "Fast,Slow" bitfld.byte 0x00 0. " [0] ,Output edge rate of the port 3 pin 0" "Fast,Slow" textline " " line.byte 0x01 "BYP,Port Bypass enable" bitfld.byte 0x01 7. " BYPASS[7] ,DSI drives the corresponding port 3 pin 7" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 6. " [6] ,DSI drives the corresponding port 3 pin 6" "Port Logic Data Register,Digital System Interconnect" textline " " bitfld.byte 0x01 5. " [5] ,DSI drives the corresponding port 3 pin 5" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 4. " [4] ,DSI drives the corresponding port 3 pin 4" "Port Logic Data Register,Digital System Interconnect" textline " " bitfld.byte 0x01 3. " [3] ,DSI drives the corresponding port 3 pin 3" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 2. " [2] ,DSI drives the corresponding port 3 pin 2" "Port Logic Data Register,Digital System Interconnect" textline " " bitfld.byte 0x01 1. " [1] ,DSI drives the corresponding port 3 pin 1" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 0. " [0] ,DSI drives the corresponding port 3 pin 0" "Port Logic Data Register,Digital System Interconnect" textline " " line.byte 0x02 "BIE,Port Bydirection enable" bitfld.byte 0x02 7. " BIDIRECTEN[7] ,Bidirectional mode of the port 3 pin 7" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 6. " [6] ,Bidirectional mode of the port 3 pin 6" "Drive mode,Dynamic control DSI" textline " " bitfld.byte 0x02 5. " [5] ,Bidirectional mode of the port 3 pin 5" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 4. " [4] ,Bidirectional mode of the port 3 pin 4" "Drive mode,Dynamic control DSI" textline " " bitfld.byte 0x02 3. " [3] ,Bidirectional mode of the port 3 pin 3" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 2. " [2] ,Bidirectional mode of the port 3 pin 2" "Drive mode,Dynamic control DSI" textline " " bitfld.byte 0x02 1. " [1] ,Bidirectional mode of the port 3 pin 1" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 0. " [0] ,Bidirectional mode of the port 3 pin 0" "Drive mode,Dynamic control DSI" textline " " line.byte 0x03 "INP_DIS,Input buffer disable override" bitfld.byte 0x03 7. " INP_DIS[7] ,Input buffer disable 7" "No,Yes" bitfld.byte 0x03 6. " [6] ,Input buffer disable 6" "No,Yes" bitfld.byte 0x03 5. " [5] ,Input buffer disable 5" "No,Yes" bitfld.byte 0x03 4. " [4] ,Input buffer disable 4" "No,Yes" textline " " bitfld.byte 0x03 3. " [3] ,Input buffer disable 3" "No,Yes" bitfld.byte 0x03 2. " [2] ,Input buffer disable 2" "No,Yes" bitfld.byte 0x03 1. " [1] ,Input buffer disable 1" "No,Yes" bitfld.byte 0x03 0. " [0] ,Input buffer disable 0" "No,Yes" textline " " line.byte 0x04 "CTL,Port wide control signals" bitfld.byte 0x04 1.--3. " portEmifCfg ,GPIO emif selection option" "NOT_EMIF,LSB_ADDR,UPR_ADDR,MSB_ADDR,Reserved,LSB_DATA,MSB_DATA,?..." bitfld.byte 0x04 0. " VTRIP_SEL ,CMOS/LVTTL input buffer" "CMOS,LVTTL" wgroup.byte (0x10a+0x10*3)++0x00 line.byte 0x00 "PRT,Port wide configuration register" bitfld.byte 0x00 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x00 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x00 5. " BIDIRECTEN ,BiDir Enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " DRIVEMODE2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x00 2. " DRIVEMODE1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x00 1. " DRIVEMODE0 ,Drive mode 0" "Disabled,Enabled" textline " " group.byte (0x10b+0x10*3)++0x04 line.byte 0x00 "BIT_MASK,Bit-mask for Aliased Register access" bitfld.byte 0x00 7. " BIT_MASK[7] ,Allow access to data register and pin state 7" "Not allowed,Allowed" bitfld.byte 0x00 6. " [6] ,Allow access to data register and pin state 6" "Not allowed,Allowed" bitfld.byte 0x00 5. " [5] ,Allow access to data register and pin state 5" "Not allowed,Allowed" textline " " bitfld.byte 0x00 4. " [4] ,Allow access to data register and pin state 4" "Not allowed,Allowed" bitfld.byte 0x00 3. " [3] ,Allow access to data register and pin state 3" "Not allowed,Allowed" bitfld.byte 0x00 2. " [2] ,Allow access to data register and pin state 2" "Not allowed,Allowed" textline " " bitfld.byte 0x00 1. " [1] ,Allow access to data register and pin state 1" "Not allowed,Allowed" bitfld.byte 0x00 0. " [0] ,Allow access to data register and pin state 0" "Not allowed,Allowed" textline " " line.byte 0x01 "AMUX,Port Analog global mux bus enable" bitfld.byte 0x01 7. " AMUX[7] ,Connects analog mux bus to the pad 7" "Not asserted,Asserted" bitfld.byte 0x01 6. " [6] ,Connects analog mux bus to the pad 6" "Not asserted,Asserted" bitfld.byte 0x01 5. " [5] ,Connects analog mux bus to the pad 5" "Not asserted,Asserted" textline " " bitfld.byte 0x01 4. " [4] ,Connects analog mux bus to the pad 4" "Not asserted,Asserted" bitfld.byte 0x01 3. " [3] ,Connects analog mux bus to the pad 3" "Not asserted,Asserted" bitfld.byte 0x01 2. " [2] ,Connects analog mux bus to the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x01 1. " [1] ,Connects analog mux bus to the pad 1" "Not asserted,Asserted" bitfld.byte 0x01 0. " [0] ,Connects analog mux bus to the pad 0" "Not asserted,Asserted" textline " " line.byte 0x02 "AG,Port Analog global enable" bitfld.byte 0x02 7. " ANALOGGLOBAL[7] ,Connects analog global to the pad 7" "Not asserted,Asserted" bitfld.byte 0x02 6. " [6] ,Connects analog global to the pad 6" "Not asserted,Asserted" textline " " bitfld.byte 0x02 5. " [5] ,Connects analog global to the pad 5" "Not asserted,Asserted" bitfld.byte 0x02 4. " [4] ,Connects analog global to the pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x02 3. " [3] ,Connects analog global to the pad 3" "Not asserted,Asserted" bitfld.byte 0x02 2. " [2] ,Connects analog global to the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x02 1. " [1] ,Connects analog global to the pad 1" "Not asserted,Asserted" bitfld.byte 0x02 0. " [0] ,Connects analog global to the pad 0" "Not asserted,Asserted" textline " " line.byte 0x03 "LCD_COM_SEG,Port LCD Com seg bits" bitfld.byte 0x03 7. " COM_SEG[7] ,Common or segment mode for pin 7" "Segment,Common" bitfld.byte 0x03 6. " [6] ,Common or segment mode for pin 6" "Segment,Common" bitfld.byte 0x03 5. " [5] ,Common or segment mode for pin 5" "Segment,Common" bitfld.byte 0x03 4. " [4] ,Common or segment mode for pin 4" "Segment,Common" textline " " bitfld.byte 0x03 3. " [3] ,Common or segment mode for pin 3" "Segment,Common" bitfld.byte 0x03 2. " [2] ,Common or segment mode for pin 2" "Segment,Common" bitfld.byte 0x03 1. " [1] ,Common or segment mode for pin 1" "Segment,Common" bitfld.byte 0x03 0. " [0] ,Common or segment mode for pin 0" "Segment,Common" textline " " line.byte 0x04 "LCD_EN,Port LCD enable register" bitfld.byte 0x04 7. " LCD_EN[7] ,Enable pin 7 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 6. " [6] ,Enable pin 6 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 5. " [5] ,Enable pin 5 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 4. " [4] ,Enable pin 4 for LCD mode" "Disabled,Enabled" textline " " bitfld.byte 0x04 3. " [3] ,Enable pin 3 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 2. " [2] ,Enable pin 2 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 1. " [1] ,Enable pin 1 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 0. " [0] ,Enable pin 0 for LCD mode" "Disabled,Enabled" textline " " group.byte (0x200+0x08*3)++0x01 line.byte 0x00 "OUT_SEL0,Digital System Interconnect Port 3 Pin Output Select Registers" bitfld.byte 0x00 7. " PORTOUTSEL[7] ,Available taps selection for I/O pin output 7" "0,1" bitfld.byte 0x00 6. " [6] ,Available taps selection for I/O pin output 6" "0,1" bitfld.byte 0x00 5. " [5] ,Available taps selection for I/O pin output 5" "0,1" bitfld.byte 0x00 4. " [4] ,Available taps selection for I/O pin output 4" "0,1" textline " " bitfld.byte 0x00 3. " [3] ,Available taps selection for I/O pin output 3" "0,1" bitfld.byte 0x00 2. " [2] ,Available taps selection for I/O pin output 2" "0,1" bitfld.byte 0x00 1. " [1] ,Available taps selection for I/O pin output 1" "0,1" bitfld.byte 0x00 0. " [0] ,Available taps selection for I/O pin output 0" "0,1" textline " " line.byte 0x01 "OUT_SEL1,Digital System Interconnect Port 3 Pin Output Select Registers" bitfld.byte 0x01 7. " PORTOUTSEL[7] ,Available taps selection for I/O pin output 7" "0,1" bitfld.byte 0x01 6. " [6] ,Available taps selection for I/O pin output 6" "0,1" bitfld.byte 0x01 5. " [5] ,Available taps selection for I/O pin output 5" "0,1" bitfld.byte 0x01 4. " [4] ,Available taps selection for I/O pin output 4" "0,1" textline " " bitfld.byte 0x01 3. " [3] ,Available taps selection for I/O pin output 3" "0,1" bitfld.byte 0x01 2. " [2] ,Available taps selection for I/O pin output 2" "0,1" bitfld.byte 0x01 1. " [1] ,Available taps selection for I/O pin output 1" "0,1" bitfld.byte 0x01 0. " [0] ,Available taps selection for I/O pin output 0" "0,1" textline " " group.byte (0x202+0x08*3)++0x03 line.byte 0x00 "OE_SEL0,Dynamic Drive Stength of Port 3 Output Enable Select registers" bitfld.byte 0x00 7. " PORTOESEL[7] ,Available taps selection for I/O pin 7" "0,1" bitfld.byte 0x00 6. " [6] ,Available taps selection for I/O pin 6" "0,1" textline " " bitfld.byte 0x00 5. " [5] ,Available taps selection for I/O pin 5" "0,1" bitfld.byte 0x00 4. " [4] ,Available taps selection for I/O pin 4" "0,1" textline " " bitfld.byte 0x00 3. " [3] ,Available taps selection for I/O pin 3" "0,1" bitfld.byte 0x00 2. " [2] ,Available taps selection for I/O pin 2" "0,1" textline " " bitfld.byte 0x00 1. " [1] ,Available taps selection for I/O pin 1" "0,1" bitfld.byte 0x00 0. " [0] ,Available taps selection for I/O pin 0" "0,1" line.byte 0x01 "OE_SEL1,Dynamic Drive Stength of Port Output Enable Select registers" bitfld.byte 0x01 7. " PORTOESEL[7] ,Available taps selection for I/O pin 7" "0,1" bitfld.byte 0x01 6. " [6] ,Available taps selection for I/O pin 6" "0,1" textline " " bitfld.byte 0x01 5. " [5] ,Available taps selection for I/O pin 5" "0,1" bitfld.byte 0x01 4. " [4] ,Available taps selection for I/O pin 4" "0,1" textline " " bitfld.byte 0x01 3. " [3] ,Available taps selection for I/O pin 3" "0,1" bitfld.byte 0x01 2. " [2] ,Available taps selection for I/O pin 2" "0,1" textline " " bitfld.byte 0x01 1. " [1] ,Available taps selection for I/O pin 1" "0,1" bitfld.byte 0x01 0. " [0] ,Available taps selection for I/O pin 0" "0,1" textline " " line.byte 0x02 "DBL_SYNC_IN,DSI double sync enable register" bitfld.byte 0x02 7. " DBL_SYNC_IN[7] ,Selects to synchronize the data in from the pad 7" "Not asserted,Asserted" bitfld.byte 0x02 6. " [6] ,Selects to synchronize the data in from the pad 6" "Not asserted,Asserted" textline " " bitfld.byte 0x02 5. " [5] ,Selects to synchronize the data in from the pad 5" "Not asserted,Asserted" bitfld.byte 0x02 4. " [4] ,Selects to synchronize the data in from the pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x02 3. " [3] ,Selects to synchronize the data in from the pad 3" "Not asserted,Asserted" bitfld.byte 0x02 2. " [2] ,Selects to synchronize the data in from the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x02 1. " [1] ,Selects to synchronize the data in from the pad 1" "Not asserted,Asserted" bitfld.byte 0x02 0. " [0] ,Selects to synchronize the data in from the pad 0" "Not asserted,Asserted" textline " " line.byte 0x03 "SYNC_OUT,DSI sync out enable register" bitfld.byte 0x03 7. " SYNC_OUT[7] ,Selects to synchronize data from DSI driving pad 7" "Not asserted,Asserted" bitfld.byte 0x03 6. " [6] ,Selects to synchronize data from DSI driving pad 6" "Not asserted,Asserted" textline " " bitfld.byte 0x03 5. " [5] ,Selects to synchronize data from DSI driving pad 5" "Not asserted,Asserted" bitfld.byte 0x03 4. " [4] ,Selects to synchronize data from DSI driving pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x03 3. " [3] ,Selects to synchronize data from DSI driving pad 3" "Not asserted,Asserted" bitfld.byte 0x03 2. " [2] ,Selects to synchronize data from DSI driving pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x03 1. " [1] ,Selects to synchronize data from DSI driving pad 1" "Not asserted,Asserted" bitfld.byte 0x03 0. " [0] ,Selects to synchronize data from DSI driving pad 0" "Not asserted,Asserted" group.byte (0x206+0x08*3)++0x00 line.byte 0x00 "CAPS_SEL,Global DSI select register" bitfld.byte 0x00 7. " CAPS_SEL[7] ,Selects global DSI to drive dig_glbl_ctl on the pad 7" "Not asserted,Asserted" bitfld.byte 0x00 6. " [6] ,Selects global DSI to drive dig_glbl_ctl on the pad 6" "Not asserted,Asserted" textline " " bitfld.byte 0x00 5. " [5] ,Selects global DSI to drive dig_glbl_ctl on the pad 5" "Not asserted,Asserted" bitfld.byte 0x00 4. " [4] ,Selects global DSI to drive dig_glbl_ctl on the pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x00 3. " [3] ,Selects global DSI to drive dig_glbl_ctl on the pad 3" "Not asserted,Asserted" bitfld.byte 0x00 2. " [2] ,Selects global DSI to drive dig_glbl_ctl on the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x00 1. " [1] ,Selects global DSI to drive dig_glbl_ctl on the pad 1" "Not asserted,Asserted" bitfld.byte 0x00 0. " [0] ,Selects global DSI to drive dig_glbl_ctl on the pad 0" "Not asserted,Asserted" width 0x0B tree.end tree "PRT 4" width 16. group.byte (0x08*4)++0x07 line.byte 0x0 "PC0,Port Pin Configuration Registers 0" bitfld.byte 0x0 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x0 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x0 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x0 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x0 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x0 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x0 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x0 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x1 "PC1,Port Pin Configuration Registers 1" bitfld.byte 0x1 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x1 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x1 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x1 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x1 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x1 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x1 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x1 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x2 "PC2,Port Pin Configuration Registers 2" bitfld.byte 0x2 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x2 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x2 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x2 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x2 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x2 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x2 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x2 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x3 "PC3,Port Pin Configuration Registers 3" bitfld.byte 0x3 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x3 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x3 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x3 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x3 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x3 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x3 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x3 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x4 "PC4,Port Pin Configuration Registers 4" bitfld.byte 0x4 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x4 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x4 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x4 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x4 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x4 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x4 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x4 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x5 "PC5,Port Pin Configuration Registers 5" bitfld.byte 0x5 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x5 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x5 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x5 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x5 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x5 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x5 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x5 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x6 "PC6,Port Pin Configuration Registers 6" bitfld.byte 0x6 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x6 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x6 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x6 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x6 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x6 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x6 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x6 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x7 "PC7,Port Pin Configuration Registers 7" bitfld.byte 0x7 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x7 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x7 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x7 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x7 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x7 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x7 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x7 0. " DATA_OUT ,Data out bit" "Low,High" textline " " group.byte (0x80+0x01*4)++0x00 line.byte 0x00 "DR_ALIAS,Aliased Port Data Output Register" bitfld.byte 0x00 7. " DATAREG_ALIAS[7] ,High/Low state for the GPIO pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,High/Low state for the GPIO pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,High/Low state for the GPIO pin 5" "Low,High" textline " " bitfld.byte 0x00 4. " [4] ,High/Low state for the GPIO pin 4" "Low,High" bitfld.byte 0x00 3. " [3] ,High/Low state for the GPIO pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,High/Low state for the GPIO pin 2" "Low,High" textline " " bitfld.byte 0x00 1. " [1] ,High/Low state for the GPIO pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,High/Low state for the GPIO pin 0" "Low,High" textline " " group.byte (0x90+0x01*4)++0x00 line.byte 0x00 "PS_ALIAS,Aliased Port Pin State Register" bitfld.byte 0x00 7. " PINSTATE_ALIAS[7] ,Logical state of the I/O pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,Logical state of the I/O pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,Logical state of the I/O pin 5" "Low,High" textline " " bitfld.byte 0x00 4. " [4] ,Logical state of the I/O pin 4" "Low,High" bitfld.byte 0x00 3. " [3] ,Logical state of the I/O pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,Logical state of the I/O pin 2" "Low,High" textline " " bitfld.byte 0x00 1. " [1] ,Logical state of the I/O pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,Logical state of the I/O pin 0" "Low,High" textline " " group.byte (0x100+0x10*4)++0x00 line.byte 0x00 "DR,Port Data Output Register" bitfld.byte 0x00 7. " DATAREG[7] ,State for the GPIO pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,State for the GPIO pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,State for the GPIO pin 5" "Low,High" bitfld.byte 0x00 4. " [4] ,State for the GPIO pin 4" "Low,High" textline " " bitfld.byte 0x00 3. " [3] ,State for the GPIO pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,State for the GPIO pin 2" "Low,High" bitfld.byte 0x00 1. " [1] ,State for the GPIO pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,State for the GPIO pin 0" "Low,High" textline " " rgroup.byte (0x101+0x10*4)++0x00 line.byte 0x00 "PS,Port Pin State Register 1" bitfld.byte 0x00 7. " PINSTATE[7] ,Logical state of the I/O pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,Logical state of the I/O pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,Logical state of the I/O pin 5" "Low,High" bitfld.byte 0x00 4. " [4] ,Logical state of the I/O pin 4" "Low,High" textline " " bitfld.byte 0x00 3. " [3] ,Logical state of the I/O pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,Logical state of the I/O pin 2" "Low,High" bitfld.byte 0x00 1. " [1] ,Logical state of the I/O pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,Logical state of the I/O pin 0" "Low,High" textline " " group.byte (0x102+0x10*4)++0x02 line.byte 0x0 "DM0,Port Drive Mode Register 0" bitfld.byte 0x0 7. " DRIVEMODE[7] ,DM register 0 assertion bit 7" "Low,High" bitfld.byte 0x0 6. " [6] ,DM register 0 assertion bit 6" "Low,High" bitfld.byte 0x0 5. " [5] ,DM register 0 assertion bit 5" "Low,High" bitfld.byte 0x0 4. " [4] ,DM register 0 assertion bit 4" "Low,High" textline " " bitfld.byte 0x0 3. " [3] ,DM register 0 assertion bit 3" "Low,High" bitfld.byte 0x0 2. " [2] ,DM register 0 assertion bit 2" "Low,High" bitfld.byte 0x0 1. " [1] ,DM register 0 assertion bit 1" "Low,High" bitfld.byte 0x0 0. " [0] ,DM register 0 assertion bit 0" "Low,High" line.byte 0x1 "DM1,Port Drive Mode Register 1" bitfld.byte 0x1 7. " DRIVEMODE[7] ,DM register 1 assertion bit 7" "Low,High" bitfld.byte 0x1 6. " [6] ,DM register 1 assertion bit 6" "Low,High" bitfld.byte 0x1 5. " [5] ,DM register 1 assertion bit 5" "Low,High" bitfld.byte 0x1 4. " [4] ,DM register 1 assertion bit 4" "Low,High" textline " " bitfld.byte 0x1 3. " [3] ,DM register 1 assertion bit 3" "Low,High" bitfld.byte 0x1 2. " [2] ,DM register 1 assertion bit 2" "Low,High" bitfld.byte 0x1 1. " [1] ,DM register 1 assertion bit 1" "Low,High" bitfld.byte 0x1 0. " [0] ,DM register 1 assertion bit 0" "Low,High" line.byte 0x2 "DM2,Port Drive Mode Register 2" bitfld.byte 0x2 7. " DRIVEMODE[7] ,DM register 2 assertion bit 7" "Low,High" bitfld.byte 0x2 6. " [6] ,DM register 2 assertion bit 6" "Low,High" bitfld.byte 0x2 5. " [5] ,DM register 2 assertion bit 5" "Low,High" bitfld.byte 0x2 4. " [4] ,DM register 2 assertion bit 4" "Low,High" textline " " bitfld.byte 0x2 3. " [3] ,DM register 2 assertion bit 3" "Low,High" bitfld.byte 0x2 2. " [2] ,DM register 2 assertion bit 2" "Low,High" bitfld.byte 0x2 1. " [1] ,DM register 2 assertion bit 1" "Low,High" bitfld.byte 0x2 0. " [0] ,DM register 2 assertion bit 0" "Low,High" textline " " group.byte (0x105+0x10*4)++0x04 line.byte 0x00 "SLW,Port slew rate control" bitfld.byte 0x00 7. " SLWCTL[7] ,Output edge rate of the port 4 pin 7" "Fast,Slow" bitfld.byte 0x00 6. " [6] ,Output edge rate of the port 4 pin 6" "Fast,Slow" bitfld.byte 0x00 5. " [5] ,Output edge rate of the port 4 pin 5" "Fast,Slow" bitfld.byte 0x00 4. " [4] ,Output edge rate of the port 4 pin 4" "Fast,Slow" textline " " bitfld.byte 0x00 3. " [3] ,Output edge rate of the port 4 pin 3" "Fast,Slow" bitfld.byte 0x00 2. " [2] ,Output edge rate of the port 4 pin 2" "Fast,Slow" bitfld.byte 0x00 1. " [1] ,Output edge rate of the port 4 pin 1" "Fast,Slow" bitfld.byte 0x00 0. " [0] ,Output edge rate of the port 4 pin 0" "Fast,Slow" textline " " line.byte 0x01 "BYP,Port Bypass enable" bitfld.byte 0x01 7. " BYPASS[7] ,DSI drives the corresponding port 4 pin 7" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 6. " [6] ,DSI drives the corresponding port 4 pin 6" "Port Logic Data Register,Digital System Interconnect" textline " " bitfld.byte 0x01 5. " [5] ,DSI drives the corresponding port 4 pin 5" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 4. " [4] ,DSI drives the corresponding port 4 pin 4" "Port Logic Data Register,Digital System Interconnect" textline " " bitfld.byte 0x01 3. " [3] ,DSI drives the corresponding port 4 pin 3" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 2. " [2] ,DSI drives the corresponding port 4 pin 2" "Port Logic Data Register,Digital System Interconnect" textline " " bitfld.byte 0x01 1. " [1] ,DSI drives the corresponding port 4 pin 1" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 0. " [0] ,DSI drives the corresponding port 4 pin 0" "Port Logic Data Register,Digital System Interconnect" textline " " line.byte 0x02 "BIE,Port Bydirection enable" bitfld.byte 0x02 7. " BIDIRECTEN[7] ,Bidirectional mode of the port 4 pin 7" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 6. " [6] ,Bidirectional mode of the port 4 pin 6" "Drive mode,Dynamic control DSI" textline " " bitfld.byte 0x02 5. " [5] ,Bidirectional mode of the port 4 pin 5" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 4. " [4] ,Bidirectional mode of the port 4 pin 4" "Drive mode,Dynamic control DSI" textline " " bitfld.byte 0x02 3. " [3] ,Bidirectional mode of the port 4 pin 3" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 2. " [2] ,Bidirectional mode of the port 4 pin 2" "Drive mode,Dynamic control DSI" textline " " bitfld.byte 0x02 1. " [1] ,Bidirectional mode of the port 4 pin 1" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 0. " [0] ,Bidirectional mode of the port 4 pin 0" "Drive mode,Dynamic control DSI" textline " " line.byte 0x03 "INP_DIS,Input buffer disable override" bitfld.byte 0x03 7. " INP_DIS[7] ,Input buffer disable 7" "No,Yes" bitfld.byte 0x03 6. " [6] ,Input buffer disable 6" "No,Yes" bitfld.byte 0x03 5. " [5] ,Input buffer disable 5" "No,Yes" bitfld.byte 0x03 4. " [4] ,Input buffer disable 4" "No,Yes" textline " " bitfld.byte 0x03 3. " [3] ,Input buffer disable 3" "No,Yes" bitfld.byte 0x03 2. " [2] ,Input buffer disable 2" "No,Yes" bitfld.byte 0x03 1. " [1] ,Input buffer disable 1" "No,Yes" bitfld.byte 0x03 0. " [0] ,Input buffer disable 0" "No,Yes" textline " " line.byte 0x04 "CTL,Port wide control signals" bitfld.byte 0x04 1.--3. " portEmifCfg ,GPIO emif selection option" "NOT_EMIF,LSB_ADDR,UPR_ADDR,MSB_ADDR,Reserved,LSB_DATA,MSB_DATA,?..." bitfld.byte 0x04 0. " VTRIP_SEL ,CMOS/LVTTL input buffer" "CMOS,LVTTL" wgroup.byte (0x10a+0x10*4)++0x00 line.byte 0x00 "PRT,Port wide configuration register" bitfld.byte 0x00 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x00 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x00 5. " BIDIRECTEN ,BiDir Enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " DRIVEMODE2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x00 2. " DRIVEMODE1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x00 1. " DRIVEMODE0 ,Drive mode 0" "Disabled,Enabled" textline " " group.byte (0x10b+0x10*4)++0x04 line.byte 0x00 "BIT_MASK,Bit-mask for Aliased Register access" bitfld.byte 0x00 7. " BIT_MASK[7] ,Allow access to data register and pin state 7" "Not allowed,Allowed" bitfld.byte 0x00 6. " [6] ,Allow access to data register and pin state 6" "Not allowed,Allowed" bitfld.byte 0x00 5. " [5] ,Allow access to data register and pin state 5" "Not allowed,Allowed" textline " " bitfld.byte 0x00 4. " [4] ,Allow access to data register and pin state 4" "Not allowed,Allowed" bitfld.byte 0x00 3. " [3] ,Allow access to data register and pin state 3" "Not allowed,Allowed" bitfld.byte 0x00 2. " [2] ,Allow access to data register and pin state 2" "Not allowed,Allowed" textline " " bitfld.byte 0x00 1. " [1] ,Allow access to data register and pin state 1" "Not allowed,Allowed" bitfld.byte 0x00 0. " [0] ,Allow access to data register and pin state 0" "Not allowed,Allowed" textline " " line.byte 0x01 "AMUX,Port Analog global mux bus enable" bitfld.byte 0x01 7. " AMUX[7] ,Connects analog mux bus to the pad 7" "Not asserted,Asserted" bitfld.byte 0x01 6. " [6] ,Connects analog mux bus to the pad 6" "Not asserted,Asserted" bitfld.byte 0x01 5. " [5] ,Connects analog mux bus to the pad 5" "Not asserted,Asserted" textline " " bitfld.byte 0x01 4. " [4] ,Connects analog mux bus to the pad 4" "Not asserted,Asserted" bitfld.byte 0x01 3. " [3] ,Connects analog mux bus to the pad 3" "Not asserted,Asserted" bitfld.byte 0x01 2. " [2] ,Connects analog mux bus to the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x01 1. " [1] ,Connects analog mux bus to the pad 1" "Not asserted,Asserted" bitfld.byte 0x01 0. " [0] ,Connects analog mux bus to the pad 0" "Not asserted,Asserted" textline " " line.byte 0x02 "AG,Port Analog global enable" bitfld.byte 0x02 7. " ANALOGGLOBAL[7] ,Connects analog global to the pad 7" "Not asserted,Asserted" bitfld.byte 0x02 6. " [6] ,Connects analog global to the pad 6" "Not asserted,Asserted" textline " " bitfld.byte 0x02 5. " [5] ,Connects analog global to the pad 5" "Not asserted,Asserted" bitfld.byte 0x02 4. " [4] ,Connects analog global to the pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x02 3. " [3] ,Connects analog global to the pad 3" "Not asserted,Asserted" bitfld.byte 0x02 2. " [2] ,Connects analog global to the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x02 1. " [1] ,Connects analog global to the pad 1" "Not asserted,Asserted" bitfld.byte 0x02 0. " [0] ,Connects analog global to the pad 0" "Not asserted,Asserted" textline " " line.byte 0x03 "LCD_COM_SEG,Port LCD Com seg bits" bitfld.byte 0x03 7. " COM_SEG[7] ,Common or segment mode for pin 7" "Segment,Common" bitfld.byte 0x03 6. " [6] ,Common or segment mode for pin 6" "Segment,Common" bitfld.byte 0x03 5. " [5] ,Common or segment mode for pin 5" "Segment,Common" bitfld.byte 0x03 4. " [4] ,Common or segment mode for pin 4" "Segment,Common" textline " " bitfld.byte 0x03 3. " [3] ,Common or segment mode for pin 3" "Segment,Common" bitfld.byte 0x03 2. " [2] ,Common or segment mode for pin 2" "Segment,Common" bitfld.byte 0x03 1. " [1] ,Common or segment mode for pin 1" "Segment,Common" bitfld.byte 0x03 0. " [0] ,Common or segment mode for pin 0" "Segment,Common" textline " " line.byte 0x04 "LCD_EN,Port LCD enable register" bitfld.byte 0x04 7. " LCD_EN[7] ,Enable pin 7 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 6. " [6] ,Enable pin 6 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 5. " [5] ,Enable pin 5 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 4. " [4] ,Enable pin 4 for LCD mode" "Disabled,Enabled" textline " " bitfld.byte 0x04 3. " [3] ,Enable pin 3 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 2. " [2] ,Enable pin 2 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 1. " [1] ,Enable pin 1 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 0. " [0] ,Enable pin 0 for LCD mode" "Disabled,Enabled" textline " " group.byte (0x200+0x08*4)++0x01 line.byte 0x00 "OUT_SEL0,Digital System Interconnect Port 4 Pin Output Select Registers" bitfld.byte 0x00 7. " PORTOUTSEL[7] ,Available taps selection for I/O pin output 7" "0,1" bitfld.byte 0x00 6. " [6] ,Available taps selection for I/O pin output 6" "0,1" bitfld.byte 0x00 5. " [5] ,Available taps selection for I/O pin output 5" "0,1" bitfld.byte 0x00 4. " [4] ,Available taps selection for I/O pin output 4" "0,1" textline " " bitfld.byte 0x00 3. " [3] ,Available taps selection for I/O pin output 3" "0,1" bitfld.byte 0x00 2. " [2] ,Available taps selection for I/O pin output 2" "0,1" bitfld.byte 0x00 1. " [1] ,Available taps selection for I/O pin output 1" "0,1" bitfld.byte 0x00 0. " [0] ,Available taps selection for I/O pin output 0" "0,1" textline " " line.byte 0x01 "OUT_SEL1,Digital System Interconnect Port 4 Pin Output Select Registers" bitfld.byte 0x01 7. " PORTOUTSEL[7] ,Available taps selection for I/O pin output 7" "0,1" bitfld.byte 0x01 6. " [6] ,Available taps selection for I/O pin output 6" "0,1" bitfld.byte 0x01 5. " [5] ,Available taps selection for I/O pin output 5" "0,1" bitfld.byte 0x01 4. " [4] ,Available taps selection for I/O pin output 4" "0,1" textline " " bitfld.byte 0x01 3. " [3] ,Available taps selection for I/O pin output 3" "0,1" bitfld.byte 0x01 2. " [2] ,Available taps selection for I/O pin output 2" "0,1" bitfld.byte 0x01 1. " [1] ,Available taps selection for I/O pin output 1" "0,1" bitfld.byte 0x01 0. " [0] ,Available taps selection for I/O pin output 0" "0,1" textline " " group.byte (0x202+0x08*4)++0x03 line.byte 0x00 "OE_SEL0,Dynamic Drive Stength of Port 4 Output Enable Select registers" bitfld.byte 0x00 7. " PORTOESEL[7] ,Available taps selection for I/O pin 7" "0,1" bitfld.byte 0x00 6. " [6] ,Available taps selection for I/O pin 6" "0,1" textline " " bitfld.byte 0x00 5. " [5] ,Available taps selection for I/O pin 5" "0,1" bitfld.byte 0x00 4. " [4] ,Available taps selection for I/O pin 4" "0,1" textline " " bitfld.byte 0x00 3. " [3] ,Available taps selection for I/O pin 3" "0,1" bitfld.byte 0x00 2. " [2] ,Available taps selection for I/O pin 2" "0,1" textline " " bitfld.byte 0x00 1. " [1] ,Available taps selection for I/O pin 1" "0,1" bitfld.byte 0x00 0. " [0] ,Available taps selection for I/O pin 0" "0,1" line.byte 0x01 "OE_SEL1,Dynamic Drive Stength of Port Output Enable Select registers" bitfld.byte 0x01 7. " PORTOESEL[7] ,Available taps selection for I/O pin 7" "0,1" bitfld.byte 0x01 6. " [6] ,Available taps selection for I/O pin 6" "0,1" textline " " bitfld.byte 0x01 5. " [5] ,Available taps selection for I/O pin 5" "0,1" bitfld.byte 0x01 4. " [4] ,Available taps selection for I/O pin 4" "0,1" textline " " bitfld.byte 0x01 3. " [3] ,Available taps selection for I/O pin 3" "0,1" bitfld.byte 0x01 2. " [2] ,Available taps selection for I/O pin 2" "0,1" textline " " bitfld.byte 0x01 1. " [1] ,Available taps selection for I/O pin 1" "0,1" bitfld.byte 0x01 0. " [0] ,Available taps selection for I/O pin 0" "0,1" textline " " line.byte 0x02 "DBL_SYNC_IN,DSI double sync enable register" bitfld.byte 0x02 7. " DBL_SYNC_IN[7] ,Selects to synchronize the data in from the pad 7" "Not asserted,Asserted" bitfld.byte 0x02 6. " [6] ,Selects to synchronize the data in from the pad 6" "Not asserted,Asserted" textline " " bitfld.byte 0x02 5. " [5] ,Selects to synchronize the data in from the pad 5" "Not asserted,Asserted" bitfld.byte 0x02 4. " [4] ,Selects to synchronize the data in from the pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x02 3. " [3] ,Selects to synchronize the data in from the pad 3" "Not asserted,Asserted" bitfld.byte 0x02 2. " [2] ,Selects to synchronize the data in from the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x02 1. " [1] ,Selects to synchronize the data in from the pad 1" "Not asserted,Asserted" bitfld.byte 0x02 0. " [0] ,Selects to synchronize the data in from the pad 0" "Not asserted,Asserted" textline " " line.byte 0x03 "SYNC_OUT,DSI sync out enable register" bitfld.byte 0x03 7. " SYNC_OUT[7] ,Selects to synchronize data from DSI driving pad 7" "Not asserted,Asserted" bitfld.byte 0x03 6. " [6] ,Selects to synchronize data from DSI driving pad 6" "Not asserted,Asserted" textline " " bitfld.byte 0x03 5. " [5] ,Selects to synchronize data from DSI driving pad 5" "Not asserted,Asserted" bitfld.byte 0x03 4. " [4] ,Selects to synchronize data from DSI driving pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x03 3. " [3] ,Selects to synchronize data from DSI driving pad 3" "Not asserted,Asserted" bitfld.byte 0x03 2. " [2] ,Selects to synchronize data from DSI driving pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x03 1. " [1] ,Selects to synchronize data from DSI driving pad 1" "Not asserted,Asserted" bitfld.byte 0x03 0. " [0] ,Selects to synchronize data from DSI driving pad 0" "Not asserted,Asserted" group.byte (0x206+0x08*4)++0x00 line.byte 0x00 "CAPS_SEL,Global DSI select register" bitfld.byte 0x00 7. " CAPS_SEL[7] ,Selects global DSI to drive dig_glbl_ctl on the pad 7" "Not asserted,Asserted" bitfld.byte 0x00 6. " [6] ,Selects global DSI to drive dig_glbl_ctl on the pad 6" "Not asserted,Asserted" textline " " bitfld.byte 0x00 5. " [5] ,Selects global DSI to drive dig_glbl_ctl on the pad 5" "Not asserted,Asserted" bitfld.byte 0x00 4. " [4] ,Selects global DSI to drive dig_glbl_ctl on the pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x00 3. " [3] ,Selects global DSI to drive dig_glbl_ctl on the pad 3" "Not asserted,Asserted" bitfld.byte 0x00 2. " [2] ,Selects global DSI to drive dig_glbl_ctl on the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x00 1. " [1] ,Selects global DSI to drive dig_glbl_ctl on the pad 1" "Not asserted,Asserted" bitfld.byte 0x00 0. " [0] ,Selects global DSI to drive dig_glbl_ctl on the pad 0" "Not asserted,Asserted" width 0x0B tree.end tree "PRT 5" width 16. group.byte (0x08*5)++0x07 line.byte 0x0 "PC0,Port Pin Configuration Registers 0" bitfld.byte 0x0 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x0 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x0 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x0 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x0 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x0 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x0 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x0 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x1 "PC1,Port Pin Configuration Registers 1" bitfld.byte 0x1 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x1 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x1 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x1 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x1 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x1 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x1 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x1 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x2 "PC2,Port Pin Configuration Registers 2" bitfld.byte 0x2 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x2 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x2 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x2 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x2 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x2 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x2 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x2 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x3 "PC3,Port Pin Configuration Registers 3" bitfld.byte 0x3 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x3 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x3 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x3 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x3 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x3 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x3 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x3 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x4 "PC4,Port Pin Configuration Registers 4" bitfld.byte 0x4 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x4 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x4 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x4 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x4 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x4 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x4 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x4 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x5 "PC5,Port Pin Configuration Registers 5" bitfld.byte 0x5 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x5 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x5 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x5 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x5 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x5 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x5 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x5 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x6 "PC6,Port Pin Configuration Registers 6" bitfld.byte 0x6 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x6 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x6 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x6 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x6 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x6 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x6 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x6 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x7 "PC7,Port Pin Configuration Registers 7" bitfld.byte 0x7 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x7 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x7 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x7 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x7 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x7 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x7 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x7 0. " DATA_OUT ,Data out bit" "Low,High" textline " " group.byte (0x80+0x01*5)++0x00 line.byte 0x00 "DR_ALIAS,Aliased Port Data Output Register" bitfld.byte 0x00 7. " DATAREG_ALIAS[7] ,High/Low state for the GPIO pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,High/Low state for the GPIO pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,High/Low state for the GPIO pin 5" "Low,High" textline " " bitfld.byte 0x00 4. " [4] ,High/Low state for the GPIO pin 4" "Low,High" bitfld.byte 0x00 3. " [3] ,High/Low state for the GPIO pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,High/Low state for the GPIO pin 2" "Low,High" textline " " bitfld.byte 0x00 1. " [1] ,High/Low state for the GPIO pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,High/Low state for the GPIO pin 0" "Low,High" textline " " group.byte (0x90+0x01*5)++0x00 line.byte 0x00 "PS_ALIAS,Aliased Port Pin State Register" bitfld.byte 0x00 7. " PINSTATE_ALIAS[7] ,Logical state of the I/O pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,Logical state of the I/O pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,Logical state of the I/O pin 5" "Low,High" textline " " bitfld.byte 0x00 4. " [4] ,Logical state of the I/O pin 4" "Low,High" bitfld.byte 0x00 3. " [3] ,Logical state of the I/O pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,Logical state of the I/O pin 2" "Low,High" textline " " bitfld.byte 0x00 1. " [1] ,Logical state of the I/O pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,Logical state of the I/O pin 0" "Low,High" textline " " group.byte (0x100+0x10*5)++0x00 line.byte 0x00 "DR,Port Data Output Register" bitfld.byte 0x00 7. " DATAREG[7] ,State for the GPIO pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,State for the GPIO pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,State for the GPIO pin 5" "Low,High" bitfld.byte 0x00 4. " [4] ,State for the GPIO pin 4" "Low,High" textline " " bitfld.byte 0x00 3. " [3] ,State for the GPIO pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,State for the GPIO pin 2" "Low,High" bitfld.byte 0x00 1. " [1] ,State for the GPIO pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,State for the GPIO pin 0" "Low,High" textline " " rgroup.byte (0x101+0x10*5)++0x00 line.byte 0x00 "PS,Port Pin State Register 1" bitfld.byte 0x00 7. " PINSTATE[7] ,Logical state of the I/O pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,Logical state of the I/O pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,Logical state of the I/O pin 5" "Low,High" bitfld.byte 0x00 4. " [4] ,Logical state of the I/O pin 4" "Low,High" textline " " bitfld.byte 0x00 3. " [3] ,Logical state of the I/O pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,Logical state of the I/O pin 2" "Low,High" bitfld.byte 0x00 1. " [1] ,Logical state of the I/O pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,Logical state of the I/O pin 0" "Low,High" textline " " group.byte (0x102+0x10*5)++0x02 line.byte 0x0 "DM0,Port Drive Mode Register 0" bitfld.byte 0x0 7. " DRIVEMODE[7] ,DM register 0 assertion bit 7" "Low,High" bitfld.byte 0x0 6. " [6] ,DM register 0 assertion bit 6" "Low,High" bitfld.byte 0x0 5. " [5] ,DM register 0 assertion bit 5" "Low,High" bitfld.byte 0x0 4. " [4] ,DM register 0 assertion bit 4" "Low,High" textline " " bitfld.byte 0x0 3. " [3] ,DM register 0 assertion bit 3" "Low,High" bitfld.byte 0x0 2. " [2] ,DM register 0 assertion bit 2" "Low,High" bitfld.byte 0x0 1. " [1] ,DM register 0 assertion bit 1" "Low,High" bitfld.byte 0x0 0. " [0] ,DM register 0 assertion bit 0" "Low,High" line.byte 0x1 "DM1,Port Drive Mode Register 1" bitfld.byte 0x1 7. " DRIVEMODE[7] ,DM register 1 assertion bit 7" "Low,High" bitfld.byte 0x1 6. " [6] ,DM register 1 assertion bit 6" "Low,High" bitfld.byte 0x1 5. " [5] ,DM register 1 assertion bit 5" "Low,High" bitfld.byte 0x1 4. " [4] ,DM register 1 assertion bit 4" "Low,High" textline " " bitfld.byte 0x1 3. " [3] ,DM register 1 assertion bit 3" "Low,High" bitfld.byte 0x1 2. " [2] ,DM register 1 assertion bit 2" "Low,High" bitfld.byte 0x1 1. " [1] ,DM register 1 assertion bit 1" "Low,High" bitfld.byte 0x1 0. " [0] ,DM register 1 assertion bit 0" "Low,High" line.byte 0x2 "DM2,Port Drive Mode Register 2" bitfld.byte 0x2 7. " DRIVEMODE[7] ,DM register 2 assertion bit 7" "Low,High" bitfld.byte 0x2 6. " [6] ,DM register 2 assertion bit 6" "Low,High" bitfld.byte 0x2 5. " [5] ,DM register 2 assertion bit 5" "Low,High" bitfld.byte 0x2 4. " [4] ,DM register 2 assertion bit 4" "Low,High" textline " " bitfld.byte 0x2 3. " [3] ,DM register 2 assertion bit 3" "Low,High" bitfld.byte 0x2 2. " [2] ,DM register 2 assertion bit 2" "Low,High" bitfld.byte 0x2 1. " [1] ,DM register 2 assertion bit 1" "Low,High" bitfld.byte 0x2 0. " [0] ,DM register 2 assertion bit 0" "Low,High" textline " " group.byte (0x105+0x10*5)++0x04 line.byte 0x00 "SLW,Port slew rate control" bitfld.byte 0x00 7. " SLWCTL[7] ,Output edge rate of the port 5 pin 7" "Fast,Slow" bitfld.byte 0x00 6. " [6] ,Output edge rate of the port 5 pin 6" "Fast,Slow" bitfld.byte 0x00 5. " [5] ,Output edge rate of the port 5 pin 5" "Fast,Slow" bitfld.byte 0x00 4. " [4] ,Output edge rate of the port 5 pin 4" "Fast,Slow" textline " " bitfld.byte 0x00 3. " [3] ,Output edge rate of the port 5 pin 3" "Fast,Slow" bitfld.byte 0x00 2. " [2] ,Output edge rate of the port 5 pin 2" "Fast,Slow" bitfld.byte 0x00 1. " [1] ,Output edge rate of the port 5 pin 1" "Fast,Slow" bitfld.byte 0x00 0. " [0] ,Output edge rate of the port 5 pin 0" "Fast,Slow" textline " " line.byte 0x01 "BYP,Port Bypass enable" bitfld.byte 0x01 7. " BYPASS[7] ,DSI drives the corresponding port 5 pin 7" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 6. " [6] ,DSI drives the corresponding port 5 pin 6" "Port Logic Data Register,Digital System Interconnect" textline " " bitfld.byte 0x01 5. " [5] ,DSI drives the corresponding port 5 pin 5" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 4. " [4] ,DSI drives the corresponding port 5 pin 4" "Port Logic Data Register,Digital System Interconnect" textline " " bitfld.byte 0x01 3. " [3] ,DSI drives the corresponding port 5 pin 3" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 2. " [2] ,DSI drives the corresponding port 5 pin 2" "Port Logic Data Register,Digital System Interconnect" textline " " bitfld.byte 0x01 1. " [1] ,DSI drives the corresponding port 5 pin 1" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 0. " [0] ,DSI drives the corresponding port 5 pin 0" "Port Logic Data Register,Digital System Interconnect" textline " " line.byte 0x02 "BIE,Port Bydirection enable" bitfld.byte 0x02 7. " BIDIRECTEN[7] ,Bidirectional mode of the port 5 pin 7" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 6. " [6] ,Bidirectional mode of the port 5 pin 6" "Drive mode,Dynamic control DSI" textline " " bitfld.byte 0x02 5. " [5] ,Bidirectional mode of the port 5 pin 5" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 4. " [4] ,Bidirectional mode of the port 5 pin 4" "Drive mode,Dynamic control DSI" textline " " bitfld.byte 0x02 3. " [3] ,Bidirectional mode of the port 5 pin 3" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 2. " [2] ,Bidirectional mode of the port 5 pin 2" "Drive mode,Dynamic control DSI" textline " " bitfld.byte 0x02 1. " [1] ,Bidirectional mode of the port 5 pin 1" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 0. " [0] ,Bidirectional mode of the port 5 pin 0" "Drive mode,Dynamic control DSI" textline " " line.byte 0x03 "INP_DIS,Input buffer disable override" bitfld.byte 0x03 7. " INP_DIS[7] ,Input buffer disable 7" "No,Yes" bitfld.byte 0x03 6. " [6] ,Input buffer disable 6" "No,Yes" bitfld.byte 0x03 5. " [5] ,Input buffer disable 5" "No,Yes" bitfld.byte 0x03 4. " [4] ,Input buffer disable 4" "No,Yes" textline " " bitfld.byte 0x03 3. " [3] ,Input buffer disable 3" "No,Yes" bitfld.byte 0x03 2. " [2] ,Input buffer disable 2" "No,Yes" bitfld.byte 0x03 1. " [1] ,Input buffer disable 1" "No,Yes" bitfld.byte 0x03 0. " [0] ,Input buffer disable 0" "No,Yes" textline " " line.byte 0x04 "CTL,Port wide control signals" bitfld.byte 0x04 1.--3. " portEmifCfg ,GPIO emif selection option" "NOT_EMIF,LSB_ADDR,UPR_ADDR,MSB_ADDR,Reserved,LSB_DATA,MSB_DATA,?..." bitfld.byte 0x04 0. " VTRIP_SEL ,CMOS/LVTTL input buffer" "CMOS,LVTTL" wgroup.byte (0x10a+0x10*5)++0x00 line.byte 0x00 "PRT,Port wide configuration register" bitfld.byte 0x00 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x00 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x00 5. " BIDIRECTEN ,BiDir Enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " DRIVEMODE2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x00 2. " DRIVEMODE1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x00 1. " DRIVEMODE0 ,Drive mode 0" "Disabled,Enabled" textline " " group.byte (0x10b+0x10*5)++0x04 line.byte 0x00 "BIT_MASK,Bit-mask for Aliased Register access" bitfld.byte 0x00 7. " BIT_MASK[7] ,Allow access to data register and pin state 7" "Not allowed,Allowed" bitfld.byte 0x00 6. " [6] ,Allow access to data register and pin state 6" "Not allowed,Allowed" bitfld.byte 0x00 5. " [5] ,Allow access to data register and pin state 5" "Not allowed,Allowed" textline " " bitfld.byte 0x00 4. " [4] ,Allow access to data register and pin state 4" "Not allowed,Allowed" bitfld.byte 0x00 3. " [3] ,Allow access to data register and pin state 3" "Not allowed,Allowed" bitfld.byte 0x00 2. " [2] ,Allow access to data register and pin state 2" "Not allowed,Allowed" textline " " bitfld.byte 0x00 1. " [1] ,Allow access to data register and pin state 1" "Not allowed,Allowed" bitfld.byte 0x00 0. " [0] ,Allow access to data register and pin state 0" "Not allowed,Allowed" textline " " line.byte 0x01 "AMUX,Port Analog global mux bus enable" bitfld.byte 0x01 7. " AMUX[7] ,Connects analog mux bus to the pad 7" "Not asserted,Asserted" bitfld.byte 0x01 6. " [6] ,Connects analog mux bus to the pad 6" "Not asserted,Asserted" bitfld.byte 0x01 5. " [5] ,Connects analog mux bus to the pad 5" "Not asserted,Asserted" textline " " bitfld.byte 0x01 4. " [4] ,Connects analog mux bus to the pad 4" "Not asserted,Asserted" bitfld.byte 0x01 3. " [3] ,Connects analog mux bus to the pad 3" "Not asserted,Asserted" bitfld.byte 0x01 2. " [2] ,Connects analog mux bus to the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x01 1. " [1] ,Connects analog mux bus to the pad 1" "Not asserted,Asserted" bitfld.byte 0x01 0. " [0] ,Connects analog mux bus to the pad 0" "Not asserted,Asserted" textline " " line.byte 0x02 "AG,Port Analog global enable" bitfld.byte 0x02 7. " ANALOGGLOBAL[7] ,Connects analog global to the pad 7" "Not asserted,Asserted" bitfld.byte 0x02 6. " [6] ,Connects analog global to the pad 6" "Not asserted,Asserted" textline " " bitfld.byte 0x02 5. " [5] ,Connects analog global to the pad 5" "Not asserted,Asserted" bitfld.byte 0x02 4. " [4] ,Connects analog global to the pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x02 3. " [3] ,Connects analog global to the pad 3" "Not asserted,Asserted" bitfld.byte 0x02 2. " [2] ,Connects analog global to the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x02 1. " [1] ,Connects analog global to the pad 1" "Not asserted,Asserted" bitfld.byte 0x02 0. " [0] ,Connects analog global to the pad 0" "Not asserted,Asserted" textline " " line.byte 0x03 "LCD_COM_SEG,Port LCD Com seg bits" bitfld.byte 0x03 7. " COM_SEG[7] ,Common or segment mode for pin 7" "Segment,Common" bitfld.byte 0x03 6. " [6] ,Common or segment mode for pin 6" "Segment,Common" bitfld.byte 0x03 5. " [5] ,Common or segment mode for pin 5" "Segment,Common" bitfld.byte 0x03 4. " [4] ,Common or segment mode for pin 4" "Segment,Common" textline " " bitfld.byte 0x03 3. " [3] ,Common or segment mode for pin 3" "Segment,Common" bitfld.byte 0x03 2. " [2] ,Common or segment mode for pin 2" "Segment,Common" bitfld.byte 0x03 1. " [1] ,Common or segment mode for pin 1" "Segment,Common" bitfld.byte 0x03 0. " [0] ,Common or segment mode for pin 0" "Segment,Common" textline " " line.byte 0x04 "LCD_EN,Port LCD enable register" bitfld.byte 0x04 7. " LCD_EN[7] ,Enable pin 7 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 6. " [6] ,Enable pin 6 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 5. " [5] ,Enable pin 5 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 4. " [4] ,Enable pin 4 for LCD mode" "Disabled,Enabled" textline " " bitfld.byte 0x04 3. " [3] ,Enable pin 3 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 2. " [2] ,Enable pin 2 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 1. " [1] ,Enable pin 1 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 0. " [0] ,Enable pin 0 for LCD mode" "Disabled,Enabled" textline " " group.byte (0x200+0x08*5)++0x01 line.byte 0x00 "OUT_SEL0,Digital System Interconnect Port 5 Pin Output Select Registers" bitfld.byte 0x00 7. " PORTOUTSEL[7] ,Available taps selection for I/O pin output 7" "0,1" bitfld.byte 0x00 6. " [6] ,Available taps selection for I/O pin output 6" "0,1" bitfld.byte 0x00 5. " [5] ,Available taps selection for I/O pin output 5" "0,1" bitfld.byte 0x00 4. " [4] ,Available taps selection for I/O pin output 4" "0,1" textline " " bitfld.byte 0x00 3. " [3] ,Available taps selection for I/O pin output 3" "0,1" bitfld.byte 0x00 2. " [2] ,Available taps selection for I/O pin output 2" "0,1" bitfld.byte 0x00 1. " [1] ,Available taps selection for I/O pin output 1" "0,1" bitfld.byte 0x00 0. " [0] ,Available taps selection for I/O pin output 0" "0,1" textline " " line.byte 0x01 "OUT_SEL1,Digital System Interconnect Port 5 Pin Output Select Registers" bitfld.byte 0x01 7. " PORTOUTSEL[7] ,Available taps selection for I/O pin output 7" "0,1" bitfld.byte 0x01 6. " [6] ,Available taps selection for I/O pin output 6" "0,1" bitfld.byte 0x01 5. " [5] ,Available taps selection for I/O pin output 5" "0,1" bitfld.byte 0x01 4. " [4] ,Available taps selection for I/O pin output 4" "0,1" textline " " bitfld.byte 0x01 3. " [3] ,Available taps selection for I/O pin output 3" "0,1" bitfld.byte 0x01 2. " [2] ,Available taps selection for I/O pin output 2" "0,1" bitfld.byte 0x01 1. " [1] ,Available taps selection for I/O pin output 1" "0,1" bitfld.byte 0x01 0. " [0] ,Available taps selection for I/O pin output 0" "0,1" textline " " group.byte (0x202+0x08*5)++0x03 line.byte 0x00 "OE_SEL0,Dynamic Drive Stength of Port 5 Output Enable Select registers" bitfld.byte 0x00 7. " PORTOESEL[7] ,Available taps selection for I/O pin 7" "0,1" bitfld.byte 0x00 6. " [6] ,Available taps selection for I/O pin 6" "0,1" textline " " bitfld.byte 0x00 5. " [5] ,Available taps selection for I/O pin 5" "0,1" bitfld.byte 0x00 4. " [4] ,Available taps selection for I/O pin 4" "0,1" textline " " bitfld.byte 0x00 3. " [3] ,Available taps selection for I/O pin 3" "0,1" bitfld.byte 0x00 2. " [2] ,Available taps selection for I/O pin 2" "0,1" textline " " bitfld.byte 0x00 1. " [1] ,Available taps selection for I/O pin 1" "0,1" bitfld.byte 0x00 0. " [0] ,Available taps selection for I/O pin 0" "0,1" line.byte 0x01 "OE_SEL1,Dynamic Drive Stength of Port Output Enable Select registers" bitfld.byte 0x01 7. " PORTOESEL[7] ,Available taps selection for I/O pin 7" "0,1" bitfld.byte 0x01 6. " [6] ,Available taps selection for I/O pin 6" "0,1" textline " " bitfld.byte 0x01 5. " [5] ,Available taps selection for I/O pin 5" "0,1" bitfld.byte 0x01 4. " [4] ,Available taps selection for I/O pin 4" "0,1" textline " " bitfld.byte 0x01 3. " [3] ,Available taps selection for I/O pin 3" "0,1" bitfld.byte 0x01 2. " [2] ,Available taps selection for I/O pin 2" "0,1" textline " " bitfld.byte 0x01 1. " [1] ,Available taps selection for I/O pin 1" "0,1" bitfld.byte 0x01 0. " [0] ,Available taps selection for I/O pin 0" "0,1" textline " " line.byte 0x02 "DBL_SYNC_IN,DSI double sync enable register" bitfld.byte 0x02 7. " DBL_SYNC_IN[7] ,Selects to synchronize the data in from the pad 7" "Not asserted,Asserted" bitfld.byte 0x02 6. " [6] ,Selects to synchronize the data in from the pad 6" "Not asserted,Asserted" textline " " bitfld.byte 0x02 5. " [5] ,Selects to synchronize the data in from the pad 5" "Not asserted,Asserted" bitfld.byte 0x02 4. " [4] ,Selects to synchronize the data in from the pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x02 3. " [3] ,Selects to synchronize the data in from the pad 3" "Not asserted,Asserted" bitfld.byte 0x02 2. " [2] ,Selects to synchronize the data in from the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x02 1. " [1] ,Selects to synchronize the data in from the pad 1" "Not asserted,Asserted" bitfld.byte 0x02 0. " [0] ,Selects to synchronize the data in from the pad 0" "Not asserted,Asserted" textline " " line.byte 0x03 "SYNC_OUT,DSI sync out enable register" bitfld.byte 0x03 7. " SYNC_OUT[7] ,Selects to synchronize data from DSI driving pad 7" "Not asserted,Asserted" bitfld.byte 0x03 6. " [6] ,Selects to synchronize data from DSI driving pad 6" "Not asserted,Asserted" textline " " bitfld.byte 0x03 5. " [5] ,Selects to synchronize data from DSI driving pad 5" "Not asserted,Asserted" bitfld.byte 0x03 4. " [4] ,Selects to synchronize data from DSI driving pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x03 3. " [3] ,Selects to synchronize data from DSI driving pad 3" "Not asserted,Asserted" bitfld.byte 0x03 2. " [2] ,Selects to synchronize data from DSI driving pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x03 1. " [1] ,Selects to synchronize data from DSI driving pad 1" "Not asserted,Asserted" bitfld.byte 0x03 0. " [0] ,Selects to synchronize data from DSI driving pad 0" "Not asserted,Asserted" group.byte (0x206+0x08*5)++0x00 line.byte 0x00 "CAPS_SEL,Global DSI select register" bitfld.byte 0x00 7. " CAPS_SEL[7] ,Selects global DSI to drive dig_glbl_ctl on the pad 7" "Not asserted,Asserted" bitfld.byte 0x00 6. " [6] ,Selects global DSI to drive dig_glbl_ctl on the pad 6" "Not asserted,Asserted" textline " " bitfld.byte 0x00 5. " [5] ,Selects global DSI to drive dig_glbl_ctl on the pad 5" "Not asserted,Asserted" bitfld.byte 0x00 4. " [4] ,Selects global DSI to drive dig_glbl_ctl on the pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x00 3. " [3] ,Selects global DSI to drive dig_glbl_ctl on the pad 3" "Not asserted,Asserted" bitfld.byte 0x00 2. " [2] ,Selects global DSI to drive dig_glbl_ctl on the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x00 1. " [1] ,Selects global DSI to drive dig_glbl_ctl on the pad 1" "Not asserted,Asserted" bitfld.byte 0x00 0. " [0] ,Selects global DSI to drive dig_glbl_ctl on the pad 0" "Not asserted,Asserted" width 0x0B tree.end tree "PRT 6" width 16. group.byte (0x08*6)++0x07 line.byte 0x0 "PC0,Port Pin Configuration Registers 0" bitfld.byte 0x0 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x0 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x0 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x0 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x0 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x0 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x0 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x0 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x1 "PC1,Port Pin Configuration Registers 1" bitfld.byte 0x1 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x1 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x1 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x1 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x1 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x1 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x1 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x1 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x2 "PC2,Port Pin Configuration Registers 2" bitfld.byte 0x2 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x2 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x2 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x2 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x2 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x2 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x2 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x2 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x3 "PC3,Port Pin Configuration Registers 3" bitfld.byte 0x3 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x3 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x3 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x3 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x3 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x3 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x3 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x3 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x4 "PC4,Port Pin Configuration Registers 4" bitfld.byte 0x4 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x4 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x4 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x4 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x4 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x4 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x4 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x4 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x5 "PC5,Port Pin Configuration Registers 5" bitfld.byte 0x5 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x5 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x5 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x5 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x5 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x5 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x5 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x5 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x6 "PC6,Port Pin Configuration Registers 6" bitfld.byte 0x6 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x6 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x6 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x6 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x6 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x6 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x6 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x6 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x7 "PC7,Port Pin Configuration Registers 7" bitfld.byte 0x7 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x7 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x7 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x7 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x7 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x7 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x7 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x7 0. " DATA_OUT ,Data out bit" "Low,High" textline " " group.byte (0x80+0x01*6)++0x00 line.byte 0x00 "DR_ALIAS,Aliased Port Data Output Register" bitfld.byte 0x00 7. " DATAREG_ALIAS[7] ,High/Low state for the GPIO pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,High/Low state for the GPIO pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,High/Low state for the GPIO pin 5" "Low,High" textline " " bitfld.byte 0x00 4. " [4] ,High/Low state for the GPIO pin 4" "Low,High" bitfld.byte 0x00 3. " [3] ,High/Low state for the GPIO pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,High/Low state for the GPIO pin 2" "Low,High" textline " " bitfld.byte 0x00 1. " [1] ,High/Low state for the GPIO pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,High/Low state for the GPIO pin 0" "Low,High" textline " " group.byte (0x90+0x01*6)++0x00 line.byte 0x00 "PS_ALIAS,Aliased Port Pin State Register" bitfld.byte 0x00 7. " PINSTATE_ALIAS[7] ,Logical state of the I/O pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,Logical state of the I/O pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,Logical state of the I/O pin 5" "Low,High" textline " " bitfld.byte 0x00 4. " [4] ,Logical state of the I/O pin 4" "Low,High" bitfld.byte 0x00 3. " [3] ,Logical state of the I/O pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,Logical state of the I/O pin 2" "Low,High" textline " " bitfld.byte 0x00 1. " [1] ,Logical state of the I/O pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,Logical state of the I/O pin 0" "Low,High" textline " " group.byte (0x100+0x10*6)++0x00 line.byte 0x00 "DR,Port Data Output Register" bitfld.byte 0x00 7. " DATAREG[7] ,State for the GPIO pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,State for the GPIO pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,State for the GPIO pin 5" "Low,High" bitfld.byte 0x00 4. " [4] ,State for the GPIO pin 4" "Low,High" textline " " bitfld.byte 0x00 3. " [3] ,State for the GPIO pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,State for the GPIO pin 2" "Low,High" bitfld.byte 0x00 1. " [1] ,State for the GPIO pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,State for the GPIO pin 0" "Low,High" textline " " rgroup.byte (0x101+0x10*6)++0x00 line.byte 0x00 "PS,Port Pin State Register 1" bitfld.byte 0x00 7. " PINSTATE[7] ,Logical state of the I/O pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,Logical state of the I/O pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,Logical state of the I/O pin 5" "Low,High" bitfld.byte 0x00 4. " [4] ,Logical state of the I/O pin 4" "Low,High" textline " " bitfld.byte 0x00 3. " [3] ,Logical state of the I/O pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,Logical state of the I/O pin 2" "Low,High" bitfld.byte 0x00 1. " [1] ,Logical state of the I/O pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,Logical state of the I/O pin 0" "Low,High" textline " " group.byte (0x102+0x10*6)++0x02 line.byte 0x0 "DM0,Port Drive Mode Register 0" bitfld.byte 0x0 7. " DRIVEMODE[7] ,DM register 0 assertion bit 7" "Low,High" bitfld.byte 0x0 6. " [6] ,DM register 0 assertion bit 6" "Low,High" bitfld.byte 0x0 5. " [5] ,DM register 0 assertion bit 5" "Low,High" bitfld.byte 0x0 4. " [4] ,DM register 0 assertion bit 4" "Low,High" textline " " bitfld.byte 0x0 3. " [3] ,DM register 0 assertion bit 3" "Low,High" bitfld.byte 0x0 2. " [2] ,DM register 0 assertion bit 2" "Low,High" bitfld.byte 0x0 1. " [1] ,DM register 0 assertion bit 1" "Low,High" bitfld.byte 0x0 0. " [0] ,DM register 0 assertion bit 0" "Low,High" line.byte 0x1 "DM1,Port Drive Mode Register 1" bitfld.byte 0x1 7. " DRIVEMODE[7] ,DM register 1 assertion bit 7" "Low,High" bitfld.byte 0x1 6. " [6] ,DM register 1 assertion bit 6" "Low,High" bitfld.byte 0x1 5. " [5] ,DM register 1 assertion bit 5" "Low,High" bitfld.byte 0x1 4. " [4] ,DM register 1 assertion bit 4" "Low,High" textline " " bitfld.byte 0x1 3. " [3] ,DM register 1 assertion bit 3" "Low,High" bitfld.byte 0x1 2. " [2] ,DM register 1 assertion bit 2" "Low,High" bitfld.byte 0x1 1. " [1] ,DM register 1 assertion bit 1" "Low,High" bitfld.byte 0x1 0. " [0] ,DM register 1 assertion bit 0" "Low,High" line.byte 0x2 "DM2,Port Drive Mode Register 2" bitfld.byte 0x2 7. " DRIVEMODE[7] ,DM register 2 assertion bit 7" "Low,High" bitfld.byte 0x2 6. " [6] ,DM register 2 assertion bit 6" "Low,High" bitfld.byte 0x2 5. " [5] ,DM register 2 assertion bit 5" "Low,High" bitfld.byte 0x2 4. " [4] ,DM register 2 assertion bit 4" "Low,High" textline " " bitfld.byte 0x2 3. " [3] ,DM register 2 assertion bit 3" "Low,High" bitfld.byte 0x2 2. " [2] ,DM register 2 assertion bit 2" "Low,High" bitfld.byte 0x2 1. " [1] ,DM register 2 assertion bit 1" "Low,High" bitfld.byte 0x2 0. " [0] ,DM register 2 assertion bit 0" "Low,High" textline " " group.byte (0x105+0x10*6)++0x04 line.byte 0x00 "SLW,Port slew rate control" bitfld.byte 0x00 7. " SLWCTL[7] ,Output edge rate of the port 6 pin 7" "Fast,Slow" bitfld.byte 0x00 6. " [6] ,Output edge rate of the port 6 pin 6" "Fast,Slow" bitfld.byte 0x00 5. " [5] ,Output edge rate of the port 6 pin 5" "Fast,Slow" bitfld.byte 0x00 4. " [4] ,Output edge rate of the port 6 pin 4" "Fast,Slow" textline " " bitfld.byte 0x00 3. " [3] ,Output edge rate of the port 6 pin 3" "Fast,Slow" bitfld.byte 0x00 2. " [2] ,Output edge rate of the port 6 pin 2" "Fast,Slow" bitfld.byte 0x00 1. " [1] ,Output edge rate of the port 6 pin 1" "Fast,Slow" bitfld.byte 0x00 0. " [0] ,Output edge rate of the port 6 pin 0" "Fast,Slow" textline " " line.byte 0x01 "BYP,Port Bypass enable" bitfld.byte 0x01 7. " BYPASS[7] ,DSI drives the corresponding port 6 pin 7" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 6. " [6] ,DSI drives the corresponding port 6 pin 6" "Port Logic Data Register,Digital System Interconnect" textline " " bitfld.byte 0x01 5. " [5] ,DSI drives the corresponding port 6 pin 5" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 4. " [4] ,DSI drives the corresponding port 6 pin 4" "Port Logic Data Register,Digital System Interconnect" textline " " bitfld.byte 0x01 3. " [3] ,DSI drives the corresponding port 6 pin 3" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 2. " [2] ,DSI drives the corresponding port 6 pin 2" "Port Logic Data Register,Digital System Interconnect" textline " " bitfld.byte 0x01 1. " [1] ,DSI drives the corresponding port 6 pin 1" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 0. " [0] ,DSI drives the corresponding port 6 pin 0" "Port Logic Data Register,Digital System Interconnect" textline " " line.byte 0x02 "BIE,Port Bydirection enable" bitfld.byte 0x02 7. " BIDIRECTEN[7] ,Bidirectional mode of the port 6 pin 7" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 6. " [6] ,Bidirectional mode of the port 6 pin 6" "Drive mode,Dynamic control DSI" textline " " bitfld.byte 0x02 5. " [5] ,Bidirectional mode of the port 6 pin 5" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 4. " [4] ,Bidirectional mode of the port 6 pin 4" "Drive mode,Dynamic control DSI" textline " " bitfld.byte 0x02 3. " [3] ,Bidirectional mode of the port 6 pin 3" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 2. " [2] ,Bidirectional mode of the port 6 pin 2" "Drive mode,Dynamic control DSI" textline " " bitfld.byte 0x02 1. " [1] ,Bidirectional mode of the port 6 pin 1" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 0. " [0] ,Bidirectional mode of the port 6 pin 0" "Drive mode,Dynamic control DSI" textline " " line.byte 0x03 "INP_DIS,Input buffer disable override" bitfld.byte 0x03 7. " INP_DIS[7] ,Input buffer disable 7" "No,Yes" bitfld.byte 0x03 6. " [6] ,Input buffer disable 6" "No,Yes" bitfld.byte 0x03 5. " [5] ,Input buffer disable 5" "No,Yes" bitfld.byte 0x03 4. " [4] ,Input buffer disable 4" "No,Yes" textline " " bitfld.byte 0x03 3. " [3] ,Input buffer disable 3" "No,Yes" bitfld.byte 0x03 2. " [2] ,Input buffer disable 2" "No,Yes" bitfld.byte 0x03 1. " [1] ,Input buffer disable 1" "No,Yes" bitfld.byte 0x03 0. " [0] ,Input buffer disable 0" "No,Yes" textline " " line.byte 0x04 "CTL,Port wide control signals" bitfld.byte 0x04 1.--3. " portEmifCfg ,GPIO emif selection option" "NOT_EMIF,LSB_ADDR,UPR_ADDR,MSB_ADDR,Reserved,LSB_DATA,MSB_DATA,?..." bitfld.byte 0x04 0. " VTRIP_SEL ,CMOS/LVTTL input buffer" "CMOS,LVTTL" wgroup.byte (0x10a+0x10*6)++0x00 line.byte 0x00 "PRT,Port wide configuration register" bitfld.byte 0x00 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x00 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x00 5. " BIDIRECTEN ,BiDir Enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " DRIVEMODE2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x00 2. " DRIVEMODE1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x00 1. " DRIVEMODE0 ,Drive mode 0" "Disabled,Enabled" textline " " group.byte (0x10b+0x10*6)++0x04 line.byte 0x00 "BIT_MASK,Bit-mask for Aliased Register access" bitfld.byte 0x00 7. " BIT_MASK[7] ,Allow access to data register and pin state 7" "Not allowed,Allowed" bitfld.byte 0x00 6. " [6] ,Allow access to data register and pin state 6" "Not allowed,Allowed" bitfld.byte 0x00 5. " [5] ,Allow access to data register and pin state 5" "Not allowed,Allowed" textline " " bitfld.byte 0x00 4. " [4] ,Allow access to data register and pin state 4" "Not allowed,Allowed" bitfld.byte 0x00 3. " [3] ,Allow access to data register and pin state 3" "Not allowed,Allowed" bitfld.byte 0x00 2. " [2] ,Allow access to data register and pin state 2" "Not allowed,Allowed" textline " " bitfld.byte 0x00 1. " [1] ,Allow access to data register and pin state 1" "Not allowed,Allowed" bitfld.byte 0x00 0. " [0] ,Allow access to data register and pin state 0" "Not allowed,Allowed" textline " " line.byte 0x01 "AMUX,Port Analog global mux bus enable" bitfld.byte 0x01 7. " AMUX[7] ,Connects analog mux bus to the pad 7" "Not asserted,Asserted" bitfld.byte 0x01 6. " [6] ,Connects analog mux bus to the pad 6" "Not asserted,Asserted" bitfld.byte 0x01 5. " [5] ,Connects analog mux bus to the pad 5" "Not asserted,Asserted" textline " " bitfld.byte 0x01 4. " [4] ,Connects analog mux bus to the pad 4" "Not asserted,Asserted" bitfld.byte 0x01 3. " [3] ,Connects analog mux bus to the pad 3" "Not asserted,Asserted" bitfld.byte 0x01 2. " [2] ,Connects analog mux bus to the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x01 1. " [1] ,Connects analog mux bus to the pad 1" "Not asserted,Asserted" bitfld.byte 0x01 0. " [0] ,Connects analog mux bus to the pad 0" "Not asserted,Asserted" textline " " line.byte 0x02 "AG,Port Analog global enable" bitfld.byte 0x02 7. " ANALOGGLOBAL[7] ,Connects analog global to the pad 7" "Not asserted,Asserted" bitfld.byte 0x02 6. " [6] ,Connects analog global to the pad 6" "Not asserted,Asserted" textline " " bitfld.byte 0x02 5. " [5] ,Connects analog global to the pad 5" "Not asserted,Asserted" bitfld.byte 0x02 4. " [4] ,Connects analog global to the pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x02 3. " [3] ,Connects analog global to the pad 3" "Not asserted,Asserted" bitfld.byte 0x02 2. " [2] ,Connects analog global to the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x02 1. " [1] ,Connects analog global to the pad 1" "Not asserted,Asserted" bitfld.byte 0x02 0. " [0] ,Connects analog global to the pad 0" "Not asserted,Asserted" textline " " line.byte 0x03 "LCD_COM_SEG,Port LCD Com seg bits" bitfld.byte 0x03 7. " COM_SEG[7] ,Common or segment mode for pin 7" "Segment,Common" bitfld.byte 0x03 6. " [6] ,Common or segment mode for pin 6" "Segment,Common" bitfld.byte 0x03 5. " [5] ,Common or segment mode for pin 5" "Segment,Common" bitfld.byte 0x03 4. " [4] ,Common or segment mode for pin 4" "Segment,Common" textline " " bitfld.byte 0x03 3. " [3] ,Common or segment mode for pin 3" "Segment,Common" bitfld.byte 0x03 2. " [2] ,Common or segment mode for pin 2" "Segment,Common" bitfld.byte 0x03 1. " [1] ,Common or segment mode for pin 1" "Segment,Common" bitfld.byte 0x03 0. " [0] ,Common or segment mode for pin 0" "Segment,Common" textline " " line.byte 0x04 "LCD_EN,Port LCD enable register" bitfld.byte 0x04 7. " LCD_EN[7] ,Enable pin 7 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 6. " [6] ,Enable pin 6 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 5. " [5] ,Enable pin 5 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 4. " [4] ,Enable pin 4 for LCD mode" "Disabled,Enabled" textline " " bitfld.byte 0x04 3. " [3] ,Enable pin 3 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 2. " [2] ,Enable pin 2 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 1. " [1] ,Enable pin 1 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 0. " [0] ,Enable pin 0 for LCD mode" "Disabled,Enabled" textline " " group.byte (0x200+0x08*6)++0x01 line.byte 0x00 "OUT_SEL0,Digital System Interconnect Port 6 Pin Output Select Registers" bitfld.byte 0x00 7. " PORTOUTSEL[7] ,Available taps selection for I/O pin output 7" "0,1" bitfld.byte 0x00 6. " [6] ,Available taps selection for I/O pin output 6" "0,1" bitfld.byte 0x00 5. " [5] ,Available taps selection for I/O pin output 5" "0,1" bitfld.byte 0x00 4. " [4] ,Available taps selection for I/O pin output 4" "0,1" textline " " bitfld.byte 0x00 3. " [3] ,Available taps selection for I/O pin output 3" "0,1" bitfld.byte 0x00 2. " [2] ,Available taps selection for I/O pin output 2" "0,1" bitfld.byte 0x00 1. " [1] ,Available taps selection for I/O pin output 1" "0,1" bitfld.byte 0x00 0. " [0] ,Available taps selection for I/O pin output 0" "0,1" textline " " line.byte 0x01 "OUT_SEL1,Digital System Interconnect Port 6 Pin Output Select Registers" bitfld.byte 0x01 7. " PORTOUTSEL[7] ,Available taps selection for I/O pin output 7" "0,1" bitfld.byte 0x01 6. " [6] ,Available taps selection for I/O pin output 6" "0,1" bitfld.byte 0x01 5. " [5] ,Available taps selection for I/O pin output 5" "0,1" bitfld.byte 0x01 4. " [4] ,Available taps selection for I/O pin output 4" "0,1" textline " " bitfld.byte 0x01 3. " [3] ,Available taps selection for I/O pin output 3" "0,1" bitfld.byte 0x01 2. " [2] ,Available taps selection for I/O pin output 2" "0,1" bitfld.byte 0x01 1. " [1] ,Available taps selection for I/O pin output 1" "0,1" bitfld.byte 0x01 0. " [0] ,Available taps selection for I/O pin output 0" "0,1" textline " " group.byte (0x202+0x08*6)++0x03 line.byte 0x00 "OE_SEL0,Dynamic Drive Stength of Port 6 Output Enable Select registers" bitfld.byte 0x00 7. " PORTOESEL[7] ,Available taps selection for I/O pin 7" "0,1" bitfld.byte 0x00 6. " [6] ,Available taps selection for I/O pin 6" "0,1" textline " " bitfld.byte 0x00 5. " [5] ,Available taps selection for I/O pin 5" "0,1" bitfld.byte 0x00 4. " [4] ,Available taps selection for I/O pin 4" "0,1" textline " " bitfld.byte 0x00 3. " [3] ,Available taps selection for I/O pin 3" "0,1" bitfld.byte 0x00 2. " [2] ,Available taps selection for I/O pin 2" "0,1" textline " " bitfld.byte 0x00 1. " [1] ,Available taps selection for I/O pin 1" "0,1" bitfld.byte 0x00 0. " [0] ,Available taps selection for I/O pin 0" "0,1" line.byte 0x01 "OE_SEL1,Dynamic Drive Stength of Port Output Enable Select registers" bitfld.byte 0x01 7. " PORTOESEL[7] ,Available taps selection for I/O pin 7" "0,1" bitfld.byte 0x01 6. " [6] ,Available taps selection for I/O pin 6" "0,1" textline " " bitfld.byte 0x01 5. " [5] ,Available taps selection for I/O pin 5" "0,1" bitfld.byte 0x01 4. " [4] ,Available taps selection for I/O pin 4" "0,1" textline " " bitfld.byte 0x01 3. " [3] ,Available taps selection for I/O pin 3" "0,1" bitfld.byte 0x01 2. " [2] ,Available taps selection for I/O pin 2" "0,1" textline " " bitfld.byte 0x01 1. " [1] ,Available taps selection for I/O pin 1" "0,1" bitfld.byte 0x01 0. " [0] ,Available taps selection for I/O pin 0" "0,1" textline " " line.byte 0x02 "DBL_SYNC_IN,DSI double sync enable register" bitfld.byte 0x02 7. " DBL_SYNC_IN[7] ,Selects to synchronize the data in from the pad 7" "Not asserted,Asserted" bitfld.byte 0x02 6. " [6] ,Selects to synchronize the data in from the pad 6" "Not asserted,Asserted" textline " " bitfld.byte 0x02 5. " [5] ,Selects to synchronize the data in from the pad 5" "Not asserted,Asserted" bitfld.byte 0x02 4. " [4] ,Selects to synchronize the data in from the pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x02 3. " [3] ,Selects to synchronize the data in from the pad 3" "Not asserted,Asserted" bitfld.byte 0x02 2. " [2] ,Selects to synchronize the data in from the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x02 1. " [1] ,Selects to synchronize the data in from the pad 1" "Not asserted,Asserted" bitfld.byte 0x02 0. " [0] ,Selects to synchronize the data in from the pad 0" "Not asserted,Asserted" textline " " line.byte 0x03 "SYNC_OUT,DSI sync out enable register" bitfld.byte 0x03 7. " SYNC_OUT[7] ,Selects to synchronize data from DSI driving pad 7" "Not asserted,Asserted" bitfld.byte 0x03 6. " [6] ,Selects to synchronize data from DSI driving pad 6" "Not asserted,Asserted" textline " " bitfld.byte 0x03 5. " [5] ,Selects to synchronize data from DSI driving pad 5" "Not asserted,Asserted" bitfld.byte 0x03 4. " [4] ,Selects to synchronize data from DSI driving pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x03 3. " [3] ,Selects to synchronize data from DSI driving pad 3" "Not asserted,Asserted" bitfld.byte 0x03 2. " [2] ,Selects to synchronize data from DSI driving pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x03 1. " [1] ,Selects to synchronize data from DSI driving pad 1" "Not asserted,Asserted" bitfld.byte 0x03 0. " [0] ,Selects to synchronize data from DSI driving pad 0" "Not asserted,Asserted" group.byte (0x206+0x08*6)++0x00 line.byte 0x00 "CAPS_SEL,Global DSI select register" bitfld.byte 0x00 7. " CAPS_SEL[7] ,Selects global DSI to drive dig_glbl_ctl on the pad 7" "Not asserted,Asserted" bitfld.byte 0x00 6. " [6] ,Selects global DSI to drive dig_glbl_ctl on the pad 6" "Not asserted,Asserted" textline " " bitfld.byte 0x00 5. " [5] ,Selects global DSI to drive dig_glbl_ctl on the pad 5" "Not asserted,Asserted" bitfld.byte 0x00 4. " [4] ,Selects global DSI to drive dig_glbl_ctl on the pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x00 3. " [3] ,Selects global DSI to drive dig_glbl_ctl on the pad 3" "Not asserted,Asserted" bitfld.byte 0x00 2. " [2] ,Selects global DSI to drive dig_glbl_ctl on the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x00 1. " [1] ,Selects global DSI to drive dig_glbl_ctl on the pad 1" "Not asserted,Asserted" bitfld.byte 0x00 0. " [0] ,Selects global DSI to drive dig_glbl_ctl on the pad 0" "Not asserted,Asserted" width 0x0B tree.end tree "PRT 12" width 16. group.byte (0x08*12.)++0x07 line.byte 0x0 "PC0,Port Pin Configuration Registers 0" bitfld.byte 0x0 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x0 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x0 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x0 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x0 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x0 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x0 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x0 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x1 "PC1,Port Pin Configuration Registers 1" bitfld.byte 0x1 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x1 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x1 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x1 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x1 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x1 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x1 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x1 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x2 "PC2,Port Pin Configuration Registers 2" bitfld.byte 0x2 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x2 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x2 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x2 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x2 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x2 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x2 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x2 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x3 "PC3,Port Pin Configuration Registers 3" bitfld.byte 0x3 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x3 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x3 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x3 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x3 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x3 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x3 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x3 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x4 "PC4,Port Pin Configuration Registers 4" bitfld.byte 0x4 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x4 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x4 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x4 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x4 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x4 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x4 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x4 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x5 "PC5,Port Pin Configuration Registers 5" bitfld.byte 0x5 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x5 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x5 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x5 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x5 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x5 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x5 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x5 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x6 "PC6,Port Pin Configuration Registers 6" bitfld.byte 0x6 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x6 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x6 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x6 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x6 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x6 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x6 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x6 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x7 "PC7,Port Pin Configuration Registers 7" bitfld.byte 0x7 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x7 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x7 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x7 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x7 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x7 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x7 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x7 0. " DATA_OUT ,Data out bit" "Low,High" textline " " group.byte (0x80+0x01*12.)++0x00 line.byte 0x00 "DR_ALIAS,Aliased Port Data Output Register" bitfld.byte 0x00 7. " DATAREG_ALIAS[7] ,High/Low state for the GPIO pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,High/Low state for the GPIO pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,High/Low state for the GPIO pin 5" "Low,High" textline " " bitfld.byte 0x00 4. " [4] ,High/Low state for the GPIO pin 4" "Low,High" bitfld.byte 0x00 3. " [3] ,High/Low state for the GPIO pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,High/Low state for the GPIO pin 2" "Low,High" textline " " bitfld.byte 0x00 1. " [1] ,High/Low state for the GPIO pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,High/Low state for the GPIO pin 0" "Low,High" textline " " group.byte (0x90+0x01*12.)++0x00 line.byte 0x00 "PS_ALIAS,Aliased Port Pin State Register" bitfld.byte 0x00 7. " PINSTATE_ALIAS[7] ,Logical state of the I/O pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,Logical state of the I/O pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,Logical state of the I/O pin 5" "Low,High" textline " " bitfld.byte 0x00 4. " [4] ,Logical state of the I/O pin 4" "Low,High" bitfld.byte 0x00 3. " [3] ,Logical state of the I/O pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,Logical state of the I/O pin 2" "Low,High" textline " " bitfld.byte 0x00 1. " [1] ,Logical state of the I/O pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,Logical state of the I/O pin 0" "Low,High" textline " " group.byte (0x100+0x10*12.)++0x00 line.byte 0x00 "DR,Port Data Output Register" bitfld.byte 0x00 7. " DATAREG[7] ,State for the GPIO pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,State for the GPIO pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,State for the GPIO pin 5" "Low,High" bitfld.byte 0x00 4. " [4] ,State for the GPIO pin 4" "Low,High" textline " " bitfld.byte 0x00 3. " [3] ,State for the GPIO pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,State for the GPIO pin 2" "Low,High" bitfld.byte 0x00 1. " [1] ,State for the GPIO pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,State for the GPIO pin 0" "Low,High" textline " " rgroup.byte (0x101+0x10*12.)++0x00 line.byte 0x00 "PS,Port Pin State Register 1" bitfld.byte 0x00 7. " PINSTATE[7] ,Logical state of the I/O pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,Logical state of the I/O pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,Logical state of the I/O pin 5" "Low,High" bitfld.byte 0x00 4. " [4] ,Logical state of the I/O pin 4" "Low,High" textline " " bitfld.byte 0x00 3. " [3] ,Logical state of the I/O pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,Logical state of the I/O pin 2" "Low,High" bitfld.byte 0x00 1. " [1] ,Logical state of the I/O pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,Logical state of the I/O pin 0" "Low,High" textline " " group.byte (0x102+0x10*12.)++0x02 line.byte 0x0 "DM0,Port Drive Mode Register 0" bitfld.byte 0x0 7. " DRIVEMODE[7] ,DM register 0 assertion bit 7" "Low,High" bitfld.byte 0x0 6. " [6] ,DM register 0 assertion bit 6" "Low,High" bitfld.byte 0x0 5. " [5] ,DM register 0 assertion bit 5" "Low,High" bitfld.byte 0x0 4. " [4] ,DM register 0 assertion bit 4" "Low,High" textline " " bitfld.byte 0x0 3. " [3] ,DM register 0 assertion bit 3" "Low,High" bitfld.byte 0x0 2. " [2] ,DM register 0 assertion bit 2" "Low,High" bitfld.byte 0x0 1. " [1] ,DM register 0 assertion bit 1" "Low,High" bitfld.byte 0x0 0. " [0] ,DM register 0 assertion bit 0" "Low,High" line.byte 0x1 "DM1,Port Drive Mode Register 1" bitfld.byte 0x1 7. " DRIVEMODE[7] ,DM register 1 assertion bit 7" "Low,High" bitfld.byte 0x1 6. " [6] ,DM register 1 assertion bit 6" "Low,High" bitfld.byte 0x1 5. " [5] ,DM register 1 assertion bit 5" "Low,High" bitfld.byte 0x1 4. " [4] ,DM register 1 assertion bit 4" "Low,High" textline " " bitfld.byte 0x1 3. " [3] ,DM register 1 assertion bit 3" "Low,High" bitfld.byte 0x1 2. " [2] ,DM register 1 assertion bit 2" "Low,High" bitfld.byte 0x1 1. " [1] ,DM register 1 assertion bit 1" "Low,High" bitfld.byte 0x1 0. " [0] ,DM register 1 assertion bit 0" "Low,High" line.byte 0x2 "DM2,Port Drive Mode Register 2" bitfld.byte 0x2 7. " DRIVEMODE[7] ,DM register 2 assertion bit 7" "Low,High" bitfld.byte 0x2 6. " [6] ,DM register 2 assertion bit 6" "Low,High" bitfld.byte 0x2 5. " [5] ,DM register 2 assertion bit 5" "Low,High" bitfld.byte 0x2 4. " [4] ,DM register 2 assertion bit 4" "Low,High" textline " " bitfld.byte 0x2 3. " [3] ,DM register 2 assertion bit 3" "Low,High" bitfld.byte 0x2 2. " [2] ,DM register 2 assertion bit 2" "Low,High" bitfld.byte 0x2 1. " [1] ,DM register 2 assertion bit 1" "Low,High" bitfld.byte 0x2 0. " [0] ,DM register 2 assertion bit 0" "Low,High" textline " " group.byte (0x105+0x10*12.)++0x03 line.byte 0x00 "SLW,Port slew rate control" bitfld.byte 0x00 7. " SLWCTL[7] ,Output edge rate of the port 12. pin 7" "Fast,Slow" bitfld.byte 0x00 6. " [6] ,Output edge rate of the port 12. pin 6" "Fast,Slow" bitfld.byte 0x00 5. " [5] ,Output edge rate of the port 12. pin 5" "Fast,Slow" bitfld.byte 0x00 4. " [4] ,Output edge rate of the port 12. pin 4" "Fast,Slow" textline " " bitfld.byte 0x00 3. " [3] ,Output edge rate of the port 12. pin 3" "Fast,Slow" bitfld.byte 0x00 2. " [2] ,Output edge rate of the port 12. pin 2" "Fast,Slow" bitfld.byte 0x00 1. " [1] ,Output edge rate of the port 12. pin 1" "Fast,Slow" bitfld.byte 0x00 0. " [0] ,Output edge rate of the port 12. pin 0" "Fast,Slow" textline " " line.byte 0x01 "BYP,Port Bypass enable" bitfld.byte 0x01 7. " BYPASS[7] ,DSI drives the corresponding port 12. pin 7" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 6. " [6] ,DSI drives the corresponding port 12. pin 6" "Port Logic Data Register,Digital System Interconnect" textline " " bitfld.byte 0x01 5. " [5] ,DSI drives the corresponding port 12. pin 5" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 4. " [4] ,DSI drives the corresponding port 12. pin 4" "Port Logic Data Register,Digital System Interconnect" textline " " bitfld.byte 0x01 3. " [3] ,DSI drives the corresponding port 12. pin 3" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 2. " [2] ,DSI drives the corresponding port 12. pin 2" "Port Logic Data Register,Digital System Interconnect" textline " " bitfld.byte 0x01 1. " [1] ,DSI drives the corresponding port 12. pin 1" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 0. " [0] ,DSI drives the corresponding port 12. pin 0" "Port Logic Data Register,Digital System Interconnect" textline " " line.byte 0x02 "BIE,Port Bydirection enable" bitfld.byte 0x02 7. " BIDIRECTEN[7] ,Bidirectional mode of the port 12. pin 7" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 6. " [6] ,Bidirectional mode of the port 12. pin 6" "Drive mode,Dynamic control DSI" textline " " bitfld.byte 0x02 5. " [5] ,Bidirectional mode of the port 12. pin 5" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 4. " [4] ,Bidirectional mode of the port 12. pin 4" "Drive mode,Dynamic control DSI" textline " " bitfld.byte 0x02 3. " [3] ,Bidirectional mode of the port 12. pin 3" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 2. " [2] ,Bidirectional mode of the port 12. pin 2" "Drive mode,Dynamic control DSI" textline " " bitfld.byte 0x02 1. " [1] ,Bidirectional mode of the port 12. pin 1" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 0. " [0] ,Bidirectional mode of the port 12. pin 0" "Drive mode,Dynamic control DSI" textline " " line.byte 0x03 "INP_DIS,Input buffer disable override" bitfld.byte 0x03 7. " INP_DIS[7] ,Input buffer disable 7" "No,Yes" bitfld.byte 0x03 6. " [6] ,Input buffer disable 6" "No,Yes" bitfld.byte 0x03 5. " [5] ,Input buffer disable 5" "No,Yes" bitfld.byte 0x03 4. " [4] ,Input buffer disable 4" "No,Yes" textline " " bitfld.byte 0x03 3. " [3] ,Input buffer disable 3" "No,Yes" bitfld.byte 0x03 2. " [2] ,Input buffer disable 2" "No,Yes" bitfld.byte 0x03 1. " [1] ,Input buffer disable 1" "No,Yes" bitfld.byte 0x03 0. " [0] ,Input buffer disable 0" "No,Yes" textline " " group.byte (0x109+0x10*12.)++0x00 line.byte 0x00 "SIO_HYST_EN,SIO Hysteresis enable" bitfld.byte 0x00 7. " SIO_DIFF_HYST_EN[7] ,SIO hysteresis enable for the SIO differential input buffer 7" "Disabled,Enabled" bitfld.byte 0x00 6. " [6] ,SIO hysteresis enable for the SIO differential input buffer 6" "Disabled,Enabled" textline " " bitfld.byte 0x00 5. " [5] ,SIO hysteresis enable for the SIO differential input buffer 5" "Disabled,Enabled" bitfld.byte 0x00 4. " [4] ,SIO hysteresis enable for the SIO differential input buffer 4" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " [3] ,SIO hysteresis enable for the SIO differential input buffer 3" "Disabled,Enabled" bitfld.byte 0x00 2. " [2] ,SIO hysteresis enable for the SIO differential input buffer 2" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " [1] ,SIO hysteresis enable for the SIO differential input buffer 1" "Disabled,Enabled" bitfld.byte 0x00 0. " [0] ,SIO hysteresis enable for the SIO differential input buffer 0" "Disabled,Enabled" textline " " wgroup.byte (0x10a+0x10*12.)++0x00 line.byte 0x00 "PRT,Port wide configuration register" bitfld.byte 0x00 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x00 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x00 5. " BIDIRECTEN ,BiDir Enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " DRIVEMODE2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x00 2. " DRIVEMODE1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x00 1. " DRIVEMODE0 ,Drive mode 0" "Disabled,Enabled" textline " " group.byte (0x10b+0x10*12.)++0x04 line.byte 0x00 "BIT_MASK,Bit-mask for Aliased Register access" bitfld.byte 0x00 7. " BIT_MASK[7] ,Allow access to data register and pin state 7" "Not allowed,Allowed" bitfld.byte 0x00 6. " [6] ,Allow access to data register and pin state 6" "Not allowed,Allowed" bitfld.byte 0x00 5. " [5] ,Allow access to data register and pin state 5" "Not allowed,Allowed" textline " " bitfld.byte 0x00 4. " [4] ,Allow access to data register and pin state 4" "Not allowed,Allowed" bitfld.byte 0x00 3. " [3] ,Allow access to data register and pin state 3" "Not allowed,Allowed" bitfld.byte 0x00 2. " [2] ,Allow access to data register and pin state 2" "Not allowed,Allowed" textline " " bitfld.byte 0x00 1. " [1] ,Allow access to data register and pin state 1" "Not allowed,Allowed" bitfld.byte 0x00 0. " [0] ,Allow access to data register and pin state 0" "Not allowed,Allowed" textline " " line.byte 0x01 "SIO_REG_HIFREQ,Regulated pull-up driver DC current setting" bitfld.byte 0x01 7. " SIO_REG_HIFREQ_7_6 ,pull-up driver DC current" "Low,High" bitfld.byte 0x01 5. " SIO_REG_HIFREQ_5_4 ,pull-up driver DC current" "Low,High" textline " " bitfld.byte 0x01 3. " SIO_REG_HIFREQ_3_2 ,pull-up driver DC current" "Low,High" bitfld.byte 0x01 1. " SIO_REG_HIFREQ_1_0 ,pull-up driver DC current" "Low,High" textline " " line.byte 0x02 "AG,Port Analog global enable" bitfld.byte 0x02 6.--7. " ANALOGGLOBAL_7_6 ,Connects analog global when asserted" "No AG,Low AG,High AG,VCCD" bitfld.byte 0x02 4.--5. " ANALOGGLOBAL_5_4 ,Connects analog global when asserted" "No AG,Low AG,High AG,VCCD" textline " " bitfld.byte 0x02 2.--3. " ANALOGGLOBAL_3_2 ,Connects analog global when asserted" "No AG,Low AG,High AG,VCCD" bitfld.byte 0x02 0.--1. " ANALOGGLOBAL_1_0 ,Connects analog global when asserted" "No AG,Low AG,High AG,VCCD" textline " " line.byte 0x03 "SIO_CFG,SIO Input Output Configuration" bitfld.byte 0x03 6.--7. " IBUF_SEL/VREG_EN_7_6 ,Input output Configuration pair 7_6 (input/output)" "Single Ended/Nonregulated,Single Ended/Regulated,Differential/Non-regulated,Differential/Regulated" textline " " bitfld.byte 0x03 4.--5. " IBUF_SEL/VREG_EN_5_4 ,Input output Configuration pair 5_4 (input/output)" "Single Ended/Nonregulated,Single Ended/Regulated,Differential/Non-regulated,Differential/Regulated" textline " " bitfld.byte 0x03 2.--3. " IBUF_SEL/VREG_EN_3_2 ,Input output Configuration pair 3_2 (input/output)" "Single Ended/Nonregulated,Single Ended/Regulated,Differential/Non-regulated,Differential/Regulated" textline " " bitfld.byte 0x03 0.--1. " IBUF_SEL/VREG_EN_1_0 ,Input output Configuration pair 1_0 (input/output)" "Single Ended/Nonregulated,Single Ended/Regulated,Differential/Non-regulated,Differential/Regulated" line.byte 0x04 "SIO_DIFF,Differential Input Buffer reference voltage selection" bitfld.byte 0x04 6.--7. " VREF_SEL/VTRIP_SEL_7_6 ,Input reference voltage pair 7_6" "0.5*vcc_io,0.4*vcc_io,0.5*vohref,vohref" textline " " bitfld.byte 0x04 4.--5. " VREF_SEL/VTRIP_SEL_5_4 ,Input reference voltage pair 5_4" "0.5*vcc_io,0.4*vcc_io,0.5*vohref,vohref" textline " " bitfld.byte 0x04 2.--3. " VREF_SEL/VTRIP_SEL_3_2 ,Input reference voltage pair 3_2" "0.5*vcc_io,0.4*vcc_io,0.5*vohref,vohref" textline " " bitfld.byte 0x04 0.--1. " VREF_SEL/VTRIP_SEL_1_0 ,Input reference voltage pair 1_0" "0.5*vcc_io,0.4*vcc_io,0.5*vohref,vohref" textline " " group.byte (0x200+0x08*12.)++0x01 line.byte 0x00 "OUT_SEL0,Digital System Interconnect Port 12. Pin Output Select Registers" bitfld.byte 0x00 7. " PORTOUTSEL[7] ,Available taps selection for I/O pin output 7" "0,1" bitfld.byte 0x00 6. " [6] ,Available taps selection for I/O pin output 6" "0,1" bitfld.byte 0x00 5. " [5] ,Available taps selection for I/O pin output 5" "0,1" bitfld.byte 0x00 4. " [4] ,Available taps selection for I/O pin output 4" "0,1" textline " " bitfld.byte 0x00 3. " [3] ,Available taps selection for I/O pin output 3" "0,1" bitfld.byte 0x00 2. " [2] ,Available taps selection for I/O pin output 2" "0,1" bitfld.byte 0x00 1. " [1] ,Available taps selection for I/O pin output 1" "0,1" bitfld.byte 0x00 0. " [0] ,Available taps selection for I/O pin output 0" "0,1" textline " " line.byte 0x01 "OUT_SEL1,Digital System Interconnect Port 12. Pin Output Select Registers" bitfld.byte 0x01 7. " PORTOUTSEL[7] ,Available taps selection for I/O pin output 7" "0,1" bitfld.byte 0x01 6. " [6] ,Available taps selection for I/O pin output 6" "0,1" bitfld.byte 0x01 5. " [5] ,Available taps selection for I/O pin output 5" "0,1" bitfld.byte 0x01 4. " [4] ,Available taps selection for I/O pin output 4" "0,1" textline " " bitfld.byte 0x01 3. " [3] ,Available taps selection for I/O pin output 3" "0,1" bitfld.byte 0x01 2. " [2] ,Available taps selection for I/O pin output 2" "0,1" bitfld.byte 0x01 1. " [1] ,Available taps selection for I/O pin output 1" "0,1" bitfld.byte 0x01 0. " [0] ,Available taps selection for I/O pin output 0" "0,1" textline " " group.byte (0x202+0x08*12.)++0x03 line.byte 0x00 "OE_SEL0,Dynamic Drive Stength of Port 12. Output Enable Select registers" bitfld.byte 0x00 7. " PORTOESEL[7] ,Available taps selection for I/O pin 7" "0,1" bitfld.byte 0x00 6. " [6] ,Available taps selection for I/O pin 6" "0,1" textline " " bitfld.byte 0x00 5. " [5] ,Available taps selection for I/O pin 5" "0,1" bitfld.byte 0x00 4. " [4] ,Available taps selection for I/O pin 4" "0,1" textline " " bitfld.byte 0x00 3. " [3] ,Available taps selection for I/O pin 3" "0,1" bitfld.byte 0x00 2. " [2] ,Available taps selection for I/O pin 2" "0,1" textline " " bitfld.byte 0x00 1. " [1] ,Available taps selection for I/O pin 1" "0,1" bitfld.byte 0x00 0. " [0] ,Available taps selection for I/O pin 0" "0,1" line.byte 0x01 "OE_SEL1,Dynamic Drive Stength of Port Output Enable Select registers" bitfld.byte 0x01 7. " PORTOESEL[7] ,Available taps selection for I/O pin 7" "0,1" bitfld.byte 0x01 6. " [6] ,Available taps selection for I/O pin 6" "0,1" textline " " bitfld.byte 0x01 5. " [5] ,Available taps selection for I/O pin 5" "0,1" bitfld.byte 0x01 4. " [4] ,Available taps selection for I/O pin 4" "0,1" textline " " bitfld.byte 0x01 3. " [3] ,Available taps selection for I/O pin 3" "0,1" bitfld.byte 0x01 2. " [2] ,Available taps selection for I/O pin 2" "0,1" textline " " bitfld.byte 0x01 1. " [1] ,Available taps selection for I/O pin 1" "0,1" bitfld.byte 0x01 0. " [0] ,Available taps selection for I/O pin 0" "0,1" textline " " line.byte 0x02 "DBL_SYNC_IN,DSI double sync enable register" bitfld.byte 0x02 7. " DBL_SYNC_IN[7] ,Selects to synchronize the data in from the pad 7" "Not asserted,Asserted" bitfld.byte 0x02 6. " [6] ,Selects to synchronize the data in from the pad 6" "Not asserted,Asserted" textline " " bitfld.byte 0x02 5. " [5] ,Selects to synchronize the data in from the pad 5" "Not asserted,Asserted" bitfld.byte 0x02 4. " [4] ,Selects to synchronize the data in from the pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x02 3. " [3] ,Selects to synchronize the data in from the pad 3" "Not asserted,Asserted" bitfld.byte 0x02 2. " [2] ,Selects to synchronize the data in from the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x02 1. " [1] ,Selects to synchronize the data in from the pad 1" "Not asserted,Asserted" bitfld.byte 0x02 0. " [0] ,Selects to synchronize the data in from the pad 0" "Not asserted,Asserted" textline " " line.byte 0x03 "SYNC_OUT,DSI sync out enable register" bitfld.byte 0x03 7. " SYNC_OUT[7] ,Selects to synchronize data from DSI driving pad 7" "Not asserted,Asserted" bitfld.byte 0x03 6. " [6] ,Selects to synchronize data from DSI driving pad 6" "Not asserted,Asserted" textline " " bitfld.byte 0x03 5. " [5] ,Selects to synchronize data from DSI driving pad 5" "Not asserted,Asserted" bitfld.byte 0x03 4. " [4] ,Selects to synchronize data from DSI driving pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x03 3. " [3] ,Selects to synchronize data from DSI driving pad 3" "Not asserted,Asserted" bitfld.byte 0x03 2. " [2] ,Selects to synchronize data from DSI driving pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x03 1. " [1] ,Selects to synchronize data from DSI driving pad 1" "Not asserted,Asserted" bitfld.byte 0x03 0. " [0] ,Selects to synchronize data from DSI driving pad 0" "Not asserted,Asserted" width 0x0B tree.end tree "PRT 15" width 16. group.byte (0x08*15.)++0x07 line.byte 0x0 "PC0,Port Pin Configuration Registers 0" bitfld.byte 0x0 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x0 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x0 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x0 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x0 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x0 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x0 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x0 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x1 "PC1,Port Pin Configuration Registers 1" bitfld.byte 0x1 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x1 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x1 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x1 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x1 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x1 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x1 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x1 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x2 "PC2,Port Pin Configuration Registers 2" bitfld.byte 0x2 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x2 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x2 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x2 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x2 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x2 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x2 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x2 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x3 "PC3,Port Pin Configuration Registers 3" bitfld.byte 0x3 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x3 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x3 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x3 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x3 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x3 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x3 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x3 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x4 "PC4,Port Pin Configuration Registers 4" bitfld.byte 0x4 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x4 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x4 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x4 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x4 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x4 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x4 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x4 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x5 "PC5,Port Pin Configuration Registers 5" bitfld.byte 0x5 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x5 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x5 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x5 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x5 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x5 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x5 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x5 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x6 "PC6,Port Pin Configuration Registers 6" bitfld.byte 0x6 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x6 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x6 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x6 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x6 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x6 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x6 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x6 0. " DATA_OUT ,Data out bit" "Low,High" line.byte 0x7 "PC7,Port Pin Configuration Registers 7" bitfld.byte 0x7 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x7 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x7 5. " BIDIREN ,BiDir Enable" "Disabled,Enabled" bitfld.byte 0x7 4. " PIN_STATE ,Pin State" "Low,High" textline " " bitfld.byte 0x7 3. " DRIVEMODE_2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x7 2. " DRIVEMODE_1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x7 1. " DRIVEMODE_0 ,Drive mode 0" "Disabled,Enabled" bitfld.byte 0x7 0. " DATA_OUT ,Data out bit" "Low,High" textline " " group.byte (0x80+0x01*15.)++0x00 line.byte 0x00 "DR_ALIAS,Aliased Port Data Output Register" bitfld.byte 0x00 7. " DATAREG_ALIAS[7] ,High/Low state for the GPIO pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,High/Low state for the GPIO pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,High/Low state for the GPIO pin 5" "Low,High" textline " " bitfld.byte 0x00 4. " [4] ,High/Low state for the GPIO pin 4" "Low,High" bitfld.byte 0x00 3. " [3] ,High/Low state for the GPIO pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,High/Low state for the GPIO pin 2" "Low,High" textline " " bitfld.byte 0x00 1. " [1] ,High/Low state for the GPIO pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,High/Low state for the GPIO pin 0" "Low,High" textline " " group.byte (0x90+0x01*15.)++0x00 line.byte 0x00 "PS_ALIAS,Aliased Port Pin State Register" bitfld.byte 0x00 7. " PINSTATE_ALIAS[7] ,Logical state of the I/O pin 7" "Low,High" bitfld.byte 0x00 6. " [6] ,Logical state of the I/O pin 6" "Low,High" bitfld.byte 0x00 5. " [5] ,Logical state of the I/O pin 5" "Low,High" textline " " bitfld.byte 0x00 4. " [4] ,Logical state of the I/O pin 4" "Low,High" bitfld.byte 0x00 3. " [3] ,Logical state of the I/O pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,Logical state of the I/O pin 2" "Low,High" textline " " bitfld.byte 0x00 1. " [1] ,Logical state of the I/O pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,Logical state of the I/O pin 0" "Low,High" textline " " group.byte (0x100+0x10*15.)++0x00 line.byte 0x00 "DR,Port Data Output Register" bitfld.byte 0x00 5. " DATAREG[5] ,State for the GPIO pin 5" "Low,High" bitfld.byte 0x00 4. " [4] ,State for the GPIO pin 4" "Low,High" bitfld.byte 0x00 3. " [3] ,State for the GPIO pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,State for the GPIO pin 2" "Low,High" textline " " bitfld.byte 0x00 1. " [1] ,State for the GPIO pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,State for the GPIO pin 0" "Low,High" textline " " rgroup.byte (0x101+0x10*15.)++0x00 line.byte 0x00 "PS,Port Pin State Register 1" bitfld.byte 0x00 5. " PINSTATE[5] ,Logical state of the I/O pin 5" "Low,High" bitfld.byte 0x00 4. " [4] ,Logical state of the I/O pin 4" "Low,High" bitfld.byte 0x00 3. " [3] ,Logical state of the I/O pin 3" "Low,High" bitfld.byte 0x00 2. " [2] ,Logical state of the I/O pin 2" "Low,High" textline " " bitfld.byte 0x00 1. " [1] ,Logical state of the I/O pin 1" "Low,High" bitfld.byte 0x00 0. " [0] ,Logical state of the I/O pin 0" "Low,High" textline " " group.byte (0x102+0x10*15.)++0x02 line.byte 0x0 "DM0,Port Drive Mode Register 0" bitfld.byte 0x0 5. " DRIVEMODE[5] ,DM register 0 assertion bit 5" "Low,High" bitfld.byte 0x0 4. " [4] ,DM register 0 assertion bit 4" "Low,High" bitfld.byte 0x0 3. " [3] ,DM register 0 assertion bit 3" "Low,High" bitfld.byte 0x0 2. " [2] ,DM register 0 assertion bit 2" "Low,High" textline " " bitfld.byte 0x0 1. " [1] ,DM register 0 assertion bit 1" "Low,High" bitfld.byte 0x0 0. " [0] ,DM register 0 assertion bit 0" "Low,High" line.byte 0x1 "DM1,Port Drive Mode Register 1" bitfld.byte 0x1 5. " DRIVEMODE[5] ,DM register 1 assertion bit 5" "Low,High" bitfld.byte 0x1 4. " [4] ,DM register 1 assertion bit 4" "Low,High" bitfld.byte 0x1 3. " [3] ,DM register 1 assertion bit 3" "Low,High" bitfld.byte 0x1 2. " [2] ,DM register 1 assertion bit 2" "Low,High" textline " " bitfld.byte 0x1 1. " [1] ,DM register 1 assertion bit 1" "Low,High" bitfld.byte 0x1 0. " [0] ,DM register 1 assertion bit 0" "Low,High" line.byte 0x2 "DM2,Port Drive Mode Register 2" bitfld.byte 0x2 5. " DRIVEMODE[5] ,DM register 2 assertion bit 5" "Low,High" bitfld.byte 0x2 4. " [4] ,DM register 2 assertion bit 4" "Low,High" bitfld.byte 0x2 3. " [3] ,DM register 2 assertion bit 3" "Low,High" bitfld.byte 0x2 2. " [2] ,DM register 2 assertion bit 2" "Low,High" textline " " bitfld.byte 0x2 1. " [1] ,DM register 2 assertion bit 1" "Low,High" bitfld.byte 0x2 0. " [0] ,DM register 2 assertion bit 0" "Low,High" textline " " group.byte (0x105+0x10*15.)++0x04 line.byte 0x00 "SLW,Port slew rate control" bitfld.byte 0x00 5. " SLWCTL[5] ,Output edge rate of the port 15. pin 5" "Fast,Slow" bitfld.byte 0x00 4. " [4] ,Output edge rate of the port 15. pin 4" "Fast,Slow" bitfld.byte 0x00 3. " [3] ,Output edge rate of the port 15. pin 3" "Fast,Slow" bitfld.byte 0x00 2. " [2] ,Output edge rate of the port 15. pin 2" "Fast,Slow" textline " " bitfld.byte 0x00 1. " [1] ,Output edge rate of the port 15. pin 1" "Fast,Slow" bitfld.byte 0x00 0. " [0] ,Output edge rate of the port 15. pin 0" "Fast,Slow" textline " " line.byte 0x01 "BYP,Port Bypass enable" bitfld.byte 0x01 7. " BYPASS_USB[1] ,DSI drives the corresponding port 15. pin 1" "DMI/DPI out. from USB,Digital System Interconnect" textline " " bitfld.byte 0x01 6. " [0] ,DSI drives the corresponding port 15. pin 0" "DMI/DPI out. from USB,Digital System Interconnect" textline " " bitfld.byte 0x01 5. " BYPASS[5] ,DSI drives the corresponding port 15. pin 5" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 4. " [4] ,DSI drives the corresponding port 15. pin 4" "Port Logic Data Register,Digital System Interconnect" textline " " bitfld.byte 0x01 3. " [3] ,DSI drives the corresponding port 15. pin 3" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 2. " [2] ,DSI drives the corresponding port 15. pin 2" "Port Logic Data Register,Digital System Interconnect" textline " " bitfld.byte 0x01 1. " [1] ,DSI drives the corresponding port 15. pin 1" "Port Logic Data Register,Digital System Interconnect" bitfld.byte 0x01 0. " [0] ,DSI drives the corresponding port 15. pin 0" "Port Logic Data Register,Digital System Interconnect" textline " " line.byte 0x02 "BIE,Port Bydirection enable" bitfld.byte 0x02 5. " BIDIRECTEN[5] ,Bidirectional mode of the port 15. pin 5" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 4. " [4] ,Bidirectional mode of the port 15. pin 4" "Drive mode,Dynamic control DSI" textline " " bitfld.byte 0x02 3. " [3] ,Bidirectional mode of the port 15. pin 3" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 2. " [2] ,Bidirectional mode of the port 15. pin 2" "Drive mode,Dynamic control DSI" textline " " bitfld.byte 0x02 1. " [1] ,Bidirectional mode of the port 15. pin 1" "Drive mode,Dynamic control DSI" bitfld.byte 0x02 0. " [0] ,Bidirectional mode of the port 15. pin 0" "Drive mode,Dynamic control DSI" textline " " line.byte 0x03 "INP_DIS,Input buffer disable override" bitfld.byte 0x03 5. " INP_DIS[5] ,Input buffer disable 5" "No,Yes" bitfld.byte 0x03 4. " [4] ,Input buffer disable 4" "No,Yes" bitfld.byte 0x03 3. " [3] ,Input buffer disable 3" "No,Yes" bitfld.byte 0x03 2. " [2] ,Input buffer disable 2" "No,Yes" textline " " bitfld.byte 0x03 1. " [1] ,Input buffer disable 1" "No,Yes" bitfld.byte 0x03 0. " [0] ,Input buffer disable 0" "No,Yes" line.byte 0x04 "CTL,Port wide control signals" bitfld.byte 0x04 0. " VTRIP_SEL ,CMOS/LVTTL input buffer" "CMOS,LVTTL" textline " " wgroup.byte (0x10a+0x10*15.)++0x00 line.byte 0x00 "PRT,Port wide configuration register" bitfld.byte 0x00 7. " BYPASS ,Bypass bit" "Disabled,Enabled" bitfld.byte 0x00 6. " SLEW ,Slew bit" "Disabled,Enabled" bitfld.byte 0x00 5. " BIDIRECTEN ,BiDir Enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " DRIVEMODE2 ,Drive mode 2" "Disabled,Enabled" bitfld.byte 0x00 2. " DRIVEMODE1 ,Drive mode 1" "Disabled,Enabled" bitfld.byte 0x00 1. " DRIVEMODE0 ,Drive mode 0" "Disabled,Enabled" textline " " group.byte (0x10b+0x10*15.)++0x04 line.byte 0x00 "BIT_MASK,Bit-mask for Aliased Register access" bitfld.byte 0x00 5. " BIT_MASK[5] ,Allow access to data register and pin state 5" "Not allowed,Allowed" bitfld.byte 0x00 4. " [4] ,Allow access to data register and pin state 4" "Not allowed,Allowed" bitfld.byte 0x00 3. " [3] ,Allow access to data register and pin state 3" "Not allowed,Allowed" textline " " bitfld.byte 0x00 2. " [2] ,Allow access to data register and pin state 2" "Not allowed,Allowed" bitfld.byte 0x00 1. " [1] ,Allow access to data register and pin state 1" "Not allowed,Allowed" bitfld.byte 0x00 0. " [0] ,Allow access to data register and pin state 0" "Not allowed,Allowed" textline " " line.byte 0x01 "AMUX,Port Analog global mux bus enable" bitfld.byte 0x01 5. " AMUX[5] ,Connects analog mux bus to the pad 5" "Not asserted,Asserted" bitfld.byte 0x01 4. " [4] ,Connects analog mux bus to the pad 4" "Not asserted,Asserted" bitfld.byte 0x01 3. " [3] ,Connects analog mux bus to the pad 3" "Not asserted,Asserted" textline " " bitfld.byte 0x01 2. " [2] ,Connects analog mux bus to the pad 2" "Not asserted,Asserted" bitfld.byte 0x01 1. " [1] ,Connects analog mux bus to the pad 1" "Not asserted,Asserted" bitfld.byte 0x01 0. " [0] ,Connects analog mux bus to the pad 0" "Not asserted,Asserted" textline " " line.byte 0x02 "AG,Port Analog global enable" bitfld.byte 0x02 5. " ANALOGGLOBAL[5] ,Connects analog global to the pad 5" "Not asserted,Asserted" bitfld.byte 0x02 4. " [4] ,Connects analog global to the pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x02 3. " [3] ,Connects analog global to the pad 3" "Not asserted,Asserted" bitfld.byte 0x02 2. " [2] ,Connects analog global to the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x02 1. " [1] ,Connects analog global to the pad 1" "Not asserted,Asserted" bitfld.byte 0x02 0. " [0] ,Connects analog global to the pad 0" "Not asserted,Asserted" textline " " line.byte 0x03 "LCD_COM_SEG,Port LCD Com seg bits" bitfld.byte 0x03 5. " COM_SEG[5] ,Common or segment mode for pin 5" "Segment,Common" bitfld.byte 0x03 4. " [4] ,Common or segment mode for pin 4" "Segment,Common" bitfld.byte 0x03 3. " [3] ,Common or segment mode for pin 3" "Segment,Common" textline " " bitfld.byte 0x03 2. " [2] ,Common or segment mode for pin 2" "Segment,Common" bitfld.byte 0x03 1. " [1] ,Common or segment mode for pin 1" "Segment,Common" bitfld.byte 0x03 0. " [0] ,Common or segment mode for pin 0" "Segment,Common" textline " " line.byte 0x04 "LCD_EN,Port LCD enable register" bitfld.byte 0x04 5. " LCD_EN[5] ,Enable pin 5 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 4. " [4] ,Enable pin 4 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 3. " [3] ,Enable pin 3 for LCD mode" "Disabled,Enabled" textline " " bitfld.byte 0x04 2. " [2] ,Enable pin 2 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 1. " [1] ,Enable pin 1 for LCD mode" "Disabled,Enabled" bitfld.byte 0x04 0. " [0] ,Enable pin 0 for LCD mode" "Disabled,Enabled" textline " " group.byte (0x200+0x08*15.)++0x01 line.byte 0x00 "OUT_SEL0,Digital System Interconnect Port 15. Pin Output Select Registers" bitfld.byte 0x00 7. " PORTOUTSEL[7] ,Available taps selection for I/O pin output 7" "0,1" bitfld.byte 0x00 6. " [6] ,Available taps selection for I/O pin output 6" "0,1" bitfld.byte 0x00 5. " [5] ,Available taps selection for I/O pin output 5" "0,1" bitfld.byte 0x00 4. " [4] ,Available taps selection for I/O pin output 4" "0,1" textline " " bitfld.byte 0x00 3. " [3] ,Available taps selection for I/O pin output 3" "0,1" bitfld.byte 0x00 2. " [2] ,Available taps selection for I/O pin output 2" "0,1" bitfld.byte 0x00 1. " [1] ,Available taps selection for I/O pin output 1" "0,1" bitfld.byte 0x00 0. " [0] ,Available taps selection for I/O pin output 0" "0,1" textline " " line.byte 0x01 "OUT_SEL1,Digital System Interconnect Port 15. Pin Output Select Registers" bitfld.byte 0x01 7. " PORTOUTSEL[7] ,Available taps selection for I/O pin output 7" "0,1" bitfld.byte 0x01 6. " [6] ,Available taps selection for I/O pin output 6" "0,1" bitfld.byte 0x01 5. " [5] ,Available taps selection for I/O pin output 5" "0,1" bitfld.byte 0x01 4. " [4] ,Available taps selection for I/O pin output 4" "0,1" textline " " bitfld.byte 0x01 3. " [3] ,Available taps selection for I/O pin output 3" "0,1" bitfld.byte 0x01 2. " [2] ,Available taps selection for I/O pin output 2" "0,1" bitfld.byte 0x01 1. " [1] ,Available taps selection for I/O pin output 1" "0,1" bitfld.byte 0x01 0. " [0] ,Available taps selection for I/O pin output 0" "0,1" textline " " group.byte (0x202+0x08*15.)++0x03 line.byte 0x00 "OE_SEL0,Dynamic Drive Stength of Port 15. Output Enable Select registers" bitfld.byte 0x00 5. " PORTOESEL[5] ,Available taps selection for I/O pin 5" "0,1" bitfld.byte 0x00 4. " [4] ,Available taps selection for I/O pin 4" "0,1" textline " " bitfld.byte 0x00 3. " [3] ,Available taps selection for I/O pin 3" "0,1" bitfld.byte 0x00 2. " [2] ,Available taps selection for I/O pin 2" "0,1" textline " " bitfld.byte 0x00 1. " [1] ,Available taps selection for I/O pin 1" "0,1" bitfld.byte 0x00 0. " [0] ,Available taps selection for I/O pin 0" "0,1" line.byte 0x01 "OE_SEL1,Dynamic Drive Stength of Port Output Enable Select registers" bitfld.byte 0x01 5. " PORTOESEL[5] ,Available taps selection for I/O pin 5" "0,1" bitfld.byte 0x01 4. " [4] ,Available taps selection for I/O pin 4" "0,1" textline " " bitfld.byte 0x01 3. " [3] ,Available taps selection for I/O pin 3" "0,1" bitfld.byte 0x01 2. " [2] ,Available taps selection for I/O pin 2" "0,1" textline " " bitfld.byte 0x01 1. " [1] ,Available taps selection for I/O pin 1" "0,1" bitfld.byte 0x01 0. " [0] ,Available taps selection for I/O pin 0" "0,1" textline " " line.byte 0x02 "DBL_SYNC_IN,DSI double sync enable register" bitfld.byte 0x02 7. " DBL_SYNC_IN[7] ,Selects to synchronize the data in from the pad 7" "Not asserted,Asserted" bitfld.byte 0x02 6. " [6] ,Selects to synchronize the data in from the pad 6" "Not asserted,Asserted" textline " " bitfld.byte 0x02 5. " [5] ,Selects to synchronize the data in from the pad 5" "Not asserted,Asserted" bitfld.byte 0x02 4. " [4] ,Selects to synchronize the data in from the pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x02 3. " [3] ,Selects to synchronize the data in from the pad 3" "Not asserted,Asserted" bitfld.byte 0x02 2. " [2] ,Selects to synchronize the data in from the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x02 1. " [1] ,Selects to synchronize the data in from the pad 1" "Not asserted,Asserted" bitfld.byte 0x02 0. " [0] ,Selects to synchronize the data in from the pad 0" "Not asserted,Asserted" textline " " line.byte 0x03 "SYNC_OUT,DSI sync out enable register" bitfld.byte 0x03 5. " SYNC_OUT[5] ,Selects to synchronize data from DSI driving pad 5" "Not asserted,Asserted" bitfld.byte 0x03 4. " [4] ,Selects to synchronize data from DSI driving pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x03 3. " [3] ,Selects to synchronize data from DSI driving pad 3" "Not asserted,Asserted" bitfld.byte 0x03 2. " [2] ,Selects to synchronize data from DSI driving pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x03 1. " [1] ,Selects to synchronize data from DSI driving pad 1" "Not asserted,Asserted" bitfld.byte 0x03 0. " [0] ,Selects to synchronize data from DSI driving pad 0" "Not asserted,Asserted" group.byte (0x206+0x08*15.)++0x00 line.byte 0x00 "CAPS_SEL,Global DSI select register" bitfld.byte 0x00 5. " CAPS_SEL[5] ,Selects global DSI to drive dig_glbl_ctl on the pad 5" "Not asserted,Asserted" bitfld.byte 0x00 4. " [4] ,Selects global DSI to drive dig_glbl_ctl on the pad 4" "Not asserted,Asserted" textline " " bitfld.byte 0x00 3. " [3] ,Selects global DSI to drive dig_glbl_ctl on the pad 3" "Not asserted,Asserted" bitfld.byte 0x00 2. " [2] ,Selects global DSI to drive dig_glbl_ctl on the pad 2" "Not asserted,Asserted" textline " " bitfld.byte 0x00 1. " [1] ,Selects global DSI to drive dig_glbl_ctl on the pad 1" "Not asserted,Asserted" bitfld.byte 0x00 0. " [0] ,Selects global DSI to drive dig_glbl_ctl on the pad 0" "Not asserted,Asserted" width 0x0B tree.end tree.end tree "EMIF (External memory interface control registers)" base ad:0x40005400 width 13. group.byte 0x00++0x04 line.byte 0x00 "NO_UDB,EMIF UDB Generation Register" bitfld.byte 0x00 0. " NO_UDB ,Control of generating signals for external memory" "UDBs,EMIF" line.byte 0x01 "WAIT_STATES,External Memory Interface Wait States Register" bitfld.byte 0x01 0.--2. " WAIT_STATES ,Wait states for PHUB" "0,1,2,3,4,5,6,7" line.byte 0x02 "MEM_DWN,External Memory Power Down Register" bitfld.byte 0x02 0. " MEM_PD ,External Memory power down" "Power up,Power down" line.byte 0x03 "MEMCLK_DIV,External Memory Clock Divider Register" bitfld.byte 0x03 0.--1. " MEMCLK_DIV ,Divider for external memory clock frequency" "HCLK,HCLK/2,HCLK/4,HCLK" line.byte 0x04 "CLOCK_EN,EMIF Clock Enable Register" bitfld.byte 0x04 0. " CLOCK_EN ,Clock for EMIF core logic enable" "Disabled,Enabled" width 0x0B tree.end sif (!cpuis("CY8C524*")) tree.open "SC (Switched Capacitor)" tree "Miscellaneous" base ad:0x40005B56 width 6. group.byte 0x00++0x00 line.byte 0x00 "MISC,Switched Cap Miscellaneous Control Register" bitfld.byte 0x00 5. " SC_PUMP_FORCE ,Force pumping" "Not forced,Forced" bitfld.byte 0x00 4. " SC_PUMP_AUTO ,Enable autopumping" "Disabled,Enabled" bitfld.byte 0x00 1. " DIFF_PGA_1_3 ,Switched Cap Pair 1_3 Connect for Differential Amplifier Applications" "Disabled,Enabled" textline " " bitfld.byte 0x00 0. " DIFF_PGA_0_2 ,Switched Cap Pair 0_2 Connect for Differential Amplifier Applications" "Disabled,Enabled" base ad:0x40005B8C hgroup.byte 0x00++0x00 hide.byte 0x00 "SR,Switched Capacitor Status Register" in group.byte 0x01++0x00 line.byte 0x00 "MSK,SC IRQ Mask Register" bitfld.byte 0x00 3. " SC3_MSK ,Enable SC IRQ 3" "Disabled,Enabled" bitfld.byte 0x00 2. " SC2_MSK ,Enable SC IRQ 2" "Disabled,Enabled" bitfld.byte 0x00 1. " SC1_MSK ,Enable SC IRQ 1" "Disabled,Enabled" textline " " bitfld.byte 0x00 0. " SC0_MSK ,Enable SC IRQ 0" "Disabled,Enabled" width 0x0B tree.end tree "SC 0" base ad:0x40005800 width 6. group.byte 0x00++0x02 line.byte 0x00 "CR0,Switched Capacitor Control Register 0" bitfld.byte 0x00 4.--5. " DFT ,Enables DFT mode for the switch cap block" "Normal,Vboost DFT,Not Used,DFT Reset" bitfld.byte 0x00 1.--3. " MODE ,Configuration select for the SC block" "Naked Op-Amp,TIA,Continuous Time Mixer,NRZ S/H,Unity Gain Buffer,First Order Modulator,Programmable Gain Amplifier,Unity Gain Buffer" line.byte 0x01 "CR1,Switched Capacitor Control Register 1" bitfld.byte 0x01 5. " GAIN ,Controls the ratio of the feedback cap for S/H Mixer mode and PGA mode" "0 dB,6 dB" bitfld.byte 0x01 4. " DIV2 ,Frequency division" "Not divided,SC CLK/2" bitfld.byte 0x01 2.--3. " COMP ,Selects between various compensation capacitor sizes" "3.0pF,3.6pF,4.35pF,5.1pF" bitfld.byte 0x01 0.--1. " DRIVE ,Selects between current settings in the output buffer" "280 uA,420 uA,530 uA,650 uA" line.byte 0x02 "CR2,Switched Capacitor Control Register 2" bitfld.byte 0x02 7. " PGA_GNDVREF ,Programmable Gain Amplifier Application - Ground VREF" "Not grounded,Grounded" bitfld.byte 0x02 4.--6. " RVAL ,Feedback resistor adjust control signals" "20kOhm,30kOhm,40kOhm,60kOhm,120kOhm,250kOhm,500kOhm,1MOhm" bitfld.byte 0x02 2.--3. " REDC ,Adjusts capactiance between amplifier output and first stage" "0,1,2,3" bitfld.byte 0x02 1. " r20_40b ,Toggles the input impedance between 20k and 40k" "40k,20k" textline " " bitfld.byte 0x02 0. " BIAS_CTRL ,Toggles the bias current in the amplifier between normal and 1/2" "Normal,Low" textline " " base ad:0x40005A00 group.byte 0x00++0x00 line.byte 0x00 "SW0,Switched Capacitor Analog Routing Register 0" bitfld.byte 0x00 7. " VP_AG7 ,Connect positive voltage input to analog global of same side 7" "Not connected,Connected" bitfld.byte 0x00 6. " VP_AG6 ,Connect positive voltage input to analog global of same side 6" "Not connected,Connected" bitfld.byte 0x00 5. " VP_AG5 ,Connect positive voltage input to analog global of same side 5" "Not connected,Connected" textline " " bitfld.byte 0x00 4. " VP_AG4 ,Connect positive voltage input to analog global of same side 4" "Not connected,Connected" bitfld.byte 0x00 3. " VP_AG3 ,Connect positive voltage input to analog global of same side 3" "Not connected,Connected" bitfld.byte 0x00 2. " VP_AG2 ,Connect positive voltage input to analog global of same side 2" "Not connected,Connected" textline " " bitfld.byte 0x00 1. " VP_AG1 ,Connect positive voltage input to analog global of same side 1" "Not connected,Connected" bitfld.byte 0x00 0. " VP_AG0 ,Connect positive voltage input to analog global of same side 0" "Not connected,Connected" group.byte 0x02++0x02 line.byte 0x00 "SW2,Switched Capacitor Analog Routing Register 2" bitfld.byte 0x00 3. " VP_ABUS3 ,Connect positive voltage input to analog bus of the same side 3" "Not connected,Connected" bitfld.byte 0x00 2. " VP_ABUS2 ,Connect positive voltage input to analog bus of the same side 2" "Not connected,Connected" bitfld.byte 0x00 0. " VP_ABUS0 ,Connect positive voltage input to analog bus of the same side 0" "Not connected,Connected" line.byte 0x01 "SW3,Switched Capacitor Analog Routing Register 3" bitfld.byte 0x01 5. " VN_VREF ,Connect negative voltage input to Voltage Reference" "Not connected,Connected" bitfld.byte 0x01 1. " VP_VREF ,Connect positive voltage input to Voltage Reference" "Not connected,Connected" bitfld.byte 0x01 0. " VP_AMX ,Connect positive voltage input to Analog Mux Bus" "Not connected,Connected" line.byte 0x02 "SW4,Switched Capacitor Analog Routing Register 4" bitfld.byte 0x02 6. " VN_AG6 ,Connect negative voltage input to analog global of same side 6" "Not connected,Connected" bitfld.byte 0x02 4. " VN_AG4 ,Connect negative voltage input to analog global of same side 4" "Not connected,Connected" bitfld.byte 0x02 2. " VN_AG2 ,Connect negative voltage input to analog global of same side 2" "Not connected,Connected" textline " " bitfld.byte 0x02 0. " VN_AG0 ,Connect negative voltage input to analog global of same side 0" "Not connected,Connected" group.byte 0x06++0x02 line.byte 0x00 "SW6,Switched Capacitor Analog Routing Register 6" bitfld.byte 0x00 0. " VN_ABUS0 ,Connect negative voltage input to analog bus of the same side 0" "Not connected,Connected" line.byte 0x01 "SW7,Switched Capacitor Analog Routing Register 7" bitfld.byte 0x01 2. " VP_VO ,Connect positive voltage input to output of opposite SC" "Not connected,Connected" line.byte 0x02 "SW8,Switched Capacitor Analog Routing Register 8" bitfld.byte 0x02 7. " VO_AG7 ,Connect voltage output to analog global of same side 7" "Not connected,Connected" bitfld.byte 0x02 5. " VO_AG5 ,Connect voltage output to analog global of same side 5" "Not connected,Connected" bitfld.byte 0x02 3. " VO_AG3 ,Connect voltage output to analog global of same side 3" "Not connected,Connected" textline " " bitfld.byte 0x02 1. " VO_AG1 ,Connect voltage output to analog global of same side 1" "Not connected,Connected" group.byte 0x0a++0x02 line.byte 0x00 "SW10,Switched Capacitor Analog Routing Register 10" bitfld.byte 0x00 3. " VO_ABUS3 ,Connect voltage output to analog bus of the same side 3" "Not connected,Connected" bitfld.byte 0x00 1. " VO_ABUS1 ,Connect voltage output to analog bus of the same side 1" "Not connected,Connected" textline " " line.byte 0x01 "CLK,Switched Capacitor Clock Selection Register" bitfld.byte 0x01 5. " DYN_CNTL_EN ,Enable Dynamic Control" "Disabled,Enabled" bitfld.byte 0x01 4. " BYPASS_SYNC ,Bypass Synchronization" "Not bypassed,Bypassed" bitfld.byte 0x01 3. " CLK_EN ,Clock gating control" "Disabled,Enabled" bitfld.byte 0x01 0.--2. " MX_CLK ,Clock Selection" "clk_a0 & clk_a0_dig,clk_a1 & clk_a1_dig,clk_a2 & clk_a2_dig,clk_a3 & clk_a3_dig,UDB gen. clk,?..." line.byte 0x02 "BST,Switched Capacitor Boost Clock Selection Register" bitfld.byte 0x02 3. " BST_CLK_EN ,Clock gating control" "Disabled,Enabled" bitfld.byte 0x02 0.--2. " MX_BST_CLK ,Clock Selection" "clk_a0 & clk_a0_dig,clk_a1 & clk_a1_dig,clk_a2 & clk_a2_dig,clk_a3 & clk_a3_dig,UDB gen. clk,?..." width 0x0B tree.end tree "SC 1" base ad:0x40005804 width 6. group.byte 0x00++0x02 line.byte 0x00 "CR0,Switched Capacitor Control Register 0" bitfld.byte 0x00 4.--5. " DFT ,Enables DFT mode for the switch cap block" "Normal,Vboost DFT,Not Used,DFT Reset" bitfld.byte 0x00 1.--3. " MODE ,Configuration select for the SC block" "Naked Op-Amp,TIA,Continuous Time Mixer,NRZ S/H,Unity Gain Buffer,First Order Modulator,Programmable Gain Amplifier,Unity Gain Buffer" line.byte 0x01 "CR1,Switched Capacitor Control Register 1" bitfld.byte 0x01 5. " GAIN ,Controls the ratio of the feedback cap for S/H Mixer mode and PGA mode" "0 dB,6 dB" bitfld.byte 0x01 4. " DIV2 ,Frequency division" "Not divided,SC CLK/2" bitfld.byte 0x01 2.--3. " COMP ,Selects between various compensation capacitor sizes" "3.0pF,3.6pF,4.35pF,5.1pF" bitfld.byte 0x01 0.--1. " DRIVE ,Selects between current settings in the output buffer" "280 uA,420 uA,530 uA,650 uA" line.byte 0x02 "CR2,Switched Capacitor Control Register 2" bitfld.byte 0x02 7. " PGA_GNDVREF ,Programmable Gain Amplifier Application - Ground VREF" "Not grounded,Grounded" bitfld.byte 0x02 4.--6. " RVAL ,Feedback resistor adjust control signals" "20kOhm,30kOhm,40kOhm,60kOhm,120kOhm,250kOhm,500kOhm,1MOhm" bitfld.byte 0x02 2.--3. " REDC ,Adjusts capactiance between amplifier output and first stage" "0,1,2,3" bitfld.byte 0x02 1. " r20_40b ,Toggles the input impedance between 20k and 40k" "40k,20k" textline " " bitfld.byte 0x02 0. " BIAS_CTRL ,Toggles the bias current in the amplifier between normal and 1/2" "Normal,Low" textline " " base ad:0x40005A10 group.byte 0x00++0x00 line.byte 0x00 "SW0,Switched Capacitor Analog Routing Register 0" bitfld.byte 0x00 7. " VP_AG7 ,Connect positive voltage input to analog global of same side 7" "Not connected,Connected" bitfld.byte 0x00 6. " VP_AG6 ,Connect positive voltage input to analog global of same side 6" "Not connected,Connected" bitfld.byte 0x00 5. " VP_AG5 ,Connect positive voltage input to analog global of same side 5" "Not connected,Connected" textline " " bitfld.byte 0x00 4. " VP_AG4 ,Connect positive voltage input to analog global of same side 4" "Not connected,Connected" bitfld.byte 0x00 3. " VP_AG3 ,Connect positive voltage input to analog global of same side 3" "Not connected,Connected" bitfld.byte 0x00 2. " VP_AG2 ,Connect positive voltage input to analog global of same side 2" "Not connected,Connected" textline " " bitfld.byte 0x00 1. " VP_AG1 ,Connect positive voltage input to analog global of same side 1" "Not connected,Connected" bitfld.byte 0x00 0. " VP_AG0 ,Connect positive voltage input to analog global of same side 0" "Not connected,Connected" group.byte 0x02++0x02 line.byte 0x00 "SW2,Switched Capacitor Analog Routing Register 2" bitfld.byte 0x00 3. " VP_ABUS3 ,Connect positive voltage input to analog bus of the same side 3" "Not connected,Connected" bitfld.byte 0x00 2. " VP_ABUS2 ,Connect positive voltage input to analog bus of the same side 2" "Not connected,Connected" bitfld.byte 0x00 0. " VP_ABUS0 ,Connect positive voltage input to analog bus of the same side 0" "Not connected,Connected" line.byte 0x01 "SW3,Switched Capacitor Analog Routing Register 3" bitfld.byte 0x01 5. " VN_VREF ,Connect negative voltage input to Voltage Reference" "Not connected,Connected" bitfld.byte 0x01 1. " VP_VREF ,Connect positive voltage input to Voltage Reference" "Not connected,Connected" bitfld.byte 0x01 0. " VP_AMX ,Connect positive voltage input to Analog Mux Bus" "Not connected,Connected" line.byte 0x02 "SW4,Switched Capacitor Analog Routing Register 4" bitfld.byte 0x02 6. " VN_AG6 ,Connect negative voltage input to analog global of same side 6" "Not connected,Connected" bitfld.byte 0x02 4. " VN_AG4 ,Connect negative voltage input to analog global of same side 4" "Not connected,Connected" bitfld.byte 0x02 2. " VN_AG2 ,Connect negative voltage input to analog global of same side 2" "Not connected,Connected" textline " " bitfld.byte 0x02 0. " VN_AG0 ,Connect negative voltage input to analog global of same side 0" "Not connected,Connected" group.byte 0x06++0x02 line.byte 0x00 "SW6,Switched Capacitor Analog Routing Register 6" bitfld.byte 0x00 0. " VN_ABUS0 ,Connect negative voltage input to analog bus of the same side 0" "Not connected,Connected" line.byte 0x01 "SW7,Switched Capacitor Analog Routing Register 7" bitfld.byte 0x01 2. " VP_VO ,Connect positive voltage input to output of opposite SC" "Not connected,Connected" line.byte 0x02 "SW8,Switched Capacitor Analog Routing Register 8" bitfld.byte 0x02 7. " VO_AG7 ,Connect voltage output to analog global of same side 7" "Not connected,Connected" bitfld.byte 0x02 5. " VO_AG5 ,Connect voltage output to analog global of same side 5" "Not connected,Connected" bitfld.byte 0x02 3. " VO_AG3 ,Connect voltage output to analog global of same side 3" "Not connected,Connected" textline " " bitfld.byte 0x02 1. " VO_AG1 ,Connect voltage output to analog global of same side 1" "Not connected,Connected" group.byte 0x0a++0x02 line.byte 0x00 "SW10,Switched Capacitor Analog Routing Register 10" bitfld.byte 0x00 3. " VO_ABUS3 ,Connect voltage output to analog bus of the same side 3" "Not connected,Connected" bitfld.byte 0x00 1. " VO_ABUS1 ,Connect voltage output to analog bus of the same side 1" "Not connected,Connected" textline " " line.byte 0x01 "CLK,Switched Capacitor Clock Selection Register" bitfld.byte 0x01 5. " DYN_CNTL_EN ,Enable Dynamic Control" "Disabled,Enabled" bitfld.byte 0x01 4. " BYPASS_SYNC ,Bypass Synchronization" "Not bypassed,Bypassed" bitfld.byte 0x01 3. " CLK_EN ,Clock gating control" "Disabled,Enabled" bitfld.byte 0x01 0.--2. " MX_CLK ,Clock Selection" "clk_a0 & clk_a0_dig,clk_a1 & clk_a1_dig,clk_a2 & clk_a2_dig,clk_a3 & clk_a3_dig,UDB gen. clk,?..." line.byte 0x02 "BST,Switched Capacitor Boost Clock Selection Register" bitfld.byte 0x02 3. " BST_CLK_EN ,Clock gating control" "Disabled,Enabled" bitfld.byte 0x02 0.--2. " MX_BST_CLK ,Clock Selection" "clk_a0 & clk_a0_dig,clk_a1 & clk_a1_dig,clk_a2 & clk_a2_dig,clk_a3 & clk_a3_dig,UDB gen. clk,?..." width 0x0B tree.end sif (!cpuis("CY8C538*")) tree "SC 2" base ad:0x40005808 width 6. group.byte 0x00++0x02 line.byte 0x00 "CR0,Switched Capacitor Control Register 0" bitfld.byte 0x00 4.--5. " DFT ,Enables DFT mode for the switch cap block" "Normal,Vboost DFT,Not Used,DFT Reset" bitfld.byte 0x00 1.--3. " MODE ,Configuration select for the SC block" "Naked Op-Amp,TIA,Continuous Time Mixer,NRZ S/H,Unity Gain Buffer,First Order Modulator,Programmable Gain Amplifier,Unity Gain Buffer" line.byte 0x01 "CR1,Switched Capacitor Control Register 1" bitfld.byte 0x01 5. " GAIN ,Controls the ratio of the feedback cap for S/H Mixer mode and PGA mode" "0 dB,6 dB" bitfld.byte 0x01 4. " DIV2 ,Frequency division" "Not divided,SC CLK/2" bitfld.byte 0x01 2.--3. " COMP ,Selects between various compensation capacitor sizes" "3.0pF,3.6pF,4.35pF,5.1pF" bitfld.byte 0x01 0.--1. " DRIVE ,Selects between current settings in the output buffer" "280 uA,420 uA,530 uA,650 uA" line.byte 0x02 "CR2,Switched Capacitor Control Register 2" bitfld.byte 0x02 7. " PGA_GNDVREF ,Programmable Gain Amplifier Application - Ground VREF" "Not grounded,Grounded" bitfld.byte 0x02 4.--6. " RVAL ,Feedback resistor adjust control signals" "20kOhm,30kOhm,40kOhm,60kOhm,120kOhm,250kOhm,500kOhm,1MOhm" bitfld.byte 0x02 2.--3. " REDC ,Adjusts capactiance between amplifier output and first stage" "0,1,2,3" bitfld.byte 0x02 1. " r20_40b ,Toggles the input impedance between 20k and 40k" "40k,20k" textline " " bitfld.byte 0x02 0. " BIAS_CTRL ,Toggles the bias current in the amplifier between normal and 1/2" "Normal,Low" textline " " base ad:0x40005A20 group.byte 0x00++0x00 line.byte 0x00 "SW0,Switched Capacitor Analog Routing Register 0" bitfld.byte 0x00 7. " VP_AG7 ,Connect positive voltage input to analog global of same side 7" "Not connected,Connected" bitfld.byte 0x00 6. " VP_AG6 ,Connect positive voltage input to analog global of same side 6" "Not connected,Connected" bitfld.byte 0x00 5. " VP_AG5 ,Connect positive voltage input to analog global of same side 5" "Not connected,Connected" textline " " bitfld.byte 0x00 4. " VP_AG4 ,Connect positive voltage input to analog global of same side 4" "Not connected,Connected" bitfld.byte 0x00 3. " VP_AG3 ,Connect positive voltage input to analog global of same side 3" "Not connected,Connected" bitfld.byte 0x00 2. " VP_AG2 ,Connect positive voltage input to analog global of same side 2" "Not connected,Connected" textline " " bitfld.byte 0x00 1. " VP_AG1 ,Connect positive voltage input to analog global of same side 1" "Not connected,Connected" bitfld.byte 0x00 0. " VP_AG0 ,Connect positive voltage input to analog global of same side 0" "Not connected,Connected" group.byte 0x02++0x02 line.byte 0x00 "SW2,Switched Capacitor Analog Routing Register 2" bitfld.byte 0x00 3. " VP_ABUS3 ,Connect positive voltage input to analog bus of the same side 3" "Not connected,Connected" bitfld.byte 0x00 2. " VP_ABUS2 ,Connect positive voltage input to analog bus of the same side 2" "Not connected,Connected" bitfld.byte 0x00 1. " VP_ABUS1 ,Connect positive voltage input to analog bus of the same side 1" "Not connected,Connected" line.byte 0x01 "SW3,Switched Capacitor Analog Routing Register 3" bitfld.byte 0x01 5. " VN_VREF ,Connect negative voltage input to Voltage Reference" "Not connected,Connected" bitfld.byte 0x01 1. " VP_VREF ,Connect positive voltage input to Voltage Reference" "Not connected,Connected" bitfld.byte 0x01 0. " VP_AMX ,Connect positive voltage input to Analog Mux Bus" "Not connected,Connected" line.byte 0x02 "SW4,Switched Capacitor Analog Routing Register 4" bitfld.byte 0x02 7. " VN_AG7 ,Connect negative voltage input to analog global of same side 7" "Not connected,Connected" bitfld.byte 0x02 5. " VN_AG5 ,Connect negative voltage input to analog global of same side 5" "Not connected,Connected" bitfld.byte 0x02 3. " VN_AG3 ,Connect negative voltage input to analog global of same side 3" "Not connected,Connected" textline " " bitfld.byte 0x02 1. " VN_AG1 ,Connect negative voltage input to analog global of same side 1" "Not connected,Connected" group.byte 0x06++0x02 line.byte 0x00 "SW6,Switched Capacitor Analog Routing Register 6" bitfld.byte 0x00 1. " VN_ABUS1 ,Connect negative voltage input to analog bus of the same side 1" "Not connected,Connected" line.byte 0x01 "SW7,Switched Capacitor Analog Routing Register 7" bitfld.byte 0x01 2. " VP_VO ,Connect positive voltage input to output of opposite SC" "Not connected,Connected" line.byte 0x02 "SW8,Switched Capacitor Analog Routing Register 8" bitfld.byte 0x02 6. " VO_AG6 ,Connect voltage output to analog global of same side 6" "Not connected,Connected" bitfld.byte 0x02 4. " VO_AG4 ,Connect voltage output to analog global of same side 4" "Not connected,Connected" bitfld.byte 0x02 2. " VO_AG2 ,Connect voltage output to analog global of same side 2" "Not connected,Connected" textline " " bitfld.byte 0x02 0. " VO_AG0 ,Connect voltage output to analog global of same side 0" "Not connected,Connected" group.byte 0x0a++0x02 line.byte 0x00 "SW10,Switched Capacitor Analog Routing Register 10" bitfld.byte 0x00 2. " VO_ABUS2 ,Connect voltage output to analog bus of the same side 2" "Not connected,Connected" bitfld.byte 0x00 0. " VO_ABUS0 ,Connect voltage output to analog bus of the same side 0" "Not connected,Connected" textline " " line.byte 0x01 "CLK,Switched Capacitor Clock Selection Register" bitfld.byte 0x01 5. " DYN_CNTL_EN ,Enable Dynamic Control" "Disabled,Enabled" bitfld.byte 0x01 4. " BYPASS_SYNC ,Bypass Synchronization" "Not bypassed,Bypassed" bitfld.byte 0x01 3. " CLK_EN ,Clock gating control" "Disabled,Enabled" bitfld.byte 0x01 0.--2. " MX_CLK ,Clock Selection" "clk_a0 & clk_a0_dig,clk_a1 & clk_a1_dig,clk_a2 & clk_a2_dig,clk_a3 & clk_a3_dig,UDB gen. clk,?..." line.byte 0x02 "BST,Switched Capacitor Boost Clock Selection Register" bitfld.byte 0x02 3. " BST_CLK_EN ,Clock gating control" "Disabled,Enabled" bitfld.byte 0x02 0.--2. " MX_BST_CLK ,Clock Selection" "clk_a0 & clk_a0_dig,clk_a1 & clk_a1_dig,clk_a2 & clk_a2_dig,clk_a3 & clk_a3_dig,UDB gen. clk,?..." width 0x0B tree.end tree "SC 3" base ad:0x4000580C width 6. group.byte 0x00++0x02 line.byte 0x00 "CR0,Switched Capacitor Control Register 0" bitfld.byte 0x00 4.--5. " DFT ,Enables DFT mode for the switch cap block" "Normal,Vboost DFT,Not Used,DFT Reset" bitfld.byte 0x00 1.--3. " MODE ,Configuration select for the SC block" "Naked Op-Amp,TIA,Continuous Time Mixer,NRZ S/H,Unity Gain Buffer,First Order Modulator,Programmable Gain Amplifier,Unity Gain Buffer" line.byte 0x01 "CR1,Switched Capacitor Control Register 1" bitfld.byte 0x01 5. " GAIN ,Controls the ratio of the feedback cap for S/H Mixer mode and PGA mode" "0 dB,6 dB" bitfld.byte 0x01 4. " DIV2 ,Frequency division" "Not divided,SC CLK/2" bitfld.byte 0x01 2.--3. " COMP ,Selects between various compensation capacitor sizes" "3.0pF,3.6pF,4.35pF,5.1pF" bitfld.byte 0x01 0.--1. " DRIVE ,Selects between current settings in the output buffer" "280 uA,420 uA,530 uA,650 uA" line.byte 0x02 "CR2,Switched Capacitor Control Register 2" bitfld.byte 0x02 7. " PGA_GNDVREF ,Programmable Gain Amplifier Application - Ground VREF" "Not grounded,Grounded" bitfld.byte 0x02 4.--6. " RVAL ,Feedback resistor adjust control signals" "20kOhm,30kOhm,40kOhm,60kOhm,120kOhm,250kOhm,500kOhm,1MOhm" bitfld.byte 0x02 2.--3. " REDC ,Adjusts capactiance between amplifier output and first stage" "0,1,2,3" bitfld.byte 0x02 1. " r20_40b ,Toggles the input impedance between 20k and 40k" "40k,20k" textline " " bitfld.byte 0x02 0. " BIAS_CTRL ,Toggles the bias current in the amplifier between normal and 1/2" "Normal,Low" textline " " base ad:0x40005A30 group.byte 0x00++0x00 line.byte 0x00 "SW0,Switched Capacitor Analog Routing Register 0" bitfld.byte 0x00 7. " VP_AG7 ,Connect positive voltage input to analog global of same side 7" "Not connected,Connected" bitfld.byte 0x00 6. " VP_AG6 ,Connect positive voltage input to analog global of same side 6" "Not connected,Connected" bitfld.byte 0x00 5. " VP_AG5 ,Connect positive voltage input to analog global of same side 5" "Not connected,Connected" textline " " bitfld.byte 0x00 4. " VP_AG4 ,Connect positive voltage input to analog global of same side 4" "Not connected,Connected" bitfld.byte 0x00 3. " VP_AG3 ,Connect positive voltage input to analog global of same side 3" "Not connected,Connected" bitfld.byte 0x00 2. " VP_AG2 ,Connect positive voltage input to analog global of same side 2" "Not connected,Connected" textline " " bitfld.byte 0x00 1. " VP_AG1 ,Connect positive voltage input to analog global of same side 1" "Not connected,Connected" bitfld.byte 0x00 0. " VP_AG0 ,Connect positive voltage input to analog global of same side 0" "Not connected,Connected" group.byte 0x02++0x02 line.byte 0x00 "SW2,Switched Capacitor Analog Routing Register 2" bitfld.byte 0x00 3. " VP_ABUS3 ,Connect positive voltage input to analog bus of the same side 3" "Not connected,Connected" bitfld.byte 0x00 2. " VP_ABUS2 ,Connect positive voltage input to analog bus of the same side 2" "Not connected,Connected" bitfld.byte 0x00 1. " VP_ABUS1 ,Connect positive voltage input to analog bus of the same side 1" "Not connected,Connected" line.byte 0x01 "SW3,Switched Capacitor Analog Routing Register 3" bitfld.byte 0x01 5. " VN_VREF ,Connect negative voltage input to Voltage Reference" "Not connected,Connected" bitfld.byte 0x01 1. " VP_VREF ,Connect positive voltage input to Voltage Reference" "Not connected,Connected" bitfld.byte 0x01 0. " VP_AMX ,Connect positive voltage input to Analog Mux Bus" "Not connected,Connected" line.byte 0x02 "SW4,Switched Capacitor Analog Routing Register 4" bitfld.byte 0x02 7. " VN_AG7 ,Connect negative voltage input to analog global of same side 7" "Not connected,Connected" bitfld.byte 0x02 5. " VN_AG5 ,Connect negative voltage input to analog global of same side 5" "Not connected,Connected" bitfld.byte 0x02 3. " VN_AG3 ,Connect negative voltage input to analog global of same side 3" "Not connected,Connected" textline " " bitfld.byte 0x02 1. " VN_AG1 ,Connect negative voltage input to analog global of same side 1" "Not connected,Connected" group.byte 0x06++0x02 line.byte 0x00 "SW6,Switched Capacitor Analog Routing Register 6" bitfld.byte 0x00 1. " VN_ABUS1 ,Connect negative voltage input to analog bus of the same side 1" "Not connected,Connected" line.byte 0x01 "SW7,Switched Capacitor Analog Routing Register 7" bitfld.byte 0x01 2. " VP_VO ,Connect positive voltage input to output of opposite SC" "Not connected,Connected" line.byte 0x02 "SW8,Switched Capacitor Analog Routing Register 8" bitfld.byte 0x02 6. " VO_AG6 ,Connect voltage output to analog global of same side 6" "Not connected,Connected" bitfld.byte 0x02 4. " VO_AG4 ,Connect voltage output to analog global of same side 4" "Not connected,Connected" bitfld.byte 0x02 2. " VO_AG2 ,Connect voltage output to analog global of same side 2" "Not connected,Connected" textline " " bitfld.byte 0x02 0. " VO_AG0 ,Connect voltage output to analog global of same side 0" "Not connected,Connected" group.byte 0x0a++0x02 line.byte 0x00 "SW10,Switched Capacitor Analog Routing Register 10" bitfld.byte 0x00 2. " VO_ABUS2 ,Connect voltage output to analog bus of the same side 2" "Not connected,Connected" bitfld.byte 0x00 0. " VO_ABUS0 ,Connect voltage output to analog bus of the same side 0" "Not connected,Connected" textline " " line.byte 0x01 "CLK,Switched Capacitor Clock Selection Register" bitfld.byte 0x01 5. " DYN_CNTL_EN ,Enable Dynamic Control" "Disabled,Enabled" bitfld.byte 0x01 4. " BYPASS_SYNC ,Bypass Synchronization" "Not bypassed,Bypassed" bitfld.byte 0x01 3. " CLK_EN ,Clock gating control" "Disabled,Enabled" bitfld.byte 0x01 0.--2. " MX_CLK ,Clock Selection" "clk_a0 & clk_a0_dig,clk_a1 & clk_a1_dig,clk_a2 & clk_a2_dig,clk_a3 & clk_a3_dig,UDB gen. clk,?..." line.byte 0x02 "BST,Switched Capacitor Boost Clock Selection Register" bitfld.byte 0x02 3. " BST_CLK_EN ,Clock gating control" "Disabled,Enabled" bitfld.byte 0x02 0.--2. " MX_BST_CLK ,Clock Selection" "clk_a0 & clk_a0_dig,clk_a1 & clk_a1_dig,clk_a2 & clk_a2_dig,clk_a3 & clk_a3_dig,UDB gen. clk,?..." width 0x0B tree.end endif tree.end endif tree "LUT" tree "Miscellaneous" base ad:0x40005B8E width 5. hgroup.byte 0x00++0x00 hide.byte 0x00 "SR,LUT Status Register" in group.byte 0x01++0x00 line.byte 0x00 "MSK,LUT Interrupt ReQuest (IRQ) Mask Register" bitfld.byte 0x00 3. " LUT3_MSK ,Enable LUT IRQ 3" "Disabled,Enabled" bitfld.byte 0x00 2. " LUT2_MSK ,Enable LUT IRQ 2" "Disabled,Enabled" bitfld.byte 0x00 1. " LUT1_MSK ,Enable LUT IRQ 1" "Disabled,Enabled" bitfld.byte 0x00 0. " LUT0_MSK ,Enable LUT IRQ 0" "Disabled,Enabled" width 0x0B tree.end tree "LUT 0" base ad:0x40005848 width 4. group.byte 0x00++0x01 line.byte 0x00 "CR,LUT Config Register" bitfld.byte 0x00 0.--3. " Q ,LUT function" "FALSE,A AND B,A AND !B,A,!A AND B,B,A XOR B,A OR B,A NOR B,A XNOR B,!B,A OR !B,!A,!A OR B,A NAND B,TRUE" line.byte 0x01 "MX,LUT Input Mux Config Register" bitfld.byte 0x01 4.--5. " MX_B ,Mux Select for LUT Input B" "CMP0 out,CMP1 out,CMP2 out,CMP3 out" bitfld.byte 0x01 0.--1. " MX_A ,Mux Select for LUT Input A" "CMP0 out,CMP1 out,CMP2 out,CMP3 out" width 0x0B tree.end tree "LUT 1" base ad:0x4000584A width 4. group.byte 0x00++0x01 line.byte 0x00 "CR,LUT Config Register" bitfld.byte 0x00 0.--3. " Q ,LUT function" "FALSE,A AND B,A AND !B,A,!A AND B,B,A XOR B,A OR B,A NOR B,A XNOR B,!B,A OR !B,!A,!A OR B,A NAND B,TRUE" line.byte 0x01 "MX,LUT Input Mux Config Register" bitfld.byte 0x01 4.--5. " MX_B ,Mux Select for LUT Input B" "CMP0 out,CMP1 out,CMP2 out,CMP3 out" bitfld.byte 0x01 0.--1. " MX_A ,Mux Select for LUT Input A" "CMP0 out,CMP1 out,CMP2 out,CMP3 out" width 0x0B tree.end tree "LUT 2" base ad:0x4000584C width 4. group.byte 0x00++0x01 line.byte 0x00 "CR,LUT Config Register" bitfld.byte 0x00 0.--3. " Q ,LUT function" "FALSE,A AND B,A AND !B,A,!A AND B,B,A XOR B,A OR B,A NOR B,A XNOR B,!B,A OR !B,!A,!A OR B,A NAND B,TRUE" line.byte 0x01 "MX,LUT Input Mux Config Register" bitfld.byte 0x01 4.--5. " MX_B ,Mux Select for LUT Input B" "CMP0 out,CMP1 out,CMP2 out,CMP3 out" bitfld.byte 0x01 0.--1. " MX_A ,Mux Select for LUT Input A" "CMP0 out,CMP1 out,CMP2 out,CMP3 out" width 0x0B tree.end tree "LUT 3" base ad:0x4000584E width 4. group.byte 0x00++0x01 line.byte 0x00 "CR,LUT Config Register" bitfld.byte 0x00 0.--3. " Q ,LUT function" "FALSE,A AND B,A AND !B,A,!A AND B,B,A XOR B,A OR B,A NOR B,A XNOR B,!B,A OR !B,!A,!A OR B,A NAND B,TRUE" line.byte 0x01 "MX,LUT Input Mux Config Register" bitfld.byte 0x01 4.--5. " MX_B ,Mux Select for LUT Input B" "CMP0 out,CMP1 out,CMP2 out,CMP3 out" bitfld.byte 0x01 0.--1. " MX_A ,Mux Select for LUT Input A" "CMP0 out,CMP1 out,CMP2 out,CMP3 out" width 0x0B tree.end tree.end tree "LCDDAC" base ad:0x40005868 width 5. group.byte 0x00++0x02 line.byte 0x00 "CR0,LCD Control Register 0" bitfld.byte 0x00 6. " DFT_EN ,DFT enable signal" "Disabled,Enabled" bitfld.byte 0x00 4.--5. " DFT_SEL ,Select internal voltages to pass through the dft_out pin" "0,1,2,3" bitfld.byte 0x00 2. " AMP_DISABLE ,LCD DAC Amplifier disable" "No,Yes" bitfld.byte 0x00 0.--1. " BIAS_SEL ,Selects the LCD bias/multiplex ratio" "0,1,2,3" line.byte 0x01 "CR1,LCDDAC Control Register 1" hexmask.byte 0x01 0.--6. 1. " CONTRAST_CTL ,LCD Contrast control setting" line.byte 0x02 "CR,LCD Control Register" bitfld.byte 0x02 2. " INVERT ,Invert LCD Display" "Normal,Inverted" bitfld.byte 0x02 1. " LO2 ,Enables / Disables the high-current mode of LoDrive mode of the LCD DRIVER block" "Disabled,Enabled" bitfld.byte 0x02 0. " SLEEP_MODE ,LCD Sleep Mode" "Blank,Tri-state" base ad:0x40005B50 group.byte 0x00++0x04 line.byte 0x00 "SW0,LCDDAC Switch Register 0" bitfld.byte 0x00 0.--2. " SW0 ,Switch Control for LCD_BIAS_BUS[0]" "Not connected,LCDDAC_V0,ABUSR[0],LCDDAC_V0 & ABUSR[0],ABUSR[1],LCDDAC_V0 & ABUSR[1],ABUSR[0] & ABUSR[1],LCDDAC_V0 & ABUSR[0] & ABUSR[1]" line.byte 0x01 "SW1,LCDDAC Switch Register 1" bitfld.byte 0x01 0.--2. " SW1 ,Switch Control for LCD_BIAS_BUS[1]" "Not connected,LCDDAC_V1,ABUSL[0],LCDDAC_V1 & ABUSL[0],ABUSL[1],LCDDAC_V1 & ABUSL[1],ABUSL[0] & ABUSL[1],LCDDAC_V1 & ABUSL[0] & ABUSL[1]" line.byte 0x02 "SW2,LCDDAC Switch Register 2" bitfld.byte 0x02 0.--2. " SW2 ,Switch Control for LCD_BIAS_BUS[2]" "Not connected,LCDDAC_V2,ABUSR[2],LCDDAC_V2 & ABUSR[2],ABUSR[3],LCDDAC_V2 & ABUSR[3],ABUSR[2] & ABUSR[3],LCDDAC_V2 & ABUSR[2] & ABUSR[3]" line.byte 0x03 "SW3,LCDDAC Switch Register 3" bitfld.byte 0x03 0.--2. " SW3 ,Switch Control for LCD_BIAS_BUS[3]" "Not connected,LCDDAC_V3,ABUSL[2],LCDDAC_V3 & ABUSL[2],ABUSL[3],LCDDAC_V3 & ABUSL[3],ABUSL[2] & ABUSL[3],LCDDAC_V3 & ABUSL[2] & ABUSL[3]" line.byte 0x04 "SW4,LCDDAC Switch Register 3" bitfld.byte 0x04 0.--2. " SW4 ,Switch Control for LCD_BIAS_BUS[4]" "Not connected,LCDDAC_V4,AMUXBUSR,LCDDAC_V4 & AMUXBUSR,AMUXBUSL,LCDDAC_V4 & AMUXBUSL,AMUXBUSR & AMUXBUSL,LCDDAC_V4 & AMUXBUSR & AMUXBUSL" width 0x0B tree.end tree "BG (Bandgap)" base ad:0x4000586C width 6. group.byte 0x00++0x00 line.byte 0x00 "CR0,Bandgap Precision Reference Control 0" bitfld.byte 0x00 3. " BG_VDA_RES_EN ,Bandgap VDA" "VDA,VDA/2" bitfld.byte 0x00 2. " BG_VDA_SWABUSL0 ,Switch Control for VDA Bandgap output to abusl0 connection" "Not connected,Connected" bitfld.byte 0x00 0.--1. " CMP_MXVN ,Mux for comparator reference cmp1_vref" "Not connected,VREF_VDA,VREF_CMP1,?..." group.byte 0x02++0x01 line.byte 0x00 "DFT0,Bandgap Precision Reference DFT Register 0" bitfld.byte 0x00 4. " BG_DFT_VSEL ,Mux for DFT to select either vgnd or the reference voltage" "VOUT,vgnd" bitfld.byte 0x00 3. " BG_DFT_SEL ,BG_DFT_OUT mux selection" "Voltage,Current" bitfld.byte 0x00 2. " BG_DFT_EN ,DFT enable for bandgap" "Disabled,Enabled" textline " " bitfld.byte 0x00 0.--1. " BG_DFT_ISEL ,Mux for DFT to select the current signals" "iptat,ictat,inl,ibg10u" line.byte 0x01 "DFT1,Bandgap Precision Reference DFT Register 1" bitfld.byte 0x01 0.--3. " BGREFS_DFT_SEL ,BGREFS_DFT_OUT (routed to DFT_MUX3) mux selection" "vgnd,vgnd,VREF_BOOST,VREF_DAC,VREF_LCD,VREF_TSENSE,VREF_POR,VREF_SC0,VREF_IMO,v0p256,v0p6,v0p7,v0p8,v0p9,v1p024,v1p2" width 0x0B tree.end tree "CAPS (Capsense)" base ad:0x40005870 width 8. group.byte 0x00++0x04 line.byte 0x00 "L_CFG0,Capsense Reference Driver Configuration Register" bitfld.byte 0x00 7. " MXCMP ,Reference Buffer channel to comparator vp mux select" "Analog Global,Vssa" bitfld.byte 0x00 4. " CH_CONT ,Reference Buffer Channel Selection Control" "Analog Global,Vssa" bitfld.byte 0x00 2.--3. " REFSEL ,Reference Selection" "1.024 V,1.2 V,dac2_vout/dac3_vout,dac2_vout/dac3_vout" bitfld.byte 0x00 1. " BOOST ,High power mode" "Normal,High" textline " " bitfld.byte 0x00 0. " OUT_EN ,Reference Buffer Output enable" "Tri-state,Connected" textline " " line.byte 0x01 "L_CFG1,Capsense IO Configuration Register" bitfld.byte 0x01 0.--1. " IO_CTRL ,Capsense Pull-up/Pull-down control" "Neither pull-up or pull-down,Capsense Pull-up mode,Neither pull-up or pull-down,Capsense Pull-down mode" textline " " line.byte 0x02 "R_CFG0,Capsense Reference Driver Configuration Register" bitfld.byte 0x02 7. " MXCMP ,Reference Buffer channel to comparator vp mux select" "Analog Global,Vssa" bitfld.byte 0x02 4. " CH_CONT ,Reference Buffer Channel Selection Control" "Analog Global,Vssa" bitfld.byte 0x02 2.--3. " REFSEL ,Reference Selection" "1.024 V,1.2 V,dac2_vout/dac3_vout,dac2_vout/dac3_vout" bitfld.byte 0x02 1. " BOOST ,High power mode" "Normal,High" textline " " bitfld.byte 0x02 0. " OUT_EN ,Reference Buffer Output enable" "Tri-state,Connected" textline " " line.byte 0x03 "R_CFG1,Capsense IO Configuration Register" bitfld.byte 0x03 0.--1. " IO_CTRL ,Capsense Pull-up/Pull-down control" "Neither pull-up or pull-down,Capsense Pull-up mode,Neither pull-up or pull-down,Capsense Pull-down mode" textline " " line.byte 0x04 "DFT,Capsense DFT register" bitfld.byte 0x04 0.--1. " TCAP ,Applies test capacitor to GPIO pad (P5.0)" "Disconnected,2 pF,10 pF,12 pF" width 0x0B tree.end tree "PUMP (Pump Configuration)" base ad:0x40005876 width 5. group.byte 0x00++0x01 line.byte 0x00 "CR0,Pump Configuration Register 0" bitfld.byte 0x00 6. " PUMP_AMX_SELCLK ,Analog Mux Bus Pump Clock Selection" "External (DSI),Pump internal" bitfld.byte 0x00 5. " PUMP_AMX_FORCE ,Analog Mux Force pumping" "Not forced,Forced" bitfld.byte 0x00 4. " PUMP_AMX_AUTO ,Analog Mux Enable autopumping" "Disabled,Enabled" textline " " bitfld.byte 0x00 2. " PUMP_AG_SELCLK ,Analog Global Pump Clock Selection" "External (DSI),Pump internal" bitfld.byte 0x00 1. " PUMP_AG_FORCE ,Analog Global Force pumping" "Not forced,Forced" bitfld.byte 0x00 0. " PUMP_AG_AUTO ,Analog Global Enable autopumping" "Disabled,Enabled" line.byte 0x01 "CR1,Pump Configuration Register 1" bitfld.byte 0x01 6. " NPUMP_ABUF_SELCLK ,Abuf Negative Pump Clock Selection" "External (DSI),Negative pump internal" bitfld.byte 0x01 5. " NPUMP_ABUF_FORCE ,Abuf Negative Force pumping" "Not forced,Forced" bitfld.byte 0x01 4. " NPUMP_ABUF_AUTO ,Abuf Negative Enable autopumping" "Disabled,Enabled" textline " " bitfld.byte 0x01 2. " NPUMP_DSM_SELCLK ,DSM Negative Pump Clock Selection" "External (DSI),Negative pump internal" bitfld.byte 0x01 1. " NPUMP_DSM_FORCE ,DSM Negative Force pumping" "Not forced,Forced" bitfld.byte 0x01 0. " NPUMP_DSM_AUTO ,DSM Negative Enable autopumping" "Disabled,Enabled" width 0x0B tree.end tree.open "LPF (Low Pass Filter Control)" base ad:0x40005878 width 5. tree "LPF 0" group.byte 0x0++0x00 line.byte 0x00 "CR0,Low Pass Filter Control Register" bitfld.byte 0x00 5. " CSEL ,Capacitance Selection" "5pF,10pF" bitfld.byte 0x00 4. " RSEL ,Resistance Selection" "1x1x/7 units/198.1kOhm,5x/35 units/990.5kOhm" bitfld.byte 0x00 2. " SWOUT ,Output Switch Control" "Not connected,Connected" bitfld.byte 0x00 0.--1. " SWIN ,Input Switch Control" "Not connected,Analog Global 0,Analog Muxbus,Both" tree.end tree "LPF 1" group.byte 0x2++0x00 line.byte 0x00 "CR0,Low Pass Filter Control Register" bitfld.byte 0x00 5. " CSEL ,Capacitance Selection" "5pF,10pF" bitfld.byte 0x00 4. " RSEL ,Resistance Selection" "1x1x/7 units/198.1kOhm,5x/35 units/990.5kOhm" bitfld.byte 0x00 2. " SWOUT ,Output Switch Control" "Not connected,Connected" bitfld.byte 0x00 0.--1. " SWIN ,Input Switch Control" "Not connected,Analog Global 0,Analog Muxbus,Both" tree.end width 0x0B tree.end tree "ANAIF" base ad:0x4000587C width 14. group.byte 0x00++0x00 line.byte 0x0 "CFG_MISC_CR0,MISC Control Register 0" bitfld.byte 0x00 0. " SW_PULLDOWN_EN ,Analog Switch pulldown enable" "Disabled,Enabled" base ad:0x40005BA8 group.byte 0x00++0x00 line.byte 0x00 "WRK_SARS_SOF,SAR Global Start-of-frame register" bitfld.byte 0x00 1. " SOF_BIT_1 ,Start-of-Frame (sof) register source; enable conversion" "Disabled,Enabled" bitfld.byte 0x00 0. " SOF_BIT_0 ,Start-of-Frame (sof) register source; enable conversion" "Disabled,Enabled" width 0x0B tree.end tree "TFAULT (Timing Fault)" base ad:0x4000587E width 5. group.byte 0x00++0x01 line.byte 0x00 "CR0,Timing Fault Control Register 0" bitfld.byte 0x00 2. " OUT_EN ,Output Enable" "Disabled,Enabled" bitfld.byte 0x00 1. " MX_SRC ,Source selection" "clk_bus/2,oneshot" bitfld.byte 0x00 0. " EN_CLK ,Clock Gater control" "Gated,Enabled" line.byte 0x01 "CR1,Timing Fault Control Register 1" bitfld.byte 0x01 4.--5. " COARSE_DLY_SEL ,Coarse delay selection" "+1,+2,+3,+4" bitfld.byte 0x01 0.--3. " FINE_DLY_SEL ,Fine delay selection" "+1,+2,+3,+4,+5,+6,+7,+8,+9,+10,+11,+12,+13,+14,+15,+16" textline " " base ad:0x40005B92 rgroup.byte 0x00++0x02 line.byte 0x00 "WRK0,Timing Fault Working Register 0" bitfld.byte 0x00 7. " FINE_TAPS_7_0[7] ,Fine Tap 7 Capture" "Not captured,Captured" bitfld.byte 0x00 6. " [6] ,Fine Tap 6 Capture" "Not captured,Captured" textline " " bitfld.byte 0x00 5. " [5] ,Fine Tap 5 Capture" "Not captured,Captured" bitfld.byte 0x00 4. " [4] ,Fine Tap 4 Capture" "Not captured,Captured" textline " " bitfld.byte 0x00 3. " [3] ,Fine Tap 3 Capture" "Not captured,Captured" bitfld.byte 0x00 2. " [2] ,Fine Tap 2 Capture" "Not captured,Captured" textline " " bitfld.byte 0x00 1. " [1] ,Fine Tap 1 Capture" "Not captured,Captured" bitfld.byte 0x00 0. " [0] ,Fine Tap 0 Capture" "Not captured,Captured" line.byte 0x01 "WRK1,Timing Fault Working Register 1" bitfld.byte 0x01 7. " FINE_TAPS_15_8[15] ,Fine Tap 15 Capture" "Not captured,Captured" bitfld.byte 0x01 6. " [14] ,Fine Tap 14 Capture" "Not captured,Captured" textline " " bitfld.byte 0x01 5. " [13] ,Fine Tap 13 Capture" "Not captured,Captured" bitfld.byte 0x01 4. " [12] ,Fine Tap 12 Capture" "Not captured,Captured" textline " " bitfld.byte 0x01 3. " [11] ,Fine Tap 11 Capture" "Not captured,Captured" bitfld.byte 0x01 2. " [10] ,Fine Tap 10 Capture" "Not captured,Captured" textline " " bitfld.byte 0x01 1. " [9] ,Fine Tap 9 Capture" "Not captured,Captured" bitfld.byte 0x01 0. " [8] ,Fine Tap 8 Capture" "Not captured,Captured" line.byte 0x02 "WRK2,Timing Fault Working Register 2" bitfld.byte 0x02 3. " COARSE_TAPS[3] ,Coarse Taps 3 Capture" "Not captured,Captured" bitfld.byte 0x02 2. " [2] ,Coarse Taps 2 Capture" "Not captured,Captured" textline " " bitfld.byte 0x02 1. " [1] ,Coarse Taps 1 Capture" "Not captured,Captured" bitfld.byte 0x02 0. " [0] ,Coarse Taps 0 Capture" "Not captured,Captured" wgroup.byte 0x03++0x00 line.byte 0x00 "WRK3,Timing Fault Working Register 1" bitfld.byte 0x00 0. " ONESHOT_TRIGGER ,Oneshot trigger" "Not trigger,Trigger" width 0x0B tree.end sif (cpuis("CY8C558*")) tree "DSM (Delta Sigma Modulator)" base ad:0x40005880 width 6. group.byte 0x00++0x0c line.byte 0x00 "CR0,Delta Sigma Modulator Control Register 0" bitfld.byte 0x00 2.--3. " NONOV ,Non overlap delay of clock phases" "Low (1.57ns),Medium (3.54ns),High (6.47ns),Very high (9.91ns)" bitfld.byte 0x00 0.--1. " QLEV ,Quantization Level choice for modulator" "2,3,9,9" line.byte 0x01 "CR1,Delta Sigma Modulator Control Register 1" bitfld.byte 0x01 6. " DPMODE ,Datapath mode" "Normal,Low offset" bitfld.byte 0x01 5. " ODEN ,Overload detect scheme enable" "Disabled,Enabled" bitfld.byte 0x01 0.--4. " ODET_TH ,Overload detection threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.byte 0x02 "CR2,Delta Sigma Modulator Control Register 2" bitfld.byte 0x02 7. " MX_RESET ,Select DSM reset source" "Decimator,UDB" bitfld.byte 0x02 6. " RESET3_EN ,Allow third stage integrating capacitance to be reset" "Not allowed,Allowed" bitfld.byte 0x02 5. " RESET2_EN ,Allow second stage integrating capacitance to be reset" "Not allowed,Allowed" textline " " bitfld.byte 0x02 4. " RESET1_EN ,Allow first stage integrating capacitance to be reset" "Not allowed,Allowed" bitfld.byte 0x02 3. " MOD_CHOP_EN ,Enable Modulator Chopping" "Disabled,Enabled" bitfld.byte 0x02 0.--2. " FCHOP ,Chopping Frequency Selection" "Fclock/2,Fclock/4,Fclock/8,Fclock/16,Fclock/32,Fclock/64,Fclock/128,Fclock/256" line.byte 0x03 "CR3,Delta Sigma Modulator Control Register 3" bitfld.byte 0x03 7. " SIGN ,Invert sign of input" "Not inverted,Inverted" bitfld.byte 0x03 6. " MODBIT ,Enable modbit" "Disabled,Enabled" textline " " bitfld.byte 0x03 5. " MX_DOUT ,Select DSM dout routed to UDB" "OUT0=dout[7:0],OUT1={2'b0;ovdcause;ovdflag;dout2scomp}" textline " " bitfld.byte 0x03 4. " MODBITIN_EN ,Modbitin enable" "Disabled,Enabled" bitfld.byte 0x03 0.--3. " MX_MODBITIN ,Select modbitin input" "lut0_out,lut1_out,lut2_out,lut3_out,lut4_out,lut5_out,lut6_out,lut7_out,UDB,?..." line.byte 0x04 "CR4,Delta Sigma Modulator Control Register 4" bitfld.byte 0x04 7. " FCAP1_EN ,Enable the DFT 100fF capacitance path" "Disabled,Enabled" hexmask.byte 0x04 0.--6. 1. " FCAP1_EN ,Binary weighted first stage integrating capacitance" line.byte 0x05 "CR5,Delta Sigma Modulator Control Register 5" bitfld.byte 0x05 7. " IPCAP1_EN ,Enable the DFT 100fF capacitance path" "Disabled,Enabled" bitfld.byte 0x05 6. " IPCAP1[6] ,Binary weighted first stage integrating capacitance 6 (+6400 fF)" "Not added,Added" bitfld.byte 0x05 5. " IPCAP1[5] ,Binary weighted first stage integrating capacitance 5 (+3200 fF)" "Not added,Added" bitfld.byte 0x05 4. " IPCAP1[4] ,Binary weighted first stage integrating capacitance 4 (+1600 fF)" "Not added,Added" textline " " bitfld.byte 0x05 3. " IPCAP1[3] ,Binary weighted first stage integrating capacitance 3 (+800 fF)" "Not added,Added" bitfld.byte 0x05 2. " IPCAP1[2] ,Binary weighted first stage integrating capacitance 2 (+400 fF)" "Not added,Added" bitfld.byte 0x05 1. " IPCAP1[1] ,Binary weighted first stage integrating capacitance 1 (+200 fF)" "Not added,Added" bitfld.byte 0x05 0. " IPCAP1[0] ,Binary weighted first stage integrating capacitance 0 (+100 fF)" "Not added,Added" line.byte 0x06 "CR6,Delta Sigma Modulator Control Register 6" bitfld.byte 0x06 6. " DACCAP_EN ,Enable the DFT 12fF capacitance path" "Disabled,Enabled" bitfld.byte 0x06 5. " DACCAP[5] ,Binary weighted first stage DAC capacitance 5 (add 400*8= +3200 fF)" "Not added,Added" bitfld.byte 0x06 4. " DACCAP[4] ,Binary weighted first stage DAC capacitance 4 (add 200*8= +1600 fF)" "Not added,Added" bitfld.byte 0x06 3. " DACCAP[3] ,Binary weighted first stage DAC capacitance 3 (add 100*8= +800 fF)" "Not added,Added" textline " " bitfld.byte 0x06 2. " DACCAP[2] ,Binary weighted first stage DAC capacitance 2 (add 50*8= +400 fF)" "Not added,Added" bitfld.byte 0x06 1. " DACCAP[1] ,Binary weighted first stage DAC capacitance 1 (add 24*8= +192 fF)" "Not added,Added" bitfld.byte 0x06 0. " DACCAP[0] ,Binary weighted first stage DAC capacitance 0 (add 12*8= +96 fF)" "Not added,Added" line.byte 0x07 "CR7,Delta Sigma Modulator Control Register 7" bitfld.byte 0x07 7. " FCAP2_EN ,Enable the additonal 50fF capacitance path" "Disabled,Enabled" bitfld.byte 0x07 6. " FCAP3_EN ,Enable the 100fF capacitance path" "Disabled,Enabled" bitfld.byte 0x07 5. " IPCAP1OFFSET ,Add offset capacitance of 4.8 pF" "Not added,Added" bitfld.byte 0x07 4. " FCAP1OFFSET ,Add offset capacitance of 3.4 pF" "Not added,Added" textline " " bitfld.byte 0x07 3. " RESCAP_EN ,Enable the DFT 12fF capacitance path" "Disabled,Enabled" bitfld.byte 0x07 0.--2. " RESCAP ,Resonator Capacitor Trim 12 fF to 100 fF with 12 fF step" "12 fF,24 fF,36 fF,48 fF,60 fF,72 fF,84 fF,100 fF" line.byte 0x08 "CR8,Delta Sigma Modulator Control Register 8" bitfld.byte 0x08 7. " IPCAP2_EN ,Enable the additonal 50fF capacitance path" "Disabled,Enabled" bitfld.byte 0x08 4.--6. " IPCAP2 ,The second integrator's input sampling capacitance" "0fF,50fF,100fF,150fF,200fF,250fF,300fF,350fF" bitfld.byte 0x08 0.--3. " FCAP2 ,The second stage integrating capacitance" "0fF,50fF,100fF,150fF,200fF,250fF,300fF,350fF,400fF,450fF,500fF,550fF,600fF,650fF,700fF,750fF" line.byte 0x09 "CR9,Delta Sigma Modulator Control Register 9" bitfld.byte 0x09 7. " IPCAP3_EN ,Enable the additonal 50fF capacitance path" "Disabled,Enabled" bitfld.byte 0x09 4.--6. " IPCAP3 ,The third integrator's input sampling capacitance" "0fF,50fF,100fF,150fF,200fF,250fF,300fF,350fF" bitfld.byte 0x09 0.--3. " FCAP3 ,The third stage integrating capacitance" "0fF,50fF,100fF,150fF,200fF,250fF,300fF,350fF,400fF,450fF,500fF,550fF,600fF,650fF,700fF,750fF" line.byte 0x0a "CR10,Delta Sigma Modulator Control Register 10" bitfld.byte 0x0a 7. " SUMCAP1_EN ,Enable the additonal 50fF capacitance path" "Disabled,Enabled" bitfld.byte 0x0a 4.--6. " SUMCAP1 ,The summer capacitance that lies on the feed-forward path from the first integrator output" "0fF,50fF,100fF,150fF,200fF,250fF,300fF,350fF" bitfld.byte 0x0a 3. " SUMCAP2_EN ,Enable the additonal 50fF capacitance path" "Disabled,Enabled" bitfld.byte 0x0a 0.--2. " SUMCAP2 ,The summer capacitance that lies on the feed-forward path from the second integrator output" "0fF,50fF,100fF,150fF,200fF,250fF,300fF,350fF" line.byte 0x0b "CR11,Delta Sigma Modulator Control Register 11" bitfld.byte 0x0b 7. " SUMCAP3_EN ,Enable the additonal 50fF capacitance path" "Disabled,Enabled" bitfld.byte 0x0b 4.--6. " SUMCAP3 ,The summer capacitance that lies on the feed-forward path from the third integrator output" "0fF,50fF,100fF,150fF,200fF,250fF,300fF,350fF" bitfld.byte 0x0b 0.--3. " SUMCAPFB ,The summer feedback capacitance" "0fF,50fF,100fF,150fF,200fF,250fF,300fF,350fF,400fF,450fF,500fF,550fF,600fF,650fF,700fF,750fF" line.byte 0x0c "CR12,Delta Sigma Modulator Control Register 12" bitfld.byte 0x0C 6. " SUMCAPFB_EN ,Enable the DFT 50fF capacitance path" "Disabled,Enabled" bitfld.byte 0x0C 5. " SUMCAPIN_EN ,E Enable the DFT 50fF capacitance path" "Disabled,Enabled" bitfld.byte 0x0C 0.--4. " SUMCAPIN ,The summer capacitance that lies on the path where the input signal is summed" "0fF,50fF,100fF,150fF,200fF,250fF,300fF,350fF,400fF,450fF,500fF,550fF,600fF,650fF,700fF,750fF,800fF,850fF,900fF,950fF,1000fF,1050fF,1100fF,1150fF,1200fF,1250fF,1300fF,1350fF,1400fF,1450fF,1500fF,1550fF" hgroup.byte 0x0d++0x00 hide.byte 0x00 "CR13,Delta Sigma Modulator Control Register 13" group.byte 0x0e++0x04 line.byte 0x00 "CR14,Delta Sigma Modulator Control Register 14" bitfld.byte 0x00 4.--7. " OPAMP1_BW ,First Stage Opamp Bandwidth Control" "(default)|0000,(1.5X power option)|0001,(2X power option)|0011,(2.5X power option)|0111,(higher BW; 1.25X current)|1000,(lower noise)|1001,?..." bitfld.byte 0x00 0.--2. " POWER1 ,First Stage Opamp Power level control" "Low (44uA),Medium (123uA),High (492uA),1.5X (750uA),2X (1mA),C/2 @ 3MSPS (277uA),C/4 @ 3MSPS (185uA),2.5X (1.5mA)" line.byte 0x01 "CR15,Delta Sigma Modulator Control Register 15" bitfld.byte 0x01 4.--5. " POWER_COMP ,The power control for the quantizer block" "Very low (2.2uA),Normal (8.6uA),6MHz (17uA),12MHz (35uA)" bitfld.byte 0x01 0.--2. " POWER2_3 ,The power control for the second and third integrator stages" "LOW (4uA),MEDIUM (17uA),HIGH (68uA),1.5X (100uA),2X (135uA),HIGH (68uA),HIGH (68uA),HIGH (68uA)" line.byte 0x02 "CR16,Delta Sigma Modulator Control Register 0" bitfld.byte 0x02 4.--6. " POWER_SUM ,The power control for the summer block" "LOW (4uA),MEDIUM (17uA),HIGH (68uA),1.5X (100uA),2X (135uA),HIGH (68uA),HIGH (68uA),HIGH (68uA)" bitfld.byte 0x02 3. " EN_CP ,Enable charge pump" "Disabled,Enabled" textline " " bitfld.byte 0x02 0.--2. " CP_PWRCTL ,Charge Pump Power Control Modes" "Turbo Power (560uA),6MHz (300uA),High power (170uA),Medium power (70uA),Low Power (30uA),?..." line.byte 0x03 "CR17,Delta Sigma Modulator Control Register" bitfld.byte 0x03 6.--7. " PWR_CTRL_VREF_INN ,Power control modes for REFBUF1" "Low Power (26uA),Medium Power (32uA),High Power (118uA),Turbo Power (232uA)" bitfld.byte 0x03 4.--5. " PWR_CTRL_VCM ,Power Control for the Voltage Common Mode Buffer for the Sigma Delta ADC" "Low Power,Medium Power,High Power,Turbo Power" textline " " bitfld.byte 0x03 2.--3. " PWR_CTRL_VREF ,Power Control for the Voltage Reference Buffer for the Sigma Delta ADC" "Low Power,Medium Power,High Power,Turbo Power" bitfld.byte 0x03 1. " EN_BUF_VCM ,Enable/Disable control for ADC (Internal)Reference Buffer" "Disabled,Enabled" textline " " bitfld.byte 0x03 0. " EN_BUF_VREF ,Enable/Disable control for ADC (Internal)Reference Buffer" "Disabled,Enabled" line.byte 0x04 "REF0,Delta Sigma Modulator Reference Register 0" bitfld.byte 0x04 6.--7. " VCMSEL ,Output common mode selection for modulator" "No selection,0.8V from bandgap trim buffer,0.7V from bandgap trim buffer,Vpwra/2" textline " " bitfld.byte 0x04 5. " VCM_RES_DIV_EN ,Allows resitor divided value of (Vpwra/2) to a selectable voltage for the VCM Mux" "Not allowed,Allowed" textline " " bitfld.byte 0x04 4. " VREF_RES_DIV_EN ,Allows resistor divided value of (Vda/4) to a selectable voltage for the RefMux" "Not allowed,Allowed" textline " " bitfld.byte 0x04 3. " EN_BUF_VREF_INN ,Enable/Disable control for ADC (internal) REFBUF1 Buffer" "Disabled,Enabled" textline " " bitfld.byte 0x04 0.--2. " REFMUX ,Mux control that allows for selecting one among the various available internal reference values" "No selection,Vda/4,VDAC0 output,Internal precision bandgap ref. of 1.024,Internal precision bandgap ref. of 1.2V,?..." hgroup.byte 0x13++0x00 hide.byte 0x00 "REF1,Delta Sigma Modulator Reference Register 1" group.byte 0x14++0x04 line.byte 0x00 "REF2,Delta Sigma Modulator Reference Register 2" bitfld.byte 0x00 7. " S7_EN ,S7 switch close enable" "Disabled,Enabled" bitfld.byte 0x00 6. " S6_EN ,S6 switch close enable" "Disabled,Enabled" bitfld.byte 0x00 5. " S5_EN ,S5 switch close enable" "Disabled,Enabled" bitfld.byte 0x00 4. " S4_EN ,S4 switch close enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " S3_EN ,S3 switch close enable" "Disabled,Enabled" bitfld.byte 0x00 2. " S2_EN ,S2 switch close enable" "Disabled,Enabled" bitfld.byte 0x00 1. " S1_EN ,S1 switch close enable" "Disabled,Enabled" bitfld.byte 0x00 0. " S0_EN ,S0 switch close enable" "Disabled,Enabled" line.byte 0x01 "REF3,Delta Sigma Modulator Reference Register 3" bitfld.byte 0x01 5. " S13_EN ,S13 switch close enable" "Disabled,Enabled" bitfld.byte 0x01 4. " S12_EN ,S12 switch close enable" "Disabled,Enabled" textline " " bitfld.byte 0x01 3. " S11_EN ,S11 switch close enable" "Disabled,Enabled" bitfld.byte 0x01 2. " S10_EN ,S10 switch close enable" "Disabled,Enabled" bitfld.byte 0x01 1. " S9_EN ,S9 switch close enable" "Disabled,Enabled" bitfld.byte 0x01 0. " S8_EN ,S8 switch close enable" "Disabled,Enabled" line.byte 0x02 "DEM0,Delta Sigma Modulator Dynamic Element Matching Register 0" bitfld.byte 0x02 4. " DEMTEST_SRC ,Select demtest source" "ANAIF register,UDB generated" bitfld.byte 0x02 3. " ADC_TEST_EN ,Enable/Disable All test modes in Sigma Delta Channel" "Disabled,Enabled" bitfld.byte 0x02 2. " EN_DEM ,Enable DEM" "Disabled,Enabled" textline " " bitfld.byte 0x02 1. " EN_SCRAMBLER1 ,Enable Scrambler 1" "Disabled,Enabled" bitfld.byte 0x02 0. " EN_SCRAMBLER0 ,Enable Scrambler 0" "Disabled,Enabled" line.byte 0x03 "DEM1,Delta Sigma Modulator Dynamic Element Matching Register 1" line.byte 0x04 "TST0,Delta Sigma Modulator Test Register 0" bitfld.byte 0x04 4.--6. " DIG_TEST_SEL ,digital outputs to digital muxes test selection" "0,1,2,3,4,5,6,7" bitfld.byte 0x04 0.--3. " REFSEL_CTRL ,Selects one among the 15 important DFT observable points inside the DSM" "(9/32)*Vref,(11/32)*Vref,(12/32)*Vref,(13/32)*Vref,(15/32)*Vref,(16/32)*Vref,(17/32)*Vref,(19/32)*Vref,(20/32)*Vref,(21/32)*Vref,(23/32)*Vref,VICM,Vb0,VRCM,vbias0_in,?..." hgroup.byte 0x19++0x00 hide.byte 0x00 "TST1,Delta Sigma Modulator Test Register 1" group.byte 0x1a++0x04 line.byte 0x00 "BUF0,Delta Sigma Modulator Buffer Register 0" bitfld.byte 0x00 2. " RAIL_RAIL_EN ,Selects Rail-to-Rail Mode" "Level shifted,Rail-to-Rail" bitfld.byte 0x00 1. " BYPASS_P ,Remove positive half of the buffer from signal path" "Not bypassed,Bypassed" bitfld.byte 0x00 0. " ENABLE_P ,Buffer Positive Half Enable" "Disabled,Enabled" line.byte 0x01 "BUF1,Delta Sigma Modulator Buffer Register 1" bitfld.byte 0x01 2.--3. " GAIN ,Gain settings" "1,2,4,8" bitfld.byte 0x01 1. " BYPASS_N ,Remove negative half of the buffer from signal path" "Not bypassed,Bypassed" bitfld.byte 0x01 0. " ENABLE_N ,Buffer Negative Half Enable" "Disabled,Enabled" line.byte 0x02 "BUF2,Delta Sigma Modulator Buffer Register 2" bitfld.byte 0x02 1. " ADD_EXTRA_RC ,Include additional RC at the output of the buffer differentially" "Normal,Included" bitfld.byte 0x02 0. " LOWPOWER_EN ,Enables the lower power mode of operation" "Disabled,Enabled" line.byte 0x03 "BUF3,Delta Sigma Modulator Buffer Register 3" bitfld.byte 0x03 3. " BUF_CHOP_EN ,Enable/ Disable Chopping of the input buffer" "Disabled,Enabled" bitfld.byte 0x03 0.--2. " BUF_FCHOP ,Input Buffer Chopping frequency control" "fs/2,fs/4,fs/8,fs/16,fs/32,fs/64,fs/128,fs/256" line.byte 0x04 "MISC,Delta Sigma Modulator Miscellaneous register" bitfld.byte 0x04 0. " SEL_ICLK_CP ,Select Charge Pump Internal Clock" "External,Internal" base ad:0x40005B00 group.byte 0x00++0x00 line.byte 0x00 "SW0,Delta Sigma Modulator Analog Routing Register 0" bitfld.byte 0x00 7. " VP_AG7 ,Connect positive voltage input to analog global of same side 7" "Not connected,Connected" bitfld.byte 0x00 6. " VP_AG6 ,Connect positive voltage input to analog global of same side 6" "Not connected,Connected" bitfld.byte 0x00 5. " VP_AG5 ,Connect positive voltage input to analog global of same side 5" "Not connected,Connected" textline " " bitfld.byte 0x00 4. " VP_AG4 ,Connect positive voltage input to analog global of same side 4" "Not connected,Connected" bitfld.byte 0x00 3. " VP_AG3 ,Connect positive voltage input to analog global of same side 3" "Not connected,Connected" bitfld.byte 0x00 2. " VP_AG2 ,Connect positive voltage input to analog global of same side 2" "Not connected,Connected" textline " " bitfld.byte 0x00 1. " VP_AG1 ,Connect positive voltage input to analog global of same side 1" "Not connected,Connected" bitfld.byte 0x00 0. " VP_AG0 ,Connect positive voltage input to analog global of same side 0" "Not connected,Connected" group.byte 0x02++0x02 line.byte 0x00 "SW2,Delta Sigma Modulator Analog Routing Register 2" bitfld.byte 0x00 2. " VP_ABUS2 ,Connect positive voltage input to analog bus of the same side" "Not connected,Connected" bitfld.byte 0x00 0. " VP_ABUS0 ,Connect positive voltage input to analog bus of the same side" "Not connected,Connected" line.byte 0x01 "SW3,Delta Sigma Modulator Analog Routing Register 3" bitfld.byte 0x01 6. " VN_VSSA ,Connect negative voltage input to vssa" "Not connected,Connected" bitfld.byte 0x01 5. " VN_VREF ,Connect negative voltage input to Voltage Reference" "Not connected,Connected" bitfld.byte 0x01 4. " VN_AMX ,Connect negative voltage input to Analog Mux Bus" "Not connected,Connected" textline " " bitfld.byte 0x01 2. " VP_VSSA ,Connect positive voltage input to vssa" "Not connected,Connected" line.byte 0x02 "SW4,Delta Sigma Modulator Analog Routing Register 4" bitfld.byte 0x02 7. " VN_AG7 ,Connect negative voltage input to analog global of same side 7" "Not connected,Connected" bitfld.byte 0x02 5. " VN_AG5 ,Connect negative voltage input to analog global of same side 5" "Not connected,Connected" bitfld.byte 0x02 3. " VN_AG3 ,Connect negative voltage input to analog global of same side 3" "Not connected,Connected" textline " " bitfld.byte 0x02 1. " VN_AG1 ,Connect negative voltage input to analog global of same side 1" "Not connected,Connected" group.byte 0x06++0x01 line.byte 0x00 "SW6,Delta Sigma Modulator Analog Routing Register 6" bitfld.byte 0x00 3. " VN_ABUS3 ,Connect negative voltage input to analog bus of the same side" "Not connected,Connected" bitfld.byte 0x00 1. " VN_ABUS1 ,Connect negative voltage input to analog bus of the same side" "Not connected,Connected" line.byte 0x01 "CLK,Delta Sigma Modulator Clock Selection Register" bitfld.byte 0x01 4. " BYPASS_SYNC ,Bypass Synchronization" "Not bypassed,Bypassed" bitfld.byte 0x01 3. " CLK_EN ,Clock gating control" "Disabled,Enabled" bitfld.byte 0x01 0.--2. " MX_CLK ,Clock Selection" "clk_a0 & clk_a0_dig,clk_a1 & clk_a1_dig,clk_a2 & clk_a2_dig,clk_a3 & clk_a3_dig,UDB gen. clk,?..." base ad:0x40005B88 rgroup.byte 0x00++0x01 line.byte 0x00 "OUT0,DSM Output Register 0" line.byte 0x01 "OUT1,DSM Output Register 1" bitfld.byte 0x01 5. " OVDCAUSE ,Overload Cause" "0s,1s" bitfld.byte 0x01 4. " OVDFLAG ,Overload detected" "Not detected,Detected" bitfld.byte 0x01 0.--3. " DOUT2SCOMP ,DSM Output Register 1(qlev=00/qlev=01/qlev=10)" "NA/0/0,+1/+1/+1,NA/NA/+2,NA/NA/+3,NA/NA/+4,NA/NA/NA,NA/NA/NA,NA/NA/NA,NA/NA/NA,NA/NA/NA,NA/NA/NA,NA/NA/NA,NA/NA/-4,NA/NA/-3,NA/NA/-2,-1/-1/-1" width 0x0B tree.end endif tree "BUS (Bus)" base ad:0x40005B58 width 5. group.byte 0x00++0x00 line.byte 0x00 "SW0,Bus Switch Register 0" bitfld.byte 0x00 7. " AG7 ,Connect AGL[7] and AGR[7]" "Not connected,Connected" bitfld.byte 0x00 6. " AG6 ,Connect AGL[6] and AGR[6]" "Not connected,Connected" bitfld.byte 0x00 5. " AG5 ,Connect AGL[5] and AGR[5]" "Not connected,Connected" textline " " bitfld.byte 0x00 4. " AG4 ,Connect AGL[4] and AGR[4]" "Not connected,Connected" bitfld.byte 0x00 3. " AG3 ,Connect AGL[3] and AGR[3]" "Not connected,Connected" bitfld.byte 0x00 2. " AG2 ,Connect AGL[2] and AGR[2]" "Not connected,Connected" textline " " bitfld.byte 0x00 1. " AG1 ,Connect AGL[1] and AGR[1]" "Not connected,Connected" bitfld.byte 0x00 0. " AG0 ,Connect AGL[0] and AGR[0]" "Not connected,Connected" group.byte 0x02++0x01 line.byte 0x00 "SW2,Bus Switch Register 2" bitfld.byte 0x00 3. " ABUS3 ,Connect ABUSL[3] and ABUSR[3]" "Not connected,Connected" bitfld.byte 0x00 2. " ABUS2 ,Connect ABUSL[2] and ABUSR[2]" "Not connected,Connected" bitfld.byte 0x00 1. " ABUS1 ,Connect ABUSL[1] and ABUSR[1]" "Not connected,Connected" textline " " bitfld.byte 0x00 0. " ABUS0 ,Connect ABUSL[0] and ABUSR[0]" "Not connected,Connected" line.byte 0x01 "SW3,Bus Switch Register 3" bitfld.byte 0x01 0. " AMX ,Connect AMXL and AMXR" "Not connected,Connected" width 0xb tree.end tree "DFT" base ad:0x40005B5C width 5. group.byte 0x00++0x03 line.byte 0x00 "CR0,DFT Control Register 0" bitfld.byte 0x00 7. " FORCE_TP2 ,test point 2 - force low" "Not forced,Forced" bitfld.byte 0x00 6. " EN_TP2 ,test point 2 - enable level-shifting" "Disabled,Enabled" bitfld.byte 0x00 5. " FORCE_TP1 ,test point 1 - force high" "Not forced,Forced" textline " " bitfld.byte 0x00 4. " EN_TP1 ,test point 1 - enable level-shifting" "Disabled,Enabled" bitfld.byte 0x00 0.--2. " TVMON1_SEL ,Connect power net to tvmon1 test point" "Not connected,vsleep,vpwrka,vpwri2c,vpb,vpwra,vnwell,Not connected" line.byte 0x01 "CR1,DFT Control Register 1" bitfld.byte 0x01 0.--2. " TVMON2_SEL ,Connect power net to tvmon2 test point" "Not connected,vnb,bref_v800mV,Digital LDO output,nprot,biasn,vssa,Not connected" line.byte 0x02 "CR2,DFT Control Register 2" bitfld.byte 0x02 4.--6. " DFT_MX1 ,Connect test signals to AGL <7>" "Not connected,dac2_tmux,cmp_dft,pwrsys tvmon1,pwrsys tvmon2,dsm0_sump_tst,bref_itest,?..." bitfld.byte 0x02 0.--2. " DFT_MX0 ,Connect test signals to AGL <4>" "Not connected,dac0_tmux,dsm0_sumn_tst,dsm0_refout,dsm0_tst_digout,ts_dft,fm_dft,?..." line.byte 0x03 "CR3,DFT Control Register 3" bitfld.byte 0x03 4.--6. " DFT_MX3 ,Connect test signals to AGR<7>" "Not connected,dac1_tmux,s8xosc_testout_dft,bgrefs_tmux,bg_tmux,x32_tst,pll_VctrlIO,?..." bitfld.byte 0x03 0.--2. " DFT_MX2 ,Connect test signals to AGR<4>" "Not connected,dacr1_tmux,bref_isrc7,lcddac_dft,s8xosc_tpump_dft,pwrsys tvmon1a,pwrsys tvmon2a,?..." width 0x0B tree.end tree "USB (USB controller)" base ad:0x40006000 width 16. group.byte 0x00++0x0E line.byte 0x0 "EP0_DR0,Control End point EP0 Data Register" bitfld.byte 0x0 7. " DATA_BYTE[7] ,Data byte bit 7" "Low,High" bitfld.byte 0x0 6. " DATA_BYTE[6] ,Data byte bit 6" "Low,High" bitfld.byte 0x0 5. " DATA_BYTE[5] ,Data byte bit 5" "Low,High" bitfld.byte 0x0 4. " DATA_BYTE[4] ,Data byte bit 4" "Low,High" textline " " bitfld.byte 0x0 3. " DATA_BYTE[3] ,Data byte bit 3" "Low,High" bitfld.byte 0x0 2. " DATA_BYTE[2] ,Data byte bit 2" "Low,High" bitfld.byte 0x0 1. " DATA_BYTE[1] ,Data byte bit 1" "Low,High" bitfld.byte 0x0 0. " DATA_BYTE[0] ,Data byte bit 0" "Low,High" line.byte 0x1 "EP0_DR1,Control End point EP0 Data Register" bitfld.byte 0x1 7. " DATA_BYTE[7] ,Data byte bit 7" "Low,High" bitfld.byte 0x1 6. " DATA_BYTE[6] ,Data byte bit 6" "Low,High" bitfld.byte 0x1 5. " DATA_BYTE[5] ,Data byte bit 5" "Low,High" bitfld.byte 0x1 4. " DATA_BYTE[4] ,Data byte bit 4" "Low,High" textline " " bitfld.byte 0x1 3. " DATA_BYTE[3] ,Data byte bit 3" "Low,High" bitfld.byte 0x1 2. " DATA_BYTE[2] ,Data byte bit 2" "Low,High" bitfld.byte 0x1 1. " DATA_BYTE[1] ,Data byte bit 1" "Low,High" bitfld.byte 0x1 0. " DATA_BYTE[0] ,Data byte bit 0" "Low,High" line.byte 0x2 "EP0_DR2,Control End point EP0 Data Register" bitfld.byte 0x2 7. " DATA_BYTE[7] ,Data byte bit 7" "Low,High" bitfld.byte 0x2 6. " DATA_BYTE[6] ,Data byte bit 6" "Low,High" bitfld.byte 0x2 5. " DATA_BYTE[5] ,Data byte bit 5" "Low,High" bitfld.byte 0x2 4. " DATA_BYTE[4] ,Data byte bit 4" "Low,High" textline " " bitfld.byte 0x2 3. " DATA_BYTE[3] ,Data byte bit 3" "Low,High" bitfld.byte 0x2 2. " DATA_BYTE[2] ,Data byte bit 2" "Low,High" bitfld.byte 0x2 1. " DATA_BYTE[1] ,Data byte bit 1" "Low,High" bitfld.byte 0x2 0. " DATA_BYTE[0] ,Data byte bit 0" "Low,High" line.byte 0x3 "EP0_DR3,Control End point EP0 Data Register" bitfld.byte 0x3 7. " DATA_BYTE[7] ,Data byte bit 7" "Low,High" bitfld.byte 0x3 6. " DATA_BYTE[6] ,Data byte bit 6" "Low,High" bitfld.byte 0x3 5. " DATA_BYTE[5] ,Data byte bit 5" "Low,High" bitfld.byte 0x3 4. " DATA_BYTE[4] ,Data byte bit 4" "Low,High" textline " " bitfld.byte 0x3 3. " DATA_BYTE[3] ,Data byte bit 3" "Low,High" bitfld.byte 0x3 2. " DATA_BYTE[2] ,Data byte bit 2" "Low,High" bitfld.byte 0x3 1. " DATA_BYTE[1] ,Data byte bit 1" "Low,High" bitfld.byte 0x3 0. " DATA_BYTE[0] ,Data byte bit 0" "Low,High" line.byte 0x4 "EP0_DR4,Control End point EP0 Data Register" bitfld.byte 0x4 7. " DATA_BYTE[7] ,Data byte bit 7" "Low,High" bitfld.byte 0x4 6. " DATA_BYTE[6] ,Data byte bit 6" "Low,High" bitfld.byte 0x4 5. " DATA_BYTE[5] ,Data byte bit 5" "Low,High" bitfld.byte 0x4 4. " DATA_BYTE[4] ,Data byte bit 4" "Low,High" textline " " bitfld.byte 0x4 3. " DATA_BYTE[3] ,Data byte bit 3" "Low,High" bitfld.byte 0x4 2. " DATA_BYTE[2] ,Data byte bit 2" "Low,High" bitfld.byte 0x4 1. " DATA_BYTE[1] ,Data byte bit 1" "Low,High" bitfld.byte 0x4 0. " DATA_BYTE[0] ,Data byte bit 0" "Low,High" line.byte 0x5 "EP0_DR5,Control End point EP0 Data Register" bitfld.byte 0x5 7. " DATA_BYTE[7] ,Data byte bit 7" "Low,High" bitfld.byte 0x5 6. " DATA_BYTE[6] ,Data byte bit 6" "Low,High" bitfld.byte 0x5 5. " DATA_BYTE[5] ,Data byte bit 5" "Low,High" bitfld.byte 0x5 4. " DATA_BYTE[4] ,Data byte bit 4" "Low,High" textline " " bitfld.byte 0x5 3. " DATA_BYTE[3] ,Data byte bit 3" "Low,High" bitfld.byte 0x5 2. " DATA_BYTE[2] ,Data byte bit 2" "Low,High" bitfld.byte 0x5 1. " DATA_BYTE[1] ,Data byte bit 1" "Low,High" bitfld.byte 0x5 0. " DATA_BYTE[0] ,Data byte bit 0" "Low,High" line.byte 0x6 "EP0_DR6,Control End point EP0 Data Register" bitfld.byte 0x6 7. " DATA_BYTE[7] ,Data byte bit 7" "Low,High" bitfld.byte 0x6 6. " DATA_BYTE[6] ,Data byte bit 6" "Low,High" bitfld.byte 0x6 5. " DATA_BYTE[5] ,Data byte bit 5" "Low,High" bitfld.byte 0x6 4. " DATA_BYTE[4] ,Data byte bit 4" "Low,High" textline " " bitfld.byte 0x6 3. " DATA_BYTE[3] ,Data byte bit 3" "Low,High" bitfld.byte 0x6 2. " DATA_BYTE[2] ,Data byte bit 2" "Low,High" bitfld.byte 0x6 1. " DATA_BYTE[1] ,Data byte bit 1" "Low,High" bitfld.byte 0x6 0. " DATA_BYTE[0] ,Data byte bit 0" "Low,High" line.byte 0x7 "EP0_DR7,Control End point EP0 Data Register" bitfld.byte 0x7 7. " DATA_BYTE[7] ,Data byte bit 7" "Low,High" bitfld.byte 0x7 6. " DATA_BYTE[6] ,Data byte bit 6" "Low,High" bitfld.byte 0x7 5. " DATA_BYTE[5] ,Data byte bit 5" "Low,High" bitfld.byte 0x7 4. " DATA_BYTE[4] ,Data byte bit 4" "Low,High" textline " " bitfld.byte 0x7 3. " DATA_BYTE[3] ,Data byte bit 3" "Low,High" bitfld.byte 0x7 2. " DATA_BYTE[2] ,Data byte bit 2" "Low,High" bitfld.byte 0x7 1. " DATA_BYTE[1] ,Data byte bit 1" "Low,High" bitfld.byte 0x7 0. " DATA_BYTE[0] ,Data byte bit 0" "Low,High" textline " " line.byte 0x08 "CR0,USB control 0 Register" bitfld.byte 0x08 7. " USB_ENABLE ,Enables the PSoC device to respond to USB traffic" "Disabled,Enabled" hexmask.byte 0x08 0.--6. 1. " DEVICE_ADDRESS ,USB device address" line.byte 0x09 "CR1,USB control 1 Register" bitfld.byte 0x09 2. " BUS_ACTIVITY ,Bus Activity" "No activity,Non-idle" bitfld.byte 0x09 1. " ENABLE_LOCK ,Automatic frequency locking enable" "Disabled,Enabled" bitfld.byte 0x09 0. " REG_ENABLE ,Internal USB regulator enable" "Disabled,Enabled" line.byte 0x0A "SIE_EP_INT_EN,USB SIE Data Endpoints Interrupt Enable Register" bitfld.byte 0x0a 7. " EP8_INTR_EN ,EP8 Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x0a 6. " EP7_INTR_EN ,EP7 Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x0a 5. " EP6_INTR_EN ,EP6 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.byte 0x0a 4. " EP5_INTR_EN ,EP5 Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x0a 3. " EP4_INTR_EN ,EP4 Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x0a 2. " EP3_INTR_EN ,EP3 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.byte 0x0a 1. " EP2_INTR_EN ,EP2 Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x0a 0. " EP1_INTR_EN ,EP1 Interrupt Enable" "Disabled,Enabled" line.byte 0x0B "SIE_EP_INT_SR,SIE Data Endpoint Interrupt Status" eventfld.byte 0x0b 7. " EP8_INTR ,EP8 Interrupt Status" "No interrupt,Interrupt" eventfld.byte 0x0b 6. " EP7_INTR ,EP7 Interrupt Status" "No interrupt,Interrupt" eventfld.byte 0x0b 5. " EP6_INTR ,EP6 Interrupt Status" "No interrupt,Interrupt" textline " " eventfld.byte 0x0b 4. " EP5_INTR ,EP5 Interrupt Status" "No interrupt,Interrupt" eventfld.byte 0x0b 3. " EP4_INTR ,EP4 Interrupt Status" "No interrupt,Interrupt" eventfld.byte 0x0b 2. " EP3_INTR ,EP3 Interrupt Status" "No interrupt,Interrupt" textline " " eventfld.byte 0x0b 1. " EP2_INTR ,EP2 Interrupt Status" "No interrupt,Interrupt" eventfld.byte 0x0b 0. " EP1_INTR ,EP1 Interrupt Status" "No interrupt,Interrupt" textline " " line.byte 0x0C "SIE_EP1_CNT0,Non-control endpoint count register" bitfld.byte 0x0C 7. " DATA_TOGGLE ,Selects the DATA packet's toggle state" "DATA0,DATA1" bitfld.byte 0x0C 6. " DATA_VALID ,Data valid" "Error,No error" bitfld.byte 0x0C 0.--2. " DATA_COUNT_MSB ,3 MSb bits of a 11-bit counter" "0,1,2,3,4,5,6,7" line.byte 0x0D "SIE_EP1_CNT1,Non-control endpoint count register" line.byte 0x0E "SIE_EP1_CR0,Non-control endpoint's control Register" bitfld.byte 0x0e 7. " STALL ,SIE stalls an OUT packet" "Not stalled,Stalled" eventfld.byte 0x0e 6. " ERR_IN_TXN ,Error in transaction" "No error,Error" bitfld.byte 0x0e 5. " NAK_INT_EN ,Interrupt after transaction is complete by sending NAK" "No interrupt,Interrupt" textline " " eventfld.byte 0x0e 4. " ACKED_TXN ,Indicates a transaction ended with an ACK" "No ACK,ACK" bitfld.byte 0x0e 0.--3. " MODE ,Mode control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0x10++0x02 line.byte 0x00 "USBIO_CR0,USBIO Control 0 Register" bitfld.byte 0x00 7. " TEN ,USB Transmit Enable" "Disabled,Enabled" bitfld.byte 0x00 6. " TSE0 ,Transmit Single-Ended Zero" "Not forced,Forced" bitfld.byte 0x00 5. " TD ,Transmit Data" "USB K,USB J" textline " " bitfld.byte 0x00 0. " RD ,Received Data" "Low,High" line.byte 0x01 "USBIO_CR2,USBIO control 2 Register" bitfld.byte 0x01 7. " TEST_RES ,Apply resistor to the D+ pin" "No effect,Applied" bitfld.byte 0x01 6. " TEST_PKT ,Generate one packet" "No effect,Generated" bitfld.byte 0x01 5. " X_DEC ,Decrement crossover voltage" "Disabled,Enabled" textline " " bitfld.byte 0x01 4. " X_INC ,Increment crossover voltage" "Disabled,Enabled" bitfld.byte 0x01 3. " MINC ,Increases the USB edge matching ratio" "Not increased,Increased" bitfld.byte 0x01 2. " MDEC ,Decreases the USB edge matching ratio." "Not decreased,Decreased" textline " " bitfld.byte 0x01 0.--1. " TRIM ,Two bits of trim" "0,1,2,3" line.byte 0x02 "USBIO_CR1,USBIO control 1 Register" bitfld.byte 0x02 7. " IOMODE ,USB/Drive Mode" "USB,Drive" bitfld.byte 0x02 6. " DRIVE_MODE ,Drive mode configuration" "Open drain,CMOS drive" bitfld.byte 0x02 5. " DPI ,Drive the D+ pin" "Low,High" textline " " bitfld.byte 0x02 4. " DMI ,Drive the D- pin" "Low,High" bitfld.byte 0x02 3. " P2PUEN ,Apply 5K pull-ups between Vdd and both D+ and D- pads" "No effect,Applied" bitfld.byte 0x02 2. " USBPUEN ,Apply internal USB pull-up resistor to D+ pad" "No effect,Applied" textline " " bitfld.byte 0x02 1. " DPO ,State of the D+ pin" "Low,High" bitfld.byte 0x02 0. " DMO ,State of the D- pin" "Low,High" rgroup.byte 0x18++0x01 line.byte 0x00 "SOF0,Start Of Frame Register" line.byte 0x01 "SOF1,Start Of Frame Register" bitfld.byte 0x01 0.--2. " FRAME_NUMBER ,Upper 3 bits [10:8] of the SOF frame number" "0,1,2,3,4,5,6,7" group.byte 0x1C++0x02 line.byte 0x00 "SIE_EP2_CNT0,Non-control endpoint count register" bitfld.byte 0x00 7. " DATA_TOGGLE ,DATA packet's toggle state selection" "DATA0,DATA1" bitfld.byte 0x00 6. " DATA_VALID ,Data valid" "Error,No error" bitfld.byte 0x00 0.--2. " DATA_COUNT_MSB ,3 MSb bits of a 11-bit counter" "0,1,2,3,4,5,6,7" line.byte 0x01 "SIE_EP2_CNT1,Non-control endpoint count register" line.byte 0x02 "SIE_EP2_CR0,Non-control endpoint's control Register" bitfld.byte 0x02 7. " STALL ,SIE stalls an OUT packet" "Not stalled,Stalled" eventfld.byte 0x02 6. " ERR_IN_TXN ,Error in transaction" "No error,Error" bitfld.byte 0x02 5. " NAK_INT_EN ,Interrupt after transaction is complete by sending NAK" "No interrupt,Interrupt" textline " " eventfld.byte 0x02 4. " ACKED_TXN ,Indicates a transaction ended with an ACK" "No ACK,ACK" bitfld.byte 0x02 0.--3. " MODE ,Mode control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.byte 0x20++0x01 line.byte 0x00 "OSCLK_DR0,Oscillator lock data register 0" line.byte 0x01 "OSCLK_DR1,Oscillator lock data register 1" hexmask.byte 0x01 0.--6. 1. " ADDER ,Bits of the oscillator locking circuits adder output" group.byte 0x28++0x01 line.byte 0x00 "EP0_CR,Endpoint0 control Register" eventfld.byte 0x00 7. " SETUP_RCVD ,SETUP packet received" "Not received,Received" eventfld.byte 0x00 6. " IN_RCVD ,Valid IN packet received" "Not received,Received" eventfld.byte 0x00 5. " OUT_RCVD ,Valid OUT packet received and ACKed" "Not received,Received" textline " " eventfld.byte 0x00 4. " ACKED_TXN ,Indicates a transaction ended with an ACK" "No ACK,ACK" bitfld.byte 0x00 0.--3. " MODE ,Mode control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.byte 0x01 "EP0_CNT,Endpoint0 count Register" bitfld.byte 0x01 7. " DATA_TOGGLE ,Selects the DATA packet's toggle state" "DATA0,DATA1" bitfld.byte 0x01 6. " DATA_VALID ,Data valid" "Error,No error" bitfld.byte 0x01 0.--3. " BYTE_COUNT ,Number of data bytes in a transaction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " group.byte 0x2C++0x02 line.byte 0x00 "SIE_EP3_CNT0,Non-control endpoint count register" bitfld.byte 0x00 7. " DATA_TOGGLE ,DATA packet's toggle state selection" "DATA0,DATA1" bitfld.byte 0x00 6. " DATA_VALID ,Data valid" "Error,No error" bitfld.byte 0x00 0.--2. " DATA_COUNT_MSB ,3 MSb bits of a 11-bit counter" "0,1,2,3,4,5,6,7" line.byte 0x01 "SIE_EP3_CNT1,Non-control endpoint count register" line.byte 0x02 "SIE_EP3_CR0,Non-control endpoint's control Register" bitfld.byte 0x02 7. " STALL ,SIE stalls an OUT packet" "Not stalled,Stalled" eventfld.byte 0x02 6. " ERR_IN_TXN ,Error in transaction" "No error,Error" bitfld.byte 0x02 5. " NAK_INT_EN ,Interrupt after transaction is complete by sending NAK" "No interrupt,Interrupt" textline " " eventfld.byte 0x02 4. " ACKED_TXN ,Indicates a transaction ended with an ACK" "No ACK,ACK" bitfld.byte 0x02 0.--3. " MODE ,Mode control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0x3C++0x02 line.byte 0x00 "SIE_EP4_CNT0,Non-control endpoint count register" bitfld.byte 0x00 7. " DATA_TOGGLE ,DATA packet's toggle state selection" "DATA0,DATA1" bitfld.byte 0x00 6. " DATA_VALID ,Data valid" "Error,No error" bitfld.byte 0x00 0.--2. " DATA_COUNT_MSB ,3 MSb bits of a 11-bit counter" "0,1,2,3,4,5,6,7" line.byte 0x01 "SIE_EP4_CNT1,Non-control endpoint count register" line.byte 0x02 "SIE_EP4_CR0,Non-control endpoint's control Register" bitfld.byte 0x02 7. " STALL ,SIE stalls an OUT packet" "Not stalled,Stalled" eventfld.byte 0x02 6. " ERR_IN_TXN ,Error in transaction" "No error,Error" bitfld.byte 0x02 5. " NAK_INT_EN ,Interrupt after transaction is complete by sending NAK" "No interrupt,Interrupt" textline " " eventfld.byte 0x02 4. " ACKED_TXN ,Indicates a transaction ended with an ACK" "No ACK,ACK" bitfld.byte 0x02 0.--3. " MODE ,Mode control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0x4C++0x02 line.byte 0x00 "SIE_EP5_CNT0,Non-control endpoint count register" bitfld.byte 0x00 7. " DATA_TOGGLE ,DATA packet's toggle state selection" "DATA0,DATA1" bitfld.byte 0x00 6. " DATA_VALID ,Data valid" "Error,No error" bitfld.byte 0x00 0.--2. " DATA_COUNT_MSB ,3 MSb bits of a 11-bit counter" "0,1,2,3,4,5,6,7" line.byte 0x01 "SIE_EP5_CNT1,Non-control endpoint count register" line.byte 0x02 "SIE_EP5_CR0,Non-control endpoint's control Register" bitfld.byte 0x02 7. " STALL ,SIE stalls an OUT packet" "Not stalled,Stalled" eventfld.byte 0x02 6. " ERR_IN_TXN ,Error in transaction" "No error,Error" bitfld.byte 0x02 5. " NAK_INT_EN ,Interrupt after transaction is complete by sending NAK" "No interrupt,Interrupt" textline " " eventfld.byte 0x02 4. " ACKED_TXN ,Indicates a transaction ended with an ACK" "No ACK,ACK" bitfld.byte 0x02 0.--3. " MODE ,Mode control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0x5C++0x02 line.byte 0x00 "SIE_EP6_CNT0,Non-control endpoint count register" bitfld.byte 0x00 7. " DATA_TOGGLE ,DATA packet's toggle state selection" "DATA0,DATA1" bitfld.byte 0x00 6. " DATA_VALID ,Data valid" "Error,No error" bitfld.byte 0x00 0.--2. " DATA_COUNT_MSB ,3 MSb bits of a 11-bit counter" "0,1,2,3,4,5,6,7" line.byte 0x01 "SIE_EP6_CNT1,Non-control endpoint count register" line.byte 0x02 "SIE_EP6_CR0,Non-control endpoint's control Register" bitfld.byte 0x02 7. " STALL ,SIE stalls an OUT packet" "Not stalled,Stalled" eventfld.byte 0x02 6. " ERR_IN_TXN ,Error in transaction" "No error,Error" bitfld.byte 0x02 5. " NAK_INT_EN ,Interrupt after transaction is complete by sending NAK" "No interrupt,Interrupt" textline " " eventfld.byte 0x02 4. " ACKED_TXN ,Indicates a transaction ended with an ACK" "No ACK,ACK" bitfld.byte 0x02 0.--3. " MODE ,Mode control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0x6C++0x02 line.byte 0x00 "SIE_EP7_CNT0,Non-control endpoint count register" bitfld.byte 0x00 7. " DATA_TOGGLE ,DATA packet's toggle state selection" "DATA0,DATA1" bitfld.byte 0x00 6. " DATA_VALID ,Data valid" "Error,No error" bitfld.byte 0x00 0.--2. " DATA_COUNT_MSB ,3 MSb bits of a 11-bit counter" "0,1,2,3,4,5,6,7" line.byte 0x01 "SIE_EP7_CNT1,Non-control endpoint count register" line.byte 0x02 "SIE_EP7_CR0,Non-control endpoint's control Register" bitfld.byte 0x02 7. " STALL ,SIE stalls an OUT packet" "Not stalled,Stalled" eventfld.byte 0x02 6. " ERR_IN_TXN ,Error in transaction" "No error,Error" bitfld.byte 0x02 5. " NAK_INT_EN ,Interrupt after transaction is complete by sending NAK" "No interrupt,Interrupt" textline " " eventfld.byte 0x02 4. " ACKED_TXN ,Indicates a transaction ended with an ACK" "No ACK,ACK" bitfld.byte 0x02 0.--3. " MODE ,Mode control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0x7C++0x02 line.byte 0x00 "SIE_EP8_CNT0,Non-control endpoint count register" bitfld.byte 0x00 7. " DATA_TOGGLE ,DATA packet's toggle state selection" "DATA0,DATA1" bitfld.byte 0x00 6. " DATA_VALID ,Data valid" "Error,No error" bitfld.byte 0x00 0.--2. " DATA_COUNT_MSB ,3 MSb bits of a 11-bit counter" "0,1,2,3,4,5,6,7" line.byte 0x01 "SIE_EP8_CNT1,Non-control endpoint count register" line.byte 0x02 "SIE_EP8_CR0,Non-control endpoint's control Register" bitfld.byte 0x02 7. " STALL ,SIE stalls an OUT packet" "Not stalled,Stalled" eventfld.byte 0x02 6. " ERR_IN_TXN ,Error in transaction" "No error,Error" bitfld.byte 0x02 5. " NAK_INT_EN ,Interrupt after transaction is complete by sending NAK" "No interrupt,Interrupt" textline " " eventfld.byte 0x02 4. " ACKED_TXN ,Indicates a transaction ended with an ACK" "No ACK,ACK" bitfld.byte 0x02 0.--3. " MODE ,Mode control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " width 16. group.byte 0x80++0x02 line.byte 0x00 "ARB_EP1_CFG,Endpoint Configuration Register" bitfld.byte 0x00 3. " RESET_PTR ,Configuration Setting to Reset the RA and WA Pointers" "No reset,Reset" bitfld.byte 0x00 2. " CRC_BYPASS ,CRC Bypass" "Not bypassed,Bypassed" bitfld.byte 0x00 1. " DMA_REQ ,Manual DMA Request" "Not requested,Requested" textline " " bitfld.byte 0x00 0. " IN_DATA_RDY ,Endpoint Packet Data Ready" "Not ready,Ready" line.byte 0x01 "ARB_EP1_INT_EN,Endpoint Interrupt Enable Register" bitfld.byte 0x01 4. " ERR_INT_EN ,Endpoint Error in Transaction Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x01 3. " BUF_UNDER_EN ,Endpoint Buffer Underflow Enable" "Disabled,Enabled" bitfld.byte 0x01 2. " BUF_OVER_EN ,Endpoint Buffer Overflow Enable" "Disabled,Enabled" textline " " bitfld.byte 0x01 1. " DMA_GNT_EN ,Endpoint DMA Grant Enable" "Disabled,Enabled" bitfld.byte 0x01 0. " in_buf_full_en ,IN Endpoint Local Buffer Full Enable" "Disabled,Enabled" line.byte 0x02 "ARB_EP1_SR,Endpoint Status Register" eventfld.byte 0x02 3. " BUF_UNDER ,Endpoint Buffer Underflow Indication" "No underflow,Underflow" eventfld.byte 0x02 2. " BUF_OVER ,Endpoint Buffer Overflow Indication" "No overflow,Overflow" eventfld.byte 0x02 1. " DMA_GNT ,Endpoint DMA Grant Indication" "Not granted,Granted" textline " " eventfld.byte 0x02 0. " IN_BUF_FULL ,IN Endpoint Local Buffer Full Indication" "Not full,Full" group.byte (0x80+0x04)++0x04 line.byte 0x00 "ARB_RW1_WA,Endpoint Write Address value" line.byte 0x01 "ARB_RW1_WA_MSB,Endpoint Write Address value" bitfld.byte 0x01 0. " WA_MSB ,Write Address for EP" "0,1" line.byte 0x02 "ARB_RW1_RA,Endpoint Read Address value" line.byte 0x03 "ARB_RW1_RA_MSB,Endpoint Read Address value" bitfld.byte 0x03 0. " RA_MSB ,Read Address for EP" "0,1" textline " " line.byte 0x04 "ARB_RW1_DR,Endpoint Data Register" bitfld.byte 0x04 7. " DR[7] ,Data bit 7" "Low,High" bitfld.byte 0x04 6. " [6] ,Data bit 6" "Low,High" bitfld.byte 0x04 5. " [5] ,Data bit 5" "Low,High" bitfld.byte 0x04 4. " [4] ,EData bit 4" "Low,High" textline " " bitfld.byte 0x04 3. " [3] ,Data bit 3" "Low,High" bitfld.byte 0x04 2. " [2] ,Data bit 2" "Low,High" bitfld.byte 0x04 1. " [1] ,Data bit 1" "Low,High" bitfld.byte 0x04 0. " [0] ,Data bit 0" "Low,High" textline " " width 0x0B width 16. group.byte 0x8C++0x00 line.byte 0x00 "BUF_SIZE,Dedicated Endpoint Buffer Size Register" bitfld.byte 0x00 4.--7. " OUT_BUF ,Buffer size for OUT Endpoints" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768" bitfld.byte 0x00 0.--3. " IN_BUF ,Buffer size for IN Endpoints" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768" group.byte 0x8E++0x01 line.byte 0x00 "EP_ACTIVE,Endpoint Active Indication Register" bitfld.byte 0x00 7. " EP8_ACT ,Endpoint 8 Active Indication" "Inactive,Active" bitfld.byte 0x00 6. " EP7_ACT ,Endpoint 7 Active Indication" "Inactive,Active" bitfld.byte 0x00 5. " EP6_ACT ,Endpoint 6 Active Indication" "Inactive,Active" bitfld.byte 0x00 4. " EP5_ACT ,Endpoint 5 Active Indication" "Inactive,Active" textline " " bitfld.byte 0x00 3. " EP4_ACT ,Endpoint 4 Active Indication" "Inactive,Active" bitfld.byte 0x00 2. " EP3_ACT ,Endpoint 3 Active Indication" "Inactive,Active" bitfld.byte 0x00 1. " EP2_ACT ,Endpoint 2 Active Indication" "Inactive,Active" bitfld.byte 0x00 0. " EP1_ACT ,Endpoint 1 Active Indication" "Inactive,Active" line.byte 0x01 "EP_TYPE,Endpoint Type (IN/OUT) Indication" bitfld.byte 0x01 7. " EP8_TYP ,Endpoint 8 Type Indication" "IN,OUT" bitfld.byte 0x01 6. " EP7_TYP ,Endpoint 7 Type Indication" "IN,OUT" bitfld.byte 0x01 5. " EP6_TYP ,Endpoint 6 Type Indication" "IN,OUT" bitfld.byte 0x01 4. " EP5_TYP ,Endpoint 5 Type Indication" "IN,OUT" textline " " bitfld.byte 0x01 3. " EP4_TYP ,Endpoint 4 Type Indication" "IN,OUT" bitfld.byte 0x01 2. " EP3_TYP ,Endpoint 3 Type Indication" "IN,OUT" bitfld.byte 0x01 1. " EP2_TYP ,Endpoint 2 Type Indication" "IN,OUT" bitfld.byte 0x01 0. " EP1_TYP ,Endpoint 1 Type Indication" "IN,OUT" textline " " width 16. group.byte 0x90++0x02 line.byte 0x00 "ARB_EP2_CFG,Endpoint Configuration Register" bitfld.byte 0x00 3. " RESET_PTR ,Configuration Setting to Reset the RA and WA Pointers" "No reset,Reset" bitfld.byte 0x00 2. " CRC_BYPASS ,CRC Bypass" "Not bypassed,Bypassed" bitfld.byte 0x00 1. " DMA_REQ ,Manual DMA Request" "Not requested,Requested" textline " " bitfld.byte 0x00 0. " IN_DATA_RDY ,Endpoint Packet Data Ready" "Not ready,Ready" line.byte 0x01 "ARB_EP2_INT_EN,Endpoint Interrupt Enable Register" bitfld.byte 0x01 4. " ERR_INT_EN ,Endpoint Error in Transaction Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x01 3. " BUF_UNDER_EN ,Endpoint Buffer Underflow Enable" "Disabled,Enabled" bitfld.byte 0x01 2. " BUF_OVER_EN ,Endpoint Buffer Overflow Enable" "Disabled,Enabled" textline " " bitfld.byte 0x01 1. " DMA_GNT_EN ,Endpoint DMA Grant Enable" "Disabled,Enabled" bitfld.byte 0x01 0. " in_buf_full_en ,IN Endpoint Local Buffer Full Enable" "Disabled,Enabled" line.byte 0x02 "ARB_EP2_SR,Endpoint Status Register" eventfld.byte 0x02 3. " BUF_UNDER ,Endpoint Buffer Underflow Indication" "No underflow,Underflow" eventfld.byte 0x02 2. " BUF_OVER ,Endpoint Buffer Overflow Indication" "No overflow,Overflow" eventfld.byte 0x02 1. " DMA_GNT ,Endpoint DMA Grant Indication" "Not granted,Granted" textline " " eventfld.byte 0x02 0. " IN_BUF_FULL ,IN Endpoint Local Buffer Full Indication" "Not full,Full" group.byte (0x90+0x04)++0x04 line.byte 0x00 "ARB_RW2_WA,Endpoint Write Address value" line.byte 0x01 "ARB_RW2_WA_MSB,Endpoint Write Address value" bitfld.byte 0x01 0. " WA_MSB ,Write Address for EP" "0,1" line.byte 0x02 "ARB_RW2_RA,Endpoint Read Address value" line.byte 0x03 "ARB_RW2_RA_MSB,Endpoint Read Address value" bitfld.byte 0x03 0. " RA_MSB ,Read Address for EP" "0,1" textline " " line.byte 0x04 "ARB_RW2_DR,Endpoint Data Register" bitfld.byte 0x04 7. " DR[7] ,Data bit 7" "Low,High" bitfld.byte 0x04 6. " [6] ,Data bit 6" "Low,High" bitfld.byte 0x04 5. " [5] ,Data bit 5" "Low,High" bitfld.byte 0x04 4. " [4] ,EData bit 4" "Low,High" textline " " bitfld.byte 0x04 3. " [3] ,Data bit 3" "Low,High" bitfld.byte 0x04 2. " [2] ,Data bit 2" "Low,High" bitfld.byte 0x04 1. " [1] ,Data bit 1" "Low,High" bitfld.byte 0x04 0. " [0] ,Data bit 0" "Low,High" textline " " width 0x0B width 16. group.byte 0x9C++0x02 line.byte 0x00 "ARB_CFG,Arbiter Configuration Register" bitfld.byte 0x00 7. " CFG_CMP ,Register Configuration Complete Indication" "In progress,Completed" bitfld.byte 0x00 5.--6. " DMA_CFG ,DMA Access Configuration" "No DMA,Manual,Auto & Manual,?..." bitfld.byte 0x00 4. " AUTO_MEM ,Auto / Manual Memory Configuration" "Manual,Auto" line.byte 0x01 "USB_CLK_EN,USB Block Clock Enable Register" bitfld.byte 0x01 0. " CSR_CLK_EN ,Clock Enable for Core Logic clocked by AHB bus clock" "Disabled,Enabled" line.byte 0x02 "ARB_INT_EN,Arbiter Interrupt Enable" bitfld.byte 0x02 7. " EP8_INTR_EN ,EP8 Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x02 6. " EP7_INTR_EN ,EP7 Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x02 5. " EP6_INTR_EN ,EP6 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.byte 0x02 4. " EP5_INTR_EN ,EP5 Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x02 3. " EP4_INTR_EN ,EP4 Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x02 2. " EP3_INTR_EN ,EP3 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.byte 0x02 1. " EP2_INTR_EN ,EP2 Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x02 0. " EP1_INTR_EN ,EP1 Interrupt Enable" "Disabled,Enabled" rgroup.byte 0x9F++0x00 line.byte 0x00 "ARB_INT_SR,Arbiter Interrupt Status" bitfld.byte 0x00 7. " EP8_INTR ,EP8 Interrupt Status" "No interrupt,Interrupt" bitfld.byte 0x00 6. " EP7_INTR ,EP7 Interrupt Status" "No interrupt,Interrupt" bitfld.byte 0x00 5. " EP6_INTR ,EP6 Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 4. " EP5_INTR ,EP5 Interrupt Status" "No interrupt,Interrupt" bitfld.byte 0x00 3. " EP4_INTR ,EP4 Interrupt Status" "No interrupt,Interrupt" bitfld.byte 0x00 2. " EP3_INTR ,EP3 Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 1. " EP2_INTR ,EP2 Interrupt Status" "No interrupt,Interrupt" bitfld.byte 0x00 0. " EP1_INTR ,EP1 Interrupt Status" "No interrupt,Interrupt" textline " " width 16. group.byte 0xA0++0x02 line.byte 0x00 "ARB_EP3_CFG,Endpoint Configuration Register" bitfld.byte 0x00 3. " RESET_PTR ,Configuration Setting to Reset the RA and WA Pointers" "No reset,Reset" bitfld.byte 0x00 2. " CRC_BYPASS ,CRC Bypass" "Not bypassed,Bypassed" bitfld.byte 0x00 1. " DMA_REQ ,Manual DMA Request" "Not requested,Requested" textline " " bitfld.byte 0x00 0. " IN_DATA_RDY ,Endpoint Packet Data Ready" "Not ready,Ready" line.byte 0x01 "ARB_EP3_INT_EN,Endpoint Interrupt Enable Register" bitfld.byte 0x01 4. " ERR_INT_EN ,Endpoint Error in Transaction Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x01 3. " BUF_UNDER_EN ,Endpoint Buffer Underflow Enable" "Disabled,Enabled" bitfld.byte 0x01 2. " BUF_OVER_EN ,Endpoint Buffer Overflow Enable" "Disabled,Enabled" textline " " bitfld.byte 0x01 1. " DMA_GNT_EN ,Endpoint DMA Grant Enable" "Disabled,Enabled" bitfld.byte 0x01 0. " in_buf_full_en ,IN Endpoint Local Buffer Full Enable" "Disabled,Enabled" line.byte 0x02 "ARB_EP3_SR,Endpoint Status Register" eventfld.byte 0x02 3. " BUF_UNDER ,Endpoint Buffer Underflow Indication" "No underflow,Underflow" eventfld.byte 0x02 2. " BUF_OVER ,Endpoint Buffer Overflow Indication" "No overflow,Overflow" eventfld.byte 0x02 1. " DMA_GNT ,Endpoint DMA Grant Indication" "Not granted,Granted" textline " " eventfld.byte 0x02 0. " IN_BUF_FULL ,IN Endpoint Local Buffer Full Indication" "Not full,Full" group.byte (0xA0+0x04)++0x04 line.byte 0x00 "ARB_RW3_WA,Endpoint Write Address value" line.byte 0x01 "ARB_RW3_WA_MSB,Endpoint Write Address value" bitfld.byte 0x01 0. " WA_MSB ,Write Address for EP" "0,1" line.byte 0x02 "ARB_RW3_RA,Endpoint Read Address value" line.byte 0x03 "ARB_RW3_RA_MSB,Endpoint Read Address value" bitfld.byte 0x03 0. " RA_MSB ,Read Address for EP" "0,1" textline " " line.byte 0x04 "ARB_RW3_DR,Endpoint Data Register" bitfld.byte 0x04 7. " DR[7] ,Data bit 7" "Low,High" bitfld.byte 0x04 6. " [6] ,Data bit 6" "Low,High" bitfld.byte 0x04 5. " [5] ,Data bit 5" "Low,High" bitfld.byte 0x04 4. " [4] ,EData bit 4" "Low,High" textline " " bitfld.byte 0x04 3. " [3] ,Data bit 3" "Low,High" bitfld.byte 0x04 2. " [2] ,Data bit 2" "Low,High" bitfld.byte 0x04 1. " [1] ,Data bit 1" "Low,High" bitfld.byte 0x04 0. " [0] ,Data bit 0" "Low,High" textline " " width 0x0B width 16. group.byte 0xAC++0x01 line.byte 0x00 "CWA,Common Area Write Address" line.byte 0x01 "CWA_MSB,Common Area Write Address" bitfld.byte 0x01 0. " CWA_MSB ,Write Address for Common Area" "0,1" width 16. group.byte 0xB0++0x02 line.byte 0x00 "ARB_EP4_CFG,Endpoint Configuration Register" bitfld.byte 0x00 3. " RESET_PTR ,Configuration Setting to Reset the RA and WA Pointers" "No reset,Reset" bitfld.byte 0x00 2. " CRC_BYPASS ,CRC Bypass" "Not bypassed,Bypassed" bitfld.byte 0x00 1. " DMA_REQ ,Manual DMA Request" "Not requested,Requested" textline " " bitfld.byte 0x00 0. " IN_DATA_RDY ,Endpoint Packet Data Ready" "Not ready,Ready" line.byte 0x01 "ARB_EP4_INT_EN,Endpoint Interrupt Enable Register" bitfld.byte 0x01 4. " ERR_INT_EN ,Endpoint Error in Transaction Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x01 3. " BUF_UNDER_EN ,Endpoint Buffer Underflow Enable" "Disabled,Enabled" bitfld.byte 0x01 2. " BUF_OVER_EN ,Endpoint Buffer Overflow Enable" "Disabled,Enabled" textline " " bitfld.byte 0x01 1. " DMA_GNT_EN ,Endpoint DMA Grant Enable" "Disabled,Enabled" bitfld.byte 0x01 0. " in_buf_full_en ,IN Endpoint Local Buffer Full Enable" "Disabled,Enabled" line.byte 0x02 "ARB_EP4_SR,Endpoint Status Register" eventfld.byte 0x02 3. " BUF_UNDER ,Endpoint Buffer Underflow Indication" "No underflow,Underflow" eventfld.byte 0x02 2. " BUF_OVER ,Endpoint Buffer Overflow Indication" "No overflow,Overflow" eventfld.byte 0x02 1. " DMA_GNT ,Endpoint DMA Grant Indication" "Not granted,Granted" textline " " eventfld.byte 0x02 0. " IN_BUF_FULL ,IN Endpoint Local Buffer Full Indication" "Not full,Full" group.byte (0xB0+0x04)++0x04 line.byte 0x00 "ARB_RW4_WA,Endpoint Write Address value" line.byte 0x01 "ARB_RW4_WA_MSB,Endpoint Write Address value" bitfld.byte 0x01 0. " WA_MSB ,Write Address for EP" "0,1" line.byte 0x02 "ARB_RW4_RA,Endpoint Read Address value" line.byte 0x03 "ARB_RW4_RA_MSB,Endpoint Read Address value" bitfld.byte 0x03 0. " RA_MSB ,Read Address for EP" "0,1" textline " " line.byte 0x04 "ARB_RW4_DR,Endpoint Data Register" bitfld.byte 0x04 7. " DR[7] ,Data bit 7" "Low,High" bitfld.byte 0x04 6. " [6] ,Data bit 6" "Low,High" bitfld.byte 0x04 5. " [5] ,Data bit 5" "Low,High" bitfld.byte 0x04 4. " [4] ,EData bit 4" "Low,High" textline " " bitfld.byte 0x04 3. " [3] ,Data bit 3" "Low,High" bitfld.byte 0x04 2. " [2] ,Data bit 2" "Low,High" bitfld.byte 0x04 1. " [1] ,Data bit 1" "Low,High" bitfld.byte 0x04 0. " [0] ,Data bit 0" "Low,High" textline " " width 0x0B width 16. group.byte 0xBC++0x01 line.byte 0x00 "DMA_THRES,DMA Burst / Threshold Configuration" line.byte 0x01 "DMA_THRES_MSB,DMA Burst / Threshold Configuration" bitfld.byte 0x01 0. " DMA_THS_MSB ,Msb bit of 9 bit DMA Threshold count" "0,1" width 16. group.byte 0xC0++0x02 line.byte 0x00 "ARB_EP5_CFG,Endpoint Configuration Register" bitfld.byte 0x00 3. " RESET_PTR ,Configuration Setting to Reset the RA and WA Pointers" "No reset,Reset" bitfld.byte 0x00 2. " CRC_BYPASS ,CRC Bypass" "Not bypassed,Bypassed" bitfld.byte 0x00 1. " DMA_REQ ,Manual DMA Request" "Not requested,Requested" textline " " bitfld.byte 0x00 0. " IN_DATA_RDY ,Endpoint Packet Data Ready" "Not ready,Ready" line.byte 0x01 "ARB_EP5_INT_EN,Endpoint Interrupt Enable Register" bitfld.byte 0x01 4. " ERR_INT_EN ,Endpoint Error in Transaction Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x01 3. " BUF_UNDER_EN ,Endpoint Buffer Underflow Enable" "Disabled,Enabled" bitfld.byte 0x01 2. " BUF_OVER_EN ,Endpoint Buffer Overflow Enable" "Disabled,Enabled" textline " " bitfld.byte 0x01 1. " DMA_GNT_EN ,Endpoint DMA Grant Enable" "Disabled,Enabled" bitfld.byte 0x01 0. " in_buf_full_en ,IN Endpoint Local Buffer Full Enable" "Disabled,Enabled" line.byte 0x02 "ARB_EP5_SR,Endpoint Status Register" eventfld.byte 0x02 3. " BUF_UNDER ,Endpoint Buffer Underflow Indication" "No underflow,Underflow" eventfld.byte 0x02 2. " BUF_OVER ,Endpoint Buffer Overflow Indication" "No overflow,Overflow" eventfld.byte 0x02 1. " DMA_GNT ,Endpoint DMA Grant Indication" "Not granted,Granted" textline " " eventfld.byte 0x02 0. " IN_BUF_FULL ,IN Endpoint Local Buffer Full Indication" "Not full,Full" group.byte (0xC0+0x04)++0x04 line.byte 0x00 "ARB_RW5_WA,Endpoint Write Address value" line.byte 0x01 "ARB_RW5_WA_MSB,Endpoint Write Address value" bitfld.byte 0x01 0. " WA_MSB ,Write Address for EP" "0,1" line.byte 0x02 "ARB_RW5_RA,Endpoint Read Address value" line.byte 0x03 "ARB_RW5_RA_MSB,Endpoint Read Address value" bitfld.byte 0x03 0. " RA_MSB ,Read Address for EP" "0,1" textline " " line.byte 0x04 "ARB_RW5_DR,Endpoint Data Register" bitfld.byte 0x04 7. " DR[7] ,Data bit 7" "Low,High" bitfld.byte 0x04 6. " [6] ,Data bit 6" "Low,High" bitfld.byte 0x04 5. " [5] ,Data bit 5" "Low,High" bitfld.byte 0x04 4. " [4] ,EData bit 4" "Low,High" textline " " bitfld.byte 0x04 3. " [3] ,Data bit 3" "Low,High" bitfld.byte 0x04 2. " [2] ,Data bit 2" "Low,High" bitfld.byte 0x04 1. " [1] ,Data bit 1" "Low,High" bitfld.byte 0x04 0. " [0] ,Data bit 0" "Low,High" textline " " width 0x0B width 16. group.byte 0xCC++0x00 line.byte 0x00 "BUS_RST_CNT,Bus Reset Count Register" bitfld.byte 0x00 0.--1. " BUS_RST_CNT ,Bus Reset Count Length" "0,1,2,3" width 16. group.byte 0xD0++0x02 line.byte 0x00 "ARB_EP6_CFG,Endpoint Configuration Register" bitfld.byte 0x00 3. " RESET_PTR ,Configuration Setting to Reset the RA and WA Pointers" "No reset,Reset" bitfld.byte 0x00 2. " CRC_BYPASS ,CRC Bypass" "Not bypassed,Bypassed" bitfld.byte 0x00 1. " DMA_REQ ,Manual DMA Request" "Not requested,Requested" textline " " bitfld.byte 0x00 0. " IN_DATA_RDY ,Endpoint Packet Data Ready" "Not ready,Ready" line.byte 0x01 "ARB_EP6_INT_EN,Endpoint Interrupt Enable Register" bitfld.byte 0x01 4. " ERR_INT_EN ,Endpoint Error in Transaction Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x01 3. " BUF_UNDER_EN ,Endpoint Buffer Underflow Enable" "Disabled,Enabled" bitfld.byte 0x01 2. " BUF_OVER_EN ,Endpoint Buffer Overflow Enable" "Disabled,Enabled" textline " " bitfld.byte 0x01 1. " DMA_GNT_EN ,Endpoint DMA Grant Enable" "Disabled,Enabled" bitfld.byte 0x01 0. " in_buf_full_en ,IN Endpoint Local Buffer Full Enable" "Disabled,Enabled" line.byte 0x02 "ARB_EP6_SR,Endpoint Status Register" eventfld.byte 0x02 3. " BUF_UNDER ,Endpoint Buffer Underflow Indication" "No underflow,Underflow" eventfld.byte 0x02 2. " BUF_OVER ,Endpoint Buffer Overflow Indication" "No overflow,Overflow" eventfld.byte 0x02 1. " DMA_GNT ,Endpoint DMA Grant Indication" "Not granted,Granted" textline " " eventfld.byte 0x02 0. " IN_BUF_FULL ,IN Endpoint Local Buffer Full Indication" "Not full,Full" group.byte (0xD0+0x04)++0x04 line.byte 0x00 "ARB_RW6_WA,Endpoint Write Address value" line.byte 0x01 "ARB_RW6_WA_MSB,Endpoint Write Address value" bitfld.byte 0x01 0. " WA_MSB ,Write Address for EP" "0,1" line.byte 0x02 "ARB_RW6_RA,Endpoint Read Address value" line.byte 0x03 "ARB_RW6_RA_MSB,Endpoint Read Address value" bitfld.byte 0x03 0. " RA_MSB ,Read Address for EP" "0,1" textline " " line.byte 0x04 "ARB_RW6_DR,Endpoint Data Register" bitfld.byte 0x04 7. " DR[7] ,Data bit 7" "Low,High" bitfld.byte 0x04 6. " [6] ,Data bit 6" "Low,High" bitfld.byte 0x04 5. " [5] ,Data bit 5" "Low,High" bitfld.byte 0x04 4. " [4] ,EData bit 4" "Low,High" textline " " bitfld.byte 0x04 3. " [3] ,Data bit 3" "Low,High" bitfld.byte 0x04 2. " [2] ,Data bit 2" "Low,High" bitfld.byte 0x04 1. " [1] ,Data bit 1" "Low,High" bitfld.byte 0x04 0. " [0] ,Data bit 0" "Low,High" textline " " width 0x0B width 16. width 16. group.byte 0xE0++0x02 line.byte 0x00 "ARB_EP7_CFG,Endpoint Configuration Register" bitfld.byte 0x00 3. " RESET_PTR ,Configuration Setting to Reset the RA and WA Pointers" "No reset,Reset" bitfld.byte 0x00 2. " CRC_BYPASS ,CRC Bypass" "Not bypassed,Bypassed" bitfld.byte 0x00 1. " DMA_REQ ,Manual DMA Request" "Not requested,Requested" textline " " bitfld.byte 0x00 0. " IN_DATA_RDY ,Endpoint Packet Data Ready" "Not ready,Ready" line.byte 0x01 "ARB_EP7_INT_EN,Endpoint Interrupt Enable Register" bitfld.byte 0x01 4. " ERR_INT_EN ,Endpoint Error in Transaction Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x01 3. " BUF_UNDER_EN ,Endpoint Buffer Underflow Enable" "Disabled,Enabled" bitfld.byte 0x01 2. " BUF_OVER_EN ,Endpoint Buffer Overflow Enable" "Disabled,Enabled" textline " " bitfld.byte 0x01 1. " DMA_GNT_EN ,Endpoint DMA Grant Enable" "Disabled,Enabled" bitfld.byte 0x01 0. " in_buf_full_en ,IN Endpoint Local Buffer Full Enable" "Disabled,Enabled" line.byte 0x02 "ARB_EP7_SR,Endpoint Status Register" eventfld.byte 0x02 3. " BUF_UNDER ,Endpoint Buffer Underflow Indication" "No underflow,Underflow" eventfld.byte 0x02 2. " BUF_OVER ,Endpoint Buffer Overflow Indication" "No overflow,Overflow" eventfld.byte 0x02 1. " DMA_GNT ,Endpoint DMA Grant Indication" "Not granted,Granted" textline " " eventfld.byte 0x02 0. " IN_BUF_FULL ,IN Endpoint Local Buffer Full Indication" "Not full,Full" group.byte (0xE0+0x04)++0x04 line.byte 0x00 "ARB_RW7_WA,Endpoint Write Address value" line.byte 0x01 "ARB_RW7_WA_MSB,Endpoint Write Address value" bitfld.byte 0x01 0. " WA_MSB ,Write Address for EP" "0,1" line.byte 0x02 "ARB_RW7_RA,Endpoint Read Address value" line.byte 0x03 "ARB_RW7_RA_MSB,Endpoint Read Address value" bitfld.byte 0x03 0. " RA_MSB ,Read Address for EP" "0,1" textline " " line.byte 0x04 "ARB_RW7_DR,Endpoint Data Register" bitfld.byte 0x04 7. " DR[7] ,Data bit 7" "Low,High" bitfld.byte 0x04 6. " [6] ,Data bit 6" "Low,High" bitfld.byte 0x04 5. " [5] ,Data bit 5" "Low,High" bitfld.byte 0x04 4. " [4] ,EData bit 4" "Low,High" textline " " bitfld.byte 0x04 3. " [3] ,Data bit 3" "Low,High" bitfld.byte 0x04 2. " [2] ,Data bit 2" "Low,High" bitfld.byte 0x04 1. " [1] ,Data bit 1" "Low,High" bitfld.byte 0x04 0. " [0] ,Data bit 0" "Low,High" textline " " width 0x0B width 16. width 16. group.byte 0xF0++0x02 line.byte 0x00 "ARB_EP8_CFG,Endpoint Configuration Register" bitfld.byte 0x00 3. " RESET_PTR ,Configuration Setting to Reset the RA and WA Pointers" "No reset,Reset" bitfld.byte 0x00 2. " CRC_BYPASS ,CRC Bypass" "Not bypassed,Bypassed" bitfld.byte 0x00 1. " DMA_REQ ,Manual DMA Request" "Not requested,Requested" textline " " bitfld.byte 0x00 0. " IN_DATA_RDY ,Endpoint Packet Data Ready" "Not ready,Ready" line.byte 0x01 "ARB_EP8_INT_EN,Endpoint Interrupt Enable Register" bitfld.byte 0x01 4. " ERR_INT_EN ,Endpoint Error in Transaction Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x01 3. " BUF_UNDER_EN ,Endpoint Buffer Underflow Enable" "Disabled,Enabled" bitfld.byte 0x01 2. " BUF_OVER_EN ,Endpoint Buffer Overflow Enable" "Disabled,Enabled" textline " " bitfld.byte 0x01 1. " DMA_GNT_EN ,Endpoint DMA Grant Enable" "Disabled,Enabled" bitfld.byte 0x01 0. " in_buf_full_en ,IN Endpoint Local Buffer Full Enable" "Disabled,Enabled" line.byte 0x02 "ARB_EP8_SR,Endpoint Status Register" eventfld.byte 0x02 3. " BUF_UNDER ,Endpoint Buffer Underflow Indication" "No underflow,Underflow" eventfld.byte 0x02 2. " BUF_OVER ,Endpoint Buffer Overflow Indication" "No overflow,Overflow" eventfld.byte 0x02 1. " DMA_GNT ,Endpoint DMA Grant Indication" "Not granted,Granted" textline " " eventfld.byte 0x02 0. " IN_BUF_FULL ,IN Endpoint Local Buffer Full Indication" "Not full,Full" group.byte (0xF0+0x04)++0x04 line.byte 0x00 "ARB_RW8_WA,Endpoint Write Address value" line.byte 0x01 "ARB_RW8_WA_MSB,Endpoint Write Address value" bitfld.byte 0x01 0. " WA_MSB ,Write Address for EP" "0,1" line.byte 0x02 "ARB_RW8_RA,Endpoint Read Address value" line.byte 0x03 "ARB_RW8_RA_MSB,Endpoint Read Address value" bitfld.byte 0x03 0. " RA_MSB ,Read Address for EP" "0,1" textline " " line.byte 0x04 "ARB_RW8_DR,Endpoint Data Register" bitfld.byte 0x04 7. " DR[7] ,Data bit 7" "Low,High" bitfld.byte 0x04 6. " [6] ,Data bit 6" "Low,High" bitfld.byte 0x04 5. " [5] ,Data bit 5" "Low,High" bitfld.byte 0x04 4. " [4] ,EData bit 4" "Low,High" textline " " bitfld.byte 0x04 3. " [3] ,Data bit 3" "Low,High" bitfld.byte 0x04 2. " [2] ,Data bit 2" "Low,High" bitfld.byte 0x04 1. " [1] ,Data bit 1" "Low,High" bitfld.byte 0x04 0. " [0] ,Data bit 0" "Low,High" textline " " width 0x0B width 16. width 0x0B tree.end tree.open "B" tree "B 0" base ad:0x40010000 tree "UDB 0" width 12. if (((per.l(ad:(0x40010000+0x50)))&0x01)==0x00) base ad:0x40006400 group.byte 0x00++0x00 line.byte 0x00 "UDB00_A0,UDB00_A0" group.byte 0x10++0x00 line.byte 0x00 "UDB00_A1,UDB00_A1" group.byte 0x20++0x00 line.byte 0x00 "UDB00_D0,UDB00_D0" group.byte 0x30++0x00 line.byte 0x00 "UDB00_D1,UDB00_D1" group.byte 0x40++0x00 line.byte 0x00 "UDB00_F0,UDB00_F0" group.byte 0x50++0x00 line.byte 0x00 "UDB00_F1,UDB00_F1" rgroup.byte 0x60++0x00 line.byte 0x00 "UDB00_ST,UDB00_ST" bitfld.byte 0x00 7. " ST[7] ,Status register 7" "Low,High" bitfld.byte 0x00 6. " ST[6] ,Status register 6" "Low,High" bitfld.byte 0x00 5. " ST[5] ,Status register 5" "Low,High" bitfld.byte 0x00 4. " ST[4] ,Status register 4" "Low,High" textline " " bitfld.byte 0x00 3. " ST[3] ,Status register 3" "Low,High" bitfld.byte 0x00 2. " ST[2] ,Status register 2" "Low,High" bitfld.byte 0x00 1. " ST[1] ,Status register 1" "Low,High" bitfld.byte 0x00 0. " ST[0] ,Status register 0" "Low,High" group.byte 0x70++0x00 line.byte 0x00 "UDB00_CTL,UDB00_CTL" bitfld.byte 0x00 7. " CTL[7] ,Control register 7" "Disabled,Enabled" bitfld.byte 0x00 6. " CTL[6] ,Control register 6" "Disabled,Enabled" bitfld.byte 0x00 5. " CTL[5] ,Control register 5" "Disabled,Enabled" bitfld.byte 0x00 4. " CTL[4] ,Control register 4" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " CTL[3] ,Control register 3" "Disabled,Enabled" bitfld.byte 0x00 2. " CTL[2] ,Control register 2" "Disabled,Enabled" bitfld.byte 0x00 1. " CTL[1] ,Control register 1" "Disabled,Enabled" bitfld.byte 0x00 0. " CTL[0] ,Control register 0" "Disabled,Enabled" group.byte 0x80++0x00 line.byte 0x00 "UDB00_MSK,UDB00_MSK" bitfld.byte 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.byte 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.byte 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.byte 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.byte 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.byte 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" bitfld.byte 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" group.byte 0x90++0x00 line.byte 0x00 "UDB00_ACTL,UDB00_ACTL" bitfld.byte 0x00 5. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.byte 0x00 4. " INT_EN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 2. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 1. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.byte 0x00 0. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" rgroup.byte 0xa0++0x00 line.byte 0x00 "UDB00_MC,UDB00_MC" bitfld.byte 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else width 16. base ad:0x40006800 group.word 0x00++0x01 line.word 0x00 "UDB00_A0_A1,UDB00_A0_A1" hexmask.word.byte 0x00 8.--15. 1. " A1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0 ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB00_D0_D1,UDB00_D0_D1" hexmask.word.byte 0x00 8.--15. 1. " D1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0 ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB00_F0_F1,UDB00_F0_F1" hexmask.word.byte 0x00 8.--15. 1. " F1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0 ,Generic field for 8 bit working registers" group.word 0xc0++0x01 line.word 0x00 "UDB00_ST_CTL,UDB00_ST_CTL" bitfld.word 0x00 15. " CTL[7] ,My Control register 7" "Disabled,Enabled" bitfld.word 0x00 14. " CTL[6] ,My Control register 6" "Disabled,Enabled" bitfld.word 0x00 13. " CTL[5] ,My Control register 5" "Disabled,Enabled" bitfld.word 0x00 12. " CTL[4] ,My Control register 4" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL[3] ,My Control register 3" "Disabled,Enabled" bitfld.word 0x00 10. " CTL[2] ,My Control register 2" "Disabled,Enabled" bitfld.word 0x00 9. " CTL[1] ,My Control register 1" "Disabled,Enabled" bitfld.word 0x00 8. " CTL[0] ,My Control register 0" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " ST[7] ,My Status register 7" "Low,High" bitfld.word 0x00 6. " ST[6] ,My Status register 6" "Low,High" bitfld.word 0x00 5. " ST[5] ,My Status register 5" "Low,High" bitfld.word 0x00 4. " ST[4] ,My Status register 4" "Low,High" textline " " bitfld.word 0x00 3. " ST[3] ,My Status register 3" "Low,High" bitfld.word 0x00 2. " ST[2] ,My Status register 2" "Low,High" bitfld.word 0x00 1. " ST[1] ,My Status register 1" "Low,High" bitfld.word 0x00 0. " ST[0] ,My Status register 0" "Low,High" group.word 0x100++0x01 line.word 0x00 "UDB00_MSK_ACTL,UDB00_MSK_ACTL" bitfld.word 0x00 13. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN ,Interrupt enable" "Disabled,Enabled" bitfld.word 0x00 11. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 10. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 9. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" textline " " bitfld.word 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.word 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.word 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.word 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.word 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.word 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" textline " " bitfld.word 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" rgroup.word 0x140++0x01 line.word 0x00 "UDB00_MC_00,UDB00_MC_00" bitfld.word 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif width 0x0B tree.end tree "UDB 1" width 12. if (((per.l(ad:(0x40010000+0xd0)))&0x01)==0x00) base ad:0x40006401 group.byte 0x00++0x00 line.byte 0x00 "UDB01_A0,UDB01_A0" group.byte 0x10++0x00 line.byte 0x00 "UDB01_A1,UDB01_A1" group.byte 0x20++0x00 line.byte 0x00 "UDB01_D0,UDB01_D0" group.byte 0x30++0x00 line.byte 0x00 "UDB01_D1,UDB01_D1" group.byte 0x40++0x00 line.byte 0x00 "UDB01_F0,UDB01_F0" group.byte 0x50++0x00 line.byte 0x00 "UDB01_F1,UDB01_F1" rgroup.byte 0x60++0x00 line.byte 0x00 "UDB01_ST,UDB01_ST" bitfld.byte 0x00 7. " ST[7] ,Status register 7" "Low,High" bitfld.byte 0x00 6. " ST[6] ,Status register 6" "Low,High" bitfld.byte 0x00 5. " ST[5] ,Status register 5" "Low,High" bitfld.byte 0x00 4. " ST[4] ,Status register 4" "Low,High" textline " " bitfld.byte 0x00 3. " ST[3] ,Status register 3" "Low,High" bitfld.byte 0x00 2. " ST[2] ,Status register 2" "Low,High" bitfld.byte 0x00 1. " ST[1] ,Status register 1" "Low,High" bitfld.byte 0x00 0. " ST[0] ,Status register 0" "Low,High" group.byte 0x70++0x00 line.byte 0x00 "UDB01_CTL,UDB01_CTL" bitfld.byte 0x00 7. " CTL[7] ,Control register 7" "Disabled,Enabled" bitfld.byte 0x00 6. " CTL[6] ,Control register 6" "Disabled,Enabled" bitfld.byte 0x00 5. " CTL[5] ,Control register 5" "Disabled,Enabled" bitfld.byte 0x00 4. " CTL[4] ,Control register 4" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " CTL[3] ,Control register 3" "Disabled,Enabled" bitfld.byte 0x00 2. " CTL[2] ,Control register 2" "Disabled,Enabled" bitfld.byte 0x00 1. " CTL[1] ,Control register 1" "Disabled,Enabled" bitfld.byte 0x00 0. " CTL[0] ,Control register 0" "Disabled,Enabled" group.byte 0x80++0x00 line.byte 0x00 "UDB01_MSK,UDB01_MSK" bitfld.byte 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.byte 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.byte 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.byte 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.byte 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.byte 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" bitfld.byte 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" group.byte 0x90++0x00 line.byte 0x00 "UDB01_ACTL,UDB01_ACTL" bitfld.byte 0x00 5. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.byte 0x00 4. " INT_EN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 2. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 1. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.byte 0x00 0. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" rgroup.byte 0xa0++0x00 line.byte 0x00 "UDB01_MC,UDB01_MC" bitfld.byte 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else width 16. base ad:0x40006802 group.word 0x00++0x01 line.word 0x00 "UDB01_A0_A1,UDB01_A0_A1" hexmask.word.byte 0x00 8.--15. 1. " A1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0 ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB01_D0_D1,UDB01_D0_D1" hexmask.word.byte 0x00 8.--15. 1. " D1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0 ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB01_F0_F1,UDB01_F0_F1" hexmask.word.byte 0x00 8.--15. 1. " F1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0 ,Generic field for 8 bit working registers" group.word 0xc0++0x01 line.word 0x00 "UDB01_ST_CTL,UDB01_ST_CTL" bitfld.word 0x00 15. " CTL[7] ,My Control register 7" "Disabled,Enabled" bitfld.word 0x00 14. " CTL[6] ,My Control register 6" "Disabled,Enabled" bitfld.word 0x00 13. " CTL[5] ,My Control register 5" "Disabled,Enabled" bitfld.word 0x00 12. " CTL[4] ,My Control register 4" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL[3] ,My Control register 3" "Disabled,Enabled" bitfld.word 0x00 10. " CTL[2] ,My Control register 2" "Disabled,Enabled" bitfld.word 0x00 9. " CTL[1] ,My Control register 1" "Disabled,Enabled" bitfld.word 0x00 8. " CTL[0] ,My Control register 0" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " ST[7] ,My Status register 7" "Low,High" bitfld.word 0x00 6. " ST[6] ,My Status register 6" "Low,High" bitfld.word 0x00 5. " ST[5] ,My Status register 5" "Low,High" bitfld.word 0x00 4. " ST[4] ,My Status register 4" "Low,High" textline " " bitfld.word 0x00 3. " ST[3] ,My Status register 3" "Low,High" bitfld.word 0x00 2. " ST[2] ,My Status register 2" "Low,High" bitfld.word 0x00 1. " ST[1] ,My Status register 1" "Low,High" bitfld.word 0x00 0. " ST[0] ,My Status register 0" "Low,High" group.word 0x100++0x01 line.word 0x00 "UDB01_MSK_ACTL,UDB01_MSK_ACTL" bitfld.word 0x00 13. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN ,Interrupt enable" "Disabled,Enabled" bitfld.word 0x00 11. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 10. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 9. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" textline " " bitfld.word 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.word 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.word 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.word 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.word 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.word 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" textline " " bitfld.word 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" rgroup.word 0x140++0x01 line.word 0x00 "UDB01_MC_00,UDB01_MC_00" bitfld.word 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif width 0x0B tree.end tree "UDB 2" width 12. if (((per.l(ad:(0x40010000+0x250)))&0x01)==0x00) base ad:0x40006402 group.byte 0x00++0x00 line.byte 0x00 "UDB02_A0,UDB02_A0" group.byte 0x10++0x00 line.byte 0x00 "UDB02_A1,UDB02_A1" group.byte 0x20++0x00 line.byte 0x00 "UDB02_D0,UDB02_D0" group.byte 0x30++0x00 line.byte 0x00 "UDB02_D1,UDB02_D1" group.byte 0x40++0x00 line.byte 0x00 "UDB02_F0,UDB02_F0" group.byte 0x50++0x00 line.byte 0x00 "UDB02_F1,UDB02_F1" rgroup.byte 0x60++0x00 line.byte 0x00 "UDB02_ST,UDB02_ST" bitfld.byte 0x00 7. " ST[7] ,Status register 7" "Low,High" bitfld.byte 0x00 6. " ST[6] ,Status register 6" "Low,High" bitfld.byte 0x00 5. " ST[5] ,Status register 5" "Low,High" bitfld.byte 0x00 4. " ST[4] ,Status register 4" "Low,High" textline " " bitfld.byte 0x00 3. " ST[3] ,Status register 3" "Low,High" bitfld.byte 0x00 2. " ST[2] ,Status register 2" "Low,High" bitfld.byte 0x00 1. " ST[1] ,Status register 1" "Low,High" bitfld.byte 0x00 0. " ST[0] ,Status register 0" "Low,High" group.byte 0x70++0x00 line.byte 0x00 "UDB02_CTL,UDB02_CTL" bitfld.byte 0x00 7. " CTL[7] ,Control register 7" "Disabled,Enabled" bitfld.byte 0x00 6. " CTL[6] ,Control register 6" "Disabled,Enabled" bitfld.byte 0x00 5. " CTL[5] ,Control register 5" "Disabled,Enabled" bitfld.byte 0x00 4. " CTL[4] ,Control register 4" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " CTL[3] ,Control register 3" "Disabled,Enabled" bitfld.byte 0x00 2. " CTL[2] ,Control register 2" "Disabled,Enabled" bitfld.byte 0x00 1. " CTL[1] ,Control register 1" "Disabled,Enabled" bitfld.byte 0x00 0. " CTL[0] ,Control register 0" "Disabled,Enabled" group.byte 0x80++0x00 line.byte 0x00 "UDB02_MSK,UDB02_MSK" bitfld.byte 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.byte 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.byte 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.byte 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.byte 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.byte 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" bitfld.byte 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" group.byte 0x90++0x00 line.byte 0x00 "UDB02_ACTL,UDB02_ACTL" bitfld.byte 0x00 5. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.byte 0x00 4. " INT_EN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 2. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 1. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.byte 0x00 0. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" rgroup.byte 0xa0++0x00 line.byte 0x00 "UDB02_MC,UDB02_MC" bitfld.byte 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else width 16. base ad:0x40006804 group.word 0x00++0x01 line.word 0x00 "UDB02_A0_A1,UDB02_A0_A1" hexmask.word.byte 0x00 8.--15. 1. " A1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0 ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB02_D0_D1,UDB02_D0_D1" hexmask.word.byte 0x00 8.--15. 1. " D1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0 ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB02_F0_F1,UDB02_F0_F1" hexmask.word.byte 0x00 8.--15. 1. " F1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0 ,Generic field for 8 bit working registers" group.word 0xc0++0x01 line.word 0x00 "UDB02_ST_CTL,UDB02_ST_CTL" bitfld.word 0x00 15. " CTL[7] ,My Control register 7" "Disabled,Enabled" bitfld.word 0x00 14. " CTL[6] ,My Control register 6" "Disabled,Enabled" bitfld.word 0x00 13. " CTL[5] ,My Control register 5" "Disabled,Enabled" bitfld.word 0x00 12. " CTL[4] ,My Control register 4" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL[3] ,My Control register 3" "Disabled,Enabled" bitfld.word 0x00 10. " CTL[2] ,My Control register 2" "Disabled,Enabled" bitfld.word 0x00 9. " CTL[1] ,My Control register 1" "Disabled,Enabled" bitfld.word 0x00 8. " CTL[0] ,My Control register 0" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " ST[7] ,My Status register 7" "Low,High" bitfld.word 0x00 6. " ST[6] ,My Status register 6" "Low,High" bitfld.word 0x00 5. " ST[5] ,My Status register 5" "Low,High" bitfld.word 0x00 4. " ST[4] ,My Status register 4" "Low,High" textline " " bitfld.word 0x00 3. " ST[3] ,My Status register 3" "Low,High" bitfld.word 0x00 2. " ST[2] ,My Status register 2" "Low,High" bitfld.word 0x00 1. " ST[1] ,My Status register 1" "Low,High" bitfld.word 0x00 0. " ST[0] ,My Status register 0" "Low,High" group.word 0x100++0x01 line.word 0x00 "UDB02_MSK_ACTL,UDB02_MSK_ACTL" bitfld.word 0x00 13. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN ,Interrupt enable" "Disabled,Enabled" bitfld.word 0x00 11. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 10. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 9. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" textline " " bitfld.word 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.word 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.word 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.word 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.word 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.word 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" textline " " bitfld.word 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" rgroup.word 0x140++0x01 line.word 0x00 "UDB02_MC_00,UDB02_MC_00" bitfld.word 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif width 0x0B tree.end tree "UDB 3" width 12. if (((per.l(ad:(0x40010000+0x2d0)))&0x01)==0x00) base ad:0x40006403 group.byte 0x00++0x00 line.byte 0x00 "UDB03_A0,UDB03_A0" group.byte 0x10++0x00 line.byte 0x00 "UDB03_A1,UDB03_A1" group.byte 0x20++0x00 line.byte 0x00 "UDB03_D0,UDB03_D0" group.byte 0x30++0x00 line.byte 0x00 "UDB03_D1,UDB03_D1" group.byte 0x40++0x00 line.byte 0x00 "UDB03_F0,UDB03_F0" group.byte 0x50++0x00 line.byte 0x00 "UDB03_F1,UDB03_F1" rgroup.byte 0x60++0x00 line.byte 0x00 "UDB03_ST,UDB03_ST" bitfld.byte 0x00 7. " ST[7] ,Status register 7" "Low,High" bitfld.byte 0x00 6. " ST[6] ,Status register 6" "Low,High" bitfld.byte 0x00 5. " ST[5] ,Status register 5" "Low,High" bitfld.byte 0x00 4. " ST[4] ,Status register 4" "Low,High" textline " " bitfld.byte 0x00 3. " ST[3] ,Status register 3" "Low,High" bitfld.byte 0x00 2. " ST[2] ,Status register 2" "Low,High" bitfld.byte 0x00 1. " ST[1] ,Status register 1" "Low,High" bitfld.byte 0x00 0. " ST[0] ,Status register 0" "Low,High" group.byte 0x70++0x00 line.byte 0x00 "UDB03_CTL,UDB03_CTL" bitfld.byte 0x00 7. " CTL[7] ,Control register 7" "Disabled,Enabled" bitfld.byte 0x00 6. " CTL[6] ,Control register 6" "Disabled,Enabled" bitfld.byte 0x00 5. " CTL[5] ,Control register 5" "Disabled,Enabled" bitfld.byte 0x00 4. " CTL[4] ,Control register 4" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " CTL[3] ,Control register 3" "Disabled,Enabled" bitfld.byte 0x00 2. " CTL[2] ,Control register 2" "Disabled,Enabled" bitfld.byte 0x00 1. " CTL[1] ,Control register 1" "Disabled,Enabled" bitfld.byte 0x00 0. " CTL[0] ,Control register 0" "Disabled,Enabled" group.byte 0x80++0x00 line.byte 0x00 "UDB03_MSK,UDB03_MSK" bitfld.byte 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.byte 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.byte 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.byte 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.byte 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.byte 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" bitfld.byte 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" group.byte 0x90++0x00 line.byte 0x00 "UDB03_ACTL,UDB03_ACTL" bitfld.byte 0x00 5. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.byte 0x00 4. " INT_EN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 2. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 1. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.byte 0x00 0. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" rgroup.byte 0xa0++0x00 line.byte 0x00 "UDB03_MC,UDB03_MC" bitfld.byte 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else width 16. base ad:0x40006806 group.word 0x00++0x01 line.word 0x00 "UDB03_A0_A1,UDB03_A0_A1" hexmask.word.byte 0x00 8.--15. 1. " A1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0 ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB03_D0_D1,UDB03_D0_D1" hexmask.word.byte 0x00 8.--15. 1. " D1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0 ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB03_F0_F1,UDB03_F0_F1" hexmask.word.byte 0x00 8.--15. 1. " F1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0 ,Generic field for 8 bit working registers" group.word 0xc0++0x01 line.word 0x00 "UDB03_ST_CTL,UDB03_ST_CTL" bitfld.word 0x00 15. " CTL[7] ,My Control register 7" "Disabled,Enabled" bitfld.word 0x00 14. " CTL[6] ,My Control register 6" "Disabled,Enabled" bitfld.word 0x00 13. " CTL[5] ,My Control register 5" "Disabled,Enabled" bitfld.word 0x00 12. " CTL[4] ,My Control register 4" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL[3] ,My Control register 3" "Disabled,Enabled" bitfld.word 0x00 10. " CTL[2] ,My Control register 2" "Disabled,Enabled" bitfld.word 0x00 9. " CTL[1] ,My Control register 1" "Disabled,Enabled" bitfld.word 0x00 8. " CTL[0] ,My Control register 0" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " ST[7] ,My Status register 7" "Low,High" bitfld.word 0x00 6. " ST[6] ,My Status register 6" "Low,High" bitfld.word 0x00 5. " ST[5] ,My Status register 5" "Low,High" bitfld.word 0x00 4. " ST[4] ,My Status register 4" "Low,High" textline " " bitfld.word 0x00 3. " ST[3] ,My Status register 3" "Low,High" bitfld.word 0x00 2. " ST[2] ,My Status register 2" "Low,High" bitfld.word 0x00 1. " ST[1] ,My Status register 1" "Low,High" bitfld.word 0x00 0. " ST[0] ,My Status register 0" "Low,High" group.word 0x100++0x01 line.word 0x00 "UDB03_MSK_ACTL,UDB03_MSK_ACTL" bitfld.word 0x00 13. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN ,Interrupt enable" "Disabled,Enabled" bitfld.word 0x00 11. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 10. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 9. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" textline " " bitfld.word 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.word 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.word 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.word 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.word 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.word 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" textline " " bitfld.word 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" rgroup.word 0x140++0x01 line.word 0x00 "UDB03_MC_00,UDB03_MC_00" bitfld.word 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif width 0x0B tree.end tree "UDB 4" width 12. if (((per.l(ad:(0x40010000+0x450)))&0x01)==0x00) base ad:0x40006404 group.byte 0x00++0x00 line.byte 0x00 "UDB04_A0,UDB04_A0" group.byte 0x10++0x00 line.byte 0x00 "UDB04_A1,UDB04_A1" group.byte 0x20++0x00 line.byte 0x00 "UDB04_D0,UDB04_D0" group.byte 0x30++0x00 line.byte 0x00 "UDB04_D1,UDB04_D1" group.byte 0x40++0x00 line.byte 0x00 "UDB04_F0,UDB04_F0" group.byte 0x50++0x00 line.byte 0x00 "UDB04_F1,UDB04_F1" rgroup.byte 0x60++0x00 line.byte 0x00 "UDB04_ST,UDB04_ST" bitfld.byte 0x00 7. " ST[7] ,Status register 7" "Low,High" bitfld.byte 0x00 6. " ST[6] ,Status register 6" "Low,High" bitfld.byte 0x00 5. " ST[5] ,Status register 5" "Low,High" bitfld.byte 0x00 4. " ST[4] ,Status register 4" "Low,High" textline " " bitfld.byte 0x00 3. " ST[3] ,Status register 3" "Low,High" bitfld.byte 0x00 2. " ST[2] ,Status register 2" "Low,High" bitfld.byte 0x00 1. " ST[1] ,Status register 1" "Low,High" bitfld.byte 0x00 0. " ST[0] ,Status register 0" "Low,High" group.byte 0x70++0x00 line.byte 0x00 "UDB04_CTL,UDB04_CTL" bitfld.byte 0x00 7. " CTL[7] ,Control register 7" "Disabled,Enabled" bitfld.byte 0x00 6. " CTL[6] ,Control register 6" "Disabled,Enabled" bitfld.byte 0x00 5. " CTL[5] ,Control register 5" "Disabled,Enabled" bitfld.byte 0x00 4. " CTL[4] ,Control register 4" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " CTL[3] ,Control register 3" "Disabled,Enabled" bitfld.byte 0x00 2. " CTL[2] ,Control register 2" "Disabled,Enabled" bitfld.byte 0x00 1. " CTL[1] ,Control register 1" "Disabled,Enabled" bitfld.byte 0x00 0. " CTL[0] ,Control register 0" "Disabled,Enabled" group.byte 0x80++0x00 line.byte 0x00 "UDB04_MSK,UDB04_MSK" bitfld.byte 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.byte 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.byte 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.byte 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.byte 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.byte 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" bitfld.byte 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" group.byte 0x90++0x00 line.byte 0x00 "UDB04_ACTL,UDB04_ACTL" bitfld.byte 0x00 5. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.byte 0x00 4. " INT_EN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 2. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 1. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.byte 0x00 0. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" rgroup.byte 0xa0++0x00 line.byte 0x00 "UDB04_MC,UDB04_MC" bitfld.byte 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else width 16. base ad:0x40006808 group.word 0x00++0x01 line.word 0x00 "UDB04_A0_A1,UDB04_A0_A1" hexmask.word.byte 0x00 8.--15. 1. " A1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0 ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB04_D0_D1,UDB04_D0_D1" hexmask.word.byte 0x00 8.--15. 1. " D1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0 ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB04_F0_F1,UDB04_F0_F1" hexmask.word.byte 0x00 8.--15. 1. " F1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0 ,Generic field for 8 bit working registers" group.word 0xc0++0x01 line.word 0x00 "UDB04_ST_CTL,UDB04_ST_CTL" bitfld.word 0x00 15. " CTL[7] ,My Control register 7" "Disabled,Enabled" bitfld.word 0x00 14. " CTL[6] ,My Control register 6" "Disabled,Enabled" bitfld.word 0x00 13. " CTL[5] ,My Control register 5" "Disabled,Enabled" bitfld.word 0x00 12. " CTL[4] ,My Control register 4" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL[3] ,My Control register 3" "Disabled,Enabled" bitfld.word 0x00 10. " CTL[2] ,My Control register 2" "Disabled,Enabled" bitfld.word 0x00 9. " CTL[1] ,My Control register 1" "Disabled,Enabled" bitfld.word 0x00 8. " CTL[0] ,My Control register 0" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " ST[7] ,My Status register 7" "Low,High" bitfld.word 0x00 6. " ST[6] ,My Status register 6" "Low,High" bitfld.word 0x00 5. " ST[5] ,My Status register 5" "Low,High" bitfld.word 0x00 4. " ST[4] ,My Status register 4" "Low,High" textline " " bitfld.word 0x00 3. " ST[3] ,My Status register 3" "Low,High" bitfld.word 0x00 2. " ST[2] ,My Status register 2" "Low,High" bitfld.word 0x00 1. " ST[1] ,My Status register 1" "Low,High" bitfld.word 0x00 0. " ST[0] ,My Status register 0" "Low,High" group.word 0x100++0x01 line.word 0x00 "UDB04_MSK_ACTL,UDB04_MSK_ACTL" bitfld.word 0x00 13. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN ,Interrupt enable" "Disabled,Enabled" bitfld.word 0x00 11. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 10. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 9. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" textline " " bitfld.word 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.word 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.word 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.word 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.word 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.word 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" textline " " bitfld.word 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" rgroup.word 0x140++0x01 line.word 0x00 "UDB04_MC_00,UDB04_MC_00" bitfld.word 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif width 0x0B tree.end tree "UDB 5" width 12. if (((per.l(ad:(0x40010000+0x4d0)))&0x01)==0x00) base ad:0x40006405 group.byte 0x00++0x00 line.byte 0x00 "UDB05_A0,UDB05_A0" group.byte 0x10++0x00 line.byte 0x00 "UDB05_A1,UDB05_A1" group.byte 0x20++0x00 line.byte 0x00 "UDB05_D0,UDB05_D0" group.byte 0x30++0x00 line.byte 0x00 "UDB05_D1,UDB05_D1" group.byte 0x40++0x00 line.byte 0x00 "UDB05_F0,UDB05_F0" group.byte 0x50++0x00 line.byte 0x00 "UDB05_F1,UDB05_F1" rgroup.byte 0x60++0x00 line.byte 0x00 "UDB05_ST,UDB05_ST" bitfld.byte 0x00 7. " ST[7] ,Status register 7" "Low,High" bitfld.byte 0x00 6. " ST[6] ,Status register 6" "Low,High" bitfld.byte 0x00 5. " ST[5] ,Status register 5" "Low,High" bitfld.byte 0x00 4. " ST[4] ,Status register 4" "Low,High" textline " " bitfld.byte 0x00 3. " ST[3] ,Status register 3" "Low,High" bitfld.byte 0x00 2. " ST[2] ,Status register 2" "Low,High" bitfld.byte 0x00 1. " ST[1] ,Status register 1" "Low,High" bitfld.byte 0x00 0. " ST[0] ,Status register 0" "Low,High" group.byte 0x70++0x00 line.byte 0x00 "UDB05_CTL,UDB05_CTL" bitfld.byte 0x00 7. " CTL[7] ,Control register 7" "Disabled,Enabled" bitfld.byte 0x00 6. " CTL[6] ,Control register 6" "Disabled,Enabled" bitfld.byte 0x00 5. " CTL[5] ,Control register 5" "Disabled,Enabled" bitfld.byte 0x00 4. " CTL[4] ,Control register 4" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " CTL[3] ,Control register 3" "Disabled,Enabled" bitfld.byte 0x00 2. " CTL[2] ,Control register 2" "Disabled,Enabled" bitfld.byte 0x00 1. " CTL[1] ,Control register 1" "Disabled,Enabled" bitfld.byte 0x00 0. " CTL[0] ,Control register 0" "Disabled,Enabled" group.byte 0x80++0x00 line.byte 0x00 "UDB05_MSK,UDB05_MSK" bitfld.byte 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.byte 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.byte 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.byte 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.byte 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.byte 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" bitfld.byte 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" group.byte 0x90++0x00 line.byte 0x00 "UDB05_ACTL,UDB05_ACTL" bitfld.byte 0x00 5. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.byte 0x00 4. " INT_EN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 2. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 1. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.byte 0x00 0. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" rgroup.byte 0xa0++0x00 line.byte 0x00 "UDB05_MC,UDB05_MC" bitfld.byte 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else width 16. base ad:0x4000680A group.word 0x00++0x01 line.word 0x00 "UDB05_A0_A1,UDB05_A0_A1" hexmask.word.byte 0x00 8.--15. 1. " A1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0 ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB05_D0_D1,UDB05_D0_D1" hexmask.word.byte 0x00 8.--15. 1. " D1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0 ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB05_F0_F1,UDB05_F0_F1" hexmask.word.byte 0x00 8.--15. 1. " F1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0 ,Generic field for 8 bit working registers" group.word 0xc0++0x01 line.word 0x00 "UDB05_ST_CTL,UDB05_ST_CTL" bitfld.word 0x00 15. " CTL[7] ,My Control register 7" "Disabled,Enabled" bitfld.word 0x00 14. " CTL[6] ,My Control register 6" "Disabled,Enabled" bitfld.word 0x00 13. " CTL[5] ,My Control register 5" "Disabled,Enabled" bitfld.word 0x00 12. " CTL[4] ,My Control register 4" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL[3] ,My Control register 3" "Disabled,Enabled" bitfld.word 0x00 10. " CTL[2] ,My Control register 2" "Disabled,Enabled" bitfld.word 0x00 9. " CTL[1] ,My Control register 1" "Disabled,Enabled" bitfld.word 0x00 8. " CTL[0] ,My Control register 0" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " ST[7] ,My Status register 7" "Low,High" bitfld.word 0x00 6. " ST[6] ,My Status register 6" "Low,High" bitfld.word 0x00 5. " ST[5] ,My Status register 5" "Low,High" bitfld.word 0x00 4. " ST[4] ,My Status register 4" "Low,High" textline " " bitfld.word 0x00 3. " ST[3] ,My Status register 3" "Low,High" bitfld.word 0x00 2. " ST[2] ,My Status register 2" "Low,High" bitfld.word 0x00 1. " ST[1] ,My Status register 1" "Low,High" bitfld.word 0x00 0. " ST[0] ,My Status register 0" "Low,High" group.word 0x100++0x01 line.word 0x00 "UDB05_MSK_ACTL,UDB05_MSK_ACTL" bitfld.word 0x00 13. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN ,Interrupt enable" "Disabled,Enabled" bitfld.word 0x00 11. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 10. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 9. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" textline " " bitfld.word 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.word 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.word 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.word 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.word 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.word 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" textline " " bitfld.word 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" rgroup.word 0x140++0x01 line.word 0x00 "UDB05_MC_00,UDB05_MC_00" bitfld.word 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif width 0x0B tree.end tree "UDB 6" width 12. if (((per.l(ad:(0x40010000+0x650)))&0x01)==0x00) base ad:0x40006406 group.byte 0x00++0x00 line.byte 0x00 "UDB06_A0,UDB06_A0" group.byte 0x10++0x00 line.byte 0x00 "UDB06_A1,UDB06_A1" group.byte 0x20++0x00 line.byte 0x00 "UDB06_D0,UDB06_D0" group.byte 0x30++0x00 line.byte 0x00 "UDB06_D1,UDB06_D1" group.byte 0x40++0x00 line.byte 0x00 "UDB06_F0,UDB06_F0" group.byte 0x50++0x00 line.byte 0x00 "UDB06_F1,UDB06_F1" rgroup.byte 0x60++0x00 line.byte 0x00 "UDB06_ST,UDB06_ST" bitfld.byte 0x00 7. " ST[7] ,Status register 7" "Low,High" bitfld.byte 0x00 6. " ST[6] ,Status register 6" "Low,High" bitfld.byte 0x00 5. " ST[5] ,Status register 5" "Low,High" bitfld.byte 0x00 4. " ST[4] ,Status register 4" "Low,High" textline " " bitfld.byte 0x00 3. " ST[3] ,Status register 3" "Low,High" bitfld.byte 0x00 2. " ST[2] ,Status register 2" "Low,High" bitfld.byte 0x00 1. " ST[1] ,Status register 1" "Low,High" bitfld.byte 0x00 0. " ST[0] ,Status register 0" "Low,High" group.byte 0x70++0x00 line.byte 0x00 "UDB06_CTL,UDB06_CTL" bitfld.byte 0x00 7. " CTL[7] ,Control register 7" "Disabled,Enabled" bitfld.byte 0x00 6. " CTL[6] ,Control register 6" "Disabled,Enabled" bitfld.byte 0x00 5. " CTL[5] ,Control register 5" "Disabled,Enabled" bitfld.byte 0x00 4. " CTL[4] ,Control register 4" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " CTL[3] ,Control register 3" "Disabled,Enabled" bitfld.byte 0x00 2. " CTL[2] ,Control register 2" "Disabled,Enabled" bitfld.byte 0x00 1. " CTL[1] ,Control register 1" "Disabled,Enabled" bitfld.byte 0x00 0. " CTL[0] ,Control register 0" "Disabled,Enabled" group.byte 0x80++0x00 line.byte 0x00 "UDB06_MSK,UDB06_MSK" bitfld.byte 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.byte 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.byte 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.byte 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.byte 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.byte 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" bitfld.byte 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" group.byte 0x90++0x00 line.byte 0x00 "UDB06_ACTL,UDB06_ACTL" bitfld.byte 0x00 5. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.byte 0x00 4. " INT_EN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 2. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 1. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.byte 0x00 0. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" rgroup.byte 0xa0++0x00 line.byte 0x00 "UDB06_MC,UDB06_MC" bitfld.byte 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else width 16. base ad:0x4000680C group.word 0x00++0x01 line.word 0x00 "UDB06_A0_A1,UDB06_A0_A1" hexmask.word.byte 0x00 8.--15. 1. " A1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0 ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB06_D0_D1,UDB06_D0_D1" hexmask.word.byte 0x00 8.--15. 1. " D1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0 ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB06_F0_F1,UDB06_F0_F1" hexmask.word.byte 0x00 8.--15. 1. " F1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0 ,Generic field for 8 bit working registers" group.word 0xc0++0x01 line.word 0x00 "UDB06_ST_CTL,UDB06_ST_CTL" bitfld.word 0x00 15. " CTL[7] ,My Control register 7" "Disabled,Enabled" bitfld.word 0x00 14. " CTL[6] ,My Control register 6" "Disabled,Enabled" bitfld.word 0x00 13. " CTL[5] ,My Control register 5" "Disabled,Enabled" bitfld.word 0x00 12. " CTL[4] ,My Control register 4" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL[3] ,My Control register 3" "Disabled,Enabled" bitfld.word 0x00 10. " CTL[2] ,My Control register 2" "Disabled,Enabled" bitfld.word 0x00 9. " CTL[1] ,My Control register 1" "Disabled,Enabled" bitfld.word 0x00 8. " CTL[0] ,My Control register 0" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " ST[7] ,My Status register 7" "Low,High" bitfld.word 0x00 6. " ST[6] ,My Status register 6" "Low,High" bitfld.word 0x00 5. " ST[5] ,My Status register 5" "Low,High" bitfld.word 0x00 4. " ST[4] ,My Status register 4" "Low,High" textline " " bitfld.word 0x00 3. " ST[3] ,My Status register 3" "Low,High" bitfld.word 0x00 2. " ST[2] ,My Status register 2" "Low,High" bitfld.word 0x00 1. " ST[1] ,My Status register 1" "Low,High" bitfld.word 0x00 0. " ST[0] ,My Status register 0" "Low,High" group.word 0x100++0x01 line.word 0x00 "UDB06_MSK_ACTL,UDB06_MSK_ACTL" bitfld.word 0x00 13. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN ,Interrupt enable" "Disabled,Enabled" bitfld.word 0x00 11. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 10. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 9. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" textline " " bitfld.word 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.word 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.word 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.word 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.word 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.word 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" textline " " bitfld.word 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" rgroup.word 0x140++0x01 line.word 0x00 "UDB06_MC_00,UDB06_MC_00" bitfld.word 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif width 0x0B tree.end tree "UDB 7" width 12. if (((per.l(ad:(0x40010000+0x6d0)))&0x01)==0x00) base ad:0x40006407 group.byte 0x00++0x00 line.byte 0x00 "UDB07_A0,UDB07_A0" group.byte 0x10++0x00 line.byte 0x00 "UDB07_A1,UDB07_A1" group.byte 0x20++0x00 line.byte 0x00 "UDB07_D0,UDB07_D0" group.byte 0x30++0x00 line.byte 0x00 "UDB07_D1,UDB07_D1" group.byte 0x40++0x00 line.byte 0x00 "UDB07_F0,UDB07_F0" group.byte 0x50++0x00 line.byte 0x00 "UDB07_F1,UDB07_F1" rgroup.byte 0x60++0x00 line.byte 0x00 "UDB07_ST,UDB07_ST" bitfld.byte 0x00 7. " ST[7] ,Status register 7" "Low,High" bitfld.byte 0x00 6. " ST[6] ,Status register 6" "Low,High" bitfld.byte 0x00 5. " ST[5] ,Status register 5" "Low,High" bitfld.byte 0x00 4. " ST[4] ,Status register 4" "Low,High" textline " " bitfld.byte 0x00 3. " ST[3] ,Status register 3" "Low,High" bitfld.byte 0x00 2. " ST[2] ,Status register 2" "Low,High" bitfld.byte 0x00 1. " ST[1] ,Status register 1" "Low,High" bitfld.byte 0x00 0. " ST[0] ,Status register 0" "Low,High" group.byte 0x70++0x00 line.byte 0x00 "UDB07_CTL,UDB07_CTL" bitfld.byte 0x00 7. " CTL[7] ,Control register 7" "Disabled,Enabled" bitfld.byte 0x00 6. " CTL[6] ,Control register 6" "Disabled,Enabled" bitfld.byte 0x00 5. " CTL[5] ,Control register 5" "Disabled,Enabled" bitfld.byte 0x00 4. " CTL[4] ,Control register 4" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " CTL[3] ,Control register 3" "Disabled,Enabled" bitfld.byte 0x00 2. " CTL[2] ,Control register 2" "Disabled,Enabled" bitfld.byte 0x00 1. " CTL[1] ,Control register 1" "Disabled,Enabled" bitfld.byte 0x00 0. " CTL[0] ,Control register 0" "Disabled,Enabled" group.byte 0x80++0x00 line.byte 0x00 "UDB07_MSK,UDB07_MSK" bitfld.byte 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.byte 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.byte 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.byte 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.byte 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.byte 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" bitfld.byte 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" group.byte 0x90++0x00 line.byte 0x00 "UDB07_ACTL,UDB07_ACTL" bitfld.byte 0x00 5. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.byte 0x00 4. " INT_EN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 2. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 1. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.byte 0x00 0. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" rgroup.byte 0xa0++0x00 line.byte 0x00 "UDB07_MC,UDB07_MC" bitfld.byte 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else width 16. base ad:0x4000680E group.word 0x00++0x01 line.word 0x00 "UDB07_A0_A1,UDB07_A0_A1" hexmask.word.byte 0x00 8.--15. 1. " A1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0 ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB07_D0_D1,UDB07_D0_D1" hexmask.word.byte 0x00 8.--15. 1. " D1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0 ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB07_F0_F1,UDB07_F0_F1" hexmask.word.byte 0x00 8.--15. 1. " F1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0 ,Generic field for 8 bit working registers" group.word 0xc0++0x01 line.word 0x00 "UDB07_ST_CTL,UDB07_ST_CTL" bitfld.word 0x00 15. " CTL[7] ,My Control register 7" "Disabled,Enabled" bitfld.word 0x00 14. " CTL[6] ,My Control register 6" "Disabled,Enabled" bitfld.word 0x00 13. " CTL[5] ,My Control register 5" "Disabled,Enabled" bitfld.word 0x00 12. " CTL[4] ,My Control register 4" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL[3] ,My Control register 3" "Disabled,Enabled" bitfld.word 0x00 10. " CTL[2] ,My Control register 2" "Disabled,Enabled" bitfld.word 0x00 9. " CTL[1] ,My Control register 1" "Disabled,Enabled" bitfld.word 0x00 8. " CTL[0] ,My Control register 0" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " ST[7] ,My Status register 7" "Low,High" bitfld.word 0x00 6. " ST[6] ,My Status register 6" "Low,High" bitfld.word 0x00 5. " ST[5] ,My Status register 5" "Low,High" bitfld.word 0x00 4. " ST[4] ,My Status register 4" "Low,High" textline " " bitfld.word 0x00 3. " ST[3] ,My Status register 3" "Low,High" bitfld.word 0x00 2. " ST[2] ,My Status register 2" "Low,High" bitfld.word 0x00 1. " ST[1] ,My Status register 1" "Low,High" bitfld.word 0x00 0. " ST[0] ,My Status register 0" "Low,High" group.word 0x100++0x01 line.word 0x00 "UDB07_MSK_ACTL,UDB07_MSK_ACTL" bitfld.word 0x00 13. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN ,Interrupt enable" "Disabled,Enabled" bitfld.word 0x00 11. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 10. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 9. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" textline " " bitfld.word 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.word 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.word 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.word 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.word 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.word 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" textline " " bitfld.word 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" rgroup.word 0x140++0x01 line.word 0x00 "UDB07_MC_00,UDB07_MC_00" bitfld.word 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif width 0x0B tree.end tree "UDB 8" width 12. if (((per.l(ad:(0x40010000+0x850)))&0x01)==0x00) base ad:0x40006408 group.byte 0x00++0x00 line.byte 0x00 "UDB08_A0,UDB08_A0" group.byte 0x10++0x00 line.byte 0x00 "UDB08_A1,UDB08_A1" group.byte 0x20++0x00 line.byte 0x00 "UDB08_D0,UDB08_D0" group.byte 0x30++0x00 line.byte 0x00 "UDB08_D1,UDB08_D1" group.byte 0x40++0x00 line.byte 0x00 "UDB08_F0,UDB08_F0" group.byte 0x50++0x00 line.byte 0x00 "UDB08_F1,UDB08_F1" rgroup.byte 0x60++0x00 line.byte 0x00 "UDB08_ST,UDB08_ST" bitfld.byte 0x00 7. " ST[7] ,Status register 7" "Low,High" bitfld.byte 0x00 6. " ST[6] ,Status register 6" "Low,High" bitfld.byte 0x00 5. " ST[5] ,Status register 5" "Low,High" bitfld.byte 0x00 4. " ST[4] ,Status register 4" "Low,High" textline " " bitfld.byte 0x00 3. " ST[3] ,Status register 3" "Low,High" bitfld.byte 0x00 2. " ST[2] ,Status register 2" "Low,High" bitfld.byte 0x00 1. " ST[1] ,Status register 1" "Low,High" bitfld.byte 0x00 0. " ST[0] ,Status register 0" "Low,High" group.byte 0x70++0x00 line.byte 0x00 "UDB08_CTL,UDB08_CTL" bitfld.byte 0x00 7. " CTL[7] ,Control register 7" "Disabled,Enabled" bitfld.byte 0x00 6. " CTL[6] ,Control register 6" "Disabled,Enabled" bitfld.byte 0x00 5. " CTL[5] ,Control register 5" "Disabled,Enabled" bitfld.byte 0x00 4. " CTL[4] ,Control register 4" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " CTL[3] ,Control register 3" "Disabled,Enabled" bitfld.byte 0x00 2. " CTL[2] ,Control register 2" "Disabled,Enabled" bitfld.byte 0x00 1. " CTL[1] ,Control register 1" "Disabled,Enabled" bitfld.byte 0x00 0. " CTL[0] ,Control register 0" "Disabled,Enabled" group.byte 0x80++0x00 line.byte 0x00 "UDB08_MSK,UDB08_MSK" bitfld.byte 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.byte 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.byte 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.byte 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.byte 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.byte 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" bitfld.byte 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" group.byte 0x90++0x00 line.byte 0x00 "UDB08_ACTL,UDB08_ACTL" bitfld.byte 0x00 5. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.byte 0x00 4. " INT_EN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 2. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 1. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.byte 0x00 0. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" rgroup.byte 0xa0++0x00 line.byte 0x00 "UDB08_MC,UDB08_MC" bitfld.byte 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else width 16. base ad:0x40006810 group.word 0x00++0x01 line.word 0x00 "UDB08_A0_A1,UDB08_A0_A1" hexmask.word.byte 0x00 8.--15. 1. " A1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0 ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB08_D0_D1,UDB08_D0_D1" hexmask.word.byte 0x00 8.--15. 1. " D1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0 ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB08_F0_F1,UDB08_F0_F1" hexmask.word.byte 0x00 8.--15. 1. " F1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0 ,Generic field for 8 bit working registers" group.word 0xc0++0x01 line.word 0x00 "UDB08_ST_CTL,UDB08_ST_CTL" bitfld.word 0x00 15. " CTL[7] ,My Control register 7" "Disabled,Enabled" bitfld.word 0x00 14. " CTL[6] ,My Control register 6" "Disabled,Enabled" bitfld.word 0x00 13. " CTL[5] ,My Control register 5" "Disabled,Enabled" bitfld.word 0x00 12. " CTL[4] ,My Control register 4" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL[3] ,My Control register 3" "Disabled,Enabled" bitfld.word 0x00 10. " CTL[2] ,My Control register 2" "Disabled,Enabled" bitfld.word 0x00 9. " CTL[1] ,My Control register 1" "Disabled,Enabled" bitfld.word 0x00 8. " CTL[0] ,My Control register 0" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " ST[7] ,My Status register 7" "Low,High" bitfld.word 0x00 6. " ST[6] ,My Status register 6" "Low,High" bitfld.word 0x00 5. " ST[5] ,My Status register 5" "Low,High" bitfld.word 0x00 4. " ST[4] ,My Status register 4" "Low,High" textline " " bitfld.word 0x00 3. " ST[3] ,My Status register 3" "Low,High" bitfld.word 0x00 2. " ST[2] ,My Status register 2" "Low,High" bitfld.word 0x00 1. " ST[1] ,My Status register 1" "Low,High" bitfld.word 0x00 0. " ST[0] ,My Status register 0" "Low,High" group.word 0x100++0x01 line.word 0x00 "UDB08_MSK_ACTL,UDB08_MSK_ACTL" bitfld.word 0x00 13. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN ,Interrupt enable" "Disabled,Enabled" bitfld.word 0x00 11. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 10. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 9. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" textline " " bitfld.word 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.word 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.word 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.word 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.word 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.word 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" textline " " bitfld.word 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" rgroup.word 0x140++0x01 line.word 0x00 "UDB08_MC_00,UDB08_MC_00" bitfld.word 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif width 0x0B tree.end tree "UDB 9" width 12. if (((per.l(ad:(0x40010000+0x8d0)))&0x01)==0x00) base ad:0x40006409 group.byte 0x00++0x00 line.byte 0x00 "UDB09_A0,UDB09_A0" group.byte 0x10++0x00 line.byte 0x00 "UDB09_A1,UDB09_A1" group.byte 0x20++0x00 line.byte 0x00 "UDB09_D0,UDB09_D0" group.byte 0x30++0x00 line.byte 0x00 "UDB09_D1,UDB09_D1" group.byte 0x40++0x00 line.byte 0x00 "UDB09_F0,UDB09_F0" group.byte 0x50++0x00 line.byte 0x00 "UDB09_F1,UDB09_F1" rgroup.byte 0x60++0x00 line.byte 0x00 "UDB09_ST,UDB09_ST" bitfld.byte 0x00 7. " ST[7] ,Status register 7" "Low,High" bitfld.byte 0x00 6. " ST[6] ,Status register 6" "Low,High" bitfld.byte 0x00 5. " ST[5] ,Status register 5" "Low,High" bitfld.byte 0x00 4. " ST[4] ,Status register 4" "Low,High" textline " " bitfld.byte 0x00 3. " ST[3] ,Status register 3" "Low,High" bitfld.byte 0x00 2. " ST[2] ,Status register 2" "Low,High" bitfld.byte 0x00 1. " ST[1] ,Status register 1" "Low,High" bitfld.byte 0x00 0. " ST[0] ,Status register 0" "Low,High" group.byte 0x70++0x00 line.byte 0x00 "UDB09_CTL,UDB09_CTL" bitfld.byte 0x00 7. " CTL[7] ,Control register 7" "Disabled,Enabled" bitfld.byte 0x00 6. " CTL[6] ,Control register 6" "Disabled,Enabled" bitfld.byte 0x00 5. " CTL[5] ,Control register 5" "Disabled,Enabled" bitfld.byte 0x00 4. " CTL[4] ,Control register 4" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " CTL[3] ,Control register 3" "Disabled,Enabled" bitfld.byte 0x00 2. " CTL[2] ,Control register 2" "Disabled,Enabled" bitfld.byte 0x00 1. " CTL[1] ,Control register 1" "Disabled,Enabled" bitfld.byte 0x00 0. " CTL[0] ,Control register 0" "Disabled,Enabled" group.byte 0x80++0x00 line.byte 0x00 "UDB09_MSK,UDB09_MSK" bitfld.byte 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.byte 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.byte 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.byte 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.byte 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.byte 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" bitfld.byte 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" group.byte 0x90++0x00 line.byte 0x00 "UDB09_ACTL,UDB09_ACTL" bitfld.byte 0x00 5. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.byte 0x00 4. " INT_EN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 2. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 1. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.byte 0x00 0. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" rgroup.byte 0xa0++0x00 line.byte 0x00 "UDB09_MC,UDB09_MC" bitfld.byte 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else width 16. base ad:0x40006812 group.word 0x00++0x01 line.word 0x00 "UDB09_A0_A1,UDB09_A0_A1" hexmask.word.byte 0x00 8.--15. 1. " A1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0 ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB09_D0_D1,UDB09_D0_D1" hexmask.word.byte 0x00 8.--15. 1. " D1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0 ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB09_F0_F1,UDB09_F0_F1" hexmask.word.byte 0x00 8.--15. 1. " F1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0 ,Generic field for 8 bit working registers" group.word 0xc0++0x01 line.word 0x00 "UDB09_ST_CTL,UDB09_ST_CTL" bitfld.word 0x00 15. " CTL[7] ,My Control register 7" "Disabled,Enabled" bitfld.word 0x00 14. " CTL[6] ,My Control register 6" "Disabled,Enabled" bitfld.word 0x00 13. " CTL[5] ,My Control register 5" "Disabled,Enabled" bitfld.word 0x00 12. " CTL[4] ,My Control register 4" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL[3] ,My Control register 3" "Disabled,Enabled" bitfld.word 0x00 10. " CTL[2] ,My Control register 2" "Disabled,Enabled" bitfld.word 0x00 9. " CTL[1] ,My Control register 1" "Disabled,Enabled" bitfld.word 0x00 8. " CTL[0] ,My Control register 0" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " ST[7] ,My Status register 7" "Low,High" bitfld.word 0x00 6. " ST[6] ,My Status register 6" "Low,High" bitfld.word 0x00 5. " ST[5] ,My Status register 5" "Low,High" bitfld.word 0x00 4. " ST[4] ,My Status register 4" "Low,High" textline " " bitfld.word 0x00 3. " ST[3] ,My Status register 3" "Low,High" bitfld.word 0x00 2. " ST[2] ,My Status register 2" "Low,High" bitfld.word 0x00 1. " ST[1] ,My Status register 1" "Low,High" bitfld.word 0x00 0. " ST[0] ,My Status register 0" "Low,High" group.word 0x100++0x01 line.word 0x00 "UDB09_MSK_ACTL,UDB09_MSK_ACTL" bitfld.word 0x00 13. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN ,Interrupt enable" "Disabled,Enabled" bitfld.word 0x00 11. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 10. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 9. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" textline " " bitfld.word 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.word 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.word 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.word 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.word 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.word 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" textline " " bitfld.word 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" rgroup.word 0x140++0x01 line.word 0x00 "UDB09_MC_00,UDB09_MC_00" bitfld.word 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif width 0x0B tree.end tree "UDB 10" width 12. if (((per.l(ad:(0x40010000+0xa50)))&0x01)==0x00) base ad:0x4000640A group.byte 0x00++0x00 line.byte 0x00 "UDB10_A0,UDB10_A0" group.byte 0x10++0x00 line.byte 0x00 "UDB10_A1,UDB10_A1" group.byte 0x20++0x00 line.byte 0x00 "UDB10_D0,UDB10_D0" group.byte 0x30++0x00 line.byte 0x00 "UDB10_D1,UDB10_D1" group.byte 0x40++0x00 line.byte 0x00 "UDB10_F0,UDB10_F0" group.byte 0x50++0x00 line.byte 0x00 "UDB10_F1,UDB10_F1" rgroup.byte 0x60++0x00 line.byte 0x00 "UDB10_ST,UDB10_ST" bitfld.byte 0x00 7. " ST[7] ,Status register 7" "Low,High" bitfld.byte 0x00 6. " ST[6] ,Status register 6" "Low,High" bitfld.byte 0x00 5. " ST[5] ,Status register 5" "Low,High" bitfld.byte 0x00 4. " ST[4] ,Status register 4" "Low,High" textline " " bitfld.byte 0x00 3. " ST[3] ,Status register 3" "Low,High" bitfld.byte 0x00 2. " ST[2] ,Status register 2" "Low,High" bitfld.byte 0x00 1. " ST[1] ,Status register 1" "Low,High" bitfld.byte 0x00 0. " ST[0] ,Status register 0" "Low,High" group.byte 0x70++0x00 line.byte 0x00 "UDB10_CTL,UDB10_CTL" bitfld.byte 0x00 7. " CTL[7] ,Control register 7" "Disabled,Enabled" bitfld.byte 0x00 6. " CTL[6] ,Control register 6" "Disabled,Enabled" bitfld.byte 0x00 5. " CTL[5] ,Control register 5" "Disabled,Enabled" bitfld.byte 0x00 4. " CTL[4] ,Control register 4" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " CTL[3] ,Control register 3" "Disabled,Enabled" bitfld.byte 0x00 2. " CTL[2] ,Control register 2" "Disabled,Enabled" bitfld.byte 0x00 1. " CTL[1] ,Control register 1" "Disabled,Enabled" bitfld.byte 0x00 0. " CTL[0] ,Control register 0" "Disabled,Enabled" group.byte 0x80++0x00 line.byte 0x00 "UDB10_MSK,UDB10_MSK" bitfld.byte 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.byte 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.byte 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.byte 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.byte 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.byte 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" bitfld.byte 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" group.byte 0x90++0x00 line.byte 0x00 "UDB10_ACTL,UDB10_ACTL" bitfld.byte 0x00 5. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.byte 0x00 4. " INT_EN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 2. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 1. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.byte 0x00 0. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" rgroup.byte 0xa0++0x00 line.byte 0x00 "UDB10_MC,UDB10_MC" bitfld.byte 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else width 16. base ad:0x40006814 group.word 0x00++0x01 line.word 0x00 "UDB10_A0_A1,UDB10_A0_A1" hexmask.word.byte 0x00 8.--15. 1. " A1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0 ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB10_D0_D1,UDB10_D0_D1" hexmask.word.byte 0x00 8.--15. 1. " D1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0 ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB10_F0_F1,UDB10_F0_F1" hexmask.word.byte 0x00 8.--15. 1. " F1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0 ,Generic field for 8 bit working registers" group.word 0xc0++0x01 line.word 0x00 "UDB10_ST_CTL,UDB10_ST_CTL" bitfld.word 0x00 15. " CTL[7] ,My Control register 7" "Disabled,Enabled" bitfld.word 0x00 14. " CTL[6] ,My Control register 6" "Disabled,Enabled" bitfld.word 0x00 13. " CTL[5] ,My Control register 5" "Disabled,Enabled" bitfld.word 0x00 12. " CTL[4] ,My Control register 4" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL[3] ,My Control register 3" "Disabled,Enabled" bitfld.word 0x00 10. " CTL[2] ,My Control register 2" "Disabled,Enabled" bitfld.word 0x00 9. " CTL[1] ,My Control register 1" "Disabled,Enabled" bitfld.word 0x00 8. " CTL[0] ,My Control register 0" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " ST[7] ,My Status register 7" "Low,High" bitfld.word 0x00 6. " ST[6] ,My Status register 6" "Low,High" bitfld.word 0x00 5. " ST[5] ,My Status register 5" "Low,High" bitfld.word 0x00 4. " ST[4] ,My Status register 4" "Low,High" textline " " bitfld.word 0x00 3. " ST[3] ,My Status register 3" "Low,High" bitfld.word 0x00 2. " ST[2] ,My Status register 2" "Low,High" bitfld.word 0x00 1. " ST[1] ,My Status register 1" "Low,High" bitfld.word 0x00 0. " ST[0] ,My Status register 0" "Low,High" group.word 0x100++0x01 line.word 0x00 "UDB10_MSK_ACTL,UDB10_MSK_ACTL" bitfld.word 0x00 13. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN ,Interrupt enable" "Disabled,Enabled" bitfld.word 0x00 11. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 10. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 9. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" textline " " bitfld.word 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.word 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.word 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.word 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.word 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.word 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" textline " " bitfld.word 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" rgroup.word 0x140++0x01 line.word 0x00 "UDB10_MC_00,UDB10_MC_00" bitfld.word 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif width 0x0B tree.end tree "UDB 11" width 12. if (((per.l(ad:(0x40010000+0xad0)))&0x01)==0x00) base ad:0x4000640B group.byte 0x00++0x00 line.byte 0x00 "UDB11_A0,UDB11_A0" group.byte 0x10++0x00 line.byte 0x00 "UDB11_A1,UDB11_A1" group.byte 0x20++0x00 line.byte 0x00 "UDB11_D0,UDB11_D0" group.byte 0x30++0x00 line.byte 0x00 "UDB11_D1,UDB11_D1" group.byte 0x40++0x00 line.byte 0x00 "UDB11_F0,UDB11_F0" group.byte 0x50++0x00 line.byte 0x00 "UDB11_F1,UDB11_F1" rgroup.byte 0x60++0x00 line.byte 0x00 "UDB11_ST,UDB11_ST" bitfld.byte 0x00 7. " ST[7] ,Status register 7" "Low,High" bitfld.byte 0x00 6. " ST[6] ,Status register 6" "Low,High" bitfld.byte 0x00 5. " ST[5] ,Status register 5" "Low,High" bitfld.byte 0x00 4. " ST[4] ,Status register 4" "Low,High" textline " " bitfld.byte 0x00 3. " ST[3] ,Status register 3" "Low,High" bitfld.byte 0x00 2. " ST[2] ,Status register 2" "Low,High" bitfld.byte 0x00 1. " ST[1] ,Status register 1" "Low,High" bitfld.byte 0x00 0. " ST[0] ,Status register 0" "Low,High" group.byte 0x70++0x00 line.byte 0x00 "UDB11_CTL,UDB11_CTL" bitfld.byte 0x00 7. " CTL[7] ,Control register 7" "Disabled,Enabled" bitfld.byte 0x00 6. " CTL[6] ,Control register 6" "Disabled,Enabled" bitfld.byte 0x00 5. " CTL[5] ,Control register 5" "Disabled,Enabled" bitfld.byte 0x00 4. " CTL[4] ,Control register 4" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " CTL[3] ,Control register 3" "Disabled,Enabled" bitfld.byte 0x00 2. " CTL[2] ,Control register 2" "Disabled,Enabled" bitfld.byte 0x00 1. " CTL[1] ,Control register 1" "Disabled,Enabled" bitfld.byte 0x00 0. " CTL[0] ,Control register 0" "Disabled,Enabled" group.byte 0x80++0x00 line.byte 0x00 "UDB11_MSK,UDB11_MSK" bitfld.byte 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.byte 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.byte 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.byte 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.byte 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.byte 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" bitfld.byte 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" group.byte 0x90++0x00 line.byte 0x00 "UDB11_ACTL,UDB11_ACTL" bitfld.byte 0x00 5. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.byte 0x00 4. " INT_EN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 2. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 1. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.byte 0x00 0. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" rgroup.byte 0xa0++0x00 line.byte 0x00 "UDB11_MC,UDB11_MC" bitfld.byte 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else width 16. base ad:0x40006816 group.word 0x00++0x01 line.word 0x00 "UDB11_A0_A1,UDB11_A0_A1" hexmask.word.byte 0x00 8.--15. 1. " A1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0 ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB11_D0_D1,UDB11_D0_D1" hexmask.word.byte 0x00 8.--15. 1. " D1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0 ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB11_F0_F1,UDB11_F0_F1" hexmask.word.byte 0x00 8.--15. 1. " F1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0 ,Generic field for 8 bit working registers" group.word 0xc0++0x01 line.word 0x00 "UDB11_ST_CTL,UDB11_ST_CTL" bitfld.word 0x00 15. " CTL[7] ,My Control register 7" "Disabled,Enabled" bitfld.word 0x00 14. " CTL[6] ,My Control register 6" "Disabled,Enabled" bitfld.word 0x00 13. " CTL[5] ,My Control register 5" "Disabled,Enabled" bitfld.word 0x00 12. " CTL[4] ,My Control register 4" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL[3] ,My Control register 3" "Disabled,Enabled" bitfld.word 0x00 10. " CTL[2] ,My Control register 2" "Disabled,Enabled" bitfld.word 0x00 9. " CTL[1] ,My Control register 1" "Disabled,Enabled" bitfld.word 0x00 8. " CTL[0] ,My Control register 0" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " ST[7] ,My Status register 7" "Low,High" bitfld.word 0x00 6. " ST[6] ,My Status register 6" "Low,High" bitfld.word 0x00 5. " ST[5] ,My Status register 5" "Low,High" bitfld.word 0x00 4. " ST[4] ,My Status register 4" "Low,High" textline " " bitfld.word 0x00 3. " ST[3] ,My Status register 3" "Low,High" bitfld.word 0x00 2. " ST[2] ,My Status register 2" "Low,High" bitfld.word 0x00 1. " ST[1] ,My Status register 1" "Low,High" bitfld.word 0x00 0. " ST[0] ,My Status register 0" "Low,High" group.word 0x100++0x01 line.word 0x00 "UDB11_MSK_ACTL,UDB11_MSK_ACTL" bitfld.word 0x00 13. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN ,Interrupt enable" "Disabled,Enabled" bitfld.word 0x00 11. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 10. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 9. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" textline " " bitfld.word 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.word 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.word 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.word 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.word 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.word 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" textline " " bitfld.word 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" rgroup.word 0x140++0x01 line.word 0x00 "UDB11_MC_00,UDB11_MC_00" bitfld.word 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif width 0x0B tree.end tree "UDB 12" width 12. if (((per.l(ad:(0x40010000+0xc50)))&0x01)==0x00) base ad:0x4000640C group.byte 0x00++0x00 line.byte 0x00 "UDB12_A0,UDB12_A0" group.byte 0x10++0x00 line.byte 0x00 "UDB12_A1,UDB12_A1" group.byte 0x20++0x00 line.byte 0x00 "UDB12_D0,UDB12_D0" group.byte 0x30++0x00 line.byte 0x00 "UDB12_D1,UDB12_D1" group.byte 0x40++0x00 line.byte 0x00 "UDB12_F0,UDB12_F0" group.byte 0x50++0x00 line.byte 0x00 "UDB12_F1,UDB12_F1" rgroup.byte 0x60++0x00 line.byte 0x00 "UDB12_ST,UDB12_ST" bitfld.byte 0x00 7. " ST[7] ,Status register 7" "Low,High" bitfld.byte 0x00 6. " ST[6] ,Status register 6" "Low,High" bitfld.byte 0x00 5. " ST[5] ,Status register 5" "Low,High" bitfld.byte 0x00 4. " ST[4] ,Status register 4" "Low,High" textline " " bitfld.byte 0x00 3. " ST[3] ,Status register 3" "Low,High" bitfld.byte 0x00 2. " ST[2] ,Status register 2" "Low,High" bitfld.byte 0x00 1. " ST[1] ,Status register 1" "Low,High" bitfld.byte 0x00 0. " ST[0] ,Status register 0" "Low,High" group.byte 0x70++0x00 line.byte 0x00 "UDB12_CTL,UDB12_CTL" bitfld.byte 0x00 7. " CTL[7] ,Control register 7" "Disabled,Enabled" bitfld.byte 0x00 6. " CTL[6] ,Control register 6" "Disabled,Enabled" bitfld.byte 0x00 5. " CTL[5] ,Control register 5" "Disabled,Enabled" bitfld.byte 0x00 4. " CTL[4] ,Control register 4" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " CTL[3] ,Control register 3" "Disabled,Enabled" bitfld.byte 0x00 2. " CTL[2] ,Control register 2" "Disabled,Enabled" bitfld.byte 0x00 1. " CTL[1] ,Control register 1" "Disabled,Enabled" bitfld.byte 0x00 0. " CTL[0] ,Control register 0" "Disabled,Enabled" group.byte 0x80++0x00 line.byte 0x00 "UDB12_MSK,UDB12_MSK" bitfld.byte 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.byte 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.byte 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.byte 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.byte 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.byte 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" bitfld.byte 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" group.byte 0x90++0x00 line.byte 0x00 "UDB12_ACTL,UDB12_ACTL" bitfld.byte 0x00 5. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.byte 0x00 4. " INT_EN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 2. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 1. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.byte 0x00 0. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" rgroup.byte 0xa0++0x00 line.byte 0x00 "UDB12_MC,UDB12_MC" bitfld.byte 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else width 16. base ad:0x40006818 group.word 0x00++0x01 line.word 0x00 "UDB12_A0_A1,UDB12_A0_A1" hexmask.word.byte 0x00 8.--15. 1. " A1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0 ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB12_D0_D1,UDB12_D0_D1" hexmask.word.byte 0x00 8.--15. 1. " D1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0 ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB12_F0_F1,UDB12_F0_F1" hexmask.word.byte 0x00 8.--15. 1. " F1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0 ,Generic field for 8 bit working registers" group.word 0xc0++0x01 line.word 0x00 "UDB12_ST_CTL,UDB12_ST_CTL" bitfld.word 0x00 15. " CTL[7] ,My Control register 7" "Disabled,Enabled" bitfld.word 0x00 14. " CTL[6] ,My Control register 6" "Disabled,Enabled" bitfld.word 0x00 13. " CTL[5] ,My Control register 5" "Disabled,Enabled" bitfld.word 0x00 12. " CTL[4] ,My Control register 4" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL[3] ,My Control register 3" "Disabled,Enabled" bitfld.word 0x00 10. " CTL[2] ,My Control register 2" "Disabled,Enabled" bitfld.word 0x00 9. " CTL[1] ,My Control register 1" "Disabled,Enabled" bitfld.word 0x00 8. " CTL[0] ,My Control register 0" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " ST[7] ,My Status register 7" "Low,High" bitfld.word 0x00 6. " ST[6] ,My Status register 6" "Low,High" bitfld.word 0x00 5. " ST[5] ,My Status register 5" "Low,High" bitfld.word 0x00 4. " ST[4] ,My Status register 4" "Low,High" textline " " bitfld.word 0x00 3. " ST[3] ,My Status register 3" "Low,High" bitfld.word 0x00 2. " ST[2] ,My Status register 2" "Low,High" bitfld.word 0x00 1. " ST[1] ,My Status register 1" "Low,High" bitfld.word 0x00 0. " ST[0] ,My Status register 0" "Low,High" group.word 0x100++0x01 line.word 0x00 "UDB12_MSK_ACTL,UDB12_MSK_ACTL" bitfld.word 0x00 13. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN ,Interrupt enable" "Disabled,Enabled" bitfld.word 0x00 11. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 10. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 9. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" textline " " bitfld.word 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.word 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.word 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.word 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.word 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.word 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" textline " " bitfld.word 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" rgroup.word 0x140++0x01 line.word 0x00 "UDB12_MC_00,UDB12_MC_00" bitfld.word 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif width 0x0B tree.end tree "UDB 13" width 12. if (((per.l(ad:(0x40010000+0xcd0)))&0x01)==0x00) base ad:0x4000640D group.byte 0x00++0x00 line.byte 0x00 "UDB13_A0,UDB13_A0" group.byte 0x10++0x00 line.byte 0x00 "UDB13_A1,UDB13_A1" group.byte 0x20++0x00 line.byte 0x00 "UDB13_D0,UDB13_D0" group.byte 0x30++0x00 line.byte 0x00 "UDB13_D1,UDB13_D1" group.byte 0x40++0x00 line.byte 0x00 "UDB13_F0,UDB13_F0" group.byte 0x50++0x00 line.byte 0x00 "UDB13_F1,UDB13_F1" rgroup.byte 0x60++0x00 line.byte 0x00 "UDB13_ST,UDB13_ST" bitfld.byte 0x00 7. " ST[7] ,Status register 7" "Low,High" bitfld.byte 0x00 6. " ST[6] ,Status register 6" "Low,High" bitfld.byte 0x00 5. " ST[5] ,Status register 5" "Low,High" bitfld.byte 0x00 4. " ST[4] ,Status register 4" "Low,High" textline " " bitfld.byte 0x00 3. " ST[3] ,Status register 3" "Low,High" bitfld.byte 0x00 2. " ST[2] ,Status register 2" "Low,High" bitfld.byte 0x00 1. " ST[1] ,Status register 1" "Low,High" bitfld.byte 0x00 0. " ST[0] ,Status register 0" "Low,High" group.byte 0x70++0x00 line.byte 0x00 "UDB13_CTL,UDB13_CTL" bitfld.byte 0x00 7. " CTL[7] ,Control register 7" "Disabled,Enabled" bitfld.byte 0x00 6. " CTL[6] ,Control register 6" "Disabled,Enabled" bitfld.byte 0x00 5. " CTL[5] ,Control register 5" "Disabled,Enabled" bitfld.byte 0x00 4. " CTL[4] ,Control register 4" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " CTL[3] ,Control register 3" "Disabled,Enabled" bitfld.byte 0x00 2. " CTL[2] ,Control register 2" "Disabled,Enabled" bitfld.byte 0x00 1. " CTL[1] ,Control register 1" "Disabled,Enabled" bitfld.byte 0x00 0. " CTL[0] ,Control register 0" "Disabled,Enabled" group.byte 0x80++0x00 line.byte 0x00 "UDB13_MSK,UDB13_MSK" bitfld.byte 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.byte 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.byte 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.byte 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.byte 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.byte 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" bitfld.byte 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" group.byte 0x90++0x00 line.byte 0x00 "UDB13_ACTL,UDB13_ACTL" bitfld.byte 0x00 5. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.byte 0x00 4. " INT_EN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 2. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 1. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.byte 0x00 0. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" rgroup.byte 0xa0++0x00 line.byte 0x00 "UDB13_MC,UDB13_MC" bitfld.byte 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else width 16. base ad:0x4000681A group.word 0x00++0x01 line.word 0x00 "UDB13_A0_A1,UDB13_A0_A1" hexmask.word.byte 0x00 8.--15. 1. " A1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0 ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB13_D0_D1,UDB13_D0_D1" hexmask.word.byte 0x00 8.--15. 1. " D1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0 ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB13_F0_F1,UDB13_F0_F1" hexmask.word.byte 0x00 8.--15. 1. " F1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0 ,Generic field for 8 bit working registers" group.word 0xc0++0x01 line.word 0x00 "UDB13_ST_CTL,UDB13_ST_CTL" bitfld.word 0x00 15. " CTL[7] ,My Control register 7" "Disabled,Enabled" bitfld.word 0x00 14. " CTL[6] ,My Control register 6" "Disabled,Enabled" bitfld.word 0x00 13. " CTL[5] ,My Control register 5" "Disabled,Enabled" bitfld.word 0x00 12. " CTL[4] ,My Control register 4" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL[3] ,My Control register 3" "Disabled,Enabled" bitfld.word 0x00 10. " CTL[2] ,My Control register 2" "Disabled,Enabled" bitfld.word 0x00 9. " CTL[1] ,My Control register 1" "Disabled,Enabled" bitfld.word 0x00 8. " CTL[0] ,My Control register 0" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " ST[7] ,My Status register 7" "Low,High" bitfld.word 0x00 6. " ST[6] ,My Status register 6" "Low,High" bitfld.word 0x00 5. " ST[5] ,My Status register 5" "Low,High" bitfld.word 0x00 4. " ST[4] ,My Status register 4" "Low,High" textline " " bitfld.word 0x00 3. " ST[3] ,My Status register 3" "Low,High" bitfld.word 0x00 2. " ST[2] ,My Status register 2" "Low,High" bitfld.word 0x00 1. " ST[1] ,My Status register 1" "Low,High" bitfld.word 0x00 0. " ST[0] ,My Status register 0" "Low,High" group.word 0x100++0x01 line.word 0x00 "UDB13_MSK_ACTL,UDB13_MSK_ACTL" bitfld.word 0x00 13. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN ,Interrupt enable" "Disabled,Enabled" bitfld.word 0x00 11. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 10. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 9. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" textline " " bitfld.word 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.word 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.word 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.word 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.word 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.word 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" textline " " bitfld.word 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" rgroup.word 0x140++0x01 line.word 0x00 "UDB13_MC_00,UDB13_MC_00" bitfld.word 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif width 0x0B tree.end tree "UDB 14" width 12. if (((per.l(ad:(0x40010000+0xe50)))&0x01)==0x00) base ad:0x4000640E group.byte 0x00++0x00 line.byte 0x00 "UDB14_A0,UDB14_A0" group.byte 0x10++0x00 line.byte 0x00 "UDB14_A1,UDB14_A1" group.byte 0x20++0x00 line.byte 0x00 "UDB14_D0,UDB14_D0" group.byte 0x30++0x00 line.byte 0x00 "UDB14_D1,UDB14_D1" group.byte 0x40++0x00 line.byte 0x00 "UDB14_F0,UDB14_F0" group.byte 0x50++0x00 line.byte 0x00 "UDB14_F1,UDB14_F1" rgroup.byte 0x60++0x00 line.byte 0x00 "UDB14_ST,UDB14_ST" bitfld.byte 0x00 7. " ST[7] ,Status register 7" "Low,High" bitfld.byte 0x00 6. " ST[6] ,Status register 6" "Low,High" bitfld.byte 0x00 5. " ST[5] ,Status register 5" "Low,High" bitfld.byte 0x00 4. " ST[4] ,Status register 4" "Low,High" textline " " bitfld.byte 0x00 3. " ST[3] ,Status register 3" "Low,High" bitfld.byte 0x00 2. " ST[2] ,Status register 2" "Low,High" bitfld.byte 0x00 1. " ST[1] ,Status register 1" "Low,High" bitfld.byte 0x00 0. " ST[0] ,Status register 0" "Low,High" group.byte 0x70++0x00 line.byte 0x00 "UDB14_CTL,UDB14_CTL" bitfld.byte 0x00 7. " CTL[7] ,Control register 7" "Disabled,Enabled" bitfld.byte 0x00 6. " CTL[6] ,Control register 6" "Disabled,Enabled" bitfld.byte 0x00 5. " CTL[5] ,Control register 5" "Disabled,Enabled" bitfld.byte 0x00 4. " CTL[4] ,Control register 4" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " CTL[3] ,Control register 3" "Disabled,Enabled" bitfld.byte 0x00 2. " CTL[2] ,Control register 2" "Disabled,Enabled" bitfld.byte 0x00 1. " CTL[1] ,Control register 1" "Disabled,Enabled" bitfld.byte 0x00 0. " CTL[0] ,Control register 0" "Disabled,Enabled" group.byte 0x80++0x00 line.byte 0x00 "UDB14_MSK,UDB14_MSK" bitfld.byte 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.byte 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.byte 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.byte 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.byte 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.byte 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" bitfld.byte 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" group.byte 0x90++0x00 line.byte 0x00 "UDB14_ACTL,UDB14_ACTL" bitfld.byte 0x00 5. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.byte 0x00 4. " INT_EN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 2. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 1. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.byte 0x00 0. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" rgroup.byte 0xa0++0x00 line.byte 0x00 "UDB14_MC,UDB14_MC" bitfld.byte 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else width 16. base ad:0x4000681C group.word 0x00++0x01 line.word 0x00 "UDB14_A0_A1,UDB14_A0_A1" hexmask.word.byte 0x00 8.--15. 1. " A1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0 ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB14_D0_D1,UDB14_D0_D1" hexmask.word.byte 0x00 8.--15. 1. " D1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0 ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB14_F0_F1,UDB14_F0_F1" hexmask.word.byte 0x00 8.--15. 1. " F1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0 ,Generic field for 8 bit working registers" group.word 0xc0++0x01 line.word 0x00 "UDB14_ST_CTL,UDB14_ST_CTL" bitfld.word 0x00 15. " CTL[7] ,My Control register 7" "Disabled,Enabled" bitfld.word 0x00 14. " CTL[6] ,My Control register 6" "Disabled,Enabled" bitfld.word 0x00 13. " CTL[5] ,My Control register 5" "Disabled,Enabled" bitfld.word 0x00 12. " CTL[4] ,My Control register 4" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL[3] ,My Control register 3" "Disabled,Enabled" bitfld.word 0x00 10. " CTL[2] ,My Control register 2" "Disabled,Enabled" bitfld.word 0x00 9. " CTL[1] ,My Control register 1" "Disabled,Enabled" bitfld.word 0x00 8. " CTL[0] ,My Control register 0" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " ST[7] ,My Status register 7" "Low,High" bitfld.word 0x00 6. " ST[6] ,My Status register 6" "Low,High" bitfld.word 0x00 5. " ST[5] ,My Status register 5" "Low,High" bitfld.word 0x00 4. " ST[4] ,My Status register 4" "Low,High" textline " " bitfld.word 0x00 3. " ST[3] ,My Status register 3" "Low,High" bitfld.word 0x00 2. " ST[2] ,My Status register 2" "Low,High" bitfld.word 0x00 1. " ST[1] ,My Status register 1" "Low,High" bitfld.word 0x00 0. " ST[0] ,My Status register 0" "Low,High" group.word 0x100++0x01 line.word 0x00 "UDB14_MSK_ACTL,UDB14_MSK_ACTL" bitfld.word 0x00 13. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN ,Interrupt enable" "Disabled,Enabled" bitfld.word 0x00 11. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 10. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 9. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" textline " " bitfld.word 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.word 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.word 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.word 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.word 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.word 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" textline " " bitfld.word 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" rgroup.word 0x140++0x01 line.word 0x00 "UDB14_MC_00,UDB14_MC_00" bitfld.word 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif width 0x0B tree.end tree "UDB 15" width 12. if (((per.l(ad:(0x40010000+0xed0)))&0x01)==0x00) base ad:0x4000640F group.byte 0x00++0x00 line.byte 0x00 "UDB15_A0,UDB15_A0" group.byte 0x10++0x00 line.byte 0x00 "UDB15_A1,UDB15_A1" group.byte 0x20++0x00 line.byte 0x00 "UDB15_D0,UDB15_D0" group.byte 0x30++0x00 line.byte 0x00 "UDB15_D1,UDB15_D1" group.byte 0x40++0x00 line.byte 0x00 "UDB15_F0,UDB15_F0" group.byte 0x50++0x00 line.byte 0x00 "UDB15_F1,UDB15_F1" rgroup.byte 0x60++0x00 line.byte 0x00 "UDB15_ST,UDB15_ST" bitfld.byte 0x00 7. " ST[7] ,Status register 7" "Low,High" bitfld.byte 0x00 6. " ST[6] ,Status register 6" "Low,High" bitfld.byte 0x00 5. " ST[5] ,Status register 5" "Low,High" bitfld.byte 0x00 4. " ST[4] ,Status register 4" "Low,High" textline " " bitfld.byte 0x00 3. " ST[3] ,Status register 3" "Low,High" bitfld.byte 0x00 2. " ST[2] ,Status register 2" "Low,High" bitfld.byte 0x00 1. " ST[1] ,Status register 1" "Low,High" bitfld.byte 0x00 0. " ST[0] ,Status register 0" "Low,High" group.byte 0x70++0x00 line.byte 0x00 "UDB15_CTL,UDB15_CTL" bitfld.byte 0x00 7. " CTL[7] ,Control register 7" "Disabled,Enabled" bitfld.byte 0x00 6. " CTL[6] ,Control register 6" "Disabled,Enabled" bitfld.byte 0x00 5. " CTL[5] ,Control register 5" "Disabled,Enabled" bitfld.byte 0x00 4. " CTL[4] ,Control register 4" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " CTL[3] ,Control register 3" "Disabled,Enabled" bitfld.byte 0x00 2. " CTL[2] ,Control register 2" "Disabled,Enabled" bitfld.byte 0x00 1. " CTL[1] ,Control register 1" "Disabled,Enabled" bitfld.byte 0x00 0. " CTL[0] ,Control register 0" "Disabled,Enabled" group.byte 0x80++0x00 line.byte 0x00 "UDB15_MSK,UDB15_MSK" bitfld.byte 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.byte 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.byte 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.byte 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.byte 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.byte 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" bitfld.byte 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" group.byte 0x90++0x00 line.byte 0x00 "UDB15_ACTL,UDB15_ACTL" bitfld.byte 0x00 5. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.byte 0x00 4. " INT_EN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 2. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 1. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.byte 0x00 0. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" rgroup.byte 0xa0++0x00 line.byte 0x00 "UDB15_MC,UDB15_MC" bitfld.byte 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else width 16. base ad:0x4000681E group.word 0x00++0x01 line.word 0x00 "UDB15_A0_A1,UDB15_A0_A1" hexmask.word.byte 0x00 8.--15. 1. " A1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0 ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB15_D0_D1,UDB15_D0_D1" hexmask.word.byte 0x00 8.--15. 1. " D1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0 ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB15_F0_F1,UDB15_F0_F1" hexmask.word.byte 0x00 8.--15. 1. " F1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0 ,Generic field for 8 bit working registers" group.word 0xc0++0x01 line.word 0x00 "UDB15_ST_CTL,UDB15_ST_CTL" bitfld.word 0x00 15. " CTL[7] ,My Control register 7" "Disabled,Enabled" bitfld.word 0x00 14. " CTL[6] ,My Control register 6" "Disabled,Enabled" bitfld.word 0x00 13. " CTL[5] ,My Control register 5" "Disabled,Enabled" bitfld.word 0x00 12. " CTL[4] ,My Control register 4" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL[3] ,My Control register 3" "Disabled,Enabled" bitfld.word 0x00 10. " CTL[2] ,My Control register 2" "Disabled,Enabled" bitfld.word 0x00 9. " CTL[1] ,My Control register 1" "Disabled,Enabled" bitfld.word 0x00 8. " CTL[0] ,My Control register 0" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " ST[7] ,My Status register 7" "Low,High" bitfld.word 0x00 6. " ST[6] ,My Status register 6" "Low,High" bitfld.word 0x00 5. " ST[5] ,My Status register 5" "Low,High" bitfld.word 0x00 4. " ST[4] ,My Status register 4" "Low,High" textline " " bitfld.word 0x00 3. " ST[3] ,My Status register 3" "Low,High" bitfld.word 0x00 2. " ST[2] ,My Status register 2" "Low,High" bitfld.word 0x00 1. " ST[1] ,My Status register 1" "Low,High" bitfld.word 0x00 0. " ST[0] ,My Status register 0" "Low,High" group.word 0x100++0x01 line.word 0x00 "UDB15_MSK_ACTL,UDB15_MSK_ACTL" bitfld.word 0x00 13. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN ,Interrupt enable" "Disabled,Enabled" bitfld.word 0x00 11. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 10. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 9. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" textline " " bitfld.word 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.word 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.word 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.word 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.word 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.word 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" textline " " bitfld.word 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" rgroup.word 0x140++0x01 line.word 0x00 "UDB15_MC_00,UDB15_MC_00" bitfld.word 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif width 0x0B tree.end tree "UDB 00_01" base ad:0x40006800 width 15. group.word 0x00++0x01 line.word 0x00 "UDB00_01_A0,UDB00_01_A0" hexmask.word.byte 0x00 8.--15. 1. " A0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0_LS ,Generic field for 8 bit working registers" group.word 0x20++0x01 line.word 0x00 "UDB00_01_A1,UDB00_01_A1" hexmask.word.byte 0x00 8.--15. 1. " A1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A1_LS ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB00_01_D0,UDB00_01_D0" hexmask.word.byte 0x00 8.--15. 1. " D0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0_LS ,Generic field for 8 bit working registers" group.word 0x60++0x01 line.word 0x00 "UDB00_01_D1,UDB00_01_D1" hexmask.word.byte 0x00 8.--15. 1. " D1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D1_LS ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB00_01_F0,UDB00_01_F0" hexmask.word.byte 0x00 8.--15. 1. " F0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0_LS ,Generic field for 8 bit working registers" group.word 0xa0++0x01 line.word 0x00 "UDB00_01_F1,UDB00_01_F1" hexmask.word.byte 0x00 8.--15. 1. " F1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F1_LS ,Generic field for 8 bit working registers" rgroup.word 0xc0++0x01 line.word 0x00 "UDB00_01_ST,UDB00_01_ST" bitfld.word 0x00 15. " ST_MS[7] ,Status register" "Low,High" bitfld.word 0x00 14. " ST_MS[6] ,Status register" "Low,High" bitfld.word 0x00 13. " ST_MS[5] ,Status register" "Low,High" bitfld.word 0x00 12. " ST_MS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 11. " ST_MS[3] ,Status register" "Low,High" bitfld.word 0x00 10. " ST_MS[2] ,Status register" "Low,High" bitfld.word 0x00 9. " ST_MS[1] ,Status register" "Low,High" bitfld.word 0x00 8. " ST_MS[0] ,Status register" "Low,High" textline " " bitfld.word 0x00 7. " ST_LS[7] ,Status register" "Low,High" bitfld.word 0x00 6. " ST_LS[6] ,Status register" "Low,High" bitfld.word 0x00 5. " ST_LS[5] ,Status register" "Low,High" bitfld.word 0x00 4. " ST_LS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 3. " ST_LS[3] ,Status register" "Low,High" bitfld.word 0x00 2. " ST_LS[2] ,Status register" "Low,High" bitfld.word 0x00 1. " ST_LS[1] ,Status register" "Low,High" bitfld.word 0x00 0. " ST_LS[0] ,Status register" "Low,High" group.word 0xe0++0x01 line.word 0x00 "UDB00_01_CTL,UDB00_01_CTL" bitfld.word 0x00 15. " CTL_MS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 14. " CTL_MS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 13. " CTL_MS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 12. " CTL_MS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL_MS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 10. " CTL_MS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 9. " CTL_MS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 8. " CTL_MS[0] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " CTL_LS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 6. " CTL_LS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 5. " CTL_LS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 4. " CTL_LS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " CTL_LS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 2. " CTL_LS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 1. " CTL_LS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 0. " CTL_LS[0] ,Control register" "Disabled,Enabled" textline " " group.word 0x100++0x01 line.word 0x00 "UDB00_01_MSK,UDB00_01_MSK" bitfld.word 0x00 14. " MSK_MS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 13. " MSK_MS[5] ,Mask register" "Not masked,Masked" bitfld.word 0x00 12. " MSK_MS[4] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 11. " MSK_MS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 10. " MSK_MS[2] ,Mask register" "Not masked,Masked" bitfld.word 0x00 9. " MSK_MS[1] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 8. " MSK_MS[0] ,Mask register" "Not masked,Masked" bitfld.word 0x00 6. " MSK_LS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 5. " MSK_LS[5] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 4. " MSK_LS[4] ,Mask register" "Not masked,Masked" bitfld.word 0x00 3. " MSK_LS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 2. " MSK_LS[2] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 1. " MSK_LS[1] ,Mask register" "Not masked,Masked" bitfld.word 0x00 0. " MSK_LS[0] ,Mask register" "Not masked,Masked" textline " " group.word 0x120++0x01 line.word 0x00 "UDB00_01_ACTL,UDB00_01_ACTL" bitfld.word 0x00 13. " CNT_START_MS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN_MS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FIFO1_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 10. " FIFO0_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 9. " FIFO1_CLR_MS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR_MS ,FIFO clear 0" "Normal,Cleared" textline " " bitfld.word 0x00 5. " CNT_START_LS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 4. " INT_EN_LS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " FIFO1_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 2. " FIFO0_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 1. " FIFO1_CLR_LS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 0. " FIFO0_CLR_LS ,FIFO clear 0" "Normal,Cleared" textline " " rgroup.word 0x140++0x01 line.word 0x00 "UDB00_01_MC,UDB00_01_MC" bitfld.word 0x00 12.--15. " PLD1_MC_MS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " PLD0_MC_MS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " PLD1_MC_LS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC_LS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "UDB 01_02" base ad:0x40006802 width 15. group.word 0x00++0x01 line.word 0x00 "UDB01_02_A0,UDB01_02_A0" hexmask.word.byte 0x00 8.--15. 1. " A0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0_LS ,Generic field for 8 bit working registers" group.word 0x20++0x01 line.word 0x00 "UDB01_02_A1,UDB01_02_A1" hexmask.word.byte 0x00 8.--15. 1. " A1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A1_LS ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB01_02_D0,UDB01_02_D0" hexmask.word.byte 0x00 8.--15. 1. " D0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0_LS ,Generic field for 8 bit working registers" group.word 0x60++0x01 line.word 0x00 "UDB01_02_D1,UDB01_02_D1" hexmask.word.byte 0x00 8.--15. 1. " D1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D1_LS ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB01_02_F0,UDB01_02_F0" hexmask.word.byte 0x00 8.--15. 1. " F0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0_LS ,Generic field for 8 bit working registers" group.word 0xa0++0x01 line.word 0x00 "UDB01_02_F1,UDB01_02_F1" hexmask.word.byte 0x00 8.--15. 1. " F1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F1_LS ,Generic field for 8 bit working registers" rgroup.word 0xc0++0x01 line.word 0x00 "UDB01_02_ST,UDB01_02_ST" bitfld.word 0x00 15. " ST_MS[7] ,Status register" "Low,High" bitfld.word 0x00 14. " ST_MS[6] ,Status register" "Low,High" bitfld.word 0x00 13. " ST_MS[5] ,Status register" "Low,High" bitfld.word 0x00 12. " ST_MS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 11. " ST_MS[3] ,Status register" "Low,High" bitfld.word 0x00 10. " ST_MS[2] ,Status register" "Low,High" bitfld.word 0x00 9. " ST_MS[1] ,Status register" "Low,High" bitfld.word 0x00 8. " ST_MS[0] ,Status register" "Low,High" textline " " bitfld.word 0x00 7. " ST_LS[7] ,Status register" "Low,High" bitfld.word 0x00 6. " ST_LS[6] ,Status register" "Low,High" bitfld.word 0x00 5. " ST_LS[5] ,Status register" "Low,High" bitfld.word 0x00 4. " ST_LS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 3. " ST_LS[3] ,Status register" "Low,High" bitfld.word 0x00 2. " ST_LS[2] ,Status register" "Low,High" bitfld.word 0x00 1. " ST_LS[1] ,Status register" "Low,High" bitfld.word 0x00 0. " ST_LS[0] ,Status register" "Low,High" group.word 0xe0++0x01 line.word 0x00 "UDB01_02_CTL,UDB01_02_CTL" bitfld.word 0x00 15. " CTL_MS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 14. " CTL_MS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 13. " CTL_MS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 12. " CTL_MS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL_MS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 10. " CTL_MS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 9. " CTL_MS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 8. " CTL_MS[0] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " CTL_LS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 6. " CTL_LS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 5. " CTL_LS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 4. " CTL_LS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " CTL_LS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 2. " CTL_LS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 1. " CTL_LS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 0. " CTL_LS[0] ,Control register" "Disabled,Enabled" textline " " group.word 0x100++0x01 line.word 0x00 "UDB01_02_MSK,UDB01_02_MSK" bitfld.word 0x00 14. " MSK_MS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 13. " MSK_MS[5] ,Mask register" "Not masked,Masked" bitfld.word 0x00 12. " MSK_MS[4] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 11. " MSK_MS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 10. " MSK_MS[2] ,Mask register" "Not masked,Masked" bitfld.word 0x00 9. " MSK_MS[1] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 8. " MSK_MS[0] ,Mask register" "Not masked,Masked" bitfld.word 0x00 6. " MSK_LS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 5. " MSK_LS[5] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 4. " MSK_LS[4] ,Mask register" "Not masked,Masked" bitfld.word 0x00 3. " MSK_LS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 2. " MSK_LS[2] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 1. " MSK_LS[1] ,Mask register" "Not masked,Masked" bitfld.word 0x00 0. " MSK_LS[0] ,Mask register" "Not masked,Masked" textline " " group.word 0x120++0x01 line.word 0x00 "UDB01_02_ACTL,UDB01_02_ACTL" bitfld.word 0x00 13. " CNT_START_MS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN_MS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FIFO1_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 10. " FIFO0_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 9. " FIFO1_CLR_MS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR_MS ,FIFO clear 0" "Normal,Cleared" textline " " bitfld.word 0x00 5. " CNT_START_LS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 4. " INT_EN_LS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " FIFO1_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 2. " FIFO0_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 1. " FIFO1_CLR_LS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 0. " FIFO0_CLR_LS ,FIFO clear 0" "Normal,Cleared" textline " " rgroup.word 0x140++0x01 line.word 0x00 "UDB01_02_MC,UDB01_02_MC" bitfld.word 0x00 12.--15. " PLD1_MC_MS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " PLD0_MC_MS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " PLD1_MC_LS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC_LS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "UDB 02_03" base ad:0x40006804 width 15. group.word 0x00++0x01 line.word 0x00 "UDB02_03_A0,UDB02_03_A0" hexmask.word.byte 0x00 8.--15. 1. " A0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0_LS ,Generic field for 8 bit working registers" group.word 0x20++0x01 line.word 0x00 "UDB02_03_A1,UDB02_03_A1" hexmask.word.byte 0x00 8.--15. 1. " A1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A1_LS ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB02_03_D0,UDB02_03_D0" hexmask.word.byte 0x00 8.--15. 1. " D0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0_LS ,Generic field for 8 bit working registers" group.word 0x60++0x01 line.word 0x00 "UDB02_03_D1,UDB02_03_D1" hexmask.word.byte 0x00 8.--15. 1. " D1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D1_LS ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB02_03_F0,UDB02_03_F0" hexmask.word.byte 0x00 8.--15. 1. " F0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0_LS ,Generic field for 8 bit working registers" group.word 0xa0++0x01 line.word 0x00 "UDB02_03_F1,UDB02_03_F1" hexmask.word.byte 0x00 8.--15. 1. " F1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F1_LS ,Generic field for 8 bit working registers" rgroup.word 0xc0++0x01 line.word 0x00 "UDB02_03_ST,UDB02_03_ST" bitfld.word 0x00 15. " ST_MS[7] ,Status register" "Low,High" bitfld.word 0x00 14. " ST_MS[6] ,Status register" "Low,High" bitfld.word 0x00 13. " ST_MS[5] ,Status register" "Low,High" bitfld.word 0x00 12. " ST_MS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 11. " ST_MS[3] ,Status register" "Low,High" bitfld.word 0x00 10. " ST_MS[2] ,Status register" "Low,High" bitfld.word 0x00 9. " ST_MS[1] ,Status register" "Low,High" bitfld.word 0x00 8. " ST_MS[0] ,Status register" "Low,High" textline " " bitfld.word 0x00 7. " ST_LS[7] ,Status register" "Low,High" bitfld.word 0x00 6. " ST_LS[6] ,Status register" "Low,High" bitfld.word 0x00 5. " ST_LS[5] ,Status register" "Low,High" bitfld.word 0x00 4. " ST_LS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 3. " ST_LS[3] ,Status register" "Low,High" bitfld.word 0x00 2. " ST_LS[2] ,Status register" "Low,High" bitfld.word 0x00 1. " ST_LS[1] ,Status register" "Low,High" bitfld.word 0x00 0. " ST_LS[0] ,Status register" "Low,High" group.word 0xe0++0x01 line.word 0x00 "UDB02_03_CTL,UDB02_03_CTL" bitfld.word 0x00 15. " CTL_MS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 14. " CTL_MS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 13. " CTL_MS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 12. " CTL_MS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL_MS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 10. " CTL_MS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 9. " CTL_MS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 8. " CTL_MS[0] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " CTL_LS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 6. " CTL_LS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 5. " CTL_LS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 4. " CTL_LS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " CTL_LS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 2. " CTL_LS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 1. " CTL_LS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 0. " CTL_LS[0] ,Control register" "Disabled,Enabled" textline " " group.word 0x100++0x01 line.word 0x00 "UDB02_03_MSK,UDB02_03_MSK" bitfld.word 0x00 14. " MSK_MS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 13. " MSK_MS[5] ,Mask register" "Not masked,Masked" bitfld.word 0x00 12. " MSK_MS[4] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 11. " MSK_MS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 10. " MSK_MS[2] ,Mask register" "Not masked,Masked" bitfld.word 0x00 9. " MSK_MS[1] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 8. " MSK_MS[0] ,Mask register" "Not masked,Masked" bitfld.word 0x00 6. " MSK_LS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 5. " MSK_LS[5] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 4. " MSK_LS[4] ,Mask register" "Not masked,Masked" bitfld.word 0x00 3. " MSK_LS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 2. " MSK_LS[2] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 1. " MSK_LS[1] ,Mask register" "Not masked,Masked" bitfld.word 0x00 0. " MSK_LS[0] ,Mask register" "Not masked,Masked" textline " " group.word 0x120++0x01 line.word 0x00 "UDB02_03_ACTL,UDB02_03_ACTL" bitfld.word 0x00 13. " CNT_START_MS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN_MS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FIFO1_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 10. " FIFO0_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 9. " FIFO1_CLR_MS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR_MS ,FIFO clear 0" "Normal,Cleared" textline " " bitfld.word 0x00 5. " CNT_START_LS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 4. " INT_EN_LS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " FIFO1_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 2. " FIFO0_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 1. " FIFO1_CLR_LS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 0. " FIFO0_CLR_LS ,FIFO clear 0" "Normal,Cleared" textline " " rgroup.word 0x140++0x01 line.word 0x00 "UDB02_03_MC,UDB02_03_MC" bitfld.word 0x00 12.--15. " PLD1_MC_MS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " PLD0_MC_MS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " PLD1_MC_LS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC_LS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "UDB 03_04" base ad:0x40006806 width 15. group.word 0x00++0x01 line.word 0x00 "UDB03_04_A0,UDB03_04_A0" hexmask.word.byte 0x00 8.--15. 1. " A0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0_LS ,Generic field for 8 bit working registers" group.word 0x20++0x01 line.word 0x00 "UDB03_04_A1,UDB03_04_A1" hexmask.word.byte 0x00 8.--15. 1. " A1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A1_LS ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB03_04_D0,UDB03_04_D0" hexmask.word.byte 0x00 8.--15. 1. " D0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0_LS ,Generic field for 8 bit working registers" group.word 0x60++0x01 line.word 0x00 "UDB03_04_D1,UDB03_04_D1" hexmask.word.byte 0x00 8.--15. 1. " D1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D1_LS ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB03_04_F0,UDB03_04_F0" hexmask.word.byte 0x00 8.--15. 1. " F0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0_LS ,Generic field for 8 bit working registers" group.word 0xa0++0x01 line.word 0x00 "UDB03_04_F1,UDB03_04_F1" hexmask.word.byte 0x00 8.--15. 1. " F1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F1_LS ,Generic field for 8 bit working registers" rgroup.word 0xc0++0x01 line.word 0x00 "UDB03_04_ST,UDB03_04_ST" bitfld.word 0x00 15. " ST_MS[7] ,Status register" "Low,High" bitfld.word 0x00 14. " ST_MS[6] ,Status register" "Low,High" bitfld.word 0x00 13. " ST_MS[5] ,Status register" "Low,High" bitfld.word 0x00 12. " ST_MS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 11. " ST_MS[3] ,Status register" "Low,High" bitfld.word 0x00 10. " ST_MS[2] ,Status register" "Low,High" bitfld.word 0x00 9. " ST_MS[1] ,Status register" "Low,High" bitfld.word 0x00 8. " ST_MS[0] ,Status register" "Low,High" textline " " bitfld.word 0x00 7. " ST_LS[7] ,Status register" "Low,High" bitfld.word 0x00 6. " ST_LS[6] ,Status register" "Low,High" bitfld.word 0x00 5. " ST_LS[5] ,Status register" "Low,High" bitfld.word 0x00 4. " ST_LS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 3. " ST_LS[3] ,Status register" "Low,High" bitfld.word 0x00 2. " ST_LS[2] ,Status register" "Low,High" bitfld.word 0x00 1. " ST_LS[1] ,Status register" "Low,High" bitfld.word 0x00 0. " ST_LS[0] ,Status register" "Low,High" group.word 0xe0++0x01 line.word 0x00 "UDB03_04_CTL,UDB03_04_CTL" bitfld.word 0x00 15. " CTL_MS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 14. " CTL_MS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 13. " CTL_MS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 12. " CTL_MS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL_MS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 10. " CTL_MS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 9. " CTL_MS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 8. " CTL_MS[0] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " CTL_LS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 6. " CTL_LS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 5. " CTL_LS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 4. " CTL_LS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " CTL_LS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 2. " CTL_LS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 1. " CTL_LS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 0. " CTL_LS[0] ,Control register" "Disabled,Enabled" textline " " group.word 0x100++0x01 line.word 0x00 "UDB03_04_MSK,UDB03_04_MSK" bitfld.word 0x00 14. " MSK_MS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 13. " MSK_MS[5] ,Mask register" "Not masked,Masked" bitfld.word 0x00 12. " MSK_MS[4] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 11. " MSK_MS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 10. " MSK_MS[2] ,Mask register" "Not masked,Masked" bitfld.word 0x00 9. " MSK_MS[1] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 8. " MSK_MS[0] ,Mask register" "Not masked,Masked" bitfld.word 0x00 6. " MSK_LS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 5. " MSK_LS[5] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 4. " MSK_LS[4] ,Mask register" "Not masked,Masked" bitfld.word 0x00 3. " MSK_LS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 2. " MSK_LS[2] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 1. " MSK_LS[1] ,Mask register" "Not masked,Masked" bitfld.word 0x00 0. " MSK_LS[0] ,Mask register" "Not masked,Masked" textline " " group.word 0x120++0x01 line.word 0x00 "UDB03_04_ACTL,UDB03_04_ACTL" bitfld.word 0x00 13. " CNT_START_MS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN_MS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FIFO1_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 10. " FIFO0_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 9. " FIFO1_CLR_MS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR_MS ,FIFO clear 0" "Normal,Cleared" textline " " bitfld.word 0x00 5. " CNT_START_LS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 4. " INT_EN_LS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " FIFO1_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 2. " FIFO0_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 1. " FIFO1_CLR_LS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 0. " FIFO0_CLR_LS ,FIFO clear 0" "Normal,Cleared" textline " " rgroup.word 0x140++0x01 line.word 0x00 "UDB03_04_MC,UDB03_04_MC" bitfld.word 0x00 12.--15. " PLD1_MC_MS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " PLD0_MC_MS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " PLD1_MC_LS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC_LS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "UDB 04_05" base ad:0x40006808 width 15. group.word 0x00++0x01 line.word 0x00 "UDB04_05_A0,UDB04_05_A0" hexmask.word.byte 0x00 8.--15. 1. " A0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0_LS ,Generic field for 8 bit working registers" group.word 0x20++0x01 line.word 0x00 "UDB04_05_A1,UDB04_05_A1" hexmask.word.byte 0x00 8.--15. 1. " A1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A1_LS ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB04_05_D0,UDB04_05_D0" hexmask.word.byte 0x00 8.--15. 1. " D0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0_LS ,Generic field for 8 bit working registers" group.word 0x60++0x01 line.word 0x00 "UDB04_05_D1,UDB04_05_D1" hexmask.word.byte 0x00 8.--15. 1. " D1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D1_LS ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB04_05_F0,UDB04_05_F0" hexmask.word.byte 0x00 8.--15. 1. " F0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0_LS ,Generic field for 8 bit working registers" group.word 0xa0++0x01 line.word 0x00 "UDB04_05_F1,UDB04_05_F1" hexmask.word.byte 0x00 8.--15. 1. " F1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F1_LS ,Generic field for 8 bit working registers" rgroup.word 0xc0++0x01 line.word 0x00 "UDB04_05_ST,UDB04_05_ST" bitfld.word 0x00 15. " ST_MS[7] ,Status register" "Low,High" bitfld.word 0x00 14. " ST_MS[6] ,Status register" "Low,High" bitfld.word 0x00 13. " ST_MS[5] ,Status register" "Low,High" bitfld.word 0x00 12. " ST_MS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 11. " ST_MS[3] ,Status register" "Low,High" bitfld.word 0x00 10. " ST_MS[2] ,Status register" "Low,High" bitfld.word 0x00 9. " ST_MS[1] ,Status register" "Low,High" bitfld.word 0x00 8. " ST_MS[0] ,Status register" "Low,High" textline " " bitfld.word 0x00 7. " ST_LS[7] ,Status register" "Low,High" bitfld.word 0x00 6. " ST_LS[6] ,Status register" "Low,High" bitfld.word 0x00 5. " ST_LS[5] ,Status register" "Low,High" bitfld.word 0x00 4. " ST_LS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 3. " ST_LS[3] ,Status register" "Low,High" bitfld.word 0x00 2. " ST_LS[2] ,Status register" "Low,High" bitfld.word 0x00 1. " ST_LS[1] ,Status register" "Low,High" bitfld.word 0x00 0. " ST_LS[0] ,Status register" "Low,High" group.word 0xe0++0x01 line.word 0x00 "UDB04_05_CTL,UDB04_05_CTL" bitfld.word 0x00 15. " CTL_MS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 14. " CTL_MS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 13. " CTL_MS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 12. " CTL_MS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL_MS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 10. " CTL_MS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 9. " CTL_MS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 8. " CTL_MS[0] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " CTL_LS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 6. " CTL_LS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 5. " CTL_LS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 4. " CTL_LS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " CTL_LS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 2. " CTL_LS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 1. " CTL_LS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 0. " CTL_LS[0] ,Control register" "Disabled,Enabled" textline " " group.word 0x100++0x01 line.word 0x00 "UDB04_05_MSK,UDB04_05_MSK" bitfld.word 0x00 14. " MSK_MS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 13. " MSK_MS[5] ,Mask register" "Not masked,Masked" bitfld.word 0x00 12. " MSK_MS[4] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 11. " MSK_MS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 10. " MSK_MS[2] ,Mask register" "Not masked,Masked" bitfld.word 0x00 9. " MSK_MS[1] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 8. " MSK_MS[0] ,Mask register" "Not masked,Masked" bitfld.word 0x00 6. " MSK_LS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 5. " MSK_LS[5] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 4. " MSK_LS[4] ,Mask register" "Not masked,Masked" bitfld.word 0x00 3. " MSK_LS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 2. " MSK_LS[2] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 1. " MSK_LS[1] ,Mask register" "Not masked,Masked" bitfld.word 0x00 0. " MSK_LS[0] ,Mask register" "Not masked,Masked" textline " " group.word 0x120++0x01 line.word 0x00 "UDB04_05_ACTL,UDB04_05_ACTL" bitfld.word 0x00 13. " CNT_START_MS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN_MS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FIFO1_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 10. " FIFO0_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 9. " FIFO1_CLR_MS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR_MS ,FIFO clear 0" "Normal,Cleared" textline " " bitfld.word 0x00 5. " CNT_START_LS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 4. " INT_EN_LS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " FIFO1_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 2. " FIFO0_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 1. " FIFO1_CLR_LS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 0. " FIFO0_CLR_LS ,FIFO clear 0" "Normal,Cleared" textline " " rgroup.word 0x140++0x01 line.word 0x00 "UDB04_05_MC,UDB04_05_MC" bitfld.word 0x00 12.--15. " PLD1_MC_MS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " PLD0_MC_MS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " PLD1_MC_LS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC_LS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "UDB 05_06" base ad:0x4000680A width 15. group.word 0x00++0x01 line.word 0x00 "UDB05_06_A0,UDB05_06_A0" hexmask.word.byte 0x00 8.--15. 1. " A0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0_LS ,Generic field for 8 bit working registers" group.word 0x20++0x01 line.word 0x00 "UDB05_06_A1,UDB05_06_A1" hexmask.word.byte 0x00 8.--15. 1. " A1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A1_LS ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB05_06_D0,UDB05_06_D0" hexmask.word.byte 0x00 8.--15. 1. " D0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0_LS ,Generic field for 8 bit working registers" group.word 0x60++0x01 line.word 0x00 "UDB05_06_D1,UDB05_06_D1" hexmask.word.byte 0x00 8.--15. 1. " D1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D1_LS ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB05_06_F0,UDB05_06_F0" hexmask.word.byte 0x00 8.--15. 1. " F0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0_LS ,Generic field for 8 bit working registers" group.word 0xa0++0x01 line.word 0x00 "UDB05_06_F1,UDB05_06_F1" hexmask.word.byte 0x00 8.--15. 1. " F1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F1_LS ,Generic field for 8 bit working registers" rgroup.word 0xc0++0x01 line.word 0x00 "UDB05_06_ST,UDB05_06_ST" bitfld.word 0x00 15. " ST_MS[7] ,Status register" "Low,High" bitfld.word 0x00 14. " ST_MS[6] ,Status register" "Low,High" bitfld.word 0x00 13. " ST_MS[5] ,Status register" "Low,High" bitfld.word 0x00 12. " ST_MS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 11. " ST_MS[3] ,Status register" "Low,High" bitfld.word 0x00 10. " ST_MS[2] ,Status register" "Low,High" bitfld.word 0x00 9. " ST_MS[1] ,Status register" "Low,High" bitfld.word 0x00 8. " ST_MS[0] ,Status register" "Low,High" textline " " bitfld.word 0x00 7. " ST_LS[7] ,Status register" "Low,High" bitfld.word 0x00 6. " ST_LS[6] ,Status register" "Low,High" bitfld.word 0x00 5. " ST_LS[5] ,Status register" "Low,High" bitfld.word 0x00 4. " ST_LS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 3. " ST_LS[3] ,Status register" "Low,High" bitfld.word 0x00 2. " ST_LS[2] ,Status register" "Low,High" bitfld.word 0x00 1. " ST_LS[1] ,Status register" "Low,High" bitfld.word 0x00 0. " ST_LS[0] ,Status register" "Low,High" group.word 0xe0++0x01 line.word 0x00 "UDB05_06_CTL,UDB05_06_CTL" bitfld.word 0x00 15. " CTL_MS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 14. " CTL_MS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 13. " CTL_MS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 12. " CTL_MS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL_MS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 10. " CTL_MS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 9. " CTL_MS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 8. " CTL_MS[0] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " CTL_LS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 6. " CTL_LS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 5. " CTL_LS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 4. " CTL_LS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " CTL_LS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 2. " CTL_LS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 1. " CTL_LS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 0. " CTL_LS[0] ,Control register" "Disabled,Enabled" textline " " group.word 0x100++0x01 line.word 0x00 "UDB05_06_MSK,UDB05_06_MSK" bitfld.word 0x00 14. " MSK_MS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 13. " MSK_MS[5] ,Mask register" "Not masked,Masked" bitfld.word 0x00 12. " MSK_MS[4] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 11. " MSK_MS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 10. " MSK_MS[2] ,Mask register" "Not masked,Masked" bitfld.word 0x00 9. " MSK_MS[1] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 8. " MSK_MS[0] ,Mask register" "Not masked,Masked" bitfld.word 0x00 6. " MSK_LS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 5. " MSK_LS[5] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 4. " MSK_LS[4] ,Mask register" "Not masked,Masked" bitfld.word 0x00 3. " MSK_LS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 2. " MSK_LS[2] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 1. " MSK_LS[1] ,Mask register" "Not masked,Masked" bitfld.word 0x00 0. " MSK_LS[0] ,Mask register" "Not masked,Masked" textline " " group.word 0x120++0x01 line.word 0x00 "UDB05_06_ACTL,UDB05_06_ACTL" bitfld.word 0x00 13. " CNT_START_MS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN_MS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FIFO1_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 10. " FIFO0_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 9. " FIFO1_CLR_MS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR_MS ,FIFO clear 0" "Normal,Cleared" textline " " bitfld.word 0x00 5. " CNT_START_LS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 4. " INT_EN_LS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " FIFO1_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 2. " FIFO0_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 1. " FIFO1_CLR_LS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 0. " FIFO0_CLR_LS ,FIFO clear 0" "Normal,Cleared" textline " " rgroup.word 0x140++0x01 line.word 0x00 "UDB05_06_MC,UDB05_06_MC" bitfld.word 0x00 12.--15. " PLD1_MC_MS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " PLD0_MC_MS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " PLD1_MC_LS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC_LS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "UDB 06_07" base ad:0x4000680C width 15. group.word 0x00++0x01 line.word 0x00 "UDB06_07_A0,UDB06_07_A0" hexmask.word.byte 0x00 8.--15. 1. " A0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0_LS ,Generic field for 8 bit working registers" group.word 0x20++0x01 line.word 0x00 "UDB06_07_A1,UDB06_07_A1" hexmask.word.byte 0x00 8.--15. 1. " A1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A1_LS ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB06_07_D0,UDB06_07_D0" hexmask.word.byte 0x00 8.--15. 1. " D0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0_LS ,Generic field for 8 bit working registers" group.word 0x60++0x01 line.word 0x00 "UDB06_07_D1,UDB06_07_D1" hexmask.word.byte 0x00 8.--15. 1. " D1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D1_LS ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB06_07_F0,UDB06_07_F0" hexmask.word.byte 0x00 8.--15. 1. " F0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0_LS ,Generic field for 8 bit working registers" group.word 0xa0++0x01 line.word 0x00 "UDB06_07_F1,UDB06_07_F1" hexmask.word.byte 0x00 8.--15. 1. " F1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F1_LS ,Generic field for 8 bit working registers" rgroup.word 0xc0++0x01 line.word 0x00 "UDB06_07_ST,UDB06_07_ST" bitfld.word 0x00 15. " ST_MS[7] ,Status register" "Low,High" bitfld.word 0x00 14. " ST_MS[6] ,Status register" "Low,High" bitfld.word 0x00 13. " ST_MS[5] ,Status register" "Low,High" bitfld.word 0x00 12. " ST_MS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 11. " ST_MS[3] ,Status register" "Low,High" bitfld.word 0x00 10. " ST_MS[2] ,Status register" "Low,High" bitfld.word 0x00 9. " ST_MS[1] ,Status register" "Low,High" bitfld.word 0x00 8. " ST_MS[0] ,Status register" "Low,High" textline " " bitfld.word 0x00 7. " ST_LS[7] ,Status register" "Low,High" bitfld.word 0x00 6. " ST_LS[6] ,Status register" "Low,High" bitfld.word 0x00 5. " ST_LS[5] ,Status register" "Low,High" bitfld.word 0x00 4. " ST_LS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 3. " ST_LS[3] ,Status register" "Low,High" bitfld.word 0x00 2. " ST_LS[2] ,Status register" "Low,High" bitfld.word 0x00 1. " ST_LS[1] ,Status register" "Low,High" bitfld.word 0x00 0. " ST_LS[0] ,Status register" "Low,High" group.word 0xe0++0x01 line.word 0x00 "UDB06_07_CTL,UDB06_07_CTL" bitfld.word 0x00 15. " CTL_MS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 14. " CTL_MS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 13. " CTL_MS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 12. " CTL_MS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL_MS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 10. " CTL_MS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 9. " CTL_MS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 8. " CTL_MS[0] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " CTL_LS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 6. " CTL_LS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 5. " CTL_LS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 4. " CTL_LS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " CTL_LS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 2. " CTL_LS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 1. " CTL_LS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 0. " CTL_LS[0] ,Control register" "Disabled,Enabled" textline " " group.word 0x100++0x01 line.word 0x00 "UDB06_07_MSK,UDB06_07_MSK" bitfld.word 0x00 14. " MSK_MS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 13. " MSK_MS[5] ,Mask register" "Not masked,Masked" bitfld.word 0x00 12. " MSK_MS[4] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 11. " MSK_MS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 10. " MSK_MS[2] ,Mask register" "Not masked,Masked" bitfld.word 0x00 9. " MSK_MS[1] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 8. " MSK_MS[0] ,Mask register" "Not masked,Masked" bitfld.word 0x00 6. " MSK_LS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 5. " MSK_LS[5] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 4. " MSK_LS[4] ,Mask register" "Not masked,Masked" bitfld.word 0x00 3. " MSK_LS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 2. " MSK_LS[2] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 1. " MSK_LS[1] ,Mask register" "Not masked,Masked" bitfld.word 0x00 0. " MSK_LS[0] ,Mask register" "Not masked,Masked" textline " " group.word 0x120++0x01 line.word 0x00 "UDB06_07_ACTL,UDB06_07_ACTL" bitfld.word 0x00 13. " CNT_START_MS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN_MS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FIFO1_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 10. " FIFO0_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 9. " FIFO1_CLR_MS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR_MS ,FIFO clear 0" "Normal,Cleared" textline " " bitfld.word 0x00 5. " CNT_START_LS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 4. " INT_EN_LS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " FIFO1_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 2. " FIFO0_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 1. " FIFO1_CLR_LS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 0. " FIFO0_CLR_LS ,FIFO clear 0" "Normal,Cleared" textline " " rgroup.word 0x140++0x01 line.word 0x00 "UDB06_07_MC,UDB06_07_MC" bitfld.word 0x00 12.--15. " PLD1_MC_MS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " PLD0_MC_MS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " PLD1_MC_LS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC_LS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "UDB 07_08" base ad:0x4000680E width 15. group.word 0x00++0x01 line.word 0x00 "UDB07_08_A0,UDB07_08_A0" hexmask.word.byte 0x00 8.--15. 1. " A0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0_LS ,Generic field for 8 bit working registers" group.word 0x20++0x01 line.word 0x00 "UDB07_08_A1,UDB07_08_A1" hexmask.word.byte 0x00 8.--15. 1. " A1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A1_LS ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB07_08_D0,UDB07_08_D0" hexmask.word.byte 0x00 8.--15. 1. " D0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0_LS ,Generic field for 8 bit working registers" group.word 0x60++0x01 line.word 0x00 "UDB07_08_D1,UDB07_08_D1" hexmask.word.byte 0x00 8.--15. 1. " D1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D1_LS ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB07_08_F0,UDB07_08_F0" hexmask.word.byte 0x00 8.--15. 1. " F0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0_LS ,Generic field for 8 bit working registers" group.word 0xa0++0x01 line.word 0x00 "UDB07_08_F1,UDB07_08_F1" hexmask.word.byte 0x00 8.--15. 1. " F1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F1_LS ,Generic field for 8 bit working registers" rgroup.word 0xc0++0x01 line.word 0x00 "UDB07_08_ST,UDB07_08_ST" bitfld.word 0x00 15. " ST_MS[7] ,Status register" "Low,High" bitfld.word 0x00 14. " ST_MS[6] ,Status register" "Low,High" bitfld.word 0x00 13. " ST_MS[5] ,Status register" "Low,High" bitfld.word 0x00 12. " ST_MS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 11. " ST_MS[3] ,Status register" "Low,High" bitfld.word 0x00 10. " ST_MS[2] ,Status register" "Low,High" bitfld.word 0x00 9. " ST_MS[1] ,Status register" "Low,High" bitfld.word 0x00 8. " ST_MS[0] ,Status register" "Low,High" textline " " bitfld.word 0x00 7. " ST_LS[7] ,Status register" "Low,High" bitfld.word 0x00 6. " ST_LS[6] ,Status register" "Low,High" bitfld.word 0x00 5. " ST_LS[5] ,Status register" "Low,High" bitfld.word 0x00 4. " ST_LS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 3. " ST_LS[3] ,Status register" "Low,High" bitfld.word 0x00 2. " ST_LS[2] ,Status register" "Low,High" bitfld.word 0x00 1. " ST_LS[1] ,Status register" "Low,High" bitfld.word 0x00 0. " ST_LS[0] ,Status register" "Low,High" group.word 0xe0++0x01 line.word 0x00 "UDB07_08_CTL,UDB07_08_CTL" bitfld.word 0x00 15. " CTL_MS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 14. " CTL_MS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 13. " CTL_MS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 12. " CTL_MS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL_MS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 10. " CTL_MS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 9. " CTL_MS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 8. " CTL_MS[0] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " CTL_LS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 6. " CTL_LS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 5. " CTL_LS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 4. " CTL_LS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " CTL_LS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 2. " CTL_LS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 1. " CTL_LS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 0. " CTL_LS[0] ,Control register" "Disabled,Enabled" textline " " group.word 0x100++0x01 line.word 0x00 "UDB07_08_MSK,UDB07_08_MSK" bitfld.word 0x00 14. " MSK_MS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 13. " MSK_MS[5] ,Mask register" "Not masked,Masked" bitfld.word 0x00 12. " MSK_MS[4] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 11. " MSK_MS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 10. " MSK_MS[2] ,Mask register" "Not masked,Masked" bitfld.word 0x00 9. " MSK_MS[1] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 8. " MSK_MS[0] ,Mask register" "Not masked,Masked" bitfld.word 0x00 6. " MSK_LS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 5. " MSK_LS[5] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 4. " MSK_LS[4] ,Mask register" "Not masked,Masked" bitfld.word 0x00 3. " MSK_LS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 2. " MSK_LS[2] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 1. " MSK_LS[1] ,Mask register" "Not masked,Masked" bitfld.word 0x00 0. " MSK_LS[0] ,Mask register" "Not masked,Masked" textline " " group.word 0x120++0x01 line.word 0x00 "UDB07_08_ACTL,UDB07_08_ACTL" bitfld.word 0x00 13. " CNT_START_MS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN_MS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FIFO1_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 10. " FIFO0_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 9. " FIFO1_CLR_MS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR_MS ,FIFO clear 0" "Normal,Cleared" textline " " bitfld.word 0x00 5. " CNT_START_LS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 4. " INT_EN_LS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " FIFO1_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 2. " FIFO0_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 1. " FIFO1_CLR_LS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 0. " FIFO0_CLR_LS ,FIFO clear 0" "Normal,Cleared" textline " " rgroup.word 0x140++0x01 line.word 0x00 "UDB07_08_MC,UDB07_08_MC" bitfld.word 0x00 12.--15. " PLD1_MC_MS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " PLD0_MC_MS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " PLD1_MC_LS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC_LS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "UDB 08_09" base ad:0x40006810 width 15. group.word 0x00++0x01 line.word 0x00 "UDB08_09_A0,UDB08_09_A0" hexmask.word.byte 0x00 8.--15. 1. " A0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0_LS ,Generic field for 8 bit working registers" group.word 0x20++0x01 line.word 0x00 "UDB08_09_A1,UDB08_09_A1" hexmask.word.byte 0x00 8.--15. 1. " A1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A1_LS ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB08_09_D0,UDB08_09_D0" hexmask.word.byte 0x00 8.--15. 1. " D0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0_LS ,Generic field for 8 bit working registers" group.word 0x60++0x01 line.word 0x00 "UDB08_09_D1,UDB08_09_D1" hexmask.word.byte 0x00 8.--15. 1. " D1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D1_LS ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB08_09_F0,UDB08_09_F0" hexmask.word.byte 0x00 8.--15. 1. " F0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0_LS ,Generic field for 8 bit working registers" group.word 0xa0++0x01 line.word 0x00 "UDB08_09_F1,UDB08_09_F1" hexmask.word.byte 0x00 8.--15. 1. " F1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F1_LS ,Generic field for 8 bit working registers" rgroup.word 0xc0++0x01 line.word 0x00 "UDB08_09_ST,UDB08_09_ST" bitfld.word 0x00 15. " ST_MS[7] ,Status register" "Low,High" bitfld.word 0x00 14. " ST_MS[6] ,Status register" "Low,High" bitfld.word 0x00 13. " ST_MS[5] ,Status register" "Low,High" bitfld.word 0x00 12. " ST_MS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 11. " ST_MS[3] ,Status register" "Low,High" bitfld.word 0x00 10. " ST_MS[2] ,Status register" "Low,High" bitfld.word 0x00 9. " ST_MS[1] ,Status register" "Low,High" bitfld.word 0x00 8. " ST_MS[0] ,Status register" "Low,High" textline " " bitfld.word 0x00 7. " ST_LS[7] ,Status register" "Low,High" bitfld.word 0x00 6. " ST_LS[6] ,Status register" "Low,High" bitfld.word 0x00 5. " ST_LS[5] ,Status register" "Low,High" bitfld.word 0x00 4. " ST_LS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 3. " ST_LS[3] ,Status register" "Low,High" bitfld.word 0x00 2. " ST_LS[2] ,Status register" "Low,High" bitfld.word 0x00 1. " ST_LS[1] ,Status register" "Low,High" bitfld.word 0x00 0. " ST_LS[0] ,Status register" "Low,High" group.word 0xe0++0x01 line.word 0x00 "UDB08_09_CTL,UDB08_09_CTL" bitfld.word 0x00 15. " CTL_MS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 14. " CTL_MS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 13. " CTL_MS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 12. " CTL_MS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL_MS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 10. " CTL_MS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 9. " CTL_MS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 8. " CTL_MS[0] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " CTL_LS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 6. " CTL_LS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 5. " CTL_LS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 4. " CTL_LS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " CTL_LS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 2. " CTL_LS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 1. " CTL_LS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 0. " CTL_LS[0] ,Control register" "Disabled,Enabled" textline " " group.word 0x100++0x01 line.word 0x00 "UDB08_09_MSK,UDB08_09_MSK" bitfld.word 0x00 14. " MSK_MS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 13. " MSK_MS[5] ,Mask register" "Not masked,Masked" bitfld.word 0x00 12. " MSK_MS[4] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 11. " MSK_MS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 10. " MSK_MS[2] ,Mask register" "Not masked,Masked" bitfld.word 0x00 9. " MSK_MS[1] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 8. " MSK_MS[0] ,Mask register" "Not masked,Masked" bitfld.word 0x00 6. " MSK_LS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 5. " MSK_LS[5] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 4. " MSK_LS[4] ,Mask register" "Not masked,Masked" bitfld.word 0x00 3. " MSK_LS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 2. " MSK_LS[2] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 1. " MSK_LS[1] ,Mask register" "Not masked,Masked" bitfld.word 0x00 0. " MSK_LS[0] ,Mask register" "Not masked,Masked" textline " " group.word 0x120++0x01 line.word 0x00 "UDB08_09_ACTL,UDB08_09_ACTL" bitfld.word 0x00 13. " CNT_START_MS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN_MS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FIFO1_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 10. " FIFO0_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 9. " FIFO1_CLR_MS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR_MS ,FIFO clear 0" "Normal,Cleared" textline " " bitfld.word 0x00 5. " CNT_START_LS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 4. " INT_EN_LS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " FIFO1_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 2. " FIFO0_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 1. " FIFO1_CLR_LS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 0. " FIFO0_CLR_LS ,FIFO clear 0" "Normal,Cleared" textline " " rgroup.word 0x140++0x01 line.word 0x00 "UDB08_09_MC,UDB08_09_MC" bitfld.word 0x00 12.--15. " PLD1_MC_MS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " PLD0_MC_MS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " PLD1_MC_LS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC_LS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "UDB 09_10" base ad:0x40006812 width 15. group.word 0x00++0x01 line.word 0x00 "UDB09_10_A0,UDB09_10_A0" hexmask.word.byte 0x00 8.--15. 1. " A0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0_LS ,Generic field for 8 bit working registers" group.word 0x20++0x01 line.word 0x00 "UDB09_10_A1,UDB09_10_A1" hexmask.word.byte 0x00 8.--15. 1. " A1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A1_LS ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB09_10_D0,UDB09_10_D0" hexmask.word.byte 0x00 8.--15. 1. " D0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0_LS ,Generic field for 8 bit working registers" group.word 0x60++0x01 line.word 0x00 "UDB09_10_D1,UDB09_10_D1" hexmask.word.byte 0x00 8.--15. 1. " D1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D1_LS ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB09_10_F0,UDB09_10_F0" hexmask.word.byte 0x00 8.--15. 1. " F0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0_LS ,Generic field for 8 bit working registers" group.word 0xa0++0x01 line.word 0x00 "UDB09_10_F1,UDB09_10_F1" hexmask.word.byte 0x00 8.--15. 1. " F1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F1_LS ,Generic field for 8 bit working registers" rgroup.word 0xc0++0x01 line.word 0x00 "UDB09_10_ST,UDB09_10_ST" bitfld.word 0x00 15. " ST_MS[7] ,Status register" "Low,High" bitfld.word 0x00 14. " ST_MS[6] ,Status register" "Low,High" bitfld.word 0x00 13. " ST_MS[5] ,Status register" "Low,High" bitfld.word 0x00 12. " ST_MS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 11. " ST_MS[3] ,Status register" "Low,High" bitfld.word 0x00 10. " ST_MS[2] ,Status register" "Low,High" bitfld.word 0x00 9. " ST_MS[1] ,Status register" "Low,High" bitfld.word 0x00 8. " ST_MS[0] ,Status register" "Low,High" textline " " bitfld.word 0x00 7. " ST_LS[7] ,Status register" "Low,High" bitfld.word 0x00 6. " ST_LS[6] ,Status register" "Low,High" bitfld.word 0x00 5. " ST_LS[5] ,Status register" "Low,High" bitfld.word 0x00 4. " ST_LS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 3. " ST_LS[3] ,Status register" "Low,High" bitfld.word 0x00 2. " ST_LS[2] ,Status register" "Low,High" bitfld.word 0x00 1. " ST_LS[1] ,Status register" "Low,High" bitfld.word 0x00 0. " ST_LS[0] ,Status register" "Low,High" group.word 0xe0++0x01 line.word 0x00 "UDB09_10_CTL,UDB09_10_CTL" bitfld.word 0x00 15. " CTL_MS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 14. " CTL_MS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 13. " CTL_MS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 12. " CTL_MS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL_MS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 10. " CTL_MS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 9. " CTL_MS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 8. " CTL_MS[0] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " CTL_LS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 6. " CTL_LS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 5. " CTL_LS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 4. " CTL_LS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " CTL_LS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 2. " CTL_LS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 1. " CTL_LS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 0. " CTL_LS[0] ,Control register" "Disabled,Enabled" textline " " group.word 0x100++0x01 line.word 0x00 "UDB09_10_MSK,UDB09_10_MSK" bitfld.word 0x00 14. " MSK_MS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 13. " MSK_MS[5] ,Mask register" "Not masked,Masked" bitfld.word 0x00 12. " MSK_MS[4] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 11. " MSK_MS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 10. " MSK_MS[2] ,Mask register" "Not masked,Masked" bitfld.word 0x00 9. " MSK_MS[1] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 8. " MSK_MS[0] ,Mask register" "Not masked,Masked" bitfld.word 0x00 6. " MSK_LS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 5. " MSK_LS[5] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 4. " MSK_LS[4] ,Mask register" "Not masked,Masked" bitfld.word 0x00 3. " MSK_LS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 2. " MSK_LS[2] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 1. " MSK_LS[1] ,Mask register" "Not masked,Masked" bitfld.word 0x00 0. " MSK_LS[0] ,Mask register" "Not masked,Masked" textline " " group.word 0x120++0x01 line.word 0x00 "UDB09_10_ACTL,UDB09_10_ACTL" bitfld.word 0x00 13. " CNT_START_MS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN_MS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FIFO1_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 10. " FIFO0_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 9. " FIFO1_CLR_MS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR_MS ,FIFO clear 0" "Normal,Cleared" textline " " bitfld.word 0x00 5. " CNT_START_LS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 4. " INT_EN_LS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " FIFO1_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 2. " FIFO0_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 1. " FIFO1_CLR_LS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 0. " FIFO0_CLR_LS ,FIFO clear 0" "Normal,Cleared" textline " " rgroup.word 0x140++0x01 line.word 0x00 "UDB09_10_MC,UDB09_10_MC" bitfld.word 0x00 12.--15. " PLD1_MC_MS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " PLD0_MC_MS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " PLD1_MC_LS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC_LS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "UDB 10_11" base ad:0x40006814 width 15. group.word 0x00++0x01 line.word 0x00 "UDB10_11_A0,UDB10_11_A0" hexmask.word.byte 0x00 8.--15. 1. " A0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0_LS ,Generic field for 8 bit working registers" group.word 0x20++0x01 line.word 0x00 "UDB10_11_A1,UDB10_11_A1" hexmask.word.byte 0x00 8.--15. 1. " A1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A1_LS ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB10_11_D0,UDB10_11_D0" hexmask.word.byte 0x00 8.--15. 1. " D0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0_LS ,Generic field for 8 bit working registers" group.word 0x60++0x01 line.word 0x00 "UDB10_11_D1,UDB10_11_D1" hexmask.word.byte 0x00 8.--15. 1. " D1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D1_LS ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB10_11_F0,UDB10_11_F0" hexmask.word.byte 0x00 8.--15. 1. " F0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0_LS ,Generic field for 8 bit working registers" group.word 0xa0++0x01 line.word 0x00 "UDB10_11_F1,UDB10_11_F1" hexmask.word.byte 0x00 8.--15. 1. " F1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F1_LS ,Generic field for 8 bit working registers" rgroup.word 0xc0++0x01 line.word 0x00 "UDB10_11_ST,UDB10_11_ST" bitfld.word 0x00 15. " ST_MS[7] ,Status register" "Low,High" bitfld.word 0x00 14. " ST_MS[6] ,Status register" "Low,High" bitfld.word 0x00 13. " ST_MS[5] ,Status register" "Low,High" bitfld.word 0x00 12. " ST_MS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 11. " ST_MS[3] ,Status register" "Low,High" bitfld.word 0x00 10. " ST_MS[2] ,Status register" "Low,High" bitfld.word 0x00 9. " ST_MS[1] ,Status register" "Low,High" bitfld.word 0x00 8. " ST_MS[0] ,Status register" "Low,High" textline " " bitfld.word 0x00 7. " ST_LS[7] ,Status register" "Low,High" bitfld.word 0x00 6. " ST_LS[6] ,Status register" "Low,High" bitfld.word 0x00 5. " ST_LS[5] ,Status register" "Low,High" bitfld.word 0x00 4. " ST_LS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 3. " ST_LS[3] ,Status register" "Low,High" bitfld.word 0x00 2. " ST_LS[2] ,Status register" "Low,High" bitfld.word 0x00 1. " ST_LS[1] ,Status register" "Low,High" bitfld.word 0x00 0. " ST_LS[0] ,Status register" "Low,High" group.word 0xe0++0x01 line.word 0x00 "UDB10_11_CTL,UDB10_11_CTL" bitfld.word 0x00 15. " CTL_MS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 14. " CTL_MS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 13. " CTL_MS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 12. " CTL_MS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL_MS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 10. " CTL_MS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 9. " CTL_MS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 8. " CTL_MS[0] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " CTL_LS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 6. " CTL_LS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 5. " CTL_LS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 4. " CTL_LS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " CTL_LS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 2. " CTL_LS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 1. " CTL_LS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 0. " CTL_LS[0] ,Control register" "Disabled,Enabled" textline " " group.word 0x100++0x01 line.word 0x00 "UDB10_11_MSK,UDB10_11_MSK" bitfld.word 0x00 14. " MSK_MS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 13. " MSK_MS[5] ,Mask register" "Not masked,Masked" bitfld.word 0x00 12. " MSK_MS[4] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 11. " MSK_MS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 10. " MSK_MS[2] ,Mask register" "Not masked,Masked" bitfld.word 0x00 9. " MSK_MS[1] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 8. " MSK_MS[0] ,Mask register" "Not masked,Masked" bitfld.word 0x00 6. " MSK_LS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 5. " MSK_LS[5] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 4. " MSK_LS[4] ,Mask register" "Not masked,Masked" bitfld.word 0x00 3. " MSK_LS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 2. " MSK_LS[2] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 1. " MSK_LS[1] ,Mask register" "Not masked,Masked" bitfld.word 0x00 0. " MSK_LS[0] ,Mask register" "Not masked,Masked" textline " " group.word 0x120++0x01 line.word 0x00 "UDB10_11_ACTL,UDB10_11_ACTL" bitfld.word 0x00 13. " CNT_START_MS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN_MS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FIFO1_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 10. " FIFO0_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 9. " FIFO1_CLR_MS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR_MS ,FIFO clear 0" "Normal,Cleared" textline " " bitfld.word 0x00 5. " CNT_START_LS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 4. " INT_EN_LS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " FIFO1_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 2. " FIFO0_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 1. " FIFO1_CLR_LS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 0. " FIFO0_CLR_LS ,FIFO clear 0" "Normal,Cleared" textline " " rgroup.word 0x140++0x01 line.word 0x00 "UDB10_11_MC,UDB10_11_MC" bitfld.word 0x00 12.--15. " PLD1_MC_MS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " PLD0_MC_MS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " PLD1_MC_LS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC_LS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "UDB 11_12" base ad:0x40006816 width 15. group.word 0x00++0x01 line.word 0x00 "UDB11_12_A0,UDB11_12_A0" hexmask.word.byte 0x00 8.--15. 1. " A0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0_LS ,Generic field for 8 bit working registers" group.word 0x20++0x01 line.word 0x00 "UDB11_12_A1,UDB11_12_A1" hexmask.word.byte 0x00 8.--15. 1. " A1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A1_LS ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB11_12_D0,UDB11_12_D0" hexmask.word.byte 0x00 8.--15. 1. " D0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0_LS ,Generic field for 8 bit working registers" group.word 0x60++0x01 line.word 0x00 "UDB11_12_D1,UDB11_12_D1" hexmask.word.byte 0x00 8.--15. 1. " D1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D1_LS ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB11_12_F0,UDB11_12_F0" hexmask.word.byte 0x00 8.--15. 1. " F0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0_LS ,Generic field for 8 bit working registers" group.word 0xa0++0x01 line.word 0x00 "UDB11_12_F1,UDB11_12_F1" hexmask.word.byte 0x00 8.--15. 1. " F1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F1_LS ,Generic field for 8 bit working registers" rgroup.word 0xc0++0x01 line.word 0x00 "UDB11_12_ST,UDB11_12_ST" bitfld.word 0x00 15. " ST_MS[7] ,Status register" "Low,High" bitfld.word 0x00 14. " ST_MS[6] ,Status register" "Low,High" bitfld.word 0x00 13. " ST_MS[5] ,Status register" "Low,High" bitfld.word 0x00 12. " ST_MS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 11. " ST_MS[3] ,Status register" "Low,High" bitfld.word 0x00 10. " ST_MS[2] ,Status register" "Low,High" bitfld.word 0x00 9. " ST_MS[1] ,Status register" "Low,High" bitfld.word 0x00 8. " ST_MS[0] ,Status register" "Low,High" textline " " bitfld.word 0x00 7. " ST_LS[7] ,Status register" "Low,High" bitfld.word 0x00 6. " ST_LS[6] ,Status register" "Low,High" bitfld.word 0x00 5. " ST_LS[5] ,Status register" "Low,High" bitfld.word 0x00 4. " ST_LS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 3. " ST_LS[3] ,Status register" "Low,High" bitfld.word 0x00 2. " ST_LS[2] ,Status register" "Low,High" bitfld.word 0x00 1. " ST_LS[1] ,Status register" "Low,High" bitfld.word 0x00 0. " ST_LS[0] ,Status register" "Low,High" group.word 0xe0++0x01 line.word 0x00 "UDB11_12_CTL,UDB11_12_CTL" bitfld.word 0x00 15. " CTL_MS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 14. " CTL_MS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 13. " CTL_MS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 12. " CTL_MS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL_MS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 10. " CTL_MS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 9. " CTL_MS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 8. " CTL_MS[0] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " CTL_LS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 6. " CTL_LS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 5. " CTL_LS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 4. " CTL_LS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " CTL_LS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 2. " CTL_LS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 1. " CTL_LS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 0. " CTL_LS[0] ,Control register" "Disabled,Enabled" textline " " group.word 0x100++0x01 line.word 0x00 "UDB11_12_MSK,UDB11_12_MSK" bitfld.word 0x00 14. " MSK_MS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 13. " MSK_MS[5] ,Mask register" "Not masked,Masked" bitfld.word 0x00 12. " MSK_MS[4] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 11. " MSK_MS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 10. " MSK_MS[2] ,Mask register" "Not masked,Masked" bitfld.word 0x00 9. " MSK_MS[1] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 8. " MSK_MS[0] ,Mask register" "Not masked,Masked" bitfld.word 0x00 6. " MSK_LS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 5. " MSK_LS[5] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 4. " MSK_LS[4] ,Mask register" "Not masked,Masked" bitfld.word 0x00 3. " MSK_LS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 2. " MSK_LS[2] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 1. " MSK_LS[1] ,Mask register" "Not masked,Masked" bitfld.word 0x00 0. " MSK_LS[0] ,Mask register" "Not masked,Masked" textline " " group.word 0x120++0x01 line.word 0x00 "UDB11_12_ACTL,UDB11_12_ACTL" bitfld.word 0x00 13. " CNT_START_MS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN_MS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FIFO1_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 10. " FIFO0_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 9. " FIFO1_CLR_MS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR_MS ,FIFO clear 0" "Normal,Cleared" textline " " bitfld.word 0x00 5. " CNT_START_LS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 4. " INT_EN_LS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " FIFO1_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 2. " FIFO0_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 1. " FIFO1_CLR_LS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 0. " FIFO0_CLR_LS ,FIFO clear 0" "Normal,Cleared" textline " " rgroup.word 0x140++0x01 line.word 0x00 "UDB11_12_MC,UDB11_12_MC" bitfld.word 0x00 12.--15. " PLD1_MC_MS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " PLD0_MC_MS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " PLD1_MC_LS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC_LS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "UDB 12_13" base ad:0x40006818 width 15. group.word 0x00++0x01 line.word 0x00 "UDB12_13_A0,UDB12_13_A0" hexmask.word.byte 0x00 8.--15. 1. " A0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0_LS ,Generic field for 8 bit working registers" group.word 0x20++0x01 line.word 0x00 "UDB12_13_A1,UDB12_13_A1" hexmask.word.byte 0x00 8.--15. 1. " A1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A1_LS ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB12_13_D0,UDB12_13_D0" hexmask.word.byte 0x00 8.--15. 1. " D0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0_LS ,Generic field for 8 bit working registers" group.word 0x60++0x01 line.word 0x00 "UDB12_13_D1,UDB12_13_D1" hexmask.word.byte 0x00 8.--15. 1. " D1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D1_LS ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB12_13_F0,UDB12_13_F0" hexmask.word.byte 0x00 8.--15. 1. " F0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0_LS ,Generic field for 8 bit working registers" group.word 0xa0++0x01 line.word 0x00 "UDB12_13_F1,UDB12_13_F1" hexmask.word.byte 0x00 8.--15. 1. " F1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F1_LS ,Generic field for 8 bit working registers" rgroup.word 0xc0++0x01 line.word 0x00 "UDB12_13_ST,UDB12_13_ST" bitfld.word 0x00 15. " ST_MS[7] ,Status register" "Low,High" bitfld.word 0x00 14. " ST_MS[6] ,Status register" "Low,High" bitfld.word 0x00 13. " ST_MS[5] ,Status register" "Low,High" bitfld.word 0x00 12. " ST_MS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 11. " ST_MS[3] ,Status register" "Low,High" bitfld.word 0x00 10. " ST_MS[2] ,Status register" "Low,High" bitfld.word 0x00 9. " ST_MS[1] ,Status register" "Low,High" bitfld.word 0x00 8. " ST_MS[0] ,Status register" "Low,High" textline " " bitfld.word 0x00 7. " ST_LS[7] ,Status register" "Low,High" bitfld.word 0x00 6. " ST_LS[6] ,Status register" "Low,High" bitfld.word 0x00 5. " ST_LS[5] ,Status register" "Low,High" bitfld.word 0x00 4. " ST_LS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 3. " ST_LS[3] ,Status register" "Low,High" bitfld.word 0x00 2. " ST_LS[2] ,Status register" "Low,High" bitfld.word 0x00 1. " ST_LS[1] ,Status register" "Low,High" bitfld.word 0x00 0. " ST_LS[0] ,Status register" "Low,High" group.word 0xe0++0x01 line.word 0x00 "UDB12_13_CTL,UDB12_13_CTL" bitfld.word 0x00 15. " CTL_MS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 14. " CTL_MS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 13. " CTL_MS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 12. " CTL_MS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL_MS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 10. " CTL_MS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 9. " CTL_MS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 8. " CTL_MS[0] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " CTL_LS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 6. " CTL_LS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 5. " CTL_LS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 4. " CTL_LS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " CTL_LS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 2. " CTL_LS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 1. " CTL_LS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 0. " CTL_LS[0] ,Control register" "Disabled,Enabled" textline " " group.word 0x100++0x01 line.word 0x00 "UDB12_13_MSK,UDB12_13_MSK" bitfld.word 0x00 14. " MSK_MS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 13. " MSK_MS[5] ,Mask register" "Not masked,Masked" bitfld.word 0x00 12. " MSK_MS[4] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 11. " MSK_MS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 10. " MSK_MS[2] ,Mask register" "Not masked,Masked" bitfld.word 0x00 9. " MSK_MS[1] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 8. " MSK_MS[0] ,Mask register" "Not masked,Masked" bitfld.word 0x00 6. " MSK_LS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 5. " MSK_LS[5] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 4. " MSK_LS[4] ,Mask register" "Not masked,Masked" bitfld.word 0x00 3. " MSK_LS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 2. " MSK_LS[2] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 1. " MSK_LS[1] ,Mask register" "Not masked,Masked" bitfld.word 0x00 0. " MSK_LS[0] ,Mask register" "Not masked,Masked" textline " " group.word 0x120++0x01 line.word 0x00 "UDB12_13_ACTL,UDB12_13_ACTL" bitfld.word 0x00 13. " CNT_START_MS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN_MS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FIFO1_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 10. " FIFO0_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 9. " FIFO1_CLR_MS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR_MS ,FIFO clear 0" "Normal,Cleared" textline " " bitfld.word 0x00 5. " CNT_START_LS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 4. " INT_EN_LS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " FIFO1_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 2. " FIFO0_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 1. " FIFO1_CLR_LS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 0. " FIFO0_CLR_LS ,FIFO clear 0" "Normal,Cleared" textline " " rgroup.word 0x140++0x01 line.word 0x00 "UDB12_13_MC,UDB12_13_MC" bitfld.word 0x00 12.--15. " PLD1_MC_MS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " PLD0_MC_MS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " PLD1_MC_LS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC_LS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "UDB 13_14" base ad:0x4000681A width 15. group.word 0x00++0x01 line.word 0x00 "UDB13_14_A0,UDB13_14_A0" hexmask.word.byte 0x00 8.--15. 1. " A0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0_LS ,Generic field for 8 bit working registers" group.word 0x20++0x01 line.word 0x00 "UDB13_14_A1,UDB13_14_A1" hexmask.word.byte 0x00 8.--15. 1. " A1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A1_LS ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB13_14_D0,UDB13_14_D0" hexmask.word.byte 0x00 8.--15. 1. " D0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0_LS ,Generic field for 8 bit working registers" group.word 0x60++0x01 line.word 0x00 "UDB13_14_D1,UDB13_14_D1" hexmask.word.byte 0x00 8.--15. 1. " D1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D1_LS ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB13_14_F0,UDB13_14_F0" hexmask.word.byte 0x00 8.--15. 1. " F0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0_LS ,Generic field for 8 bit working registers" group.word 0xa0++0x01 line.word 0x00 "UDB13_14_F1,UDB13_14_F1" hexmask.word.byte 0x00 8.--15. 1. " F1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F1_LS ,Generic field for 8 bit working registers" rgroup.word 0xc0++0x01 line.word 0x00 "UDB13_14_ST,UDB13_14_ST" bitfld.word 0x00 15. " ST_MS[7] ,Status register" "Low,High" bitfld.word 0x00 14. " ST_MS[6] ,Status register" "Low,High" bitfld.word 0x00 13. " ST_MS[5] ,Status register" "Low,High" bitfld.word 0x00 12. " ST_MS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 11. " ST_MS[3] ,Status register" "Low,High" bitfld.word 0x00 10. " ST_MS[2] ,Status register" "Low,High" bitfld.word 0x00 9. " ST_MS[1] ,Status register" "Low,High" bitfld.word 0x00 8. " ST_MS[0] ,Status register" "Low,High" textline " " bitfld.word 0x00 7. " ST_LS[7] ,Status register" "Low,High" bitfld.word 0x00 6. " ST_LS[6] ,Status register" "Low,High" bitfld.word 0x00 5. " ST_LS[5] ,Status register" "Low,High" bitfld.word 0x00 4. " ST_LS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 3. " ST_LS[3] ,Status register" "Low,High" bitfld.word 0x00 2. " ST_LS[2] ,Status register" "Low,High" bitfld.word 0x00 1. " ST_LS[1] ,Status register" "Low,High" bitfld.word 0x00 0. " ST_LS[0] ,Status register" "Low,High" group.word 0xe0++0x01 line.word 0x00 "UDB13_14_CTL,UDB13_14_CTL" bitfld.word 0x00 15. " CTL_MS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 14. " CTL_MS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 13. " CTL_MS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 12. " CTL_MS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL_MS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 10. " CTL_MS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 9. " CTL_MS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 8. " CTL_MS[0] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " CTL_LS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 6. " CTL_LS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 5. " CTL_LS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 4. " CTL_LS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " CTL_LS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 2. " CTL_LS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 1. " CTL_LS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 0. " CTL_LS[0] ,Control register" "Disabled,Enabled" textline " " group.word 0x100++0x01 line.word 0x00 "UDB13_14_MSK,UDB13_14_MSK" bitfld.word 0x00 14. " MSK_MS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 13. " MSK_MS[5] ,Mask register" "Not masked,Masked" bitfld.word 0x00 12. " MSK_MS[4] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 11. " MSK_MS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 10. " MSK_MS[2] ,Mask register" "Not masked,Masked" bitfld.word 0x00 9. " MSK_MS[1] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 8. " MSK_MS[0] ,Mask register" "Not masked,Masked" bitfld.word 0x00 6. " MSK_LS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 5. " MSK_LS[5] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 4. " MSK_LS[4] ,Mask register" "Not masked,Masked" bitfld.word 0x00 3. " MSK_LS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 2. " MSK_LS[2] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 1. " MSK_LS[1] ,Mask register" "Not masked,Masked" bitfld.word 0x00 0. " MSK_LS[0] ,Mask register" "Not masked,Masked" textline " " group.word 0x120++0x01 line.word 0x00 "UDB13_14_ACTL,UDB13_14_ACTL" bitfld.word 0x00 13. " CNT_START_MS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN_MS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FIFO1_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 10. " FIFO0_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 9. " FIFO1_CLR_MS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR_MS ,FIFO clear 0" "Normal,Cleared" textline " " bitfld.word 0x00 5. " CNT_START_LS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 4. " INT_EN_LS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " FIFO1_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 2. " FIFO0_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 1. " FIFO1_CLR_LS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 0. " FIFO0_CLR_LS ,FIFO clear 0" "Normal,Cleared" textline " " rgroup.word 0x140++0x01 line.word 0x00 "UDB13_14_MC,UDB13_14_MC" bitfld.word 0x00 12.--15. " PLD1_MC_MS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " PLD0_MC_MS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " PLD1_MC_LS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC_LS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "UDB 14_15" base ad:0x4000681C width 15. group.word 0x00++0x01 line.word 0x00 "UDB14_15_A0,UDB14_15_A0" hexmask.word.byte 0x00 8.--15. 1. " A0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0_LS ,Generic field for 8 bit working registers" group.word 0x20++0x01 line.word 0x00 "UDB14_15_A1,UDB14_15_A1" hexmask.word.byte 0x00 8.--15. 1. " A1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A1_LS ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB14_15_D0,UDB14_15_D0" hexmask.word.byte 0x00 8.--15. 1. " D0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0_LS ,Generic field for 8 bit working registers" group.word 0x60++0x01 line.word 0x00 "UDB14_15_D1,UDB14_15_D1" hexmask.word.byte 0x00 8.--15. 1. " D1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D1_LS ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB14_15_F0,UDB14_15_F0" hexmask.word.byte 0x00 8.--15. 1. " F0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0_LS ,Generic field for 8 bit working registers" group.word 0xa0++0x01 line.word 0x00 "UDB14_15_F1,UDB14_15_F1" hexmask.word.byte 0x00 8.--15. 1. " F1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F1_LS ,Generic field for 8 bit working registers" rgroup.word 0xc0++0x01 line.word 0x00 "UDB14_15_ST,UDB14_15_ST" bitfld.word 0x00 15. " ST_MS[7] ,Status register" "Low,High" bitfld.word 0x00 14. " ST_MS[6] ,Status register" "Low,High" bitfld.word 0x00 13. " ST_MS[5] ,Status register" "Low,High" bitfld.word 0x00 12. " ST_MS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 11. " ST_MS[3] ,Status register" "Low,High" bitfld.word 0x00 10. " ST_MS[2] ,Status register" "Low,High" bitfld.word 0x00 9. " ST_MS[1] ,Status register" "Low,High" bitfld.word 0x00 8. " ST_MS[0] ,Status register" "Low,High" textline " " bitfld.word 0x00 7. " ST_LS[7] ,Status register" "Low,High" bitfld.word 0x00 6. " ST_LS[6] ,Status register" "Low,High" bitfld.word 0x00 5. " ST_LS[5] ,Status register" "Low,High" bitfld.word 0x00 4. " ST_LS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 3. " ST_LS[3] ,Status register" "Low,High" bitfld.word 0x00 2. " ST_LS[2] ,Status register" "Low,High" bitfld.word 0x00 1. " ST_LS[1] ,Status register" "Low,High" bitfld.word 0x00 0. " ST_LS[0] ,Status register" "Low,High" group.word 0xe0++0x01 line.word 0x00 "UDB14_15_CTL,UDB14_15_CTL" bitfld.word 0x00 15. " CTL_MS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 14. " CTL_MS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 13. " CTL_MS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 12. " CTL_MS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL_MS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 10. " CTL_MS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 9. " CTL_MS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 8. " CTL_MS[0] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " CTL_LS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 6. " CTL_LS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 5. " CTL_LS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 4. " CTL_LS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " CTL_LS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 2. " CTL_LS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 1. " CTL_LS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 0. " CTL_LS[0] ,Control register" "Disabled,Enabled" textline " " group.word 0x100++0x01 line.word 0x00 "UDB14_15_MSK,UDB14_15_MSK" bitfld.word 0x00 14. " MSK_MS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 13. " MSK_MS[5] ,Mask register" "Not masked,Masked" bitfld.word 0x00 12. " MSK_MS[4] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 11. " MSK_MS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 10. " MSK_MS[2] ,Mask register" "Not masked,Masked" bitfld.word 0x00 9. " MSK_MS[1] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 8. " MSK_MS[0] ,Mask register" "Not masked,Masked" bitfld.word 0x00 6. " MSK_LS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 5. " MSK_LS[5] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 4. " MSK_LS[4] ,Mask register" "Not masked,Masked" bitfld.word 0x00 3. " MSK_LS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 2. " MSK_LS[2] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 1. " MSK_LS[1] ,Mask register" "Not masked,Masked" bitfld.word 0x00 0. " MSK_LS[0] ,Mask register" "Not masked,Masked" textline " " group.word 0x120++0x01 line.word 0x00 "UDB14_15_ACTL,UDB14_15_ACTL" bitfld.word 0x00 13. " CNT_START_MS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN_MS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FIFO1_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 10. " FIFO0_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 9. " FIFO1_CLR_MS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR_MS ,FIFO clear 0" "Normal,Cleared" textline " " bitfld.word 0x00 5. " CNT_START_LS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 4. " INT_EN_LS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " FIFO1_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 2. " FIFO0_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 1. " FIFO1_CLR_LS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 0. " FIFO0_CLR_LS ,FIFO clear 0" "Normal,Cleared" textline " " rgroup.word 0x140++0x01 line.word 0x00 "UDB14_15_MC,UDB14_15_MC" bitfld.word 0x00 12.--15. " PLD1_MC_MS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " PLD0_MC_MS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " PLD1_MC_LS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC_LS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end base ad:(0x40010000+0x0) tree "P 0" tree "U 0" width 18. group.long 0x0++0x03 line.long 0x00 "PLD_IT0,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT0C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT0C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x4++0x03 line.long 0x00 "PLD_IT1,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT1C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT1C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x8++0x03 line.long 0x00 "PLD_IT2,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT2C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT2C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xC++0x03 line.long 0x00 "PLD_IT3,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT3C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT3C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x10++0x03 line.long 0x00 "PLD_IT4,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT4C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT4C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x14++0x03 line.long 0x00 "PLD_IT5,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT5C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT5C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x18++0x03 line.long 0x00 "PLD_IT6,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT6C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT6C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x1C++0x03 line.long 0x00 "PLD_IT7,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT7C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT7C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x20++0x03 line.long 0x00 "PLD_IT8,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT8C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT8C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x24++0x03 line.long 0x00 "PLD_IT9,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT9C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT9C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x28++0x03 line.long 0x00 "PLD_IT10,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT10C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT10C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x2C++0x03 line.long 0x00 "PLD_IT11,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " group.word 0x30++0x01 line.word 0x00 "PLD_ORT0,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT0_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT0_0 ,OR term" "Not OR,OR" group.word 0x32++0x01 line.word 0x00 "PLD_ORT1,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT1_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT1_0 ,OR term" "Not OR,OR" group.word 0x34++0x01 line.word 0x00 "PLD_ORT2,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT2_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT2_0 ,OR term" "Not OR,OR" group.word 0x36++0x01 line.word 0x00 "PLD_ORT3,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " group.word (0x30+0x08)++0x07 line.word 0x00 "MC_CFG_CEN_CONST,Macrocell Configuration for Carry Enable and Constant" bitfld.word 0x00 15. " PLD1_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 14. " PLD1_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 13. " PLD1_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 12. " PLD1_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " PLD1_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 10. " PLD1_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " PLD1_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 8. " PLD1_MC0_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " PLD0_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 6. " PLD0_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " PLD0_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 4. " PLD0_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " PLD0_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 2. " PLD0_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " PLD0_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 0. " PLD0_MC0_CEN ,Carry enable" "Disabled,Enabled" line.word 0x02 "MC_CFG_XORFB,Macrocell Configuration for XOR Feedback" bitfld.word 0x02 14.--15. " PLD1_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 12.--13. " PLD1_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 10.--11. " PLD1_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 8.--9. " PLD1_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 6.--7. " PLD0_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 4.--5. " PLD0_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 2.--3. " PLD0_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 0.--1. " PLD0_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" line.word 0x04 "MC_CFG_SET_RESET,Macrocell Configuration for Set and Reset" bitfld.word 0x04 15. " PLD1_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 14. " PLD1_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 13. " PLD1_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 12. " PLD1_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 11. " PLD1_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 10. " PLD1_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 9. " PLD1_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 8. " PLD1_MC0_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 7. " PLD0_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 6. " PLD0_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 5. " PLD0_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 4. " PLD0_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 3. " PLD0_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 2. " PLD0_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 1. " PLD0_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 0. " PLD0_MC0_SET_SEL ,Set select enable" "Not set,Set" line.word 0x06 "MC_CFG_BYPASS,Macrocell Configuration for Bypass" bitfld.word 0x06 14. " PLD1_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 12. " PLD1_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 10. " PLD1_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 8. " PLD1_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 6. " PLD0_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 4. " PLD0_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 2. " PLD0_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 0. " PLD0_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " group.byte (0x30+0x10)++0x10 line.byte 0x00 "CFG0,Datapath Input Selection" bitfld.byte 0x00 4.--6. " RAD1 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x00 0.--2. " RAD0 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x01 "CFG1,Datapath Input Selection" bitfld.byte 0x01 0.--2. " RAD2 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x02 "CFG2,Datapath Input Selection" bitfld.byte 0x02 4.--6. " F1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x02 0.--2. " F0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x03 "CFG3,Datapath Input Selection" bitfld.byte 0x03 4.--6. " D1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x03 0.--2. " D0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x04 "CFG4,Datapath Input Selection" bitfld.byte 0x04 4.--6. " CI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x04 0.--2. " SI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x05 "CFG5,Datapath Output Selection" bitfld.byte 0x05 4.--7. " OUT1 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x05 0.--3. " OUT0 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x06 "CFG6,Datapath Output Selection" bitfld.byte 0x06 4.--7. " OUT3 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x06 0.--3. " OUT2 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x07 "CFG7,Datapath Output Selection" bitfld.byte 0x07 4.--7. " OUT5 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x07 0.--3. " OUT4 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x08 "CFG8,Datapath Output Synchronization" hexmask.byte 0x08 0.--5. 1. " OUT_SYNC ,Output Synchronization field" line.byte 0x09 "CFG9,ALU Mask" line.byte 0x0a "CFG10,Compare 0 Mask" line.byte 0x0b "CFG11,Compare 1 Mask" line.byte 0x0c "CFG12,Datapath Static Configuration" bitfld.byte 0x0c 7. " CMASK1_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 6. " CMASK0_EN ,Datapath mask enable" "Disabled,Enabled" textline " " bitfld.byte 0x0c 5. " AMASK_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 4. " DEF_SI ,Datapath default shift value" "0,1" textline " " bitfld.byte 0x0c 2.--3. " SI_SELB ,Datapath shift in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0c 0.--1. " SI_SELA ,Datapath shift in source select" "Default,Registered,Route,Chain" line.byte 0x0d "CFG13,Datapath Static Configuration" bitfld.byte 0x0d 6.--7. " CMP_SELB ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" bitfld.byte 0x0d 4.--5. " CMP_SELA ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" textline " " bitfld.byte 0x0d 2.--3. " CI_SELB ,Datapath carry in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0d 0.--1. " CI_SELA ,Datapath carry in source select" "Default,Registered,Route,Chain" line.byte 0x0e "CFG14,Datapath Static Configuration" bitfld.byte 0x0e 7. " MSB_EN ,Datapath MSB selection enable" "Disabled,Enabled" bitfld.byte 0x0e 4.--6. " MSB_SEL ,Datapath MSB Selection" "Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7" textline " " bitfld.byte 0x0e 3. " CHAIN_CMSB ,Datapath CRC MSB chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 2. " CHAIN_FB ,Datapath CRC feedback chaining enable" "Disabled,Enabled" textline " " bitfld.byte 0x0e 1. " CHAIN1 ,Datapath condition chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 0. " CHAIN0 ,Datapath condition chaining enable" "Disabled,Enabled" line.byte 0x0f "CFG15,Datapath Static Configuration" bitfld.byte 0x0f 7. " PI_SEL ,Datapath parallel input selection" "Normal,Parallel" bitfld.byte 0x0f 6. " SHIFT_SEL ,Datapath shift out selection" "SOL_MSB,SOR" textline " " bitfld.byte 0x0f 5. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x0f 4. " NC0 ,Spare register bit" "0,1" textline " " bitfld.byte 0x0f 2.--3. " F1_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" bitfld.byte 0x0f 0.--1. " F0_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" line.byte 0x10 "CFG16,Datapath Static Configuration" bitfld.byte 0x10 7. " F1_CK_INV ,FIFO Clock Invert" "Normal,Inverted" bitfld.byte 0x10 6. " F0_CK_INV ,FIFO Clock Invert" "Normal,Inverted" textline " " bitfld.byte 0x10 5. " FIFO_FAST ,FIFO Fast Mode" "Disabled,Enabled" bitfld.byte 0x10 4. " FIFO_CAP ,FIFO Software Capture Mode" "Disabled,Enabled" textline " " bitfld.byte 0x10 3. " FIFO_EDGE ,Edge/level sensitive FIFO write control" "Level,Edge" bitfld.byte 0x10 2. " FIFO_ASYNC ,Asynchronous FIFO clocking support" "Synchronous,Asynchronous" textline " " bitfld.byte 0x10 1. " EXT_CRCPRS ,External CRC/PRS mode" "Internal,External" bitfld.byte 0x10 0. " WRK16_CONCAT ,Datapath register access mode" "Default,Concatenate" group.byte (0x30+0x24)++0x03 line.byte 0x00 "CFG20,Status input mode selection" line.byte 0x01 "CFG21,Spare register bits" bitfld.byte 0x01 1. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x01 0. " NC0 ,Spare register bit" "0,1" line.byte 0x02 "CFG22,Status Output Control" bitfld.byte 0x02 3. " SC_SYNC_MD ,SC Sync Mode" "Disabled,Enabled" bitfld.byte 0x02 2. " SC_INT_MD ,SC Interrupt Mode" "Normal,INT_MODE" textline " " bitfld.byte 0x02 0.--1. " SC_OUT_CTL ,Selects the output source for the Status and Control routing connections" "Control,Parallel,Counter,?..." line.byte 0x03 "CFG23,Counter Routing Control" bitfld.byte 0x03 5. " ROUTE_EN ,Configure the counter enable signal for routing input" "Disabled,Enabled" bitfld.byte 0x03 4. " ROUTE_LD ,Configure the counter load signal for routing input" "Disabled,Enabled" textline " " bitfld.byte 0x03 2.--3. " CNT_EN_SEL ,Selects the routing inputs for the counter enable signal" "SC_IN4,SC_IN5,SC_IN6,SC_IO" bitfld.byte 0x03 0.--1. " CNT_LD_SEL ,Selects the routing inputs for the counter load signal" "SC_IN0,SC_IN1,SC_IN2,SC_IN3" group.byte (0x30+0x28)++0x00 line.byte 0x00 "CFG24,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x29)++0x00 line.byte 0x00 "CFG25,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2A)++0x00 line.byte 0x00 "CFG26,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2B)++0x00 line.byte 0x00 "CFG27,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2C)++0x03 line.byte 0x00 "CFG28,Clock Selection" bitfld.byte 0x00 4.--7. " PLD1_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x00 0.--3. " PLD0_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x01 "CFG29,Clock Selection" bitfld.byte 0x01 4.--7. " SC_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x01 0.--3. " DP_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x02 "CFG30,Reset Selection Register" bitfld.byte 0x02 4. " GUDB_WR ,Enable global write operation for the configuration and working registers in this UDB" "Disabled,Enabled" bitfld.byte 0x02 3. " EN_RES_CNT ,Enable routed reset to counter/control register" "Disabled,Enabled" textline " " bitfld.byte 0x02 2. " RES_POL ,Select polarity of the routed reset control" "Not inverted,Inverted" bitfld.byte 0x02 0.--1. " RES_SEL ,Select routing input for routed reset control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" line.byte 0x03 "CFG31,Reset and Clock Input Enable" bitfld.byte 0x03 4.--5. " EXT_CK_SEL ,External clock selection" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" bitfld.byte 0x03 1. " EXT_SYNC ,Enable synchronization of selected external clock" "Disabled,Enabled" textline " " bitfld.byte 0x03 0. " NC0 ,Spare register bit" "0,1" group.word 0x60++0x01 line.word 0x00 "DCFG0,Dynamic Configuration RAM Register 0" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x62++0x01 line.word 0x00 "DCFG1,Dynamic Configuration RAM Register 1" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x64++0x01 line.word 0x00 "DCFG2,Dynamic Configuration RAM Register 2" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x66++0x01 line.word 0x00 "DCFG3,Dynamic Configuration RAM Register 3" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x68++0x01 line.word 0x00 "DCFG4,Dynamic Configuration RAM Register 4" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6A++0x01 line.word 0x00 "DCFG5,Dynamic Configuration RAM Register 5" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6C++0x01 line.word 0x00 "DCFG6,Dynamic Configuration RAM Register 6" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6E++0x01 line.word 0x00 "DCFG7,Dynamic Configuration RAM Register 7" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" width 0x0B tree.end tree "U 1" width 18. group.long 0x80++0x03 line.long 0x00 "PLD_IT0,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT0C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT0C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x84++0x03 line.long 0x00 "PLD_IT1,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT1C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT1C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x88++0x03 line.long 0x00 "PLD_IT2,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT2C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT2C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x8C++0x03 line.long 0x00 "PLD_IT3,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT3C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT3C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x90++0x03 line.long 0x00 "PLD_IT4,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT4C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT4C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x94++0x03 line.long 0x00 "PLD_IT5,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT5C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT5C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x98++0x03 line.long 0x00 "PLD_IT6,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT6C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT6C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x9C++0x03 line.long 0x00 "PLD_IT7,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT7C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT7C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA0++0x03 line.long 0x00 "PLD_IT8,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT8C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT8C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA4++0x03 line.long 0x00 "PLD_IT9,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT9C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT9C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA8++0x03 line.long 0x00 "PLD_IT10,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT10C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT10C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xAC++0x03 line.long 0x00 "PLD_IT11,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " group.word 0xB0++0x01 line.word 0x00 "PLD_ORT0,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT0_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT0_0 ,OR term" "Not OR,OR" group.word 0xB2++0x01 line.word 0x00 "PLD_ORT1,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT1_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT1_0 ,OR term" "Not OR,OR" group.word 0xB4++0x01 line.word 0x00 "PLD_ORT2,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT2_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT2_0 ,OR term" "Not OR,OR" group.word 0xB6++0x01 line.word 0x00 "PLD_ORT3,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " group.word (0xB0+0x08)++0x07 line.word 0x00 "MC_CFG_CEN_CONST,Macrocell Configuration for Carry Enable and Constant" bitfld.word 0x00 15. " PLD1_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 14. " PLD1_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 13. " PLD1_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 12. " PLD1_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " PLD1_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 10. " PLD1_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " PLD1_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 8. " PLD1_MC0_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " PLD0_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 6. " PLD0_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " PLD0_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 4. " PLD0_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " PLD0_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 2. " PLD0_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " PLD0_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 0. " PLD0_MC0_CEN ,Carry enable" "Disabled,Enabled" line.word 0x02 "MC_CFG_XORFB,Macrocell Configuration for XOR Feedback" bitfld.word 0x02 14.--15. " PLD1_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 12.--13. " PLD1_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 10.--11. " PLD1_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 8.--9. " PLD1_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 6.--7. " PLD0_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 4.--5. " PLD0_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 2.--3. " PLD0_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 0.--1. " PLD0_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" line.word 0x04 "MC_CFG_SET_RESET,Macrocell Configuration for Set and Reset" bitfld.word 0x04 15. " PLD1_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 14. " PLD1_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 13. " PLD1_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 12. " PLD1_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 11. " PLD1_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 10. " PLD1_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 9. " PLD1_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 8. " PLD1_MC0_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 7. " PLD0_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 6. " PLD0_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 5. " PLD0_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 4. " PLD0_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 3. " PLD0_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 2. " PLD0_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 1. " PLD0_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 0. " PLD0_MC0_SET_SEL ,Set select enable" "Not set,Set" line.word 0x06 "MC_CFG_BYPASS,Macrocell Configuration for Bypass" bitfld.word 0x06 14. " PLD1_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 12. " PLD1_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 10. " PLD1_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 8. " PLD1_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 6. " PLD0_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 4. " PLD0_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 2. " PLD0_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 0. " PLD0_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " group.byte (0xB0+0x10)++0x10 line.byte 0x00 "CFG0,Datapath Input Selection" bitfld.byte 0x00 4.--6. " RAD1 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x00 0.--2. " RAD0 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x01 "CFG1,Datapath Input Selection" bitfld.byte 0x01 0.--2. " RAD2 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x02 "CFG2,Datapath Input Selection" bitfld.byte 0x02 4.--6. " F1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x02 0.--2. " F0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x03 "CFG3,Datapath Input Selection" bitfld.byte 0x03 4.--6. " D1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x03 0.--2. " D0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x04 "CFG4,Datapath Input Selection" bitfld.byte 0x04 4.--6. " CI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x04 0.--2. " SI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x05 "CFG5,Datapath Output Selection" bitfld.byte 0x05 4.--7. " OUT1 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x05 0.--3. " OUT0 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x06 "CFG6,Datapath Output Selection" bitfld.byte 0x06 4.--7. " OUT3 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x06 0.--3. " OUT2 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x07 "CFG7,Datapath Output Selection" bitfld.byte 0x07 4.--7. " OUT5 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x07 0.--3. " OUT4 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x08 "CFG8,Datapath Output Synchronization" hexmask.byte 0x08 0.--5. 1. " OUT_SYNC ,Output Synchronization field" line.byte 0x09 "CFG9,ALU Mask" line.byte 0x0a "CFG10,Compare 0 Mask" line.byte 0x0b "CFG11,Compare 1 Mask" line.byte 0x0c "CFG12,Datapath Static Configuration" bitfld.byte 0x0c 7. " CMASK1_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 6. " CMASK0_EN ,Datapath mask enable" "Disabled,Enabled" textline " " bitfld.byte 0x0c 5. " AMASK_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 4. " DEF_SI ,Datapath default shift value" "0,1" textline " " bitfld.byte 0x0c 2.--3. " SI_SELB ,Datapath shift in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0c 0.--1. " SI_SELA ,Datapath shift in source select" "Default,Registered,Route,Chain" line.byte 0x0d "CFG13,Datapath Static Configuration" bitfld.byte 0x0d 6.--7. " CMP_SELB ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" bitfld.byte 0x0d 4.--5. " CMP_SELA ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" textline " " bitfld.byte 0x0d 2.--3. " CI_SELB ,Datapath carry in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0d 0.--1. " CI_SELA ,Datapath carry in source select" "Default,Registered,Route,Chain" line.byte 0x0e "CFG14,Datapath Static Configuration" bitfld.byte 0x0e 7. " MSB_EN ,Datapath MSB selection enable" "Disabled,Enabled" bitfld.byte 0x0e 4.--6. " MSB_SEL ,Datapath MSB Selection" "Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7" textline " " bitfld.byte 0x0e 3. " CHAIN_CMSB ,Datapath CRC MSB chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 2. " CHAIN_FB ,Datapath CRC feedback chaining enable" "Disabled,Enabled" textline " " bitfld.byte 0x0e 1. " CHAIN1 ,Datapath condition chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 0. " CHAIN0 ,Datapath condition chaining enable" "Disabled,Enabled" line.byte 0x0f "CFG15,Datapath Static Configuration" bitfld.byte 0x0f 7. " PI_SEL ,Datapath parallel input selection" "Normal,Parallel" bitfld.byte 0x0f 6. " SHIFT_SEL ,Datapath shift out selection" "SOL_MSB,SOR" textline " " bitfld.byte 0x0f 5. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x0f 4. " NC0 ,Spare register bit" "0,1" textline " " bitfld.byte 0x0f 2.--3. " F1_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" bitfld.byte 0x0f 0.--1. " F0_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" line.byte 0x10 "CFG16,Datapath Static Configuration" bitfld.byte 0x10 7. " F1_CK_INV ,FIFO Clock Invert" "Normal,Inverted" bitfld.byte 0x10 6. " F0_CK_INV ,FIFO Clock Invert" "Normal,Inverted" textline " " bitfld.byte 0x10 5. " FIFO_FAST ,FIFO Fast Mode" "Disabled,Enabled" bitfld.byte 0x10 4. " FIFO_CAP ,FIFO Software Capture Mode" "Disabled,Enabled" textline " " bitfld.byte 0x10 3. " FIFO_EDGE ,Edge/level sensitive FIFO write control" "Level,Edge" bitfld.byte 0x10 2. " FIFO_ASYNC ,Asynchronous FIFO clocking support" "Synchronous,Asynchronous" textline " " bitfld.byte 0x10 1. " EXT_CRCPRS ,External CRC/PRS mode" "Internal,External" bitfld.byte 0x10 0. " WRK16_CONCAT ,Datapath register access mode" "Default,Concatenate" group.byte (0xB0+0x24)++0x03 line.byte 0x00 "CFG20,Status input mode selection" line.byte 0x01 "CFG21,Spare register bits" bitfld.byte 0x01 1. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x01 0. " NC0 ,Spare register bit" "0,1" line.byte 0x02 "CFG22,Status Output Control" bitfld.byte 0x02 3. " SC_SYNC_MD ,SC Sync Mode" "Disabled,Enabled" bitfld.byte 0x02 2. " SC_INT_MD ,SC Interrupt Mode" "Normal,INT_MODE" textline " " bitfld.byte 0x02 0.--1. " SC_OUT_CTL ,Selects the output source for the Status and Control routing connections" "Control,Parallel,Counter,?..." line.byte 0x03 "CFG23,Counter Routing Control" bitfld.byte 0x03 5. " ROUTE_EN ,Configure the counter enable signal for routing input" "Disabled,Enabled" bitfld.byte 0x03 4. " ROUTE_LD ,Configure the counter load signal for routing input" "Disabled,Enabled" textline " " bitfld.byte 0x03 2.--3. " CNT_EN_SEL ,Selects the routing inputs for the counter enable signal" "SC_IN4,SC_IN5,SC_IN6,SC_IO" bitfld.byte 0x03 0.--1. " CNT_LD_SEL ,Selects the routing inputs for the counter load signal" "SC_IN0,SC_IN1,SC_IN2,SC_IN3" group.byte (0xB0+0x28)++0x00 line.byte 0x00 "CFG24,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x29)++0x00 line.byte 0x00 "CFG25,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2A)++0x00 line.byte 0x00 "CFG26,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2B)++0x00 line.byte 0x00 "CFG27,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2C)++0x03 line.byte 0x00 "CFG28,Clock Selection" bitfld.byte 0x00 4.--7. " PLD1_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x00 0.--3. " PLD0_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x01 "CFG29,Clock Selection" bitfld.byte 0x01 4.--7. " SC_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x01 0.--3. " DP_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x02 "CFG30,Reset Selection Register" bitfld.byte 0x02 4. " GUDB_WR ,Enable global write operation for the configuration and working registers in this UDB" "Disabled,Enabled" bitfld.byte 0x02 3. " EN_RES_CNT ,Enable routed reset to counter/control register" "Disabled,Enabled" textline " " bitfld.byte 0x02 2. " RES_POL ,Select polarity of the routed reset control" "Not inverted,Inverted" bitfld.byte 0x02 0.--1. " RES_SEL ,Select routing input for routed reset control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" line.byte 0x03 "CFG31,Reset and Clock Input Enable" bitfld.byte 0x03 4.--5. " EXT_CK_SEL ,External clock selection" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" bitfld.byte 0x03 1. " EXT_SYNC ,Enable synchronization of selected external clock" "Disabled,Enabled" textline " " bitfld.byte 0x03 0. " NC0 ,Spare register bit" "0,1" group.word 0xE0++0x01 line.word 0x00 "DCFG0,Dynamic Configuration RAM Register 0" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE2++0x01 line.word 0x00 "DCFG1,Dynamic Configuration RAM Register 1" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE4++0x01 line.word 0x00 "DCFG2,Dynamic Configuration RAM Register 2" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE6++0x01 line.word 0x00 "DCFG3,Dynamic Configuration RAM Register 3" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE8++0x01 line.word 0x00 "DCFG4,Dynamic Configuration RAM Register 4" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEA++0x01 line.word 0x00 "DCFG5,Dynamic Configuration RAM Register 5" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEC++0x01 line.word 0x00 "DCFG6,Dynamic Configuration RAM Register 6" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEE++0x01 line.word 0x00 "DCFG7,Dynamic Configuration RAM Register 7" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" width 0x0B tree.end tree "Route" width 9. group.byte 0x100++0x00 line.byte 0x00 "HC0,UDB Channel HC Tile Configuration" group.byte 0x101++0x00 line.byte 0x00 "HC1,UDB Channel HC Tile Configuration" group.byte 0x102++0x00 line.byte 0x00 "HC2,UDB Channel HC Tile Configuration" group.byte 0x103++0x00 line.byte 0x00 "HC3,UDB Channel HC Tile Configuration" group.byte 0x104++0x00 line.byte 0x00 "HC4,UDB Channel HC Tile Configuration" group.byte 0x105++0x00 line.byte 0x00 "HC5,UDB Channel HC Tile Configuration" group.byte 0x106++0x00 line.byte 0x00 "HC6,UDB Channel HC Tile Configuration" group.byte 0x107++0x00 line.byte 0x00 "HC7,UDB Channel HC Tile Configuration" group.byte 0x108++0x00 line.byte 0x00 "HC8,UDB Channel HC Tile Configuration" group.byte 0x109++0x00 line.byte 0x00 "HC9,UDB Channel HC Tile Configuration" group.byte 0x10A++0x00 line.byte 0x00 "HC10,UDB Channel HC Tile Configuration" group.byte 0x10B++0x00 line.byte 0x00 "HC11,UDB Channel HC Tile Configuration" group.byte 0x10C++0x00 line.byte 0x00 "HC12,UDB Channel HC Tile Configuration" group.byte 0x10D++0x00 line.byte 0x00 "HC13,UDB Channel HC Tile Configuration" group.byte 0x10E++0x00 line.byte 0x00 "HC14,UDB Channel HC Tile Configuration" group.byte 0x10F++0x00 line.byte 0x00 "HC15,UDB Channel HC Tile Configuration" group.byte 0x110++0x00 line.byte 0x00 "HC16,UDB Channel HC Tile Configuration" group.byte 0x111++0x00 line.byte 0x00 "HC17,UDB Channel HC Tile Configuration" group.byte 0x112++0x00 line.byte 0x00 "HC18,UDB Channel HC Tile Configuration" group.byte 0x113++0x00 line.byte 0x00 "HC19,UDB Channel HC Tile Configuration" group.byte 0x114++0x00 line.byte 0x00 "HC20,UDB Channel HC Tile Configuration" group.byte 0x115++0x00 line.byte 0x00 "HC21,UDB Channel HC Tile Configuration" group.byte 0x116++0x00 line.byte 0x00 "HC22,UDB Channel HC Tile Configuration" group.byte 0x117++0x00 line.byte 0x00 "HC23,UDB Channel HC Tile Configuration" group.byte 0x118++0x00 line.byte 0x00 "HC24,UDB Channel HC Tile Configuration" group.byte 0x119++0x00 line.byte 0x00 "HC25,UDB Channel HC Tile Configuration" group.byte 0x11A++0x00 line.byte 0x00 "HC26,UDB Channel HC Tile Configuration" group.byte 0x11B++0x00 line.byte 0x00 "HC27,UDB Channel HC Tile Configuration" group.byte 0x11C++0x00 line.byte 0x00 "HC28,UDB Channel HC Tile Configuration" group.byte 0x11D++0x00 line.byte 0x00 "HC29,UDB Channel HC Tile Configuration" group.byte 0x11E++0x00 line.byte 0x00 "HC30,UDB Channel HC Tile Configuration" group.byte 0x11F++0x00 line.byte 0x00 "HC31,UDB Channel HC Tile Configuration" group.byte 0x120++0x00 line.byte 0x00 "HC32,UDB Channel HC Tile Configuration" group.byte 0x121++0x00 line.byte 0x00 "HC33,UDB Channel HC Tile Configuration" group.byte 0x122++0x00 line.byte 0x00 "HC34,UDB Channel HC Tile Configuration" group.byte 0x123++0x00 line.byte 0x00 "HC35,UDB Channel HC Tile Configuration" group.byte 0x124++0x00 line.byte 0x00 "HC36,UDB Channel HC Tile Configuration" group.byte 0x125++0x00 line.byte 0x00 "HC37,UDB Channel HC Tile Configuration" group.byte 0x126++0x00 line.byte 0x00 "HC38,UDB Channel HC Tile Configuration" group.byte 0x127++0x00 line.byte 0x00 "HC39,UDB Channel HC Tile Configuration" group.byte 0x128++0x00 line.byte 0x00 "HC40,UDB Channel HC Tile Configuration" group.byte 0x129++0x00 line.byte 0x00 "HC41,UDB Channel HC Tile Configuration" group.byte 0x12A++0x00 line.byte 0x00 "HC42,UDB Channel HC Tile Configuration" group.byte 0x12B++0x00 line.byte 0x00 "HC43,UDB Channel HC Tile Configuration" group.byte 0x12C++0x00 line.byte 0x00 "HC44,UDB Channel HC Tile Configuration" group.byte 0x12D++0x00 line.byte 0x00 "HC45,UDB Channel HC Tile Configuration" group.byte 0x12E++0x00 line.byte 0x00 "HC46,UDB Channel HC Tile Configuration" group.byte 0x12F++0x00 line.byte 0x00 "HC47,UDB Channel HC Tile Configuration" group.byte 0x130++0x00 line.byte 0x00 "HC48,UDB Channel HC Tile Configuration" group.byte 0x131++0x00 line.byte 0x00 "HC49,UDB Channel HC Tile Configuration" group.byte 0x132++0x00 line.byte 0x00 "HC50,UDB Channel HC Tile Configuration" group.byte 0x133++0x00 line.byte 0x00 "HC51,UDB Channel HC Tile Configuration" group.byte 0x134++0x00 line.byte 0x00 "HC52,UDB Channel HC Tile Configuration" group.byte 0x135++0x00 line.byte 0x00 "HC53,UDB Channel HC Tile Configuration" group.byte 0x136++0x00 line.byte 0x00 "HC54,UDB Channel HC Tile Configuration" group.byte 0x137++0x00 line.byte 0x00 "HC55,UDB Channel HC Tile Configuration" group.byte 0x138++0x00 line.byte 0x00 "HC56,UDB Channel HC Tile Configuration" group.byte 0x139++0x00 line.byte 0x00 "HC57,UDB Channel HC Tile Configuration" group.byte 0x13A++0x00 line.byte 0x00 "HC58,UDB Channel HC Tile Configuration" group.byte 0x13B++0x00 line.byte 0x00 "HC59,UDB Channel HC Tile Configuration" group.byte 0x13C++0x00 line.byte 0x00 "HC60,UDB Channel HC Tile Configuration" group.byte 0x13D++0x00 line.byte 0x00 "HC61,UDB Channel HC Tile Configuration" group.byte 0x13E++0x00 line.byte 0x00 "HC62,UDB Channel HC Tile Configuration" group.byte 0x13F++0x00 line.byte 0x00 "HC63,UDB Channel HC Tile Configuration" group.byte 0x140++0x00 line.byte 0x00 "HC64,UDB Channel HC Tile Configuration" group.byte 0x141++0x00 line.byte 0x00 "HC65,UDB Channel HC Tile Configuration" group.byte 0x142++0x00 line.byte 0x00 "HC66,UDB Channel HC Tile Configuration" group.byte 0x143++0x00 line.byte 0x00 "HC67,UDB Channel HC Tile Configuration" group.byte 0x144++0x00 line.byte 0x00 "HC68,UDB Channel HC Tile Configuration" group.byte 0x145++0x00 line.byte 0x00 "HC69,UDB Channel HC Tile Configuration" group.byte 0x146++0x00 line.byte 0x00 "HC70,UDB Channel HC Tile Configuration" group.byte 0x147++0x00 line.byte 0x00 "HC71,UDB Channel HC Tile Configuration" group.byte 0x148++0x00 line.byte 0x00 "HC72,UDB Channel HC Tile Configuration" group.byte 0x149++0x00 line.byte 0x00 "HC73,UDB Channel HC Tile Configuration" group.byte 0x14A++0x00 line.byte 0x00 "HC74,UDB Channel HC Tile Configuration" group.byte 0x14B++0x00 line.byte 0x00 "HC75,UDB Channel HC Tile Configuration" group.byte 0x14C++0x00 line.byte 0x00 "HC76,UDB Channel HC Tile Configuration" group.byte 0x14D++0x00 line.byte 0x00 "HC77,UDB Channel HC Tile Configuration" group.byte 0x14E++0x00 line.byte 0x00 "HC78,UDB Channel HC Tile Configuration" group.byte 0x14F++0x00 line.byte 0x00 "HC79,UDB Channel HC Tile Configuration" group.byte 0x150++0x00 line.byte 0x00 "HC80,UDB Channel HC Tile Configuration" group.byte 0x151++0x00 line.byte 0x00 "HC81,UDB Channel HC Tile Configuration" group.byte 0x152++0x00 line.byte 0x00 "HC82,UDB Channel HC Tile Configuration" group.byte 0x153++0x00 line.byte 0x00 "HC83,UDB Channel HC Tile Configuration" group.byte 0x154++0x00 line.byte 0x00 "HC84,UDB Channel HC Tile Configuration" group.byte 0x155++0x00 line.byte 0x00 "HC85,UDB Channel HC Tile Configuration" group.byte 0x156++0x00 line.byte 0x00 "HC86,UDB Channel HC Tile Configuration" group.byte 0x157++0x00 line.byte 0x00 "HC87,UDB Channel HC Tile Configuration" group.byte 0x158++0x00 line.byte 0x00 "HC88,UDB Channel HC Tile Configuration" group.byte 0x159++0x00 line.byte 0x00 "HC89,UDB Channel HC Tile Configuration" group.byte 0x15A++0x00 line.byte 0x00 "HC90,UDB Channel HC Tile Configuration" group.byte 0x15B++0x00 line.byte 0x00 "HC91,UDB Channel HC Tile Configuration" group.byte 0x15C++0x00 line.byte 0x00 "HC92,UDB Channel HC Tile Configuration" group.byte 0x15D++0x00 line.byte 0x00 "HC93,UDB Channel HC Tile Configuration" group.byte 0x15E++0x00 line.byte 0x00 "HC94,UDB Channel HC Tile Configuration" group.byte 0x15F++0x00 line.byte 0x00 "HC95,UDB Channel HC Tile Configuration" group.byte 0x160++0x00 line.byte 0x00 "HC96,UDB Channel HC Tile Configuration" group.byte 0x161++0x00 line.byte 0x00 "HC97,UDB Channel HC Tile Configuration" group.byte 0x162++0x00 line.byte 0x00 "HC98,UDB Channel HC Tile Configuration" group.byte 0x163++0x00 line.byte 0x00 "HC99,UDB Channel HC Tile Configuration" group.byte 0x164++0x00 line.byte 0x00 "HC100,UDB Channel HC Tile Configuration" group.byte 0x165++0x00 line.byte 0x00 "HC101,UDB Channel HC Tile Configuration" group.byte 0x166++0x00 line.byte 0x00 "HC102,UDB Channel HC Tile Configuration" group.byte 0x167++0x00 line.byte 0x00 "HC103,UDB Channel HC Tile Configuration" group.byte 0x168++0x00 line.byte 0x00 "HC104,UDB Channel HC Tile Configuration" group.byte 0x169++0x00 line.byte 0x00 "HC105,UDB Channel HC Tile Configuration" group.byte 0x16A++0x00 line.byte 0x00 "HC106,UDB Channel HC Tile Configuration" group.byte 0x16B++0x00 line.byte 0x00 "HC107,UDB Channel HC Tile Configuration" group.byte 0x16C++0x00 line.byte 0x00 "HC108,UDB Channel HC Tile Configuration" group.byte 0x16D++0x00 line.byte 0x00 "HC109,UDB Channel HC Tile Configuration" group.byte 0x16E++0x00 line.byte 0x00 "HC110,UDB Channel HC Tile Configuration" group.byte 0x16F++0x00 line.byte 0x00 "HC111,UDB Channel HC Tile Configuration" group.byte 0x170++0x00 line.byte 0x00 "HC112,UDB Channel HC Tile Configuration" group.byte 0x171++0x00 line.byte 0x00 "HC113,UDB Channel HC Tile Configuration" group.byte 0x172++0x00 line.byte 0x00 "HC114,UDB Channel HC Tile Configuration" group.byte 0x173++0x00 line.byte 0x00 "HC115,UDB Channel HC Tile Configuration" group.byte 0x174++0x00 line.byte 0x00 "HC116,UDB Channel HC Tile Configuration" group.byte 0x175++0x00 line.byte 0x00 "HC117,UDB Channel HC Tile Configuration" group.byte 0x176++0x00 line.byte 0x00 "HC118,UDB Channel HC Tile Configuration" group.byte 0x177++0x00 line.byte 0x00 "HC119,UDB Channel HC Tile Configuration" group.byte 0x178++0x00 line.byte 0x00 "HC120,UDB Channel HC Tile Configuration" group.byte 0x179++0x00 line.byte 0x00 "HC121,UDB Channel HC Tile Configuration" group.byte 0x17A++0x00 line.byte 0x00 "HC122,UDB Channel HC Tile Configuration" group.byte 0x17B++0x00 line.byte 0x00 "HC123,UDB Channel HC Tile Configuration" group.byte 0x17C++0x00 line.byte 0x00 "HC124,UDB Channel HC Tile Configuration" group.byte 0x17D++0x00 line.byte 0x00 "HC125,UDB Channel HC Tile Configuration" group.byte 0x17E++0x00 line.byte 0x00 "HC126,UDB Channel HC Tile Configuration" group.byte 0x17F++0x00 line.byte 0x00 "HC127,UDB Channel HC Tile Configuration" group.byte 0x180++0x00 line.byte 0x00 "HV_L0,UDB Channel HV Tile Configuration" group.byte 0x181++0x00 line.byte 0x00 "HV_L1,UDB Channel HV Tile Configuration" group.byte 0x182++0x00 line.byte 0x00 "HV_L2,UDB Channel HV Tile Configuration" group.byte 0x183++0x00 line.byte 0x00 "HV_L3,UDB Channel HV Tile Configuration" group.byte 0x184++0x00 line.byte 0x00 "HV_L4,UDB Channel HV Tile Configuration" group.byte 0x185++0x00 line.byte 0x00 "HV_L5,UDB Channel HV Tile Configuration" group.byte 0x186++0x00 line.byte 0x00 "HV_L6,UDB Channel HV Tile Configuration" group.byte 0x187++0x00 line.byte 0x00 "HV_L7,UDB Channel HV Tile Configuration" group.byte 0x188++0x00 line.byte 0x00 "HV_L8,UDB Channel HV Tile Configuration" group.byte 0x189++0x00 line.byte 0x00 "HV_L9,UDB Channel HV Tile Configuration" group.byte 0x18A++0x00 line.byte 0x00 "HV_L10,UDB Channel HV Tile Configuration" group.byte 0x18B++0x00 line.byte 0x00 "HV_L11,UDB Channel HV Tile Configuration" group.byte 0x18C++0x00 line.byte 0x00 "HV_L12,UDB Channel HV Tile Configuration" group.byte 0x18D++0x00 line.byte 0x00 "HV_L13,UDB Channel HV Tile Configuration" group.byte 0x18E++0x00 line.byte 0x00 "HV_L14,UDB Channel HV Tile Configuration" group.byte 0x18F++0x00 line.byte 0x00 "HV_L15,UDB Channel HV Tile Configuration" group.byte 0x190++0x00 line.byte 0x00 "HS0,UDB Channel HS Tile Configuration" group.byte 0x191++0x00 line.byte 0x00 "HS1,UDB Channel HS Tile Configuration" group.byte 0x192++0x00 line.byte 0x00 "HS2,UDB Channel HS Tile Configuration" group.byte 0x193++0x00 line.byte 0x00 "HS3,UDB Channel HS Tile Configuration" group.byte 0x194++0x00 line.byte 0x00 "HS4,UDB Channel HS Tile Configuration" group.byte 0x195++0x00 line.byte 0x00 "HS5,UDB Channel HS Tile Configuration" group.byte 0x196++0x00 line.byte 0x00 "HS6,UDB Channel HS Tile Configuration" group.byte 0x197++0x00 line.byte 0x00 "HS7,UDB Channel HS Tile Configuration" group.byte 0x198++0x00 line.byte 0x00 "HS8,UDB Channel HS Tile Configuration" group.byte 0x199++0x00 line.byte 0x00 "HS9,UDB Channel HS Tile Configuration" group.byte 0x19A++0x00 line.byte 0x00 "HS10,UDB Channel HS Tile Configuration" group.byte 0x19B++0x00 line.byte 0x00 "HS11,UDB Channel HS Tile Configuration" group.byte 0x19C++0x00 line.byte 0x00 "HS12,UDB Channel HS Tile Configuration" group.byte 0x19D++0x00 line.byte 0x00 "HS13,UDB Channel HS Tile Configuration" group.byte 0x19E++0x00 line.byte 0x00 "HS14,UDB Channel HS Tile Configuration" group.byte 0x19F++0x00 line.byte 0x00 "HS15,UDB Channel HS Tile Configuration" group.byte 0x1A0++0x00 line.byte 0x00 "HS16,UDB Channel HS Tile Configuration" group.byte 0x1A1++0x00 line.byte 0x00 "HS17,UDB Channel HS Tile Configuration" group.byte 0x1A2++0x00 line.byte 0x00 "HS18,UDB Channel HS Tile Configuration" group.byte 0x1A3++0x00 line.byte 0x00 "HS19,UDB Channel HS Tile Configuration" group.byte 0x1A4++0x00 line.byte 0x00 "HS20,UDB Channel HS Tile Configuration" group.byte 0x1A5++0x00 line.byte 0x00 "HS21,UDB Channel HS Tile Configuration" group.byte 0x1A6++0x00 line.byte 0x00 "HS22,UDB Channel HS Tile Configuration" group.byte 0x1A7++0x00 line.byte 0x00 "HS23,UDB Channel HS Tile Configuration" group.byte 0x1A8++0x00 line.byte 0x00 "HV_R0,UDB Channel HV Tile Configuration" group.byte 0x1A9++0x00 line.byte 0x00 "HV_R1,UDB Channel HV Tile Configuration" group.byte 0x1AA++0x00 line.byte 0x00 "HV_R2,UDB Channel HV Tile Configuration" group.byte 0x1AB++0x00 line.byte 0x00 "HV_R3,UDB Channel HV Tile Configuration" group.byte 0x1AC++0x00 line.byte 0x00 "HV_R4,UDB Channel HV Tile Configuration" group.byte 0x1AD++0x00 line.byte 0x00 "HV_R5,UDB Channel HV Tile Configuration" group.byte 0x1AE++0x00 line.byte 0x00 "HV_R6,UDB Channel HV Tile Configuration" group.byte 0x1AF++0x00 line.byte 0x00 "HV_R7,UDB Channel HV Tile Configuration" group.byte 0x1B0++0x00 line.byte 0x00 "HV_R8,UDB Channel HV Tile Configuration" group.byte 0x1B1++0x00 line.byte 0x00 "HV_R9,UDB Channel HV Tile Configuration" group.byte 0x1B2++0x00 line.byte 0x00 "HV_R10,UDB Channel HV Tile Configuration" group.byte 0x1B3++0x00 line.byte 0x00 "HV_R11,UDB Channel HV Tile Configuration" group.byte 0x1B4++0x00 line.byte 0x00 "HV_R12,UDB Channel HV Tile Configuration" group.byte 0x1B5++0x00 line.byte 0x00 "HV_R13,UDB Channel HV Tile Configuration" group.byte 0x1B6++0x00 line.byte 0x00 "HV_R14,UDB Channel HV Tile Configuration" group.byte 0x1B7++0x00 line.byte 0x00 "HV_R15,UDB Channel HV Tile Configuration" group.byte 0x1C0++0x00 line.byte 0x00 "PLD0IN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1C2++0x00 line.byte 0x00 "PLD0IN1,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1C4++0x00 line.byte 0x00 "PLD0IN2,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CA++0x00 line.byte 0x00 "PLD1IN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CC++0x00 line.byte 0x00 "PLD1IN1,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CE++0x00 line.byte 0x00 "PLD1IN2,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d0++0x00 line.byte 0x00 "DPIN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d2++0x00 line.byte 0x00 "DPIN1,UDB Channel PI Tile Configuration (half populated)" hexmask.byte 0x00 4.--5. 1. " PI_BOT ,RAM configuration for BOTTOM UDB port interface configuration" hexmask.byte 0x00 2.--3. 1. " PI_TOP ,RAM configuration for TOP UDB port interface configuration" group.byte 0x1d6++0x00 line.byte 0x00 "SCIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d8++0x00 line.byte 0x00 "SCIOIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1de++0x00 line.byte 0x00 "RCIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1E0++0x00 line.byte 0x00 "VS0,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E2++0x00 line.byte 0x00 "VS1,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E4++0x00 line.byte 0x00 "VS2,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E6++0x00 line.byte 0x00 "VS3,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E8++0x00 line.byte 0x00 "VS4,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EA++0x00 line.byte 0x00 "VS5,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EC++0x00 line.byte 0x00 "VS6,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EE++0x00 line.byte 0x00 "VS7,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" width 0x0B tree.end tree.end base ad:(0x40010000+0x200) tree "P 1" tree "U 0" width 18. group.long 0x0++0x03 line.long 0x00 "PLD_IT0,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT0C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT0C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x4++0x03 line.long 0x00 "PLD_IT1,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT1C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT1C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x8++0x03 line.long 0x00 "PLD_IT2,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT2C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT2C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xC++0x03 line.long 0x00 "PLD_IT3,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT3C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT3C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x10++0x03 line.long 0x00 "PLD_IT4,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT4C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT4C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x14++0x03 line.long 0x00 "PLD_IT5,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT5C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT5C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x18++0x03 line.long 0x00 "PLD_IT6,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT6C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT6C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x1C++0x03 line.long 0x00 "PLD_IT7,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT7C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT7C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x20++0x03 line.long 0x00 "PLD_IT8,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT8C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT8C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x24++0x03 line.long 0x00 "PLD_IT9,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT9C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT9C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x28++0x03 line.long 0x00 "PLD_IT10,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT10C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT10C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x2C++0x03 line.long 0x00 "PLD_IT11,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " group.word 0x30++0x01 line.word 0x00 "PLD_ORT0,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT0_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT0_0 ,OR term" "Not OR,OR" group.word 0x32++0x01 line.word 0x00 "PLD_ORT1,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT1_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT1_0 ,OR term" "Not OR,OR" group.word 0x34++0x01 line.word 0x00 "PLD_ORT2,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT2_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT2_0 ,OR term" "Not OR,OR" group.word 0x36++0x01 line.word 0x00 "PLD_ORT3,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " group.word (0x30+0x08)++0x07 line.word 0x00 "MC_CFG_CEN_CONST,Macrocell Configuration for Carry Enable and Constant" bitfld.word 0x00 15. " PLD1_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 14. " PLD1_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 13. " PLD1_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 12. " PLD1_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " PLD1_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 10. " PLD1_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " PLD1_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 8. " PLD1_MC0_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " PLD0_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 6. " PLD0_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " PLD0_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 4. " PLD0_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " PLD0_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 2. " PLD0_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " PLD0_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 0. " PLD0_MC0_CEN ,Carry enable" "Disabled,Enabled" line.word 0x02 "MC_CFG_XORFB,Macrocell Configuration for XOR Feedback" bitfld.word 0x02 14.--15. " PLD1_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 12.--13. " PLD1_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 10.--11. " PLD1_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 8.--9. " PLD1_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 6.--7. " PLD0_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 4.--5. " PLD0_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 2.--3. " PLD0_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 0.--1. " PLD0_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" line.word 0x04 "MC_CFG_SET_RESET,Macrocell Configuration for Set and Reset" bitfld.word 0x04 15. " PLD1_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 14. " PLD1_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 13. " PLD1_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 12. " PLD1_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 11. " PLD1_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 10. " PLD1_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 9. " PLD1_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 8. " PLD1_MC0_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 7. " PLD0_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 6. " PLD0_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 5. " PLD0_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 4. " PLD0_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 3. " PLD0_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 2. " PLD0_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 1. " PLD0_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 0. " PLD0_MC0_SET_SEL ,Set select enable" "Not set,Set" line.word 0x06 "MC_CFG_BYPASS,Macrocell Configuration for Bypass" bitfld.word 0x06 14. " PLD1_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 12. " PLD1_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 10. " PLD1_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 8. " PLD1_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 6. " PLD0_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 4. " PLD0_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 2. " PLD0_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 0. " PLD0_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " group.byte (0x30+0x10)++0x10 line.byte 0x00 "CFG0,Datapath Input Selection" bitfld.byte 0x00 4.--6. " RAD1 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x00 0.--2. " RAD0 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x01 "CFG1,Datapath Input Selection" bitfld.byte 0x01 0.--2. " RAD2 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x02 "CFG2,Datapath Input Selection" bitfld.byte 0x02 4.--6. " F1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x02 0.--2. " F0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x03 "CFG3,Datapath Input Selection" bitfld.byte 0x03 4.--6. " D1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x03 0.--2. " D0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x04 "CFG4,Datapath Input Selection" bitfld.byte 0x04 4.--6. " CI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x04 0.--2. " SI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x05 "CFG5,Datapath Output Selection" bitfld.byte 0x05 4.--7. " OUT1 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x05 0.--3. " OUT0 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x06 "CFG6,Datapath Output Selection" bitfld.byte 0x06 4.--7. " OUT3 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x06 0.--3. " OUT2 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x07 "CFG7,Datapath Output Selection" bitfld.byte 0x07 4.--7. " OUT5 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x07 0.--3. " OUT4 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x08 "CFG8,Datapath Output Synchronization" hexmask.byte 0x08 0.--5. 1. " OUT_SYNC ,Output Synchronization field" line.byte 0x09 "CFG9,ALU Mask" line.byte 0x0a "CFG10,Compare 0 Mask" line.byte 0x0b "CFG11,Compare 1 Mask" line.byte 0x0c "CFG12,Datapath Static Configuration" bitfld.byte 0x0c 7. " CMASK1_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 6. " CMASK0_EN ,Datapath mask enable" "Disabled,Enabled" textline " " bitfld.byte 0x0c 5. " AMASK_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 4. " DEF_SI ,Datapath default shift value" "0,1" textline " " bitfld.byte 0x0c 2.--3. " SI_SELB ,Datapath shift in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0c 0.--1. " SI_SELA ,Datapath shift in source select" "Default,Registered,Route,Chain" line.byte 0x0d "CFG13,Datapath Static Configuration" bitfld.byte 0x0d 6.--7. " CMP_SELB ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" bitfld.byte 0x0d 4.--5. " CMP_SELA ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" textline " " bitfld.byte 0x0d 2.--3. " CI_SELB ,Datapath carry in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0d 0.--1. " CI_SELA ,Datapath carry in source select" "Default,Registered,Route,Chain" line.byte 0x0e "CFG14,Datapath Static Configuration" bitfld.byte 0x0e 7. " MSB_EN ,Datapath MSB selection enable" "Disabled,Enabled" bitfld.byte 0x0e 4.--6. " MSB_SEL ,Datapath MSB Selection" "Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7" textline " " bitfld.byte 0x0e 3. " CHAIN_CMSB ,Datapath CRC MSB chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 2. " CHAIN_FB ,Datapath CRC feedback chaining enable" "Disabled,Enabled" textline " " bitfld.byte 0x0e 1. " CHAIN1 ,Datapath condition chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 0. " CHAIN0 ,Datapath condition chaining enable" "Disabled,Enabled" line.byte 0x0f "CFG15,Datapath Static Configuration" bitfld.byte 0x0f 7. " PI_SEL ,Datapath parallel input selection" "Normal,Parallel" bitfld.byte 0x0f 6. " SHIFT_SEL ,Datapath shift out selection" "SOL_MSB,SOR" textline " " bitfld.byte 0x0f 5. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x0f 4. " NC0 ,Spare register bit" "0,1" textline " " bitfld.byte 0x0f 2.--3. " F1_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" bitfld.byte 0x0f 0.--1. " F0_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" line.byte 0x10 "CFG16,Datapath Static Configuration" bitfld.byte 0x10 7. " F1_CK_INV ,FIFO Clock Invert" "Normal,Inverted" bitfld.byte 0x10 6. " F0_CK_INV ,FIFO Clock Invert" "Normal,Inverted" textline " " bitfld.byte 0x10 5. " FIFO_FAST ,FIFO Fast Mode" "Disabled,Enabled" bitfld.byte 0x10 4. " FIFO_CAP ,FIFO Software Capture Mode" "Disabled,Enabled" textline " " bitfld.byte 0x10 3. " FIFO_EDGE ,Edge/level sensitive FIFO write control" "Level,Edge" bitfld.byte 0x10 2. " FIFO_ASYNC ,Asynchronous FIFO clocking support" "Synchronous,Asynchronous" textline " " bitfld.byte 0x10 1. " EXT_CRCPRS ,External CRC/PRS mode" "Internal,External" bitfld.byte 0x10 0. " WRK16_CONCAT ,Datapath register access mode" "Default,Concatenate" group.byte (0x30+0x24)++0x03 line.byte 0x00 "CFG20,Status input mode selection" line.byte 0x01 "CFG21,Spare register bits" bitfld.byte 0x01 1. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x01 0. " NC0 ,Spare register bit" "0,1" line.byte 0x02 "CFG22,Status Output Control" bitfld.byte 0x02 3. " SC_SYNC_MD ,SC Sync Mode" "Disabled,Enabled" bitfld.byte 0x02 2. " SC_INT_MD ,SC Interrupt Mode" "Normal,INT_MODE" textline " " bitfld.byte 0x02 0.--1. " SC_OUT_CTL ,Selects the output source for the Status and Control routing connections" "Control,Parallel,Counter,?..." line.byte 0x03 "CFG23,Counter Routing Control" bitfld.byte 0x03 5. " ROUTE_EN ,Configure the counter enable signal for routing input" "Disabled,Enabled" bitfld.byte 0x03 4. " ROUTE_LD ,Configure the counter load signal for routing input" "Disabled,Enabled" textline " " bitfld.byte 0x03 2.--3. " CNT_EN_SEL ,Selects the routing inputs for the counter enable signal" "SC_IN4,SC_IN5,SC_IN6,SC_IO" bitfld.byte 0x03 0.--1. " CNT_LD_SEL ,Selects the routing inputs for the counter load signal" "SC_IN0,SC_IN1,SC_IN2,SC_IN3" group.byte (0x30+0x28)++0x00 line.byte 0x00 "CFG24,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x29)++0x00 line.byte 0x00 "CFG25,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2A)++0x00 line.byte 0x00 "CFG26,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2B)++0x00 line.byte 0x00 "CFG27,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2C)++0x03 line.byte 0x00 "CFG28,Clock Selection" bitfld.byte 0x00 4.--7. " PLD1_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x00 0.--3. " PLD0_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x01 "CFG29,Clock Selection" bitfld.byte 0x01 4.--7. " SC_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x01 0.--3. " DP_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x02 "CFG30,Reset Selection Register" bitfld.byte 0x02 4. " GUDB_WR ,Enable global write operation for the configuration and working registers in this UDB" "Disabled,Enabled" bitfld.byte 0x02 3. " EN_RES_CNT ,Enable routed reset to counter/control register" "Disabled,Enabled" textline " " bitfld.byte 0x02 2. " RES_POL ,Select polarity of the routed reset control" "Not inverted,Inverted" bitfld.byte 0x02 0.--1. " RES_SEL ,Select routing input for routed reset control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" line.byte 0x03 "CFG31,Reset and Clock Input Enable" bitfld.byte 0x03 4.--5. " EXT_CK_SEL ,External clock selection" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" bitfld.byte 0x03 1. " EXT_SYNC ,Enable synchronization of selected external clock" "Disabled,Enabled" textline " " bitfld.byte 0x03 0. " NC0 ,Spare register bit" "0,1" group.word 0x60++0x01 line.word 0x00 "DCFG0,Dynamic Configuration RAM Register 0" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x62++0x01 line.word 0x00 "DCFG1,Dynamic Configuration RAM Register 1" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x64++0x01 line.word 0x00 "DCFG2,Dynamic Configuration RAM Register 2" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x66++0x01 line.word 0x00 "DCFG3,Dynamic Configuration RAM Register 3" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x68++0x01 line.word 0x00 "DCFG4,Dynamic Configuration RAM Register 4" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6A++0x01 line.word 0x00 "DCFG5,Dynamic Configuration RAM Register 5" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6C++0x01 line.word 0x00 "DCFG6,Dynamic Configuration RAM Register 6" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6E++0x01 line.word 0x00 "DCFG7,Dynamic Configuration RAM Register 7" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" width 0x0B tree.end tree "U 1" width 18. group.long 0x80++0x03 line.long 0x00 "PLD_IT0,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT0C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT0C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x84++0x03 line.long 0x00 "PLD_IT1,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT1C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT1C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x88++0x03 line.long 0x00 "PLD_IT2,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT2C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT2C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x8C++0x03 line.long 0x00 "PLD_IT3,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT3C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT3C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x90++0x03 line.long 0x00 "PLD_IT4,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT4C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT4C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x94++0x03 line.long 0x00 "PLD_IT5,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT5C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT5C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x98++0x03 line.long 0x00 "PLD_IT6,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT6C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT6C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x9C++0x03 line.long 0x00 "PLD_IT7,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT7C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT7C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA0++0x03 line.long 0x00 "PLD_IT8,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT8C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT8C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA4++0x03 line.long 0x00 "PLD_IT9,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT9C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT9C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA8++0x03 line.long 0x00 "PLD_IT10,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT10C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT10C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xAC++0x03 line.long 0x00 "PLD_IT11,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " group.word 0xB0++0x01 line.word 0x00 "PLD_ORT0,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT0_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT0_0 ,OR term" "Not OR,OR" group.word 0xB2++0x01 line.word 0x00 "PLD_ORT1,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT1_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT1_0 ,OR term" "Not OR,OR" group.word 0xB4++0x01 line.word 0x00 "PLD_ORT2,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT2_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT2_0 ,OR term" "Not OR,OR" group.word 0xB6++0x01 line.word 0x00 "PLD_ORT3,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " group.word (0xB0+0x08)++0x07 line.word 0x00 "MC_CFG_CEN_CONST,Macrocell Configuration for Carry Enable and Constant" bitfld.word 0x00 15. " PLD1_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 14. " PLD1_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 13. " PLD1_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 12. " PLD1_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " PLD1_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 10. " PLD1_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " PLD1_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 8. " PLD1_MC0_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " PLD0_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 6. " PLD0_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " PLD0_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 4. " PLD0_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " PLD0_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 2. " PLD0_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " PLD0_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 0. " PLD0_MC0_CEN ,Carry enable" "Disabled,Enabled" line.word 0x02 "MC_CFG_XORFB,Macrocell Configuration for XOR Feedback" bitfld.word 0x02 14.--15. " PLD1_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 12.--13. " PLD1_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 10.--11. " PLD1_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 8.--9. " PLD1_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 6.--7. " PLD0_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 4.--5. " PLD0_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 2.--3. " PLD0_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 0.--1. " PLD0_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" line.word 0x04 "MC_CFG_SET_RESET,Macrocell Configuration for Set and Reset" bitfld.word 0x04 15. " PLD1_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 14. " PLD1_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 13. " PLD1_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 12. " PLD1_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 11. " PLD1_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 10. " PLD1_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 9. " PLD1_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 8. " PLD1_MC0_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 7. " PLD0_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 6. " PLD0_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 5. " PLD0_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 4. " PLD0_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 3. " PLD0_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 2. " PLD0_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 1. " PLD0_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 0. " PLD0_MC0_SET_SEL ,Set select enable" "Not set,Set" line.word 0x06 "MC_CFG_BYPASS,Macrocell Configuration for Bypass" bitfld.word 0x06 14. " PLD1_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 12. " PLD1_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 10. " PLD1_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 8. " PLD1_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 6. " PLD0_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 4. " PLD0_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 2. " PLD0_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 0. " PLD0_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " group.byte (0xB0+0x10)++0x10 line.byte 0x00 "CFG0,Datapath Input Selection" bitfld.byte 0x00 4.--6. " RAD1 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x00 0.--2. " RAD0 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x01 "CFG1,Datapath Input Selection" bitfld.byte 0x01 0.--2. " RAD2 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x02 "CFG2,Datapath Input Selection" bitfld.byte 0x02 4.--6. " F1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x02 0.--2. " F0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x03 "CFG3,Datapath Input Selection" bitfld.byte 0x03 4.--6. " D1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x03 0.--2. " D0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x04 "CFG4,Datapath Input Selection" bitfld.byte 0x04 4.--6. " CI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x04 0.--2. " SI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x05 "CFG5,Datapath Output Selection" bitfld.byte 0x05 4.--7. " OUT1 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x05 0.--3. " OUT0 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x06 "CFG6,Datapath Output Selection" bitfld.byte 0x06 4.--7. " OUT3 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x06 0.--3. " OUT2 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x07 "CFG7,Datapath Output Selection" bitfld.byte 0x07 4.--7. " OUT5 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x07 0.--3. " OUT4 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x08 "CFG8,Datapath Output Synchronization" hexmask.byte 0x08 0.--5. 1. " OUT_SYNC ,Output Synchronization field" line.byte 0x09 "CFG9,ALU Mask" line.byte 0x0a "CFG10,Compare 0 Mask" line.byte 0x0b "CFG11,Compare 1 Mask" line.byte 0x0c "CFG12,Datapath Static Configuration" bitfld.byte 0x0c 7. " CMASK1_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 6. " CMASK0_EN ,Datapath mask enable" "Disabled,Enabled" textline " " bitfld.byte 0x0c 5. " AMASK_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 4. " DEF_SI ,Datapath default shift value" "0,1" textline " " bitfld.byte 0x0c 2.--3. " SI_SELB ,Datapath shift in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0c 0.--1. " SI_SELA ,Datapath shift in source select" "Default,Registered,Route,Chain" line.byte 0x0d "CFG13,Datapath Static Configuration" bitfld.byte 0x0d 6.--7. " CMP_SELB ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" bitfld.byte 0x0d 4.--5. " CMP_SELA ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" textline " " bitfld.byte 0x0d 2.--3. " CI_SELB ,Datapath carry in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0d 0.--1. " CI_SELA ,Datapath carry in source select" "Default,Registered,Route,Chain" line.byte 0x0e "CFG14,Datapath Static Configuration" bitfld.byte 0x0e 7. " MSB_EN ,Datapath MSB selection enable" "Disabled,Enabled" bitfld.byte 0x0e 4.--6. " MSB_SEL ,Datapath MSB Selection" "Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7" textline " " bitfld.byte 0x0e 3. " CHAIN_CMSB ,Datapath CRC MSB chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 2. " CHAIN_FB ,Datapath CRC feedback chaining enable" "Disabled,Enabled" textline " " bitfld.byte 0x0e 1. " CHAIN1 ,Datapath condition chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 0. " CHAIN0 ,Datapath condition chaining enable" "Disabled,Enabled" line.byte 0x0f "CFG15,Datapath Static Configuration" bitfld.byte 0x0f 7. " PI_SEL ,Datapath parallel input selection" "Normal,Parallel" bitfld.byte 0x0f 6. " SHIFT_SEL ,Datapath shift out selection" "SOL_MSB,SOR" textline " " bitfld.byte 0x0f 5. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x0f 4. " NC0 ,Spare register bit" "0,1" textline " " bitfld.byte 0x0f 2.--3. " F1_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" bitfld.byte 0x0f 0.--1. " F0_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" line.byte 0x10 "CFG16,Datapath Static Configuration" bitfld.byte 0x10 7. " F1_CK_INV ,FIFO Clock Invert" "Normal,Inverted" bitfld.byte 0x10 6. " F0_CK_INV ,FIFO Clock Invert" "Normal,Inverted" textline " " bitfld.byte 0x10 5. " FIFO_FAST ,FIFO Fast Mode" "Disabled,Enabled" bitfld.byte 0x10 4. " FIFO_CAP ,FIFO Software Capture Mode" "Disabled,Enabled" textline " " bitfld.byte 0x10 3. " FIFO_EDGE ,Edge/level sensitive FIFO write control" "Level,Edge" bitfld.byte 0x10 2. " FIFO_ASYNC ,Asynchronous FIFO clocking support" "Synchronous,Asynchronous" textline " " bitfld.byte 0x10 1. " EXT_CRCPRS ,External CRC/PRS mode" "Internal,External" bitfld.byte 0x10 0. " WRK16_CONCAT ,Datapath register access mode" "Default,Concatenate" group.byte (0xB0+0x24)++0x03 line.byte 0x00 "CFG20,Status input mode selection" line.byte 0x01 "CFG21,Spare register bits" bitfld.byte 0x01 1. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x01 0. " NC0 ,Spare register bit" "0,1" line.byte 0x02 "CFG22,Status Output Control" bitfld.byte 0x02 3. " SC_SYNC_MD ,SC Sync Mode" "Disabled,Enabled" bitfld.byte 0x02 2. " SC_INT_MD ,SC Interrupt Mode" "Normal,INT_MODE" textline " " bitfld.byte 0x02 0.--1. " SC_OUT_CTL ,Selects the output source for the Status and Control routing connections" "Control,Parallel,Counter,?..." line.byte 0x03 "CFG23,Counter Routing Control" bitfld.byte 0x03 5. " ROUTE_EN ,Configure the counter enable signal for routing input" "Disabled,Enabled" bitfld.byte 0x03 4. " ROUTE_LD ,Configure the counter load signal for routing input" "Disabled,Enabled" textline " " bitfld.byte 0x03 2.--3. " CNT_EN_SEL ,Selects the routing inputs for the counter enable signal" "SC_IN4,SC_IN5,SC_IN6,SC_IO" bitfld.byte 0x03 0.--1. " CNT_LD_SEL ,Selects the routing inputs for the counter load signal" "SC_IN0,SC_IN1,SC_IN2,SC_IN3" group.byte (0xB0+0x28)++0x00 line.byte 0x00 "CFG24,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x29)++0x00 line.byte 0x00 "CFG25,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2A)++0x00 line.byte 0x00 "CFG26,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2B)++0x00 line.byte 0x00 "CFG27,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2C)++0x03 line.byte 0x00 "CFG28,Clock Selection" bitfld.byte 0x00 4.--7. " PLD1_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x00 0.--3. " PLD0_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x01 "CFG29,Clock Selection" bitfld.byte 0x01 4.--7. " SC_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x01 0.--3. " DP_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x02 "CFG30,Reset Selection Register" bitfld.byte 0x02 4. " GUDB_WR ,Enable global write operation for the configuration and working registers in this UDB" "Disabled,Enabled" bitfld.byte 0x02 3. " EN_RES_CNT ,Enable routed reset to counter/control register" "Disabled,Enabled" textline " " bitfld.byte 0x02 2. " RES_POL ,Select polarity of the routed reset control" "Not inverted,Inverted" bitfld.byte 0x02 0.--1. " RES_SEL ,Select routing input for routed reset control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" line.byte 0x03 "CFG31,Reset and Clock Input Enable" bitfld.byte 0x03 4.--5. " EXT_CK_SEL ,External clock selection" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" bitfld.byte 0x03 1. " EXT_SYNC ,Enable synchronization of selected external clock" "Disabled,Enabled" textline " " bitfld.byte 0x03 0. " NC0 ,Spare register bit" "0,1" group.word 0xE0++0x01 line.word 0x00 "DCFG0,Dynamic Configuration RAM Register 0" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE2++0x01 line.word 0x00 "DCFG1,Dynamic Configuration RAM Register 1" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE4++0x01 line.word 0x00 "DCFG2,Dynamic Configuration RAM Register 2" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE6++0x01 line.word 0x00 "DCFG3,Dynamic Configuration RAM Register 3" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE8++0x01 line.word 0x00 "DCFG4,Dynamic Configuration RAM Register 4" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEA++0x01 line.word 0x00 "DCFG5,Dynamic Configuration RAM Register 5" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEC++0x01 line.word 0x00 "DCFG6,Dynamic Configuration RAM Register 6" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEE++0x01 line.word 0x00 "DCFG7,Dynamic Configuration RAM Register 7" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" width 0x0B tree.end tree "Route" width 9. group.byte 0x100++0x00 line.byte 0x00 "HC0,UDB Channel HC Tile Configuration" group.byte 0x101++0x00 line.byte 0x00 "HC1,UDB Channel HC Tile Configuration" group.byte 0x102++0x00 line.byte 0x00 "HC2,UDB Channel HC Tile Configuration" group.byte 0x103++0x00 line.byte 0x00 "HC3,UDB Channel HC Tile Configuration" group.byte 0x104++0x00 line.byte 0x00 "HC4,UDB Channel HC Tile Configuration" group.byte 0x105++0x00 line.byte 0x00 "HC5,UDB Channel HC Tile Configuration" group.byte 0x106++0x00 line.byte 0x00 "HC6,UDB Channel HC Tile Configuration" group.byte 0x107++0x00 line.byte 0x00 "HC7,UDB Channel HC Tile Configuration" group.byte 0x108++0x00 line.byte 0x00 "HC8,UDB Channel HC Tile Configuration" group.byte 0x109++0x00 line.byte 0x00 "HC9,UDB Channel HC Tile Configuration" group.byte 0x10A++0x00 line.byte 0x00 "HC10,UDB Channel HC Tile Configuration" group.byte 0x10B++0x00 line.byte 0x00 "HC11,UDB Channel HC Tile Configuration" group.byte 0x10C++0x00 line.byte 0x00 "HC12,UDB Channel HC Tile Configuration" group.byte 0x10D++0x00 line.byte 0x00 "HC13,UDB Channel HC Tile Configuration" group.byte 0x10E++0x00 line.byte 0x00 "HC14,UDB Channel HC Tile Configuration" group.byte 0x10F++0x00 line.byte 0x00 "HC15,UDB Channel HC Tile Configuration" group.byte 0x110++0x00 line.byte 0x00 "HC16,UDB Channel HC Tile Configuration" group.byte 0x111++0x00 line.byte 0x00 "HC17,UDB Channel HC Tile Configuration" group.byte 0x112++0x00 line.byte 0x00 "HC18,UDB Channel HC Tile Configuration" group.byte 0x113++0x00 line.byte 0x00 "HC19,UDB Channel HC Tile Configuration" group.byte 0x114++0x00 line.byte 0x00 "HC20,UDB Channel HC Tile Configuration" group.byte 0x115++0x00 line.byte 0x00 "HC21,UDB Channel HC Tile Configuration" group.byte 0x116++0x00 line.byte 0x00 "HC22,UDB Channel HC Tile Configuration" group.byte 0x117++0x00 line.byte 0x00 "HC23,UDB Channel HC Tile Configuration" group.byte 0x118++0x00 line.byte 0x00 "HC24,UDB Channel HC Tile Configuration" group.byte 0x119++0x00 line.byte 0x00 "HC25,UDB Channel HC Tile Configuration" group.byte 0x11A++0x00 line.byte 0x00 "HC26,UDB Channel HC Tile Configuration" group.byte 0x11B++0x00 line.byte 0x00 "HC27,UDB Channel HC Tile Configuration" group.byte 0x11C++0x00 line.byte 0x00 "HC28,UDB Channel HC Tile Configuration" group.byte 0x11D++0x00 line.byte 0x00 "HC29,UDB Channel HC Tile Configuration" group.byte 0x11E++0x00 line.byte 0x00 "HC30,UDB Channel HC Tile Configuration" group.byte 0x11F++0x00 line.byte 0x00 "HC31,UDB Channel HC Tile Configuration" group.byte 0x120++0x00 line.byte 0x00 "HC32,UDB Channel HC Tile Configuration" group.byte 0x121++0x00 line.byte 0x00 "HC33,UDB Channel HC Tile Configuration" group.byte 0x122++0x00 line.byte 0x00 "HC34,UDB Channel HC Tile Configuration" group.byte 0x123++0x00 line.byte 0x00 "HC35,UDB Channel HC Tile Configuration" group.byte 0x124++0x00 line.byte 0x00 "HC36,UDB Channel HC Tile Configuration" group.byte 0x125++0x00 line.byte 0x00 "HC37,UDB Channel HC Tile Configuration" group.byte 0x126++0x00 line.byte 0x00 "HC38,UDB Channel HC Tile Configuration" group.byte 0x127++0x00 line.byte 0x00 "HC39,UDB Channel HC Tile Configuration" group.byte 0x128++0x00 line.byte 0x00 "HC40,UDB Channel HC Tile Configuration" group.byte 0x129++0x00 line.byte 0x00 "HC41,UDB Channel HC Tile Configuration" group.byte 0x12A++0x00 line.byte 0x00 "HC42,UDB Channel HC Tile Configuration" group.byte 0x12B++0x00 line.byte 0x00 "HC43,UDB Channel HC Tile Configuration" group.byte 0x12C++0x00 line.byte 0x00 "HC44,UDB Channel HC Tile Configuration" group.byte 0x12D++0x00 line.byte 0x00 "HC45,UDB Channel HC Tile Configuration" group.byte 0x12E++0x00 line.byte 0x00 "HC46,UDB Channel HC Tile Configuration" group.byte 0x12F++0x00 line.byte 0x00 "HC47,UDB Channel HC Tile Configuration" group.byte 0x130++0x00 line.byte 0x00 "HC48,UDB Channel HC Tile Configuration" group.byte 0x131++0x00 line.byte 0x00 "HC49,UDB Channel HC Tile Configuration" group.byte 0x132++0x00 line.byte 0x00 "HC50,UDB Channel HC Tile Configuration" group.byte 0x133++0x00 line.byte 0x00 "HC51,UDB Channel HC Tile Configuration" group.byte 0x134++0x00 line.byte 0x00 "HC52,UDB Channel HC Tile Configuration" group.byte 0x135++0x00 line.byte 0x00 "HC53,UDB Channel HC Tile Configuration" group.byte 0x136++0x00 line.byte 0x00 "HC54,UDB Channel HC Tile Configuration" group.byte 0x137++0x00 line.byte 0x00 "HC55,UDB Channel HC Tile Configuration" group.byte 0x138++0x00 line.byte 0x00 "HC56,UDB Channel HC Tile Configuration" group.byte 0x139++0x00 line.byte 0x00 "HC57,UDB Channel HC Tile Configuration" group.byte 0x13A++0x00 line.byte 0x00 "HC58,UDB Channel HC Tile Configuration" group.byte 0x13B++0x00 line.byte 0x00 "HC59,UDB Channel HC Tile Configuration" group.byte 0x13C++0x00 line.byte 0x00 "HC60,UDB Channel HC Tile Configuration" group.byte 0x13D++0x00 line.byte 0x00 "HC61,UDB Channel HC Tile Configuration" group.byte 0x13E++0x00 line.byte 0x00 "HC62,UDB Channel HC Tile Configuration" group.byte 0x13F++0x00 line.byte 0x00 "HC63,UDB Channel HC Tile Configuration" group.byte 0x140++0x00 line.byte 0x00 "HC64,UDB Channel HC Tile Configuration" group.byte 0x141++0x00 line.byte 0x00 "HC65,UDB Channel HC Tile Configuration" group.byte 0x142++0x00 line.byte 0x00 "HC66,UDB Channel HC Tile Configuration" group.byte 0x143++0x00 line.byte 0x00 "HC67,UDB Channel HC Tile Configuration" group.byte 0x144++0x00 line.byte 0x00 "HC68,UDB Channel HC Tile Configuration" group.byte 0x145++0x00 line.byte 0x00 "HC69,UDB Channel HC Tile Configuration" group.byte 0x146++0x00 line.byte 0x00 "HC70,UDB Channel HC Tile Configuration" group.byte 0x147++0x00 line.byte 0x00 "HC71,UDB Channel HC Tile Configuration" group.byte 0x148++0x00 line.byte 0x00 "HC72,UDB Channel HC Tile Configuration" group.byte 0x149++0x00 line.byte 0x00 "HC73,UDB Channel HC Tile Configuration" group.byte 0x14A++0x00 line.byte 0x00 "HC74,UDB Channel HC Tile Configuration" group.byte 0x14B++0x00 line.byte 0x00 "HC75,UDB Channel HC Tile Configuration" group.byte 0x14C++0x00 line.byte 0x00 "HC76,UDB Channel HC Tile Configuration" group.byte 0x14D++0x00 line.byte 0x00 "HC77,UDB Channel HC Tile Configuration" group.byte 0x14E++0x00 line.byte 0x00 "HC78,UDB Channel HC Tile Configuration" group.byte 0x14F++0x00 line.byte 0x00 "HC79,UDB Channel HC Tile Configuration" group.byte 0x150++0x00 line.byte 0x00 "HC80,UDB Channel HC Tile Configuration" group.byte 0x151++0x00 line.byte 0x00 "HC81,UDB Channel HC Tile Configuration" group.byte 0x152++0x00 line.byte 0x00 "HC82,UDB Channel HC Tile Configuration" group.byte 0x153++0x00 line.byte 0x00 "HC83,UDB Channel HC Tile Configuration" group.byte 0x154++0x00 line.byte 0x00 "HC84,UDB Channel HC Tile Configuration" group.byte 0x155++0x00 line.byte 0x00 "HC85,UDB Channel HC Tile Configuration" group.byte 0x156++0x00 line.byte 0x00 "HC86,UDB Channel HC Tile Configuration" group.byte 0x157++0x00 line.byte 0x00 "HC87,UDB Channel HC Tile Configuration" group.byte 0x158++0x00 line.byte 0x00 "HC88,UDB Channel HC Tile Configuration" group.byte 0x159++0x00 line.byte 0x00 "HC89,UDB Channel HC Tile Configuration" group.byte 0x15A++0x00 line.byte 0x00 "HC90,UDB Channel HC Tile Configuration" group.byte 0x15B++0x00 line.byte 0x00 "HC91,UDB Channel HC Tile Configuration" group.byte 0x15C++0x00 line.byte 0x00 "HC92,UDB Channel HC Tile Configuration" group.byte 0x15D++0x00 line.byte 0x00 "HC93,UDB Channel HC Tile Configuration" group.byte 0x15E++0x00 line.byte 0x00 "HC94,UDB Channel HC Tile Configuration" group.byte 0x15F++0x00 line.byte 0x00 "HC95,UDB Channel HC Tile Configuration" group.byte 0x160++0x00 line.byte 0x00 "HC96,UDB Channel HC Tile Configuration" group.byte 0x161++0x00 line.byte 0x00 "HC97,UDB Channel HC Tile Configuration" group.byte 0x162++0x00 line.byte 0x00 "HC98,UDB Channel HC Tile Configuration" group.byte 0x163++0x00 line.byte 0x00 "HC99,UDB Channel HC Tile Configuration" group.byte 0x164++0x00 line.byte 0x00 "HC100,UDB Channel HC Tile Configuration" group.byte 0x165++0x00 line.byte 0x00 "HC101,UDB Channel HC Tile Configuration" group.byte 0x166++0x00 line.byte 0x00 "HC102,UDB Channel HC Tile Configuration" group.byte 0x167++0x00 line.byte 0x00 "HC103,UDB Channel HC Tile Configuration" group.byte 0x168++0x00 line.byte 0x00 "HC104,UDB Channel HC Tile Configuration" group.byte 0x169++0x00 line.byte 0x00 "HC105,UDB Channel HC Tile Configuration" group.byte 0x16A++0x00 line.byte 0x00 "HC106,UDB Channel HC Tile Configuration" group.byte 0x16B++0x00 line.byte 0x00 "HC107,UDB Channel HC Tile Configuration" group.byte 0x16C++0x00 line.byte 0x00 "HC108,UDB Channel HC Tile Configuration" group.byte 0x16D++0x00 line.byte 0x00 "HC109,UDB Channel HC Tile Configuration" group.byte 0x16E++0x00 line.byte 0x00 "HC110,UDB Channel HC Tile Configuration" group.byte 0x16F++0x00 line.byte 0x00 "HC111,UDB Channel HC Tile Configuration" group.byte 0x170++0x00 line.byte 0x00 "HC112,UDB Channel HC Tile Configuration" group.byte 0x171++0x00 line.byte 0x00 "HC113,UDB Channel HC Tile Configuration" group.byte 0x172++0x00 line.byte 0x00 "HC114,UDB Channel HC Tile Configuration" group.byte 0x173++0x00 line.byte 0x00 "HC115,UDB Channel HC Tile Configuration" group.byte 0x174++0x00 line.byte 0x00 "HC116,UDB Channel HC Tile Configuration" group.byte 0x175++0x00 line.byte 0x00 "HC117,UDB Channel HC Tile Configuration" group.byte 0x176++0x00 line.byte 0x00 "HC118,UDB Channel HC Tile Configuration" group.byte 0x177++0x00 line.byte 0x00 "HC119,UDB Channel HC Tile Configuration" group.byte 0x178++0x00 line.byte 0x00 "HC120,UDB Channel HC Tile Configuration" group.byte 0x179++0x00 line.byte 0x00 "HC121,UDB Channel HC Tile Configuration" group.byte 0x17A++0x00 line.byte 0x00 "HC122,UDB Channel HC Tile Configuration" group.byte 0x17B++0x00 line.byte 0x00 "HC123,UDB Channel HC Tile Configuration" group.byte 0x17C++0x00 line.byte 0x00 "HC124,UDB Channel HC Tile Configuration" group.byte 0x17D++0x00 line.byte 0x00 "HC125,UDB Channel HC Tile Configuration" group.byte 0x17E++0x00 line.byte 0x00 "HC126,UDB Channel HC Tile Configuration" group.byte 0x17F++0x00 line.byte 0x00 "HC127,UDB Channel HC Tile Configuration" group.byte 0x180++0x00 line.byte 0x00 "HV_L0,UDB Channel HV Tile Configuration" group.byte 0x181++0x00 line.byte 0x00 "HV_L1,UDB Channel HV Tile Configuration" group.byte 0x182++0x00 line.byte 0x00 "HV_L2,UDB Channel HV Tile Configuration" group.byte 0x183++0x00 line.byte 0x00 "HV_L3,UDB Channel HV Tile Configuration" group.byte 0x184++0x00 line.byte 0x00 "HV_L4,UDB Channel HV Tile Configuration" group.byte 0x185++0x00 line.byte 0x00 "HV_L5,UDB Channel HV Tile Configuration" group.byte 0x186++0x00 line.byte 0x00 "HV_L6,UDB Channel HV Tile Configuration" group.byte 0x187++0x00 line.byte 0x00 "HV_L7,UDB Channel HV Tile Configuration" group.byte 0x188++0x00 line.byte 0x00 "HV_L8,UDB Channel HV Tile Configuration" group.byte 0x189++0x00 line.byte 0x00 "HV_L9,UDB Channel HV Tile Configuration" group.byte 0x18A++0x00 line.byte 0x00 "HV_L10,UDB Channel HV Tile Configuration" group.byte 0x18B++0x00 line.byte 0x00 "HV_L11,UDB Channel HV Tile Configuration" group.byte 0x18C++0x00 line.byte 0x00 "HV_L12,UDB Channel HV Tile Configuration" group.byte 0x18D++0x00 line.byte 0x00 "HV_L13,UDB Channel HV Tile Configuration" group.byte 0x18E++0x00 line.byte 0x00 "HV_L14,UDB Channel HV Tile Configuration" group.byte 0x18F++0x00 line.byte 0x00 "HV_L15,UDB Channel HV Tile Configuration" group.byte 0x190++0x00 line.byte 0x00 "HS0,UDB Channel HS Tile Configuration" group.byte 0x191++0x00 line.byte 0x00 "HS1,UDB Channel HS Tile Configuration" group.byte 0x192++0x00 line.byte 0x00 "HS2,UDB Channel HS Tile Configuration" group.byte 0x193++0x00 line.byte 0x00 "HS3,UDB Channel HS Tile Configuration" group.byte 0x194++0x00 line.byte 0x00 "HS4,UDB Channel HS Tile Configuration" group.byte 0x195++0x00 line.byte 0x00 "HS5,UDB Channel HS Tile Configuration" group.byte 0x196++0x00 line.byte 0x00 "HS6,UDB Channel HS Tile Configuration" group.byte 0x197++0x00 line.byte 0x00 "HS7,UDB Channel HS Tile Configuration" group.byte 0x198++0x00 line.byte 0x00 "HS8,UDB Channel HS Tile Configuration" group.byte 0x199++0x00 line.byte 0x00 "HS9,UDB Channel HS Tile Configuration" group.byte 0x19A++0x00 line.byte 0x00 "HS10,UDB Channel HS Tile Configuration" group.byte 0x19B++0x00 line.byte 0x00 "HS11,UDB Channel HS Tile Configuration" group.byte 0x19C++0x00 line.byte 0x00 "HS12,UDB Channel HS Tile Configuration" group.byte 0x19D++0x00 line.byte 0x00 "HS13,UDB Channel HS Tile Configuration" group.byte 0x19E++0x00 line.byte 0x00 "HS14,UDB Channel HS Tile Configuration" group.byte 0x19F++0x00 line.byte 0x00 "HS15,UDB Channel HS Tile Configuration" group.byte 0x1A0++0x00 line.byte 0x00 "HS16,UDB Channel HS Tile Configuration" group.byte 0x1A1++0x00 line.byte 0x00 "HS17,UDB Channel HS Tile Configuration" group.byte 0x1A2++0x00 line.byte 0x00 "HS18,UDB Channel HS Tile Configuration" group.byte 0x1A3++0x00 line.byte 0x00 "HS19,UDB Channel HS Tile Configuration" group.byte 0x1A4++0x00 line.byte 0x00 "HS20,UDB Channel HS Tile Configuration" group.byte 0x1A5++0x00 line.byte 0x00 "HS21,UDB Channel HS Tile Configuration" group.byte 0x1A6++0x00 line.byte 0x00 "HS22,UDB Channel HS Tile Configuration" group.byte 0x1A7++0x00 line.byte 0x00 "HS23,UDB Channel HS Tile Configuration" group.byte 0x1A8++0x00 line.byte 0x00 "HV_R0,UDB Channel HV Tile Configuration" group.byte 0x1A9++0x00 line.byte 0x00 "HV_R1,UDB Channel HV Tile Configuration" group.byte 0x1AA++0x00 line.byte 0x00 "HV_R2,UDB Channel HV Tile Configuration" group.byte 0x1AB++0x00 line.byte 0x00 "HV_R3,UDB Channel HV Tile Configuration" group.byte 0x1AC++0x00 line.byte 0x00 "HV_R4,UDB Channel HV Tile Configuration" group.byte 0x1AD++0x00 line.byte 0x00 "HV_R5,UDB Channel HV Tile Configuration" group.byte 0x1AE++0x00 line.byte 0x00 "HV_R6,UDB Channel HV Tile Configuration" group.byte 0x1AF++0x00 line.byte 0x00 "HV_R7,UDB Channel HV Tile Configuration" group.byte 0x1B0++0x00 line.byte 0x00 "HV_R8,UDB Channel HV Tile Configuration" group.byte 0x1B1++0x00 line.byte 0x00 "HV_R9,UDB Channel HV Tile Configuration" group.byte 0x1B2++0x00 line.byte 0x00 "HV_R10,UDB Channel HV Tile Configuration" group.byte 0x1B3++0x00 line.byte 0x00 "HV_R11,UDB Channel HV Tile Configuration" group.byte 0x1B4++0x00 line.byte 0x00 "HV_R12,UDB Channel HV Tile Configuration" group.byte 0x1B5++0x00 line.byte 0x00 "HV_R13,UDB Channel HV Tile Configuration" group.byte 0x1B6++0x00 line.byte 0x00 "HV_R14,UDB Channel HV Tile Configuration" group.byte 0x1B7++0x00 line.byte 0x00 "HV_R15,UDB Channel HV Tile Configuration" group.byte 0x1C0++0x00 line.byte 0x00 "PLD0IN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1C2++0x00 line.byte 0x00 "PLD0IN1,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1C4++0x00 line.byte 0x00 "PLD0IN2,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CA++0x00 line.byte 0x00 "PLD1IN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CC++0x00 line.byte 0x00 "PLD1IN1,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CE++0x00 line.byte 0x00 "PLD1IN2,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d0++0x00 line.byte 0x00 "DPIN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d2++0x00 line.byte 0x00 "DPIN1,UDB Channel PI Tile Configuration (half populated)" hexmask.byte 0x00 4.--5. 1. " PI_BOT ,RAM configuration for BOTTOM UDB port interface configuration" hexmask.byte 0x00 2.--3. 1. " PI_TOP ,RAM configuration for TOP UDB port interface configuration" group.byte 0x1d6++0x00 line.byte 0x00 "SCIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d8++0x00 line.byte 0x00 "SCIOIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1de++0x00 line.byte 0x00 "RCIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1E0++0x00 line.byte 0x00 "VS0,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E2++0x00 line.byte 0x00 "VS1,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E4++0x00 line.byte 0x00 "VS2,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E6++0x00 line.byte 0x00 "VS3,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E8++0x00 line.byte 0x00 "VS4,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EA++0x00 line.byte 0x00 "VS5,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EC++0x00 line.byte 0x00 "VS6,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EE++0x00 line.byte 0x00 "VS7,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" width 0x0B tree.end tree.end base ad:(0x40010000+0x400) tree "P 2" tree "U 0" width 18. group.long 0x0++0x03 line.long 0x00 "PLD_IT0,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT0C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT0C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x4++0x03 line.long 0x00 "PLD_IT1,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT1C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT1C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x8++0x03 line.long 0x00 "PLD_IT2,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT2C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT2C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xC++0x03 line.long 0x00 "PLD_IT3,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT3C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT3C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x10++0x03 line.long 0x00 "PLD_IT4,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT4C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT4C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x14++0x03 line.long 0x00 "PLD_IT5,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT5C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT5C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x18++0x03 line.long 0x00 "PLD_IT6,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT6C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT6C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x1C++0x03 line.long 0x00 "PLD_IT7,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT7C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT7C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x20++0x03 line.long 0x00 "PLD_IT8,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT8C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT8C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x24++0x03 line.long 0x00 "PLD_IT9,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT9C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT9C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x28++0x03 line.long 0x00 "PLD_IT10,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT10C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT10C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x2C++0x03 line.long 0x00 "PLD_IT11,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " group.word 0x30++0x01 line.word 0x00 "PLD_ORT0,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT0_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT0_0 ,OR term" "Not OR,OR" group.word 0x32++0x01 line.word 0x00 "PLD_ORT1,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT1_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT1_0 ,OR term" "Not OR,OR" group.word 0x34++0x01 line.word 0x00 "PLD_ORT2,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT2_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT2_0 ,OR term" "Not OR,OR" group.word 0x36++0x01 line.word 0x00 "PLD_ORT3,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " group.word (0x30+0x08)++0x07 line.word 0x00 "MC_CFG_CEN_CONST,Macrocell Configuration for Carry Enable and Constant" bitfld.word 0x00 15. " PLD1_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 14. " PLD1_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 13. " PLD1_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 12. " PLD1_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " PLD1_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 10. " PLD1_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " PLD1_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 8. " PLD1_MC0_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " PLD0_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 6. " PLD0_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " PLD0_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 4. " PLD0_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " PLD0_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 2. " PLD0_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " PLD0_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 0. " PLD0_MC0_CEN ,Carry enable" "Disabled,Enabled" line.word 0x02 "MC_CFG_XORFB,Macrocell Configuration for XOR Feedback" bitfld.word 0x02 14.--15. " PLD1_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 12.--13. " PLD1_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 10.--11. " PLD1_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 8.--9. " PLD1_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 6.--7. " PLD0_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 4.--5. " PLD0_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 2.--3. " PLD0_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 0.--1. " PLD0_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" line.word 0x04 "MC_CFG_SET_RESET,Macrocell Configuration for Set and Reset" bitfld.word 0x04 15. " PLD1_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 14. " PLD1_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 13. " PLD1_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 12. " PLD1_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 11. " PLD1_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 10. " PLD1_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 9. " PLD1_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 8. " PLD1_MC0_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 7. " PLD0_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 6. " PLD0_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 5. " PLD0_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 4. " PLD0_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 3. " PLD0_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 2. " PLD0_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 1. " PLD0_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 0. " PLD0_MC0_SET_SEL ,Set select enable" "Not set,Set" line.word 0x06 "MC_CFG_BYPASS,Macrocell Configuration for Bypass" bitfld.word 0x06 14. " PLD1_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 12. " PLD1_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 10. " PLD1_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 8. " PLD1_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 6. " PLD0_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 4. " PLD0_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 2. " PLD0_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 0. " PLD0_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " group.byte (0x30+0x10)++0x10 line.byte 0x00 "CFG0,Datapath Input Selection" bitfld.byte 0x00 4.--6. " RAD1 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x00 0.--2. " RAD0 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x01 "CFG1,Datapath Input Selection" bitfld.byte 0x01 0.--2. " RAD2 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x02 "CFG2,Datapath Input Selection" bitfld.byte 0x02 4.--6. " F1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x02 0.--2. " F0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x03 "CFG3,Datapath Input Selection" bitfld.byte 0x03 4.--6. " D1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x03 0.--2. " D0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x04 "CFG4,Datapath Input Selection" bitfld.byte 0x04 4.--6. " CI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x04 0.--2. " SI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x05 "CFG5,Datapath Output Selection" bitfld.byte 0x05 4.--7. " OUT1 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x05 0.--3. " OUT0 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x06 "CFG6,Datapath Output Selection" bitfld.byte 0x06 4.--7. " OUT3 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x06 0.--3. " OUT2 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x07 "CFG7,Datapath Output Selection" bitfld.byte 0x07 4.--7. " OUT5 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x07 0.--3. " OUT4 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x08 "CFG8,Datapath Output Synchronization" hexmask.byte 0x08 0.--5. 1. " OUT_SYNC ,Output Synchronization field" line.byte 0x09 "CFG9,ALU Mask" line.byte 0x0a "CFG10,Compare 0 Mask" line.byte 0x0b "CFG11,Compare 1 Mask" line.byte 0x0c "CFG12,Datapath Static Configuration" bitfld.byte 0x0c 7. " CMASK1_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 6. " CMASK0_EN ,Datapath mask enable" "Disabled,Enabled" textline " " bitfld.byte 0x0c 5. " AMASK_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 4. " DEF_SI ,Datapath default shift value" "0,1" textline " " bitfld.byte 0x0c 2.--3. " SI_SELB ,Datapath shift in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0c 0.--1. " SI_SELA ,Datapath shift in source select" "Default,Registered,Route,Chain" line.byte 0x0d "CFG13,Datapath Static Configuration" bitfld.byte 0x0d 6.--7. " CMP_SELB ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" bitfld.byte 0x0d 4.--5. " CMP_SELA ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" textline " " bitfld.byte 0x0d 2.--3. " CI_SELB ,Datapath carry in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0d 0.--1. " CI_SELA ,Datapath carry in source select" "Default,Registered,Route,Chain" line.byte 0x0e "CFG14,Datapath Static Configuration" bitfld.byte 0x0e 7. " MSB_EN ,Datapath MSB selection enable" "Disabled,Enabled" bitfld.byte 0x0e 4.--6. " MSB_SEL ,Datapath MSB Selection" "Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7" textline " " bitfld.byte 0x0e 3. " CHAIN_CMSB ,Datapath CRC MSB chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 2. " CHAIN_FB ,Datapath CRC feedback chaining enable" "Disabled,Enabled" textline " " bitfld.byte 0x0e 1. " CHAIN1 ,Datapath condition chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 0. " CHAIN0 ,Datapath condition chaining enable" "Disabled,Enabled" line.byte 0x0f "CFG15,Datapath Static Configuration" bitfld.byte 0x0f 7. " PI_SEL ,Datapath parallel input selection" "Normal,Parallel" bitfld.byte 0x0f 6. " SHIFT_SEL ,Datapath shift out selection" "SOL_MSB,SOR" textline " " bitfld.byte 0x0f 5. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x0f 4. " NC0 ,Spare register bit" "0,1" textline " " bitfld.byte 0x0f 2.--3. " F1_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" bitfld.byte 0x0f 0.--1. " F0_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" line.byte 0x10 "CFG16,Datapath Static Configuration" bitfld.byte 0x10 7. " F1_CK_INV ,FIFO Clock Invert" "Normal,Inverted" bitfld.byte 0x10 6. " F0_CK_INV ,FIFO Clock Invert" "Normal,Inverted" textline " " bitfld.byte 0x10 5. " FIFO_FAST ,FIFO Fast Mode" "Disabled,Enabled" bitfld.byte 0x10 4. " FIFO_CAP ,FIFO Software Capture Mode" "Disabled,Enabled" textline " " bitfld.byte 0x10 3. " FIFO_EDGE ,Edge/level sensitive FIFO write control" "Level,Edge" bitfld.byte 0x10 2. " FIFO_ASYNC ,Asynchronous FIFO clocking support" "Synchronous,Asynchronous" textline " " bitfld.byte 0x10 1. " EXT_CRCPRS ,External CRC/PRS mode" "Internal,External" bitfld.byte 0x10 0. " WRK16_CONCAT ,Datapath register access mode" "Default,Concatenate" group.byte (0x30+0x24)++0x03 line.byte 0x00 "CFG20,Status input mode selection" line.byte 0x01 "CFG21,Spare register bits" bitfld.byte 0x01 1. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x01 0. " NC0 ,Spare register bit" "0,1" line.byte 0x02 "CFG22,Status Output Control" bitfld.byte 0x02 3. " SC_SYNC_MD ,SC Sync Mode" "Disabled,Enabled" bitfld.byte 0x02 2. " SC_INT_MD ,SC Interrupt Mode" "Normal,INT_MODE" textline " " bitfld.byte 0x02 0.--1. " SC_OUT_CTL ,Selects the output source for the Status and Control routing connections" "Control,Parallel,Counter,?..." line.byte 0x03 "CFG23,Counter Routing Control" bitfld.byte 0x03 5. " ROUTE_EN ,Configure the counter enable signal for routing input" "Disabled,Enabled" bitfld.byte 0x03 4. " ROUTE_LD ,Configure the counter load signal for routing input" "Disabled,Enabled" textline " " bitfld.byte 0x03 2.--3. " CNT_EN_SEL ,Selects the routing inputs for the counter enable signal" "SC_IN4,SC_IN5,SC_IN6,SC_IO" bitfld.byte 0x03 0.--1. " CNT_LD_SEL ,Selects the routing inputs for the counter load signal" "SC_IN0,SC_IN1,SC_IN2,SC_IN3" group.byte (0x30+0x28)++0x00 line.byte 0x00 "CFG24,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x29)++0x00 line.byte 0x00 "CFG25,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2A)++0x00 line.byte 0x00 "CFG26,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2B)++0x00 line.byte 0x00 "CFG27,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2C)++0x03 line.byte 0x00 "CFG28,Clock Selection" bitfld.byte 0x00 4.--7. " PLD1_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x00 0.--3. " PLD0_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x01 "CFG29,Clock Selection" bitfld.byte 0x01 4.--7. " SC_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x01 0.--3. " DP_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x02 "CFG30,Reset Selection Register" bitfld.byte 0x02 4. " GUDB_WR ,Enable global write operation for the configuration and working registers in this UDB" "Disabled,Enabled" bitfld.byte 0x02 3. " EN_RES_CNT ,Enable routed reset to counter/control register" "Disabled,Enabled" textline " " bitfld.byte 0x02 2. " RES_POL ,Select polarity of the routed reset control" "Not inverted,Inverted" bitfld.byte 0x02 0.--1. " RES_SEL ,Select routing input for routed reset control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" line.byte 0x03 "CFG31,Reset and Clock Input Enable" bitfld.byte 0x03 4.--5. " EXT_CK_SEL ,External clock selection" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" bitfld.byte 0x03 1. " EXT_SYNC ,Enable synchronization of selected external clock" "Disabled,Enabled" textline " " bitfld.byte 0x03 0. " NC0 ,Spare register bit" "0,1" group.word 0x60++0x01 line.word 0x00 "DCFG0,Dynamic Configuration RAM Register 0" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x62++0x01 line.word 0x00 "DCFG1,Dynamic Configuration RAM Register 1" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x64++0x01 line.word 0x00 "DCFG2,Dynamic Configuration RAM Register 2" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x66++0x01 line.word 0x00 "DCFG3,Dynamic Configuration RAM Register 3" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x68++0x01 line.word 0x00 "DCFG4,Dynamic Configuration RAM Register 4" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6A++0x01 line.word 0x00 "DCFG5,Dynamic Configuration RAM Register 5" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6C++0x01 line.word 0x00 "DCFG6,Dynamic Configuration RAM Register 6" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6E++0x01 line.word 0x00 "DCFG7,Dynamic Configuration RAM Register 7" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" width 0x0B tree.end tree "U 1" width 18. group.long 0x80++0x03 line.long 0x00 "PLD_IT0,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT0C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT0C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x84++0x03 line.long 0x00 "PLD_IT1,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT1C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT1C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x88++0x03 line.long 0x00 "PLD_IT2,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT2C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT2C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x8C++0x03 line.long 0x00 "PLD_IT3,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT3C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT3C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x90++0x03 line.long 0x00 "PLD_IT4,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT4C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT4C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x94++0x03 line.long 0x00 "PLD_IT5,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT5C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT5C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x98++0x03 line.long 0x00 "PLD_IT6,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT6C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT6C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x9C++0x03 line.long 0x00 "PLD_IT7,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT7C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT7C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA0++0x03 line.long 0x00 "PLD_IT8,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT8C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT8C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA4++0x03 line.long 0x00 "PLD_IT9,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT9C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT9C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA8++0x03 line.long 0x00 "PLD_IT10,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT10C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT10C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xAC++0x03 line.long 0x00 "PLD_IT11,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " group.word 0xB0++0x01 line.word 0x00 "PLD_ORT0,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT0_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT0_0 ,OR term" "Not OR,OR" group.word 0xB2++0x01 line.word 0x00 "PLD_ORT1,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT1_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT1_0 ,OR term" "Not OR,OR" group.word 0xB4++0x01 line.word 0x00 "PLD_ORT2,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT2_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT2_0 ,OR term" "Not OR,OR" group.word 0xB6++0x01 line.word 0x00 "PLD_ORT3,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " group.word (0xB0+0x08)++0x07 line.word 0x00 "MC_CFG_CEN_CONST,Macrocell Configuration for Carry Enable and Constant" bitfld.word 0x00 15. " PLD1_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 14. " PLD1_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 13. " PLD1_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 12. " PLD1_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " PLD1_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 10. " PLD1_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " PLD1_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 8. " PLD1_MC0_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " PLD0_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 6. " PLD0_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " PLD0_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 4. " PLD0_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " PLD0_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 2. " PLD0_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " PLD0_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 0. " PLD0_MC0_CEN ,Carry enable" "Disabled,Enabled" line.word 0x02 "MC_CFG_XORFB,Macrocell Configuration for XOR Feedback" bitfld.word 0x02 14.--15. " PLD1_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 12.--13. " PLD1_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 10.--11. " PLD1_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 8.--9. " PLD1_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 6.--7. " PLD0_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 4.--5. " PLD0_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 2.--3. " PLD0_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 0.--1. " PLD0_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" line.word 0x04 "MC_CFG_SET_RESET,Macrocell Configuration for Set and Reset" bitfld.word 0x04 15. " PLD1_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 14. " PLD1_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 13. " PLD1_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 12. " PLD1_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 11. " PLD1_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 10. " PLD1_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 9. " PLD1_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 8. " PLD1_MC0_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 7. " PLD0_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 6. " PLD0_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 5. " PLD0_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 4. " PLD0_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 3. " PLD0_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 2. " PLD0_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 1. " PLD0_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 0. " PLD0_MC0_SET_SEL ,Set select enable" "Not set,Set" line.word 0x06 "MC_CFG_BYPASS,Macrocell Configuration for Bypass" bitfld.word 0x06 14. " PLD1_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 12. " PLD1_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 10. " PLD1_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 8. " PLD1_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 6. " PLD0_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 4. " PLD0_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 2. " PLD0_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 0. " PLD0_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " group.byte (0xB0+0x10)++0x10 line.byte 0x00 "CFG0,Datapath Input Selection" bitfld.byte 0x00 4.--6. " RAD1 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x00 0.--2. " RAD0 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x01 "CFG1,Datapath Input Selection" bitfld.byte 0x01 0.--2. " RAD2 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x02 "CFG2,Datapath Input Selection" bitfld.byte 0x02 4.--6. " F1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x02 0.--2. " F0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x03 "CFG3,Datapath Input Selection" bitfld.byte 0x03 4.--6. " D1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x03 0.--2. " D0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x04 "CFG4,Datapath Input Selection" bitfld.byte 0x04 4.--6. " CI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x04 0.--2. " SI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x05 "CFG5,Datapath Output Selection" bitfld.byte 0x05 4.--7. " OUT1 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x05 0.--3. " OUT0 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x06 "CFG6,Datapath Output Selection" bitfld.byte 0x06 4.--7. " OUT3 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x06 0.--3. " OUT2 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x07 "CFG7,Datapath Output Selection" bitfld.byte 0x07 4.--7. " OUT5 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x07 0.--3. " OUT4 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x08 "CFG8,Datapath Output Synchronization" hexmask.byte 0x08 0.--5. 1. " OUT_SYNC ,Output Synchronization field" line.byte 0x09 "CFG9,ALU Mask" line.byte 0x0a "CFG10,Compare 0 Mask" line.byte 0x0b "CFG11,Compare 1 Mask" line.byte 0x0c "CFG12,Datapath Static Configuration" bitfld.byte 0x0c 7. " CMASK1_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 6. " CMASK0_EN ,Datapath mask enable" "Disabled,Enabled" textline " " bitfld.byte 0x0c 5. " AMASK_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 4. " DEF_SI ,Datapath default shift value" "0,1" textline " " bitfld.byte 0x0c 2.--3. " SI_SELB ,Datapath shift in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0c 0.--1. " SI_SELA ,Datapath shift in source select" "Default,Registered,Route,Chain" line.byte 0x0d "CFG13,Datapath Static Configuration" bitfld.byte 0x0d 6.--7. " CMP_SELB ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" bitfld.byte 0x0d 4.--5. " CMP_SELA ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" textline " " bitfld.byte 0x0d 2.--3. " CI_SELB ,Datapath carry in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0d 0.--1. " CI_SELA ,Datapath carry in source select" "Default,Registered,Route,Chain" line.byte 0x0e "CFG14,Datapath Static Configuration" bitfld.byte 0x0e 7. " MSB_EN ,Datapath MSB selection enable" "Disabled,Enabled" bitfld.byte 0x0e 4.--6. " MSB_SEL ,Datapath MSB Selection" "Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7" textline " " bitfld.byte 0x0e 3. " CHAIN_CMSB ,Datapath CRC MSB chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 2. " CHAIN_FB ,Datapath CRC feedback chaining enable" "Disabled,Enabled" textline " " bitfld.byte 0x0e 1. " CHAIN1 ,Datapath condition chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 0. " CHAIN0 ,Datapath condition chaining enable" "Disabled,Enabled" line.byte 0x0f "CFG15,Datapath Static Configuration" bitfld.byte 0x0f 7. " PI_SEL ,Datapath parallel input selection" "Normal,Parallel" bitfld.byte 0x0f 6. " SHIFT_SEL ,Datapath shift out selection" "SOL_MSB,SOR" textline " " bitfld.byte 0x0f 5. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x0f 4. " NC0 ,Spare register bit" "0,1" textline " " bitfld.byte 0x0f 2.--3. " F1_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" bitfld.byte 0x0f 0.--1. " F0_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" line.byte 0x10 "CFG16,Datapath Static Configuration" bitfld.byte 0x10 7. " F1_CK_INV ,FIFO Clock Invert" "Normal,Inverted" bitfld.byte 0x10 6. " F0_CK_INV ,FIFO Clock Invert" "Normal,Inverted" textline " " bitfld.byte 0x10 5. " FIFO_FAST ,FIFO Fast Mode" "Disabled,Enabled" bitfld.byte 0x10 4. " FIFO_CAP ,FIFO Software Capture Mode" "Disabled,Enabled" textline " " bitfld.byte 0x10 3. " FIFO_EDGE ,Edge/level sensitive FIFO write control" "Level,Edge" bitfld.byte 0x10 2. " FIFO_ASYNC ,Asynchronous FIFO clocking support" "Synchronous,Asynchronous" textline " " bitfld.byte 0x10 1. " EXT_CRCPRS ,External CRC/PRS mode" "Internal,External" bitfld.byte 0x10 0. " WRK16_CONCAT ,Datapath register access mode" "Default,Concatenate" group.byte (0xB0+0x24)++0x03 line.byte 0x00 "CFG20,Status input mode selection" line.byte 0x01 "CFG21,Spare register bits" bitfld.byte 0x01 1. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x01 0. " NC0 ,Spare register bit" "0,1" line.byte 0x02 "CFG22,Status Output Control" bitfld.byte 0x02 3. " SC_SYNC_MD ,SC Sync Mode" "Disabled,Enabled" bitfld.byte 0x02 2. " SC_INT_MD ,SC Interrupt Mode" "Normal,INT_MODE" textline " " bitfld.byte 0x02 0.--1. " SC_OUT_CTL ,Selects the output source for the Status and Control routing connections" "Control,Parallel,Counter,?..." line.byte 0x03 "CFG23,Counter Routing Control" bitfld.byte 0x03 5. " ROUTE_EN ,Configure the counter enable signal for routing input" "Disabled,Enabled" bitfld.byte 0x03 4. " ROUTE_LD ,Configure the counter load signal for routing input" "Disabled,Enabled" textline " " bitfld.byte 0x03 2.--3. " CNT_EN_SEL ,Selects the routing inputs for the counter enable signal" "SC_IN4,SC_IN5,SC_IN6,SC_IO" bitfld.byte 0x03 0.--1. " CNT_LD_SEL ,Selects the routing inputs for the counter load signal" "SC_IN0,SC_IN1,SC_IN2,SC_IN3" group.byte (0xB0+0x28)++0x00 line.byte 0x00 "CFG24,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x29)++0x00 line.byte 0x00 "CFG25,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2A)++0x00 line.byte 0x00 "CFG26,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2B)++0x00 line.byte 0x00 "CFG27,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2C)++0x03 line.byte 0x00 "CFG28,Clock Selection" bitfld.byte 0x00 4.--7. " PLD1_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x00 0.--3. " PLD0_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x01 "CFG29,Clock Selection" bitfld.byte 0x01 4.--7. " SC_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x01 0.--3. " DP_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x02 "CFG30,Reset Selection Register" bitfld.byte 0x02 4. " GUDB_WR ,Enable global write operation for the configuration and working registers in this UDB" "Disabled,Enabled" bitfld.byte 0x02 3. " EN_RES_CNT ,Enable routed reset to counter/control register" "Disabled,Enabled" textline " " bitfld.byte 0x02 2. " RES_POL ,Select polarity of the routed reset control" "Not inverted,Inverted" bitfld.byte 0x02 0.--1. " RES_SEL ,Select routing input for routed reset control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" line.byte 0x03 "CFG31,Reset and Clock Input Enable" bitfld.byte 0x03 4.--5. " EXT_CK_SEL ,External clock selection" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" bitfld.byte 0x03 1. " EXT_SYNC ,Enable synchronization of selected external clock" "Disabled,Enabled" textline " " bitfld.byte 0x03 0. " NC0 ,Spare register bit" "0,1" group.word 0xE0++0x01 line.word 0x00 "DCFG0,Dynamic Configuration RAM Register 0" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE2++0x01 line.word 0x00 "DCFG1,Dynamic Configuration RAM Register 1" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE4++0x01 line.word 0x00 "DCFG2,Dynamic Configuration RAM Register 2" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE6++0x01 line.word 0x00 "DCFG3,Dynamic Configuration RAM Register 3" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE8++0x01 line.word 0x00 "DCFG4,Dynamic Configuration RAM Register 4" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEA++0x01 line.word 0x00 "DCFG5,Dynamic Configuration RAM Register 5" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEC++0x01 line.word 0x00 "DCFG6,Dynamic Configuration RAM Register 6" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEE++0x01 line.word 0x00 "DCFG7,Dynamic Configuration RAM Register 7" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" width 0x0B tree.end tree "Route" width 9. group.byte 0x100++0x00 line.byte 0x00 "HC0,UDB Channel HC Tile Configuration" group.byte 0x101++0x00 line.byte 0x00 "HC1,UDB Channel HC Tile Configuration" group.byte 0x102++0x00 line.byte 0x00 "HC2,UDB Channel HC Tile Configuration" group.byte 0x103++0x00 line.byte 0x00 "HC3,UDB Channel HC Tile Configuration" group.byte 0x104++0x00 line.byte 0x00 "HC4,UDB Channel HC Tile Configuration" group.byte 0x105++0x00 line.byte 0x00 "HC5,UDB Channel HC Tile Configuration" group.byte 0x106++0x00 line.byte 0x00 "HC6,UDB Channel HC Tile Configuration" group.byte 0x107++0x00 line.byte 0x00 "HC7,UDB Channel HC Tile Configuration" group.byte 0x108++0x00 line.byte 0x00 "HC8,UDB Channel HC Tile Configuration" group.byte 0x109++0x00 line.byte 0x00 "HC9,UDB Channel HC Tile Configuration" group.byte 0x10A++0x00 line.byte 0x00 "HC10,UDB Channel HC Tile Configuration" group.byte 0x10B++0x00 line.byte 0x00 "HC11,UDB Channel HC Tile Configuration" group.byte 0x10C++0x00 line.byte 0x00 "HC12,UDB Channel HC Tile Configuration" group.byte 0x10D++0x00 line.byte 0x00 "HC13,UDB Channel HC Tile Configuration" group.byte 0x10E++0x00 line.byte 0x00 "HC14,UDB Channel HC Tile Configuration" group.byte 0x10F++0x00 line.byte 0x00 "HC15,UDB Channel HC Tile Configuration" group.byte 0x110++0x00 line.byte 0x00 "HC16,UDB Channel HC Tile Configuration" group.byte 0x111++0x00 line.byte 0x00 "HC17,UDB Channel HC Tile Configuration" group.byte 0x112++0x00 line.byte 0x00 "HC18,UDB Channel HC Tile Configuration" group.byte 0x113++0x00 line.byte 0x00 "HC19,UDB Channel HC Tile Configuration" group.byte 0x114++0x00 line.byte 0x00 "HC20,UDB Channel HC Tile Configuration" group.byte 0x115++0x00 line.byte 0x00 "HC21,UDB Channel HC Tile Configuration" group.byte 0x116++0x00 line.byte 0x00 "HC22,UDB Channel HC Tile Configuration" group.byte 0x117++0x00 line.byte 0x00 "HC23,UDB Channel HC Tile Configuration" group.byte 0x118++0x00 line.byte 0x00 "HC24,UDB Channel HC Tile Configuration" group.byte 0x119++0x00 line.byte 0x00 "HC25,UDB Channel HC Tile Configuration" group.byte 0x11A++0x00 line.byte 0x00 "HC26,UDB Channel HC Tile Configuration" group.byte 0x11B++0x00 line.byte 0x00 "HC27,UDB Channel HC Tile Configuration" group.byte 0x11C++0x00 line.byte 0x00 "HC28,UDB Channel HC Tile Configuration" group.byte 0x11D++0x00 line.byte 0x00 "HC29,UDB Channel HC Tile Configuration" group.byte 0x11E++0x00 line.byte 0x00 "HC30,UDB Channel HC Tile Configuration" group.byte 0x11F++0x00 line.byte 0x00 "HC31,UDB Channel HC Tile Configuration" group.byte 0x120++0x00 line.byte 0x00 "HC32,UDB Channel HC Tile Configuration" group.byte 0x121++0x00 line.byte 0x00 "HC33,UDB Channel HC Tile Configuration" group.byte 0x122++0x00 line.byte 0x00 "HC34,UDB Channel HC Tile Configuration" group.byte 0x123++0x00 line.byte 0x00 "HC35,UDB Channel HC Tile Configuration" group.byte 0x124++0x00 line.byte 0x00 "HC36,UDB Channel HC Tile Configuration" group.byte 0x125++0x00 line.byte 0x00 "HC37,UDB Channel HC Tile Configuration" group.byte 0x126++0x00 line.byte 0x00 "HC38,UDB Channel HC Tile Configuration" group.byte 0x127++0x00 line.byte 0x00 "HC39,UDB Channel HC Tile Configuration" group.byte 0x128++0x00 line.byte 0x00 "HC40,UDB Channel HC Tile Configuration" group.byte 0x129++0x00 line.byte 0x00 "HC41,UDB Channel HC Tile Configuration" group.byte 0x12A++0x00 line.byte 0x00 "HC42,UDB Channel HC Tile Configuration" group.byte 0x12B++0x00 line.byte 0x00 "HC43,UDB Channel HC Tile Configuration" group.byte 0x12C++0x00 line.byte 0x00 "HC44,UDB Channel HC Tile Configuration" group.byte 0x12D++0x00 line.byte 0x00 "HC45,UDB Channel HC Tile Configuration" group.byte 0x12E++0x00 line.byte 0x00 "HC46,UDB Channel HC Tile Configuration" group.byte 0x12F++0x00 line.byte 0x00 "HC47,UDB Channel HC Tile Configuration" group.byte 0x130++0x00 line.byte 0x00 "HC48,UDB Channel HC Tile Configuration" group.byte 0x131++0x00 line.byte 0x00 "HC49,UDB Channel HC Tile Configuration" group.byte 0x132++0x00 line.byte 0x00 "HC50,UDB Channel HC Tile Configuration" group.byte 0x133++0x00 line.byte 0x00 "HC51,UDB Channel HC Tile Configuration" group.byte 0x134++0x00 line.byte 0x00 "HC52,UDB Channel HC Tile Configuration" group.byte 0x135++0x00 line.byte 0x00 "HC53,UDB Channel HC Tile Configuration" group.byte 0x136++0x00 line.byte 0x00 "HC54,UDB Channel HC Tile Configuration" group.byte 0x137++0x00 line.byte 0x00 "HC55,UDB Channel HC Tile Configuration" group.byte 0x138++0x00 line.byte 0x00 "HC56,UDB Channel HC Tile Configuration" group.byte 0x139++0x00 line.byte 0x00 "HC57,UDB Channel HC Tile Configuration" group.byte 0x13A++0x00 line.byte 0x00 "HC58,UDB Channel HC Tile Configuration" group.byte 0x13B++0x00 line.byte 0x00 "HC59,UDB Channel HC Tile Configuration" group.byte 0x13C++0x00 line.byte 0x00 "HC60,UDB Channel HC Tile Configuration" group.byte 0x13D++0x00 line.byte 0x00 "HC61,UDB Channel HC Tile Configuration" group.byte 0x13E++0x00 line.byte 0x00 "HC62,UDB Channel HC Tile Configuration" group.byte 0x13F++0x00 line.byte 0x00 "HC63,UDB Channel HC Tile Configuration" group.byte 0x140++0x00 line.byte 0x00 "HC64,UDB Channel HC Tile Configuration" group.byte 0x141++0x00 line.byte 0x00 "HC65,UDB Channel HC Tile Configuration" group.byte 0x142++0x00 line.byte 0x00 "HC66,UDB Channel HC Tile Configuration" group.byte 0x143++0x00 line.byte 0x00 "HC67,UDB Channel HC Tile Configuration" group.byte 0x144++0x00 line.byte 0x00 "HC68,UDB Channel HC Tile Configuration" group.byte 0x145++0x00 line.byte 0x00 "HC69,UDB Channel HC Tile Configuration" group.byte 0x146++0x00 line.byte 0x00 "HC70,UDB Channel HC Tile Configuration" group.byte 0x147++0x00 line.byte 0x00 "HC71,UDB Channel HC Tile Configuration" group.byte 0x148++0x00 line.byte 0x00 "HC72,UDB Channel HC Tile Configuration" group.byte 0x149++0x00 line.byte 0x00 "HC73,UDB Channel HC Tile Configuration" group.byte 0x14A++0x00 line.byte 0x00 "HC74,UDB Channel HC Tile Configuration" group.byte 0x14B++0x00 line.byte 0x00 "HC75,UDB Channel HC Tile Configuration" group.byte 0x14C++0x00 line.byte 0x00 "HC76,UDB Channel HC Tile Configuration" group.byte 0x14D++0x00 line.byte 0x00 "HC77,UDB Channel HC Tile Configuration" group.byte 0x14E++0x00 line.byte 0x00 "HC78,UDB Channel HC Tile Configuration" group.byte 0x14F++0x00 line.byte 0x00 "HC79,UDB Channel HC Tile Configuration" group.byte 0x150++0x00 line.byte 0x00 "HC80,UDB Channel HC Tile Configuration" group.byte 0x151++0x00 line.byte 0x00 "HC81,UDB Channel HC Tile Configuration" group.byte 0x152++0x00 line.byte 0x00 "HC82,UDB Channel HC Tile Configuration" group.byte 0x153++0x00 line.byte 0x00 "HC83,UDB Channel HC Tile Configuration" group.byte 0x154++0x00 line.byte 0x00 "HC84,UDB Channel HC Tile Configuration" group.byte 0x155++0x00 line.byte 0x00 "HC85,UDB Channel HC Tile Configuration" group.byte 0x156++0x00 line.byte 0x00 "HC86,UDB Channel HC Tile Configuration" group.byte 0x157++0x00 line.byte 0x00 "HC87,UDB Channel HC Tile Configuration" group.byte 0x158++0x00 line.byte 0x00 "HC88,UDB Channel HC Tile Configuration" group.byte 0x159++0x00 line.byte 0x00 "HC89,UDB Channel HC Tile Configuration" group.byte 0x15A++0x00 line.byte 0x00 "HC90,UDB Channel HC Tile Configuration" group.byte 0x15B++0x00 line.byte 0x00 "HC91,UDB Channel HC Tile Configuration" group.byte 0x15C++0x00 line.byte 0x00 "HC92,UDB Channel HC Tile Configuration" group.byte 0x15D++0x00 line.byte 0x00 "HC93,UDB Channel HC Tile Configuration" group.byte 0x15E++0x00 line.byte 0x00 "HC94,UDB Channel HC Tile Configuration" group.byte 0x15F++0x00 line.byte 0x00 "HC95,UDB Channel HC Tile Configuration" group.byte 0x160++0x00 line.byte 0x00 "HC96,UDB Channel HC Tile Configuration" group.byte 0x161++0x00 line.byte 0x00 "HC97,UDB Channel HC Tile Configuration" group.byte 0x162++0x00 line.byte 0x00 "HC98,UDB Channel HC Tile Configuration" group.byte 0x163++0x00 line.byte 0x00 "HC99,UDB Channel HC Tile Configuration" group.byte 0x164++0x00 line.byte 0x00 "HC100,UDB Channel HC Tile Configuration" group.byte 0x165++0x00 line.byte 0x00 "HC101,UDB Channel HC Tile Configuration" group.byte 0x166++0x00 line.byte 0x00 "HC102,UDB Channel HC Tile Configuration" group.byte 0x167++0x00 line.byte 0x00 "HC103,UDB Channel HC Tile Configuration" group.byte 0x168++0x00 line.byte 0x00 "HC104,UDB Channel HC Tile Configuration" group.byte 0x169++0x00 line.byte 0x00 "HC105,UDB Channel HC Tile Configuration" group.byte 0x16A++0x00 line.byte 0x00 "HC106,UDB Channel HC Tile Configuration" group.byte 0x16B++0x00 line.byte 0x00 "HC107,UDB Channel HC Tile Configuration" group.byte 0x16C++0x00 line.byte 0x00 "HC108,UDB Channel HC Tile Configuration" group.byte 0x16D++0x00 line.byte 0x00 "HC109,UDB Channel HC Tile Configuration" group.byte 0x16E++0x00 line.byte 0x00 "HC110,UDB Channel HC Tile Configuration" group.byte 0x16F++0x00 line.byte 0x00 "HC111,UDB Channel HC Tile Configuration" group.byte 0x170++0x00 line.byte 0x00 "HC112,UDB Channel HC Tile Configuration" group.byte 0x171++0x00 line.byte 0x00 "HC113,UDB Channel HC Tile Configuration" group.byte 0x172++0x00 line.byte 0x00 "HC114,UDB Channel HC Tile Configuration" group.byte 0x173++0x00 line.byte 0x00 "HC115,UDB Channel HC Tile Configuration" group.byte 0x174++0x00 line.byte 0x00 "HC116,UDB Channel HC Tile Configuration" group.byte 0x175++0x00 line.byte 0x00 "HC117,UDB Channel HC Tile Configuration" group.byte 0x176++0x00 line.byte 0x00 "HC118,UDB Channel HC Tile Configuration" group.byte 0x177++0x00 line.byte 0x00 "HC119,UDB Channel HC Tile Configuration" group.byte 0x178++0x00 line.byte 0x00 "HC120,UDB Channel HC Tile Configuration" group.byte 0x179++0x00 line.byte 0x00 "HC121,UDB Channel HC Tile Configuration" group.byte 0x17A++0x00 line.byte 0x00 "HC122,UDB Channel HC Tile Configuration" group.byte 0x17B++0x00 line.byte 0x00 "HC123,UDB Channel HC Tile Configuration" group.byte 0x17C++0x00 line.byte 0x00 "HC124,UDB Channel HC Tile Configuration" group.byte 0x17D++0x00 line.byte 0x00 "HC125,UDB Channel HC Tile Configuration" group.byte 0x17E++0x00 line.byte 0x00 "HC126,UDB Channel HC Tile Configuration" group.byte 0x17F++0x00 line.byte 0x00 "HC127,UDB Channel HC Tile Configuration" group.byte 0x180++0x00 line.byte 0x00 "HV_L0,UDB Channel HV Tile Configuration" group.byte 0x181++0x00 line.byte 0x00 "HV_L1,UDB Channel HV Tile Configuration" group.byte 0x182++0x00 line.byte 0x00 "HV_L2,UDB Channel HV Tile Configuration" group.byte 0x183++0x00 line.byte 0x00 "HV_L3,UDB Channel HV Tile Configuration" group.byte 0x184++0x00 line.byte 0x00 "HV_L4,UDB Channel HV Tile Configuration" group.byte 0x185++0x00 line.byte 0x00 "HV_L5,UDB Channel HV Tile Configuration" group.byte 0x186++0x00 line.byte 0x00 "HV_L6,UDB Channel HV Tile Configuration" group.byte 0x187++0x00 line.byte 0x00 "HV_L7,UDB Channel HV Tile Configuration" group.byte 0x188++0x00 line.byte 0x00 "HV_L8,UDB Channel HV Tile Configuration" group.byte 0x189++0x00 line.byte 0x00 "HV_L9,UDB Channel HV Tile Configuration" group.byte 0x18A++0x00 line.byte 0x00 "HV_L10,UDB Channel HV Tile Configuration" group.byte 0x18B++0x00 line.byte 0x00 "HV_L11,UDB Channel HV Tile Configuration" group.byte 0x18C++0x00 line.byte 0x00 "HV_L12,UDB Channel HV Tile Configuration" group.byte 0x18D++0x00 line.byte 0x00 "HV_L13,UDB Channel HV Tile Configuration" group.byte 0x18E++0x00 line.byte 0x00 "HV_L14,UDB Channel HV Tile Configuration" group.byte 0x18F++0x00 line.byte 0x00 "HV_L15,UDB Channel HV Tile Configuration" group.byte 0x190++0x00 line.byte 0x00 "HS0,UDB Channel HS Tile Configuration" group.byte 0x191++0x00 line.byte 0x00 "HS1,UDB Channel HS Tile Configuration" group.byte 0x192++0x00 line.byte 0x00 "HS2,UDB Channel HS Tile Configuration" group.byte 0x193++0x00 line.byte 0x00 "HS3,UDB Channel HS Tile Configuration" group.byte 0x194++0x00 line.byte 0x00 "HS4,UDB Channel HS Tile Configuration" group.byte 0x195++0x00 line.byte 0x00 "HS5,UDB Channel HS Tile Configuration" group.byte 0x196++0x00 line.byte 0x00 "HS6,UDB Channel HS Tile Configuration" group.byte 0x197++0x00 line.byte 0x00 "HS7,UDB Channel HS Tile Configuration" group.byte 0x198++0x00 line.byte 0x00 "HS8,UDB Channel HS Tile Configuration" group.byte 0x199++0x00 line.byte 0x00 "HS9,UDB Channel HS Tile Configuration" group.byte 0x19A++0x00 line.byte 0x00 "HS10,UDB Channel HS Tile Configuration" group.byte 0x19B++0x00 line.byte 0x00 "HS11,UDB Channel HS Tile Configuration" group.byte 0x19C++0x00 line.byte 0x00 "HS12,UDB Channel HS Tile Configuration" group.byte 0x19D++0x00 line.byte 0x00 "HS13,UDB Channel HS Tile Configuration" group.byte 0x19E++0x00 line.byte 0x00 "HS14,UDB Channel HS Tile Configuration" group.byte 0x19F++0x00 line.byte 0x00 "HS15,UDB Channel HS Tile Configuration" group.byte 0x1A0++0x00 line.byte 0x00 "HS16,UDB Channel HS Tile Configuration" group.byte 0x1A1++0x00 line.byte 0x00 "HS17,UDB Channel HS Tile Configuration" group.byte 0x1A2++0x00 line.byte 0x00 "HS18,UDB Channel HS Tile Configuration" group.byte 0x1A3++0x00 line.byte 0x00 "HS19,UDB Channel HS Tile Configuration" group.byte 0x1A4++0x00 line.byte 0x00 "HS20,UDB Channel HS Tile Configuration" group.byte 0x1A5++0x00 line.byte 0x00 "HS21,UDB Channel HS Tile Configuration" group.byte 0x1A6++0x00 line.byte 0x00 "HS22,UDB Channel HS Tile Configuration" group.byte 0x1A7++0x00 line.byte 0x00 "HS23,UDB Channel HS Tile Configuration" group.byte 0x1A8++0x00 line.byte 0x00 "HV_R0,UDB Channel HV Tile Configuration" group.byte 0x1A9++0x00 line.byte 0x00 "HV_R1,UDB Channel HV Tile Configuration" group.byte 0x1AA++0x00 line.byte 0x00 "HV_R2,UDB Channel HV Tile Configuration" group.byte 0x1AB++0x00 line.byte 0x00 "HV_R3,UDB Channel HV Tile Configuration" group.byte 0x1AC++0x00 line.byte 0x00 "HV_R4,UDB Channel HV Tile Configuration" group.byte 0x1AD++0x00 line.byte 0x00 "HV_R5,UDB Channel HV Tile Configuration" group.byte 0x1AE++0x00 line.byte 0x00 "HV_R6,UDB Channel HV Tile Configuration" group.byte 0x1AF++0x00 line.byte 0x00 "HV_R7,UDB Channel HV Tile Configuration" group.byte 0x1B0++0x00 line.byte 0x00 "HV_R8,UDB Channel HV Tile Configuration" group.byte 0x1B1++0x00 line.byte 0x00 "HV_R9,UDB Channel HV Tile Configuration" group.byte 0x1B2++0x00 line.byte 0x00 "HV_R10,UDB Channel HV Tile Configuration" group.byte 0x1B3++0x00 line.byte 0x00 "HV_R11,UDB Channel HV Tile Configuration" group.byte 0x1B4++0x00 line.byte 0x00 "HV_R12,UDB Channel HV Tile Configuration" group.byte 0x1B5++0x00 line.byte 0x00 "HV_R13,UDB Channel HV Tile Configuration" group.byte 0x1B6++0x00 line.byte 0x00 "HV_R14,UDB Channel HV Tile Configuration" group.byte 0x1B7++0x00 line.byte 0x00 "HV_R15,UDB Channel HV Tile Configuration" group.byte 0x1C0++0x00 line.byte 0x00 "PLD0IN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1C2++0x00 line.byte 0x00 "PLD0IN1,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1C4++0x00 line.byte 0x00 "PLD0IN2,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CA++0x00 line.byte 0x00 "PLD1IN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CC++0x00 line.byte 0x00 "PLD1IN1,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CE++0x00 line.byte 0x00 "PLD1IN2,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d0++0x00 line.byte 0x00 "DPIN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d2++0x00 line.byte 0x00 "DPIN1,UDB Channel PI Tile Configuration (half populated)" hexmask.byte 0x00 4.--5. 1. " PI_BOT ,RAM configuration for BOTTOM UDB port interface configuration" hexmask.byte 0x00 2.--3. 1. " PI_TOP ,RAM configuration for TOP UDB port interface configuration" group.byte 0x1d6++0x00 line.byte 0x00 "SCIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d8++0x00 line.byte 0x00 "SCIOIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1de++0x00 line.byte 0x00 "RCIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1E0++0x00 line.byte 0x00 "VS0,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E2++0x00 line.byte 0x00 "VS1,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E4++0x00 line.byte 0x00 "VS2,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E6++0x00 line.byte 0x00 "VS3,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E8++0x00 line.byte 0x00 "VS4,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EA++0x00 line.byte 0x00 "VS5,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EC++0x00 line.byte 0x00 "VS6,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EE++0x00 line.byte 0x00 "VS7,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" width 0x0B tree.end tree.end base ad:(0x40010000+0x600) tree "P 3" tree "U 0" width 18. group.long 0x0++0x03 line.long 0x00 "PLD_IT0,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT0C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT0C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x4++0x03 line.long 0x00 "PLD_IT1,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT1C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT1C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x8++0x03 line.long 0x00 "PLD_IT2,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT2C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT2C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xC++0x03 line.long 0x00 "PLD_IT3,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT3C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT3C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x10++0x03 line.long 0x00 "PLD_IT4,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT4C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT4C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x14++0x03 line.long 0x00 "PLD_IT5,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT5C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT5C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x18++0x03 line.long 0x00 "PLD_IT6,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT6C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT6C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x1C++0x03 line.long 0x00 "PLD_IT7,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT7C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT7C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x20++0x03 line.long 0x00 "PLD_IT8,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT8C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT8C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x24++0x03 line.long 0x00 "PLD_IT9,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT9C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT9C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x28++0x03 line.long 0x00 "PLD_IT10,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT10C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT10C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x2C++0x03 line.long 0x00 "PLD_IT11,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " group.word 0x30++0x01 line.word 0x00 "PLD_ORT0,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT0_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT0_0 ,OR term" "Not OR,OR" group.word 0x32++0x01 line.word 0x00 "PLD_ORT1,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT1_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT1_0 ,OR term" "Not OR,OR" group.word 0x34++0x01 line.word 0x00 "PLD_ORT2,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT2_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT2_0 ,OR term" "Not OR,OR" group.word 0x36++0x01 line.word 0x00 "PLD_ORT3,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " group.word (0x30+0x08)++0x07 line.word 0x00 "MC_CFG_CEN_CONST,Macrocell Configuration for Carry Enable and Constant" bitfld.word 0x00 15. " PLD1_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 14. " PLD1_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 13. " PLD1_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 12. " PLD1_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " PLD1_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 10. " PLD1_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " PLD1_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 8. " PLD1_MC0_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " PLD0_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 6. " PLD0_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " PLD0_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 4. " PLD0_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " PLD0_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 2. " PLD0_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " PLD0_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 0. " PLD0_MC0_CEN ,Carry enable" "Disabled,Enabled" line.word 0x02 "MC_CFG_XORFB,Macrocell Configuration for XOR Feedback" bitfld.word 0x02 14.--15. " PLD1_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 12.--13. " PLD1_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 10.--11. " PLD1_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 8.--9. " PLD1_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 6.--7. " PLD0_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 4.--5. " PLD0_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 2.--3. " PLD0_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 0.--1. " PLD0_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" line.word 0x04 "MC_CFG_SET_RESET,Macrocell Configuration for Set and Reset" bitfld.word 0x04 15. " PLD1_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 14. " PLD1_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 13. " PLD1_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 12. " PLD1_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 11. " PLD1_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 10. " PLD1_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 9. " PLD1_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 8. " PLD1_MC0_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 7. " PLD0_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 6. " PLD0_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 5. " PLD0_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 4. " PLD0_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 3. " PLD0_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 2. " PLD0_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 1. " PLD0_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 0. " PLD0_MC0_SET_SEL ,Set select enable" "Not set,Set" line.word 0x06 "MC_CFG_BYPASS,Macrocell Configuration for Bypass" bitfld.word 0x06 14. " PLD1_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 12. " PLD1_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 10. " PLD1_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 8. " PLD1_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 6. " PLD0_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 4. " PLD0_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 2. " PLD0_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 0. " PLD0_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " group.byte (0x30+0x10)++0x10 line.byte 0x00 "CFG0,Datapath Input Selection" bitfld.byte 0x00 4.--6. " RAD1 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x00 0.--2. " RAD0 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x01 "CFG1,Datapath Input Selection" bitfld.byte 0x01 0.--2. " RAD2 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x02 "CFG2,Datapath Input Selection" bitfld.byte 0x02 4.--6. " F1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x02 0.--2. " F0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x03 "CFG3,Datapath Input Selection" bitfld.byte 0x03 4.--6. " D1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x03 0.--2. " D0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x04 "CFG4,Datapath Input Selection" bitfld.byte 0x04 4.--6. " CI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x04 0.--2. " SI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x05 "CFG5,Datapath Output Selection" bitfld.byte 0x05 4.--7. " OUT1 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x05 0.--3. " OUT0 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x06 "CFG6,Datapath Output Selection" bitfld.byte 0x06 4.--7. " OUT3 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x06 0.--3. " OUT2 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x07 "CFG7,Datapath Output Selection" bitfld.byte 0x07 4.--7. " OUT5 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x07 0.--3. " OUT4 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x08 "CFG8,Datapath Output Synchronization" hexmask.byte 0x08 0.--5. 1. " OUT_SYNC ,Output Synchronization field" line.byte 0x09 "CFG9,ALU Mask" line.byte 0x0a "CFG10,Compare 0 Mask" line.byte 0x0b "CFG11,Compare 1 Mask" line.byte 0x0c "CFG12,Datapath Static Configuration" bitfld.byte 0x0c 7. " CMASK1_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 6. " CMASK0_EN ,Datapath mask enable" "Disabled,Enabled" textline " " bitfld.byte 0x0c 5. " AMASK_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 4. " DEF_SI ,Datapath default shift value" "0,1" textline " " bitfld.byte 0x0c 2.--3. " SI_SELB ,Datapath shift in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0c 0.--1. " SI_SELA ,Datapath shift in source select" "Default,Registered,Route,Chain" line.byte 0x0d "CFG13,Datapath Static Configuration" bitfld.byte 0x0d 6.--7. " CMP_SELB ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" bitfld.byte 0x0d 4.--5. " CMP_SELA ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" textline " " bitfld.byte 0x0d 2.--3. " CI_SELB ,Datapath carry in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0d 0.--1. " CI_SELA ,Datapath carry in source select" "Default,Registered,Route,Chain" line.byte 0x0e "CFG14,Datapath Static Configuration" bitfld.byte 0x0e 7. " MSB_EN ,Datapath MSB selection enable" "Disabled,Enabled" bitfld.byte 0x0e 4.--6. " MSB_SEL ,Datapath MSB Selection" "Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7" textline " " bitfld.byte 0x0e 3. " CHAIN_CMSB ,Datapath CRC MSB chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 2. " CHAIN_FB ,Datapath CRC feedback chaining enable" "Disabled,Enabled" textline " " bitfld.byte 0x0e 1. " CHAIN1 ,Datapath condition chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 0. " CHAIN0 ,Datapath condition chaining enable" "Disabled,Enabled" line.byte 0x0f "CFG15,Datapath Static Configuration" bitfld.byte 0x0f 7. " PI_SEL ,Datapath parallel input selection" "Normal,Parallel" bitfld.byte 0x0f 6. " SHIFT_SEL ,Datapath shift out selection" "SOL_MSB,SOR" textline " " bitfld.byte 0x0f 5. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x0f 4. " NC0 ,Spare register bit" "0,1" textline " " bitfld.byte 0x0f 2.--3. " F1_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" bitfld.byte 0x0f 0.--1. " F0_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" line.byte 0x10 "CFG16,Datapath Static Configuration" bitfld.byte 0x10 7. " F1_CK_INV ,FIFO Clock Invert" "Normal,Inverted" bitfld.byte 0x10 6. " F0_CK_INV ,FIFO Clock Invert" "Normal,Inverted" textline " " bitfld.byte 0x10 5. " FIFO_FAST ,FIFO Fast Mode" "Disabled,Enabled" bitfld.byte 0x10 4. " FIFO_CAP ,FIFO Software Capture Mode" "Disabled,Enabled" textline " " bitfld.byte 0x10 3. " FIFO_EDGE ,Edge/level sensitive FIFO write control" "Level,Edge" bitfld.byte 0x10 2. " FIFO_ASYNC ,Asynchronous FIFO clocking support" "Synchronous,Asynchronous" textline " " bitfld.byte 0x10 1. " EXT_CRCPRS ,External CRC/PRS mode" "Internal,External" bitfld.byte 0x10 0. " WRK16_CONCAT ,Datapath register access mode" "Default,Concatenate" group.byte (0x30+0x24)++0x03 line.byte 0x00 "CFG20,Status input mode selection" line.byte 0x01 "CFG21,Spare register bits" bitfld.byte 0x01 1. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x01 0. " NC0 ,Spare register bit" "0,1" line.byte 0x02 "CFG22,Status Output Control" bitfld.byte 0x02 3. " SC_SYNC_MD ,SC Sync Mode" "Disabled,Enabled" bitfld.byte 0x02 2. " SC_INT_MD ,SC Interrupt Mode" "Normal,INT_MODE" textline " " bitfld.byte 0x02 0.--1. " SC_OUT_CTL ,Selects the output source for the Status and Control routing connections" "Control,Parallel,Counter,?..." line.byte 0x03 "CFG23,Counter Routing Control" bitfld.byte 0x03 5. " ROUTE_EN ,Configure the counter enable signal for routing input" "Disabled,Enabled" bitfld.byte 0x03 4. " ROUTE_LD ,Configure the counter load signal for routing input" "Disabled,Enabled" textline " " bitfld.byte 0x03 2.--3. " CNT_EN_SEL ,Selects the routing inputs for the counter enable signal" "SC_IN4,SC_IN5,SC_IN6,SC_IO" bitfld.byte 0x03 0.--1. " CNT_LD_SEL ,Selects the routing inputs for the counter load signal" "SC_IN0,SC_IN1,SC_IN2,SC_IN3" group.byte (0x30+0x28)++0x00 line.byte 0x00 "CFG24,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x29)++0x00 line.byte 0x00 "CFG25,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2A)++0x00 line.byte 0x00 "CFG26,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2B)++0x00 line.byte 0x00 "CFG27,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2C)++0x03 line.byte 0x00 "CFG28,Clock Selection" bitfld.byte 0x00 4.--7. " PLD1_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x00 0.--3. " PLD0_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x01 "CFG29,Clock Selection" bitfld.byte 0x01 4.--7. " SC_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x01 0.--3. " DP_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x02 "CFG30,Reset Selection Register" bitfld.byte 0x02 4. " GUDB_WR ,Enable global write operation for the configuration and working registers in this UDB" "Disabled,Enabled" bitfld.byte 0x02 3. " EN_RES_CNT ,Enable routed reset to counter/control register" "Disabled,Enabled" textline " " bitfld.byte 0x02 2. " RES_POL ,Select polarity of the routed reset control" "Not inverted,Inverted" bitfld.byte 0x02 0.--1. " RES_SEL ,Select routing input for routed reset control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" line.byte 0x03 "CFG31,Reset and Clock Input Enable" bitfld.byte 0x03 4.--5. " EXT_CK_SEL ,External clock selection" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" bitfld.byte 0x03 1. " EXT_SYNC ,Enable synchronization of selected external clock" "Disabled,Enabled" textline " " bitfld.byte 0x03 0. " NC0 ,Spare register bit" "0,1" group.word 0x60++0x01 line.word 0x00 "DCFG0,Dynamic Configuration RAM Register 0" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x62++0x01 line.word 0x00 "DCFG1,Dynamic Configuration RAM Register 1" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x64++0x01 line.word 0x00 "DCFG2,Dynamic Configuration RAM Register 2" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x66++0x01 line.word 0x00 "DCFG3,Dynamic Configuration RAM Register 3" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x68++0x01 line.word 0x00 "DCFG4,Dynamic Configuration RAM Register 4" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6A++0x01 line.word 0x00 "DCFG5,Dynamic Configuration RAM Register 5" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6C++0x01 line.word 0x00 "DCFG6,Dynamic Configuration RAM Register 6" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6E++0x01 line.word 0x00 "DCFG7,Dynamic Configuration RAM Register 7" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" width 0x0B tree.end tree "U 1" width 18. group.long 0x80++0x03 line.long 0x00 "PLD_IT0,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT0C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT0C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x84++0x03 line.long 0x00 "PLD_IT1,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT1C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT1C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x88++0x03 line.long 0x00 "PLD_IT2,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT2C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT2C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x8C++0x03 line.long 0x00 "PLD_IT3,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT3C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT3C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x90++0x03 line.long 0x00 "PLD_IT4,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT4C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT4C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x94++0x03 line.long 0x00 "PLD_IT5,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT5C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT5C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x98++0x03 line.long 0x00 "PLD_IT6,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT6C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT6C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x9C++0x03 line.long 0x00 "PLD_IT7,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT7C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT7C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA0++0x03 line.long 0x00 "PLD_IT8,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT8C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT8C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA4++0x03 line.long 0x00 "PLD_IT9,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT9C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT9C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA8++0x03 line.long 0x00 "PLD_IT10,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT10C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT10C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xAC++0x03 line.long 0x00 "PLD_IT11,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " group.word 0xB0++0x01 line.word 0x00 "PLD_ORT0,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT0_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT0_0 ,OR term" "Not OR,OR" group.word 0xB2++0x01 line.word 0x00 "PLD_ORT1,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT1_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT1_0 ,OR term" "Not OR,OR" group.word 0xB4++0x01 line.word 0x00 "PLD_ORT2,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT2_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT2_0 ,OR term" "Not OR,OR" group.word 0xB6++0x01 line.word 0x00 "PLD_ORT3,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " group.word (0xB0+0x08)++0x07 line.word 0x00 "MC_CFG_CEN_CONST,Macrocell Configuration for Carry Enable and Constant" bitfld.word 0x00 15. " PLD1_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 14. " PLD1_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 13. " PLD1_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 12. " PLD1_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " PLD1_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 10. " PLD1_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " PLD1_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 8. " PLD1_MC0_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " PLD0_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 6. " PLD0_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " PLD0_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 4. " PLD0_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " PLD0_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 2. " PLD0_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " PLD0_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 0. " PLD0_MC0_CEN ,Carry enable" "Disabled,Enabled" line.word 0x02 "MC_CFG_XORFB,Macrocell Configuration for XOR Feedback" bitfld.word 0x02 14.--15. " PLD1_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 12.--13. " PLD1_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 10.--11. " PLD1_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 8.--9. " PLD1_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 6.--7. " PLD0_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 4.--5. " PLD0_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 2.--3. " PLD0_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 0.--1. " PLD0_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" line.word 0x04 "MC_CFG_SET_RESET,Macrocell Configuration for Set and Reset" bitfld.word 0x04 15. " PLD1_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 14. " PLD1_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 13. " PLD1_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 12. " PLD1_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 11. " PLD1_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 10. " PLD1_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 9. " PLD1_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 8. " PLD1_MC0_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 7. " PLD0_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 6. " PLD0_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 5. " PLD0_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 4. " PLD0_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 3. " PLD0_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 2. " PLD0_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 1. " PLD0_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 0. " PLD0_MC0_SET_SEL ,Set select enable" "Not set,Set" line.word 0x06 "MC_CFG_BYPASS,Macrocell Configuration for Bypass" bitfld.word 0x06 14. " PLD1_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 12. " PLD1_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 10. " PLD1_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 8. " PLD1_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 6. " PLD0_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 4. " PLD0_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 2. " PLD0_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 0. " PLD0_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " group.byte (0xB0+0x10)++0x10 line.byte 0x00 "CFG0,Datapath Input Selection" bitfld.byte 0x00 4.--6. " RAD1 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x00 0.--2. " RAD0 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x01 "CFG1,Datapath Input Selection" bitfld.byte 0x01 0.--2. " RAD2 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x02 "CFG2,Datapath Input Selection" bitfld.byte 0x02 4.--6. " F1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x02 0.--2. " F0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x03 "CFG3,Datapath Input Selection" bitfld.byte 0x03 4.--6. " D1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x03 0.--2. " D0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x04 "CFG4,Datapath Input Selection" bitfld.byte 0x04 4.--6. " CI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x04 0.--2. " SI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x05 "CFG5,Datapath Output Selection" bitfld.byte 0x05 4.--7. " OUT1 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x05 0.--3. " OUT0 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x06 "CFG6,Datapath Output Selection" bitfld.byte 0x06 4.--7. " OUT3 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x06 0.--3. " OUT2 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x07 "CFG7,Datapath Output Selection" bitfld.byte 0x07 4.--7. " OUT5 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x07 0.--3. " OUT4 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x08 "CFG8,Datapath Output Synchronization" hexmask.byte 0x08 0.--5. 1. " OUT_SYNC ,Output Synchronization field" line.byte 0x09 "CFG9,ALU Mask" line.byte 0x0a "CFG10,Compare 0 Mask" line.byte 0x0b "CFG11,Compare 1 Mask" line.byte 0x0c "CFG12,Datapath Static Configuration" bitfld.byte 0x0c 7. " CMASK1_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 6. " CMASK0_EN ,Datapath mask enable" "Disabled,Enabled" textline " " bitfld.byte 0x0c 5. " AMASK_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 4. " DEF_SI ,Datapath default shift value" "0,1" textline " " bitfld.byte 0x0c 2.--3. " SI_SELB ,Datapath shift in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0c 0.--1. " SI_SELA ,Datapath shift in source select" "Default,Registered,Route,Chain" line.byte 0x0d "CFG13,Datapath Static Configuration" bitfld.byte 0x0d 6.--7. " CMP_SELB ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" bitfld.byte 0x0d 4.--5. " CMP_SELA ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" textline " " bitfld.byte 0x0d 2.--3. " CI_SELB ,Datapath carry in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0d 0.--1. " CI_SELA ,Datapath carry in source select" "Default,Registered,Route,Chain" line.byte 0x0e "CFG14,Datapath Static Configuration" bitfld.byte 0x0e 7. " MSB_EN ,Datapath MSB selection enable" "Disabled,Enabled" bitfld.byte 0x0e 4.--6. " MSB_SEL ,Datapath MSB Selection" "Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7" textline " " bitfld.byte 0x0e 3. " CHAIN_CMSB ,Datapath CRC MSB chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 2. " CHAIN_FB ,Datapath CRC feedback chaining enable" "Disabled,Enabled" textline " " bitfld.byte 0x0e 1. " CHAIN1 ,Datapath condition chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 0. " CHAIN0 ,Datapath condition chaining enable" "Disabled,Enabled" line.byte 0x0f "CFG15,Datapath Static Configuration" bitfld.byte 0x0f 7. " PI_SEL ,Datapath parallel input selection" "Normal,Parallel" bitfld.byte 0x0f 6. " SHIFT_SEL ,Datapath shift out selection" "SOL_MSB,SOR" textline " " bitfld.byte 0x0f 5. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x0f 4. " NC0 ,Spare register bit" "0,1" textline " " bitfld.byte 0x0f 2.--3. " F1_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" bitfld.byte 0x0f 0.--1. " F0_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" line.byte 0x10 "CFG16,Datapath Static Configuration" bitfld.byte 0x10 7. " F1_CK_INV ,FIFO Clock Invert" "Normal,Inverted" bitfld.byte 0x10 6. " F0_CK_INV ,FIFO Clock Invert" "Normal,Inverted" textline " " bitfld.byte 0x10 5. " FIFO_FAST ,FIFO Fast Mode" "Disabled,Enabled" bitfld.byte 0x10 4. " FIFO_CAP ,FIFO Software Capture Mode" "Disabled,Enabled" textline " " bitfld.byte 0x10 3. " FIFO_EDGE ,Edge/level sensitive FIFO write control" "Level,Edge" bitfld.byte 0x10 2. " FIFO_ASYNC ,Asynchronous FIFO clocking support" "Synchronous,Asynchronous" textline " " bitfld.byte 0x10 1. " EXT_CRCPRS ,External CRC/PRS mode" "Internal,External" bitfld.byte 0x10 0. " WRK16_CONCAT ,Datapath register access mode" "Default,Concatenate" group.byte (0xB0+0x24)++0x03 line.byte 0x00 "CFG20,Status input mode selection" line.byte 0x01 "CFG21,Spare register bits" bitfld.byte 0x01 1. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x01 0. " NC0 ,Spare register bit" "0,1" line.byte 0x02 "CFG22,Status Output Control" bitfld.byte 0x02 3. " SC_SYNC_MD ,SC Sync Mode" "Disabled,Enabled" bitfld.byte 0x02 2. " SC_INT_MD ,SC Interrupt Mode" "Normal,INT_MODE" textline " " bitfld.byte 0x02 0.--1. " SC_OUT_CTL ,Selects the output source for the Status and Control routing connections" "Control,Parallel,Counter,?..." line.byte 0x03 "CFG23,Counter Routing Control" bitfld.byte 0x03 5. " ROUTE_EN ,Configure the counter enable signal for routing input" "Disabled,Enabled" bitfld.byte 0x03 4. " ROUTE_LD ,Configure the counter load signal for routing input" "Disabled,Enabled" textline " " bitfld.byte 0x03 2.--3. " CNT_EN_SEL ,Selects the routing inputs for the counter enable signal" "SC_IN4,SC_IN5,SC_IN6,SC_IO" bitfld.byte 0x03 0.--1. " CNT_LD_SEL ,Selects the routing inputs for the counter load signal" "SC_IN0,SC_IN1,SC_IN2,SC_IN3" group.byte (0xB0+0x28)++0x00 line.byte 0x00 "CFG24,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x29)++0x00 line.byte 0x00 "CFG25,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2A)++0x00 line.byte 0x00 "CFG26,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2B)++0x00 line.byte 0x00 "CFG27,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2C)++0x03 line.byte 0x00 "CFG28,Clock Selection" bitfld.byte 0x00 4.--7. " PLD1_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x00 0.--3. " PLD0_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x01 "CFG29,Clock Selection" bitfld.byte 0x01 4.--7. " SC_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x01 0.--3. " DP_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x02 "CFG30,Reset Selection Register" bitfld.byte 0x02 4. " GUDB_WR ,Enable global write operation for the configuration and working registers in this UDB" "Disabled,Enabled" bitfld.byte 0x02 3. " EN_RES_CNT ,Enable routed reset to counter/control register" "Disabled,Enabled" textline " " bitfld.byte 0x02 2. " RES_POL ,Select polarity of the routed reset control" "Not inverted,Inverted" bitfld.byte 0x02 0.--1. " RES_SEL ,Select routing input for routed reset control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" line.byte 0x03 "CFG31,Reset and Clock Input Enable" bitfld.byte 0x03 4.--5. " EXT_CK_SEL ,External clock selection" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" bitfld.byte 0x03 1. " EXT_SYNC ,Enable synchronization of selected external clock" "Disabled,Enabled" textline " " bitfld.byte 0x03 0. " NC0 ,Spare register bit" "0,1" group.word 0xE0++0x01 line.word 0x00 "DCFG0,Dynamic Configuration RAM Register 0" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE2++0x01 line.word 0x00 "DCFG1,Dynamic Configuration RAM Register 1" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE4++0x01 line.word 0x00 "DCFG2,Dynamic Configuration RAM Register 2" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE6++0x01 line.word 0x00 "DCFG3,Dynamic Configuration RAM Register 3" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE8++0x01 line.word 0x00 "DCFG4,Dynamic Configuration RAM Register 4" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEA++0x01 line.word 0x00 "DCFG5,Dynamic Configuration RAM Register 5" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEC++0x01 line.word 0x00 "DCFG6,Dynamic Configuration RAM Register 6" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEE++0x01 line.word 0x00 "DCFG7,Dynamic Configuration RAM Register 7" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" width 0x0B tree.end tree "Route" width 9. group.byte 0x100++0x00 line.byte 0x00 "HC0,UDB Channel HC Tile Configuration" group.byte 0x101++0x00 line.byte 0x00 "HC1,UDB Channel HC Tile Configuration" group.byte 0x102++0x00 line.byte 0x00 "HC2,UDB Channel HC Tile Configuration" group.byte 0x103++0x00 line.byte 0x00 "HC3,UDB Channel HC Tile Configuration" group.byte 0x104++0x00 line.byte 0x00 "HC4,UDB Channel HC Tile Configuration" group.byte 0x105++0x00 line.byte 0x00 "HC5,UDB Channel HC Tile Configuration" group.byte 0x106++0x00 line.byte 0x00 "HC6,UDB Channel HC Tile Configuration" group.byte 0x107++0x00 line.byte 0x00 "HC7,UDB Channel HC Tile Configuration" group.byte 0x108++0x00 line.byte 0x00 "HC8,UDB Channel HC Tile Configuration" group.byte 0x109++0x00 line.byte 0x00 "HC9,UDB Channel HC Tile Configuration" group.byte 0x10A++0x00 line.byte 0x00 "HC10,UDB Channel HC Tile Configuration" group.byte 0x10B++0x00 line.byte 0x00 "HC11,UDB Channel HC Tile Configuration" group.byte 0x10C++0x00 line.byte 0x00 "HC12,UDB Channel HC Tile Configuration" group.byte 0x10D++0x00 line.byte 0x00 "HC13,UDB Channel HC Tile Configuration" group.byte 0x10E++0x00 line.byte 0x00 "HC14,UDB Channel HC Tile Configuration" group.byte 0x10F++0x00 line.byte 0x00 "HC15,UDB Channel HC Tile Configuration" group.byte 0x110++0x00 line.byte 0x00 "HC16,UDB Channel HC Tile Configuration" group.byte 0x111++0x00 line.byte 0x00 "HC17,UDB Channel HC Tile Configuration" group.byte 0x112++0x00 line.byte 0x00 "HC18,UDB Channel HC Tile Configuration" group.byte 0x113++0x00 line.byte 0x00 "HC19,UDB Channel HC Tile Configuration" group.byte 0x114++0x00 line.byte 0x00 "HC20,UDB Channel HC Tile Configuration" group.byte 0x115++0x00 line.byte 0x00 "HC21,UDB Channel HC Tile Configuration" group.byte 0x116++0x00 line.byte 0x00 "HC22,UDB Channel HC Tile Configuration" group.byte 0x117++0x00 line.byte 0x00 "HC23,UDB Channel HC Tile Configuration" group.byte 0x118++0x00 line.byte 0x00 "HC24,UDB Channel HC Tile Configuration" group.byte 0x119++0x00 line.byte 0x00 "HC25,UDB Channel HC Tile Configuration" group.byte 0x11A++0x00 line.byte 0x00 "HC26,UDB Channel HC Tile Configuration" group.byte 0x11B++0x00 line.byte 0x00 "HC27,UDB Channel HC Tile Configuration" group.byte 0x11C++0x00 line.byte 0x00 "HC28,UDB Channel HC Tile Configuration" group.byte 0x11D++0x00 line.byte 0x00 "HC29,UDB Channel HC Tile Configuration" group.byte 0x11E++0x00 line.byte 0x00 "HC30,UDB Channel HC Tile Configuration" group.byte 0x11F++0x00 line.byte 0x00 "HC31,UDB Channel HC Tile Configuration" group.byte 0x120++0x00 line.byte 0x00 "HC32,UDB Channel HC Tile Configuration" group.byte 0x121++0x00 line.byte 0x00 "HC33,UDB Channel HC Tile Configuration" group.byte 0x122++0x00 line.byte 0x00 "HC34,UDB Channel HC Tile Configuration" group.byte 0x123++0x00 line.byte 0x00 "HC35,UDB Channel HC Tile Configuration" group.byte 0x124++0x00 line.byte 0x00 "HC36,UDB Channel HC Tile Configuration" group.byte 0x125++0x00 line.byte 0x00 "HC37,UDB Channel HC Tile Configuration" group.byte 0x126++0x00 line.byte 0x00 "HC38,UDB Channel HC Tile Configuration" group.byte 0x127++0x00 line.byte 0x00 "HC39,UDB Channel HC Tile Configuration" group.byte 0x128++0x00 line.byte 0x00 "HC40,UDB Channel HC Tile Configuration" group.byte 0x129++0x00 line.byte 0x00 "HC41,UDB Channel HC Tile Configuration" group.byte 0x12A++0x00 line.byte 0x00 "HC42,UDB Channel HC Tile Configuration" group.byte 0x12B++0x00 line.byte 0x00 "HC43,UDB Channel HC Tile Configuration" group.byte 0x12C++0x00 line.byte 0x00 "HC44,UDB Channel HC Tile Configuration" group.byte 0x12D++0x00 line.byte 0x00 "HC45,UDB Channel HC Tile Configuration" group.byte 0x12E++0x00 line.byte 0x00 "HC46,UDB Channel HC Tile Configuration" group.byte 0x12F++0x00 line.byte 0x00 "HC47,UDB Channel HC Tile Configuration" group.byte 0x130++0x00 line.byte 0x00 "HC48,UDB Channel HC Tile Configuration" group.byte 0x131++0x00 line.byte 0x00 "HC49,UDB Channel HC Tile Configuration" group.byte 0x132++0x00 line.byte 0x00 "HC50,UDB Channel HC Tile Configuration" group.byte 0x133++0x00 line.byte 0x00 "HC51,UDB Channel HC Tile Configuration" group.byte 0x134++0x00 line.byte 0x00 "HC52,UDB Channel HC Tile Configuration" group.byte 0x135++0x00 line.byte 0x00 "HC53,UDB Channel HC Tile Configuration" group.byte 0x136++0x00 line.byte 0x00 "HC54,UDB Channel HC Tile Configuration" group.byte 0x137++0x00 line.byte 0x00 "HC55,UDB Channel HC Tile Configuration" group.byte 0x138++0x00 line.byte 0x00 "HC56,UDB Channel HC Tile Configuration" group.byte 0x139++0x00 line.byte 0x00 "HC57,UDB Channel HC Tile Configuration" group.byte 0x13A++0x00 line.byte 0x00 "HC58,UDB Channel HC Tile Configuration" group.byte 0x13B++0x00 line.byte 0x00 "HC59,UDB Channel HC Tile Configuration" group.byte 0x13C++0x00 line.byte 0x00 "HC60,UDB Channel HC Tile Configuration" group.byte 0x13D++0x00 line.byte 0x00 "HC61,UDB Channel HC Tile Configuration" group.byte 0x13E++0x00 line.byte 0x00 "HC62,UDB Channel HC Tile Configuration" group.byte 0x13F++0x00 line.byte 0x00 "HC63,UDB Channel HC Tile Configuration" group.byte 0x140++0x00 line.byte 0x00 "HC64,UDB Channel HC Tile Configuration" group.byte 0x141++0x00 line.byte 0x00 "HC65,UDB Channel HC Tile Configuration" group.byte 0x142++0x00 line.byte 0x00 "HC66,UDB Channel HC Tile Configuration" group.byte 0x143++0x00 line.byte 0x00 "HC67,UDB Channel HC Tile Configuration" group.byte 0x144++0x00 line.byte 0x00 "HC68,UDB Channel HC Tile Configuration" group.byte 0x145++0x00 line.byte 0x00 "HC69,UDB Channel HC Tile Configuration" group.byte 0x146++0x00 line.byte 0x00 "HC70,UDB Channel HC Tile Configuration" group.byte 0x147++0x00 line.byte 0x00 "HC71,UDB Channel HC Tile Configuration" group.byte 0x148++0x00 line.byte 0x00 "HC72,UDB Channel HC Tile Configuration" group.byte 0x149++0x00 line.byte 0x00 "HC73,UDB Channel HC Tile Configuration" group.byte 0x14A++0x00 line.byte 0x00 "HC74,UDB Channel HC Tile Configuration" group.byte 0x14B++0x00 line.byte 0x00 "HC75,UDB Channel HC Tile Configuration" group.byte 0x14C++0x00 line.byte 0x00 "HC76,UDB Channel HC Tile Configuration" group.byte 0x14D++0x00 line.byte 0x00 "HC77,UDB Channel HC Tile Configuration" group.byte 0x14E++0x00 line.byte 0x00 "HC78,UDB Channel HC Tile Configuration" group.byte 0x14F++0x00 line.byte 0x00 "HC79,UDB Channel HC Tile Configuration" group.byte 0x150++0x00 line.byte 0x00 "HC80,UDB Channel HC Tile Configuration" group.byte 0x151++0x00 line.byte 0x00 "HC81,UDB Channel HC Tile Configuration" group.byte 0x152++0x00 line.byte 0x00 "HC82,UDB Channel HC Tile Configuration" group.byte 0x153++0x00 line.byte 0x00 "HC83,UDB Channel HC Tile Configuration" group.byte 0x154++0x00 line.byte 0x00 "HC84,UDB Channel HC Tile Configuration" group.byte 0x155++0x00 line.byte 0x00 "HC85,UDB Channel HC Tile Configuration" group.byte 0x156++0x00 line.byte 0x00 "HC86,UDB Channel HC Tile Configuration" group.byte 0x157++0x00 line.byte 0x00 "HC87,UDB Channel HC Tile Configuration" group.byte 0x158++0x00 line.byte 0x00 "HC88,UDB Channel HC Tile Configuration" group.byte 0x159++0x00 line.byte 0x00 "HC89,UDB Channel HC Tile Configuration" group.byte 0x15A++0x00 line.byte 0x00 "HC90,UDB Channel HC Tile Configuration" group.byte 0x15B++0x00 line.byte 0x00 "HC91,UDB Channel HC Tile Configuration" group.byte 0x15C++0x00 line.byte 0x00 "HC92,UDB Channel HC Tile Configuration" group.byte 0x15D++0x00 line.byte 0x00 "HC93,UDB Channel HC Tile Configuration" group.byte 0x15E++0x00 line.byte 0x00 "HC94,UDB Channel HC Tile Configuration" group.byte 0x15F++0x00 line.byte 0x00 "HC95,UDB Channel HC Tile Configuration" group.byte 0x160++0x00 line.byte 0x00 "HC96,UDB Channel HC Tile Configuration" group.byte 0x161++0x00 line.byte 0x00 "HC97,UDB Channel HC Tile Configuration" group.byte 0x162++0x00 line.byte 0x00 "HC98,UDB Channel HC Tile Configuration" group.byte 0x163++0x00 line.byte 0x00 "HC99,UDB Channel HC Tile Configuration" group.byte 0x164++0x00 line.byte 0x00 "HC100,UDB Channel HC Tile Configuration" group.byte 0x165++0x00 line.byte 0x00 "HC101,UDB Channel HC Tile Configuration" group.byte 0x166++0x00 line.byte 0x00 "HC102,UDB Channel HC Tile Configuration" group.byte 0x167++0x00 line.byte 0x00 "HC103,UDB Channel HC Tile Configuration" group.byte 0x168++0x00 line.byte 0x00 "HC104,UDB Channel HC Tile Configuration" group.byte 0x169++0x00 line.byte 0x00 "HC105,UDB Channel HC Tile Configuration" group.byte 0x16A++0x00 line.byte 0x00 "HC106,UDB Channel HC Tile Configuration" group.byte 0x16B++0x00 line.byte 0x00 "HC107,UDB Channel HC Tile Configuration" group.byte 0x16C++0x00 line.byte 0x00 "HC108,UDB Channel HC Tile Configuration" group.byte 0x16D++0x00 line.byte 0x00 "HC109,UDB Channel HC Tile Configuration" group.byte 0x16E++0x00 line.byte 0x00 "HC110,UDB Channel HC Tile Configuration" group.byte 0x16F++0x00 line.byte 0x00 "HC111,UDB Channel HC Tile Configuration" group.byte 0x170++0x00 line.byte 0x00 "HC112,UDB Channel HC Tile Configuration" group.byte 0x171++0x00 line.byte 0x00 "HC113,UDB Channel HC Tile Configuration" group.byte 0x172++0x00 line.byte 0x00 "HC114,UDB Channel HC Tile Configuration" group.byte 0x173++0x00 line.byte 0x00 "HC115,UDB Channel HC Tile Configuration" group.byte 0x174++0x00 line.byte 0x00 "HC116,UDB Channel HC Tile Configuration" group.byte 0x175++0x00 line.byte 0x00 "HC117,UDB Channel HC Tile Configuration" group.byte 0x176++0x00 line.byte 0x00 "HC118,UDB Channel HC Tile Configuration" group.byte 0x177++0x00 line.byte 0x00 "HC119,UDB Channel HC Tile Configuration" group.byte 0x178++0x00 line.byte 0x00 "HC120,UDB Channel HC Tile Configuration" group.byte 0x179++0x00 line.byte 0x00 "HC121,UDB Channel HC Tile Configuration" group.byte 0x17A++0x00 line.byte 0x00 "HC122,UDB Channel HC Tile Configuration" group.byte 0x17B++0x00 line.byte 0x00 "HC123,UDB Channel HC Tile Configuration" group.byte 0x17C++0x00 line.byte 0x00 "HC124,UDB Channel HC Tile Configuration" group.byte 0x17D++0x00 line.byte 0x00 "HC125,UDB Channel HC Tile Configuration" group.byte 0x17E++0x00 line.byte 0x00 "HC126,UDB Channel HC Tile Configuration" group.byte 0x17F++0x00 line.byte 0x00 "HC127,UDB Channel HC Tile Configuration" group.byte 0x180++0x00 line.byte 0x00 "HV_L0,UDB Channel HV Tile Configuration" group.byte 0x181++0x00 line.byte 0x00 "HV_L1,UDB Channel HV Tile Configuration" group.byte 0x182++0x00 line.byte 0x00 "HV_L2,UDB Channel HV Tile Configuration" group.byte 0x183++0x00 line.byte 0x00 "HV_L3,UDB Channel HV Tile Configuration" group.byte 0x184++0x00 line.byte 0x00 "HV_L4,UDB Channel HV Tile Configuration" group.byte 0x185++0x00 line.byte 0x00 "HV_L5,UDB Channel HV Tile Configuration" group.byte 0x186++0x00 line.byte 0x00 "HV_L6,UDB Channel HV Tile Configuration" group.byte 0x187++0x00 line.byte 0x00 "HV_L7,UDB Channel HV Tile Configuration" group.byte 0x188++0x00 line.byte 0x00 "HV_L8,UDB Channel HV Tile Configuration" group.byte 0x189++0x00 line.byte 0x00 "HV_L9,UDB Channel HV Tile Configuration" group.byte 0x18A++0x00 line.byte 0x00 "HV_L10,UDB Channel HV Tile Configuration" group.byte 0x18B++0x00 line.byte 0x00 "HV_L11,UDB Channel HV Tile Configuration" group.byte 0x18C++0x00 line.byte 0x00 "HV_L12,UDB Channel HV Tile Configuration" group.byte 0x18D++0x00 line.byte 0x00 "HV_L13,UDB Channel HV Tile Configuration" group.byte 0x18E++0x00 line.byte 0x00 "HV_L14,UDB Channel HV Tile Configuration" group.byte 0x18F++0x00 line.byte 0x00 "HV_L15,UDB Channel HV Tile Configuration" group.byte 0x190++0x00 line.byte 0x00 "HS0,UDB Channel HS Tile Configuration" group.byte 0x191++0x00 line.byte 0x00 "HS1,UDB Channel HS Tile Configuration" group.byte 0x192++0x00 line.byte 0x00 "HS2,UDB Channel HS Tile Configuration" group.byte 0x193++0x00 line.byte 0x00 "HS3,UDB Channel HS Tile Configuration" group.byte 0x194++0x00 line.byte 0x00 "HS4,UDB Channel HS Tile Configuration" group.byte 0x195++0x00 line.byte 0x00 "HS5,UDB Channel HS Tile Configuration" group.byte 0x196++0x00 line.byte 0x00 "HS6,UDB Channel HS Tile Configuration" group.byte 0x197++0x00 line.byte 0x00 "HS7,UDB Channel HS Tile Configuration" group.byte 0x198++0x00 line.byte 0x00 "HS8,UDB Channel HS Tile Configuration" group.byte 0x199++0x00 line.byte 0x00 "HS9,UDB Channel HS Tile Configuration" group.byte 0x19A++0x00 line.byte 0x00 "HS10,UDB Channel HS Tile Configuration" group.byte 0x19B++0x00 line.byte 0x00 "HS11,UDB Channel HS Tile Configuration" group.byte 0x19C++0x00 line.byte 0x00 "HS12,UDB Channel HS Tile Configuration" group.byte 0x19D++0x00 line.byte 0x00 "HS13,UDB Channel HS Tile Configuration" group.byte 0x19E++0x00 line.byte 0x00 "HS14,UDB Channel HS Tile Configuration" group.byte 0x19F++0x00 line.byte 0x00 "HS15,UDB Channel HS Tile Configuration" group.byte 0x1A0++0x00 line.byte 0x00 "HS16,UDB Channel HS Tile Configuration" group.byte 0x1A1++0x00 line.byte 0x00 "HS17,UDB Channel HS Tile Configuration" group.byte 0x1A2++0x00 line.byte 0x00 "HS18,UDB Channel HS Tile Configuration" group.byte 0x1A3++0x00 line.byte 0x00 "HS19,UDB Channel HS Tile Configuration" group.byte 0x1A4++0x00 line.byte 0x00 "HS20,UDB Channel HS Tile Configuration" group.byte 0x1A5++0x00 line.byte 0x00 "HS21,UDB Channel HS Tile Configuration" group.byte 0x1A6++0x00 line.byte 0x00 "HS22,UDB Channel HS Tile Configuration" group.byte 0x1A7++0x00 line.byte 0x00 "HS23,UDB Channel HS Tile Configuration" group.byte 0x1A8++0x00 line.byte 0x00 "HV_R0,UDB Channel HV Tile Configuration" group.byte 0x1A9++0x00 line.byte 0x00 "HV_R1,UDB Channel HV Tile Configuration" group.byte 0x1AA++0x00 line.byte 0x00 "HV_R2,UDB Channel HV Tile Configuration" group.byte 0x1AB++0x00 line.byte 0x00 "HV_R3,UDB Channel HV Tile Configuration" group.byte 0x1AC++0x00 line.byte 0x00 "HV_R4,UDB Channel HV Tile Configuration" group.byte 0x1AD++0x00 line.byte 0x00 "HV_R5,UDB Channel HV Tile Configuration" group.byte 0x1AE++0x00 line.byte 0x00 "HV_R6,UDB Channel HV Tile Configuration" group.byte 0x1AF++0x00 line.byte 0x00 "HV_R7,UDB Channel HV Tile Configuration" group.byte 0x1B0++0x00 line.byte 0x00 "HV_R8,UDB Channel HV Tile Configuration" group.byte 0x1B1++0x00 line.byte 0x00 "HV_R9,UDB Channel HV Tile Configuration" group.byte 0x1B2++0x00 line.byte 0x00 "HV_R10,UDB Channel HV Tile Configuration" group.byte 0x1B3++0x00 line.byte 0x00 "HV_R11,UDB Channel HV Tile Configuration" group.byte 0x1B4++0x00 line.byte 0x00 "HV_R12,UDB Channel HV Tile Configuration" group.byte 0x1B5++0x00 line.byte 0x00 "HV_R13,UDB Channel HV Tile Configuration" group.byte 0x1B6++0x00 line.byte 0x00 "HV_R14,UDB Channel HV Tile Configuration" group.byte 0x1B7++0x00 line.byte 0x00 "HV_R15,UDB Channel HV Tile Configuration" group.byte 0x1C0++0x00 line.byte 0x00 "PLD0IN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1C2++0x00 line.byte 0x00 "PLD0IN1,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1C4++0x00 line.byte 0x00 "PLD0IN2,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CA++0x00 line.byte 0x00 "PLD1IN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CC++0x00 line.byte 0x00 "PLD1IN1,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CE++0x00 line.byte 0x00 "PLD1IN2,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d0++0x00 line.byte 0x00 "DPIN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d2++0x00 line.byte 0x00 "DPIN1,UDB Channel PI Tile Configuration (half populated)" hexmask.byte 0x00 4.--5. 1. " PI_BOT ,RAM configuration for BOTTOM UDB port interface configuration" hexmask.byte 0x00 2.--3. 1. " PI_TOP ,RAM configuration for TOP UDB port interface configuration" group.byte 0x1d6++0x00 line.byte 0x00 "SCIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d8++0x00 line.byte 0x00 "SCIOIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1de++0x00 line.byte 0x00 "RCIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1E0++0x00 line.byte 0x00 "VS0,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E2++0x00 line.byte 0x00 "VS1,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E4++0x00 line.byte 0x00 "VS2,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E6++0x00 line.byte 0x00 "VS3,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E8++0x00 line.byte 0x00 "VS4,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EA++0x00 line.byte 0x00 "VS5,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EC++0x00 line.byte 0x00 "VS6,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EE++0x00 line.byte 0x00 "VS7,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" width 0x0B tree.end tree.end base ad:(0x40010000+0x800) tree "P 4" tree "U 0" width 18. group.long 0x0++0x03 line.long 0x00 "PLD_IT0,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT0C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT0C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x4++0x03 line.long 0x00 "PLD_IT1,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT1C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT1C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x8++0x03 line.long 0x00 "PLD_IT2,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT2C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT2C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xC++0x03 line.long 0x00 "PLD_IT3,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT3C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT3C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x10++0x03 line.long 0x00 "PLD_IT4,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT4C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT4C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x14++0x03 line.long 0x00 "PLD_IT5,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT5C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT5C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x18++0x03 line.long 0x00 "PLD_IT6,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT6C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT6C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x1C++0x03 line.long 0x00 "PLD_IT7,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT7C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT7C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x20++0x03 line.long 0x00 "PLD_IT8,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT8C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT8C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x24++0x03 line.long 0x00 "PLD_IT9,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT9C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT9C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x28++0x03 line.long 0x00 "PLD_IT10,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT10C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT10C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x2C++0x03 line.long 0x00 "PLD_IT11,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " group.word 0x30++0x01 line.word 0x00 "PLD_ORT0,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT0_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT0_0 ,OR term" "Not OR,OR" group.word 0x32++0x01 line.word 0x00 "PLD_ORT1,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT1_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT1_0 ,OR term" "Not OR,OR" group.word 0x34++0x01 line.word 0x00 "PLD_ORT2,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT2_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT2_0 ,OR term" "Not OR,OR" group.word 0x36++0x01 line.word 0x00 "PLD_ORT3,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " group.word (0x30+0x08)++0x07 line.word 0x00 "MC_CFG_CEN_CONST,Macrocell Configuration for Carry Enable and Constant" bitfld.word 0x00 15. " PLD1_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 14. " PLD1_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 13. " PLD1_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 12. " PLD1_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " PLD1_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 10. " PLD1_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " PLD1_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 8. " PLD1_MC0_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " PLD0_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 6. " PLD0_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " PLD0_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 4. " PLD0_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " PLD0_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 2. " PLD0_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " PLD0_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 0. " PLD0_MC0_CEN ,Carry enable" "Disabled,Enabled" line.word 0x02 "MC_CFG_XORFB,Macrocell Configuration for XOR Feedback" bitfld.word 0x02 14.--15. " PLD1_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 12.--13. " PLD1_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 10.--11. " PLD1_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 8.--9. " PLD1_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 6.--7. " PLD0_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 4.--5. " PLD0_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 2.--3. " PLD0_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 0.--1. " PLD0_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" line.word 0x04 "MC_CFG_SET_RESET,Macrocell Configuration for Set and Reset" bitfld.word 0x04 15. " PLD1_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 14. " PLD1_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 13. " PLD1_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 12. " PLD1_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 11. " PLD1_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 10. " PLD1_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 9. " PLD1_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 8. " PLD1_MC0_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 7. " PLD0_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 6. " PLD0_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 5. " PLD0_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 4. " PLD0_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 3. " PLD0_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 2. " PLD0_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 1. " PLD0_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 0. " PLD0_MC0_SET_SEL ,Set select enable" "Not set,Set" line.word 0x06 "MC_CFG_BYPASS,Macrocell Configuration for Bypass" bitfld.word 0x06 14. " PLD1_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 12. " PLD1_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 10. " PLD1_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 8. " PLD1_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 6. " PLD0_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 4. " PLD0_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 2. " PLD0_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 0. " PLD0_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " group.byte (0x30+0x10)++0x10 line.byte 0x00 "CFG0,Datapath Input Selection" bitfld.byte 0x00 4.--6. " RAD1 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x00 0.--2. " RAD0 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x01 "CFG1,Datapath Input Selection" bitfld.byte 0x01 0.--2. " RAD2 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x02 "CFG2,Datapath Input Selection" bitfld.byte 0x02 4.--6. " F1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x02 0.--2. " F0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x03 "CFG3,Datapath Input Selection" bitfld.byte 0x03 4.--6. " D1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x03 0.--2. " D0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x04 "CFG4,Datapath Input Selection" bitfld.byte 0x04 4.--6. " CI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x04 0.--2. " SI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x05 "CFG5,Datapath Output Selection" bitfld.byte 0x05 4.--7. " OUT1 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x05 0.--3. " OUT0 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x06 "CFG6,Datapath Output Selection" bitfld.byte 0x06 4.--7. " OUT3 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x06 0.--3. " OUT2 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x07 "CFG7,Datapath Output Selection" bitfld.byte 0x07 4.--7. " OUT5 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x07 0.--3. " OUT4 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x08 "CFG8,Datapath Output Synchronization" hexmask.byte 0x08 0.--5. 1. " OUT_SYNC ,Output Synchronization field" line.byte 0x09 "CFG9,ALU Mask" line.byte 0x0a "CFG10,Compare 0 Mask" line.byte 0x0b "CFG11,Compare 1 Mask" line.byte 0x0c "CFG12,Datapath Static Configuration" bitfld.byte 0x0c 7. " CMASK1_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 6. " CMASK0_EN ,Datapath mask enable" "Disabled,Enabled" textline " " bitfld.byte 0x0c 5. " AMASK_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 4. " DEF_SI ,Datapath default shift value" "0,1" textline " " bitfld.byte 0x0c 2.--3. " SI_SELB ,Datapath shift in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0c 0.--1. " SI_SELA ,Datapath shift in source select" "Default,Registered,Route,Chain" line.byte 0x0d "CFG13,Datapath Static Configuration" bitfld.byte 0x0d 6.--7. " CMP_SELB ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" bitfld.byte 0x0d 4.--5. " CMP_SELA ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" textline " " bitfld.byte 0x0d 2.--3. " CI_SELB ,Datapath carry in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0d 0.--1. " CI_SELA ,Datapath carry in source select" "Default,Registered,Route,Chain" line.byte 0x0e "CFG14,Datapath Static Configuration" bitfld.byte 0x0e 7. " MSB_EN ,Datapath MSB selection enable" "Disabled,Enabled" bitfld.byte 0x0e 4.--6. " MSB_SEL ,Datapath MSB Selection" "Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7" textline " " bitfld.byte 0x0e 3. " CHAIN_CMSB ,Datapath CRC MSB chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 2. " CHAIN_FB ,Datapath CRC feedback chaining enable" "Disabled,Enabled" textline " " bitfld.byte 0x0e 1. " CHAIN1 ,Datapath condition chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 0. " CHAIN0 ,Datapath condition chaining enable" "Disabled,Enabled" line.byte 0x0f "CFG15,Datapath Static Configuration" bitfld.byte 0x0f 7. " PI_SEL ,Datapath parallel input selection" "Normal,Parallel" bitfld.byte 0x0f 6. " SHIFT_SEL ,Datapath shift out selection" "SOL_MSB,SOR" textline " " bitfld.byte 0x0f 5. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x0f 4. " NC0 ,Spare register bit" "0,1" textline " " bitfld.byte 0x0f 2.--3. " F1_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" bitfld.byte 0x0f 0.--1. " F0_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" line.byte 0x10 "CFG16,Datapath Static Configuration" bitfld.byte 0x10 7. " F1_CK_INV ,FIFO Clock Invert" "Normal,Inverted" bitfld.byte 0x10 6. " F0_CK_INV ,FIFO Clock Invert" "Normal,Inverted" textline " " bitfld.byte 0x10 5. " FIFO_FAST ,FIFO Fast Mode" "Disabled,Enabled" bitfld.byte 0x10 4. " FIFO_CAP ,FIFO Software Capture Mode" "Disabled,Enabled" textline " " bitfld.byte 0x10 3. " FIFO_EDGE ,Edge/level sensitive FIFO write control" "Level,Edge" bitfld.byte 0x10 2. " FIFO_ASYNC ,Asynchronous FIFO clocking support" "Synchronous,Asynchronous" textline " " bitfld.byte 0x10 1. " EXT_CRCPRS ,External CRC/PRS mode" "Internal,External" bitfld.byte 0x10 0. " WRK16_CONCAT ,Datapath register access mode" "Default,Concatenate" group.byte (0x30+0x24)++0x03 line.byte 0x00 "CFG20,Status input mode selection" line.byte 0x01 "CFG21,Spare register bits" bitfld.byte 0x01 1. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x01 0. " NC0 ,Spare register bit" "0,1" line.byte 0x02 "CFG22,Status Output Control" bitfld.byte 0x02 3. " SC_SYNC_MD ,SC Sync Mode" "Disabled,Enabled" bitfld.byte 0x02 2. " SC_INT_MD ,SC Interrupt Mode" "Normal,INT_MODE" textline " " bitfld.byte 0x02 0.--1. " SC_OUT_CTL ,Selects the output source for the Status and Control routing connections" "Control,Parallel,Counter,?..." line.byte 0x03 "CFG23,Counter Routing Control" bitfld.byte 0x03 5. " ROUTE_EN ,Configure the counter enable signal for routing input" "Disabled,Enabled" bitfld.byte 0x03 4. " ROUTE_LD ,Configure the counter load signal for routing input" "Disabled,Enabled" textline " " bitfld.byte 0x03 2.--3. " CNT_EN_SEL ,Selects the routing inputs for the counter enable signal" "SC_IN4,SC_IN5,SC_IN6,SC_IO" bitfld.byte 0x03 0.--1. " CNT_LD_SEL ,Selects the routing inputs for the counter load signal" "SC_IN0,SC_IN1,SC_IN2,SC_IN3" group.byte (0x30+0x28)++0x00 line.byte 0x00 "CFG24,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x29)++0x00 line.byte 0x00 "CFG25,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2A)++0x00 line.byte 0x00 "CFG26,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2B)++0x00 line.byte 0x00 "CFG27,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2C)++0x03 line.byte 0x00 "CFG28,Clock Selection" bitfld.byte 0x00 4.--7. " PLD1_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x00 0.--3. " PLD0_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x01 "CFG29,Clock Selection" bitfld.byte 0x01 4.--7. " SC_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x01 0.--3. " DP_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x02 "CFG30,Reset Selection Register" bitfld.byte 0x02 4. " GUDB_WR ,Enable global write operation for the configuration and working registers in this UDB" "Disabled,Enabled" bitfld.byte 0x02 3. " EN_RES_CNT ,Enable routed reset to counter/control register" "Disabled,Enabled" textline " " bitfld.byte 0x02 2. " RES_POL ,Select polarity of the routed reset control" "Not inverted,Inverted" bitfld.byte 0x02 0.--1. " RES_SEL ,Select routing input for routed reset control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" line.byte 0x03 "CFG31,Reset and Clock Input Enable" bitfld.byte 0x03 4.--5. " EXT_CK_SEL ,External clock selection" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" bitfld.byte 0x03 1. " EXT_SYNC ,Enable synchronization of selected external clock" "Disabled,Enabled" textline " " bitfld.byte 0x03 0. " NC0 ,Spare register bit" "0,1" group.word 0x60++0x01 line.word 0x00 "DCFG0,Dynamic Configuration RAM Register 0" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x62++0x01 line.word 0x00 "DCFG1,Dynamic Configuration RAM Register 1" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x64++0x01 line.word 0x00 "DCFG2,Dynamic Configuration RAM Register 2" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x66++0x01 line.word 0x00 "DCFG3,Dynamic Configuration RAM Register 3" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x68++0x01 line.word 0x00 "DCFG4,Dynamic Configuration RAM Register 4" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6A++0x01 line.word 0x00 "DCFG5,Dynamic Configuration RAM Register 5" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6C++0x01 line.word 0x00 "DCFG6,Dynamic Configuration RAM Register 6" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6E++0x01 line.word 0x00 "DCFG7,Dynamic Configuration RAM Register 7" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" width 0x0B tree.end tree "U 1" width 18. group.long 0x80++0x03 line.long 0x00 "PLD_IT0,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT0C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT0C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x84++0x03 line.long 0x00 "PLD_IT1,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT1C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT1C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x88++0x03 line.long 0x00 "PLD_IT2,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT2C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT2C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x8C++0x03 line.long 0x00 "PLD_IT3,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT3C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT3C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x90++0x03 line.long 0x00 "PLD_IT4,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT4C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT4C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x94++0x03 line.long 0x00 "PLD_IT5,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT5C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT5C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x98++0x03 line.long 0x00 "PLD_IT6,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT6C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT6C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x9C++0x03 line.long 0x00 "PLD_IT7,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT7C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT7C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA0++0x03 line.long 0x00 "PLD_IT8,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT8C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT8C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA4++0x03 line.long 0x00 "PLD_IT9,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT9C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT9C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA8++0x03 line.long 0x00 "PLD_IT10,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT10C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT10C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xAC++0x03 line.long 0x00 "PLD_IT11,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " group.word 0xB0++0x01 line.word 0x00 "PLD_ORT0,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT0_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT0_0 ,OR term" "Not OR,OR" group.word 0xB2++0x01 line.word 0x00 "PLD_ORT1,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT1_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT1_0 ,OR term" "Not OR,OR" group.word 0xB4++0x01 line.word 0x00 "PLD_ORT2,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT2_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT2_0 ,OR term" "Not OR,OR" group.word 0xB6++0x01 line.word 0x00 "PLD_ORT3,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " group.word (0xB0+0x08)++0x07 line.word 0x00 "MC_CFG_CEN_CONST,Macrocell Configuration for Carry Enable and Constant" bitfld.word 0x00 15. " PLD1_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 14. " PLD1_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 13. " PLD1_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 12. " PLD1_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " PLD1_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 10. " PLD1_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " PLD1_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 8. " PLD1_MC0_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " PLD0_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 6. " PLD0_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " PLD0_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 4. " PLD0_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " PLD0_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 2. " PLD0_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " PLD0_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 0. " PLD0_MC0_CEN ,Carry enable" "Disabled,Enabled" line.word 0x02 "MC_CFG_XORFB,Macrocell Configuration for XOR Feedback" bitfld.word 0x02 14.--15. " PLD1_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 12.--13. " PLD1_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 10.--11. " PLD1_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 8.--9. " PLD1_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 6.--7. " PLD0_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 4.--5. " PLD0_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 2.--3. " PLD0_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 0.--1. " PLD0_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" line.word 0x04 "MC_CFG_SET_RESET,Macrocell Configuration for Set and Reset" bitfld.word 0x04 15. " PLD1_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 14. " PLD1_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 13. " PLD1_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 12. " PLD1_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 11. " PLD1_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 10. " PLD1_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 9. " PLD1_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 8. " PLD1_MC0_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 7. " PLD0_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 6. " PLD0_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 5. " PLD0_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 4. " PLD0_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 3. " PLD0_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 2. " PLD0_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 1. " PLD0_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 0. " PLD0_MC0_SET_SEL ,Set select enable" "Not set,Set" line.word 0x06 "MC_CFG_BYPASS,Macrocell Configuration for Bypass" bitfld.word 0x06 14. " PLD1_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 12. " PLD1_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 10. " PLD1_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 8. " PLD1_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 6. " PLD0_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 4. " PLD0_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 2. " PLD0_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 0. " PLD0_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " group.byte (0xB0+0x10)++0x10 line.byte 0x00 "CFG0,Datapath Input Selection" bitfld.byte 0x00 4.--6. " RAD1 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x00 0.--2. " RAD0 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x01 "CFG1,Datapath Input Selection" bitfld.byte 0x01 0.--2. " RAD2 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x02 "CFG2,Datapath Input Selection" bitfld.byte 0x02 4.--6. " F1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x02 0.--2. " F0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x03 "CFG3,Datapath Input Selection" bitfld.byte 0x03 4.--6. " D1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x03 0.--2. " D0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x04 "CFG4,Datapath Input Selection" bitfld.byte 0x04 4.--6. " CI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x04 0.--2. " SI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x05 "CFG5,Datapath Output Selection" bitfld.byte 0x05 4.--7. " OUT1 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x05 0.--3. " OUT0 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x06 "CFG6,Datapath Output Selection" bitfld.byte 0x06 4.--7. " OUT3 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x06 0.--3. " OUT2 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x07 "CFG7,Datapath Output Selection" bitfld.byte 0x07 4.--7. " OUT5 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x07 0.--3. " OUT4 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x08 "CFG8,Datapath Output Synchronization" hexmask.byte 0x08 0.--5. 1. " OUT_SYNC ,Output Synchronization field" line.byte 0x09 "CFG9,ALU Mask" line.byte 0x0a "CFG10,Compare 0 Mask" line.byte 0x0b "CFG11,Compare 1 Mask" line.byte 0x0c "CFG12,Datapath Static Configuration" bitfld.byte 0x0c 7. " CMASK1_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 6. " CMASK0_EN ,Datapath mask enable" "Disabled,Enabled" textline " " bitfld.byte 0x0c 5. " AMASK_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 4. " DEF_SI ,Datapath default shift value" "0,1" textline " " bitfld.byte 0x0c 2.--3. " SI_SELB ,Datapath shift in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0c 0.--1. " SI_SELA ,Datapath shift in source select" "Default,Registered,Route,Chain" line.byte 0x0d "CFG13,Datapath Static Configuration" bitfld.byte 0x0d 6.--7. " CMP_SELB ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" bitfld.byte 0x0d 4.--5. " CMP_SELA ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" textline " " bitfld.byte 0x0d 2.--3. " CI_SELB ,Datapath carry in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0d 0.--1. " CI_SELA ,Datapath carry in source select" "Default,Registered,Route,Chain" line.byte 0x0e "CFG14,Datapath Static Configuration" bitfld.byte 0x0e 7. " MSB_EN ,Datapath MSB selection enable" "Disabled,Enabled" bitfld.byte 0x0e 4.--6. " MSB_SEL ,Datapath MSB Selection" "Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7" textline " " bitfld.byte 0x0e 3. " CHAIN_CMSB ,Datapath CRC MSB chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 2. " CHAIN_FB ,Datapath CRC feedback chaining enable" "Disabled,Enabled" textline " " bitfld.byte 0x0e 1. " CHAIN1 ,Datapath condition chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 0. " CHAIN0 ,Datapath condition chaining enable" "Disabled,Enabled" line.byte 0x0f "CFG15,Datapath Static Configuration" bitfld.byte 0x0f 7. " PI_SEL ,Datapath parallel input selection" "Normal,Parallel" bitfld.byte 0x0f 6. " SHIFT_SEL ,Datapath shift out selection" "SOL_MSB,SOR" textline " " bitfld.byte 0x0f 5. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x0f 4. " NC0 ,Spare register bit" "0,1" textline " " bitfld.byte 0x0f 2.--3. " F1_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" bitfld.byte 0x0f 0.--1. " F0_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" line.byte 0x10 "CFG16,Datapath Static Configuration" bitfld.byte 0x10 7. " F1_CK_INV ,FIFO Clock Invert" "Normal,Inverted" bitfld.byte 0x10 6. " F0_CK_INV ,FIFO Clock Invert" "Normal,Inverted" textline " " bitfld.byte 0x10 5. " FIFO_FAST ,FIFO Fast Mode" "Disabled,Enabled" bitfld.byte 0x10 4. " FIFO_CAP ,FIFO Software Capture Mode" "Disabled,Enabled" textline " " bitfld.byte 0x10 3. " FIFO_EDGE ,Edge/level sensitive FIFO write control" "Level,Edge" bitfld.byte 0x10 2. " FIFO_ASYNC ,Asynchronous FIFO clocking support" "Synchronous,Asynchronous" textline " " bitfld.byte 0x10 1. " EXT_CRCPRS ,External CRC/PRS mode" "Internal,External" bitfld.byte 0x10 0. " WRK16_CONCAT ,Datapath register access mode" "Default,Concatenate" group.byte (0xB0+0x24)++0x03 line.byte 0x00 "CFG20,Status input mode selection" line.byte 0x01 "CFG21,Spare register bits" bitfld.byte 0x01 1. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x01 0. " NC0 ,Spare register bit" "0,1" line.byte 0x02 "CFG22,Status Output Control" bitfld.byte 0x02 3. " SC_SYNC_MD ,SC Sync Mode" "Disabled,Enabled" bitfld.byte 0x02 2. " SC_INT_MD ,SC Interrupt Mode" "Normal,INT_MODE" textline " " bitfld.byte 0x02 0.--1. " SC_OUT_CTL ,Selects the output source for the Status and Control routing connections" "Control,Parallel,Counter,?..." line.byte 0x03 "CFG23,Counter Routing Control" bitfld.byte 0x03 5. " ROUTE_EN ,Configure the counter enable signal for routing input" "Disabled,Enabled" bitfld.byte 0x03 4. " ROUTE_LD ,Configure the counter load signal for routing input" "Disabled,Enabled" textline " " bitfld.byte 0x03 2.--3. " CNT_EN_SEL ,Selects the routing inputs for the counter enable signal" "SC_IN4,SC_IN5,SC_IN6,SC_IO" bitfld.byte 0x03 0.--1. " CNT_LD_SEL ,Selects the routing inputs for the counter load signal" "SC_IN0,SC_IN1,SC_IN2,SC_IN3" group.byte (0xB0+0x28)++0x00 line.byte 0x00 "CFG24,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x29)++0x00 line.byte 0x00 "CFG25,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2A)++0x00 line.byte 0x00 "CFG26,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2B)++0x00 line.byte 0x00 "CFG27,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2C)++0x03 line.byte 0x00 "CFG28,Clock Selection" bitfld.byte 0x00 4.--7. " PLD1_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x00 0.--3. " PLD0_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x01 "CFG29,Clock Selection" bitfld.byte 0x01 4.--7. " SC_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x01 0.--3. " DP_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x02 "CFG30,Reset Selection Register" bitfld.byte 0x02 4. " GUDB_WR ,Enable global write operation for the configuration and working registers in this UDB" "Disabled,Enabled" bitfld.byte 0x02 3. " EN_RES_CNT ,Enable routed reset to counter/control register" "Disabled,Enabled" textline " " bitfld.byte 0x02 2. " RES_POL ,Select polarity of the routed reset control" "Not inverted,Inverted" bitfld.byte 0x02 0.--1. " RES_SEL ,Select routing input for routed reset control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" line.byte 0x03 "CFG31,Reset and Clock Input Enable" bitfld.byte 0x03 4.--5. " EXT_CK_SEL ,External clock selection" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" bitfld.byte 0x03 1. " EXT_SYNC ,Enable synchronization of selected external clock" "Disabled,Enabled" textline " " bitfld.byte 0x03 0. " NC0 ,Spare register bit" "0,1" group.word 0xE0++0x01 line.word 0x00 "DCFG0,Dynamic Configuration RAM Register 0" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE2++0x01 line.word 0x00 "DCFG1,Dynamic Configuration RAM Register 1" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE4++0x01 line.word 0x00 "DCFG2,Dynamic Configuration RAM Register 2" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE6++0x01 line.word 0x00 "DCFG3,Dynamic Configuration RAM Register 3" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE8++0x01 line.word 0x00 "DCFG4,Dynamic Configuration RAM Register 4" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEA++0x01 line.word 0x00 "DCFG5,Dynamic Configuration RAM Register 5" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEC++0x01 line.word 0x00 "DCFG6,Dynamic Configuration RAM Register 6" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEE++0x01 line.word 0x00 "DCFG7,Dynamic Configuration RAM Register 7" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" width 0x0B tree.end tree "Route" width 9. group.byte 0x100++0x00 line.byte 0x00 "HC0,UDB Channel HC Tile Configuration" group.byte 0x101++0x00 line.byte 0x00 "HC1,UDB Channel HC Tile Configuration" group.byte 0x102++0x00 line.byte 0x00 "HC2,UDB Channel HC Tile Configuration" group.byte 0x103++0x00 line.byte 0x00 "HC3,UDB Channel HC Tile Configuration" group.byte 0x104++0x00 line.byte 0x00 "HC4,UDB Channel HC Tile Configuration" group.byte 0x105++0x00 line.byte 0x00 "HC5,UDB Channel HC Tile Configuration" group.byte 0x106++0x00 line.byte 0x00 "HC6,UDB Channel HC Tile Configuration" group.byte 0x107++0x00 line.byte 0x00 "HC7,UDB Channel HC Tile Configuration" group.byte 0x108++0x00 line.byte 0x00 "HC8,UDB Channel HC Tile Configuration" group.byte 0x109++0x00 line.byte 0x00 "HC9,UDB Channel HC Tile Configuration" group.byte 0x10A++0x00 line.byte 0x00 "HC10,UDB Channel HC Tile Configuration" group.byte 0x10B++0x00 line.byte 0x00 "HC11,UDB Channel HC Tile Configuration" group.byte 0x10C++0x00 line.byte 0x00 "HC12,UDB Channel HC Tile Configuration" group.byte 0x10D++0x00 line.byte 0x00 "HC13,UDB Channel HC Tile Configuration" group.byte 0x10E++0x00 line.byte 0x00 "HC14,UDB Channel HC Tile Configuration" group.byte 0x10F++0x00 line.byte 0x00 "HC15,UDB Channel HC Tile Configuration" group.byte 0x110++0x00 line.byte 0x00 "HC16,UDB Channel HC Tile Configuration" group.byte 0x111++0x00 line.byte 0x00 "HC17,UDB Channel HC Tile Configuration" group.byte 0x112++0x00 line.byte 0x00 "HC18,UDB Channel HC Tile Configuration" group.byte 0x113++0x00 line.byte 0x00 "HC19,UDB Channel HC Tile Configuration" group.byte 0x114++0x00 line.byte 0x00 "HC20,UDB Channel HC Tile Configuration" group.byte 0x115++0x00 line.byte 0x00 "HC21,UDB Channel HC Tile Configuration" group.byte 0x116++0x00 line.byte 0x00 "HC22,UDB Channel HC Tile Configuration" group.byte 0x117++0x00 line.byte 0x00 "HC23,UDB Channel HC Tile Configuration" group.byte 0x118++0x00 line.byte 0x00 "HC24,UDB Channel HC Tile Configuration" group.byte 0x119++0x00 line.byte 0x00 "HC25,UDB Channel HC Tile Configuration" group.byte 0x11A++0x00 line.byte 0x00 "HC26,UDB Channel HC Tile Configuration" group.byte 0x11B++0x00 line.byte 0x00 "HC27,UDB Channel HC Tile Configuration" group.byte 0x11C++0x00 line.byte 0x00 "HC28,UDB Channel HC Tile Configuration" group.byte 0x11D++0x00 line.byte 0x00 "HC29,UDB Channel HC Tile Configuration" group.byte 0x11E++0x00 line.byte 0x00 "HC30,UDB Channel HC Tile Configuration" group.byte 0x11F++0x00 line.byte 0x00 "HC31,UDB Channel HC Tile Configuration" group.byte 0x120++0x00 line.byte 0x00 "HC32,UDB Channel HC Tile Configuration" group.byte 0x121++0x00 line.byte 0x00 "HC33,UDB Channel HC Tile Configuration" group.byte 0x122++0x00 line.byte 0x00 "HC34,UDB Channel HC Tile Configuration" group.byte 0x123++0x00 line.byte 0x00 "HC35,UDB Channel HC Tile Configuration" group.byte 0x124++0x00 line.byte 0x00 "HC36,UDB Channel HC Tile Configuration" group.byte 0x125++0x00 line.byte 0x00 "HC37,UDB Channel HC Tile Configuration" group.byte 0x126++0x00 line.byte 0x00 "HC38,UDB Channel HC Tile Configuration" group.byte 0x127++0x00 line.byte 0x00 "HC39,UDB Channel HC Tile Configuration" group.byte 0x128++0x00 line.byte 0x00 "HC40,UDB Channel HC Tile Configuration" group.byte 0x129++0x00 line.byte 0x00 "HC41,UDB Channel HC Tile Configuration" group.byte 0x12A++0x00 line.byte 0x00 "HC42,UDB Channel HC Tile Configuration" group.byte 0x12B++0x00 line.byte 0x00 "HC43,UDB Channel HC Tile Configuration" group.byte 0x12C++0x00 line.byte 0x00 "HC44,UDB Channel HC Tile Configuration" group.byte 0x12D++0x00 line.byte 0x00 "HC45,UDB Channel HC Tile Configuration" group.byte 0x12E++0x00 line.byte 0x00 "HC46,UDB Channel HC Tile Configuration" group.byte 0x12F++0x00 line.byte 0x00 "HC47,UDB Channel HC Tile Configuration" group.byte 0x130++0x00 line.byte 0x00 "HC48,UDB Channel HC Tile Configuration" group.byte 0x131++0x00 line.byte 0x00 "HC49,UDB Channel HC Tile Configuration" group.byte 0x132++0x00 line.byte 0x00 "HC50,UDB Channel HC Tile Configuration" group.byte 0x133++0x00 line.byte 0x00 "HC51,UDB Channel HC Tile Configuration" group.byte 0x134++0x00 line.byte 0x00 "HC52,UDB Channel HC Tile Configuration" group.byte 0x135++0x00 line.byte 0x00 "HC53,UDB Channel HC Tile Configuration" group.byte 0x136++0x00 line.byte 0x00 "HC54,UDB Channel HC Tile Configuration" group.byte 0x137++0x00 line.byte 0x00 "HC55,UDB Channel HC Tile Configuration" group.byte 0x138++0x00 line.byte 0x00 "HC56,UDB Channel HC Tile Configuration" group.byte 0x139++0x00 line.byte 0x00 "HC57,UDB Channel HC Tile Configuration" group.byte 0x13A++0x00 line.byte 0x00 "HC58,UDB Channel HC Tile Configuration" group.byte 0x13B++0x00 line.byte 0x00 "HC59,UDB Channel HC Tile Configuration" group.byte 0x13C++0x00 line.byte 0x00 "HC60,UDB Channel HC Tile Configuration" group.byte 0x13D++0x00 line.byte 0x00 "HC61,UDB Channel HC Tile Configuration" group.byte 0x13E++0x00 line.byte 0x00 "HC62,UDB Channel HC Tile Configuration" group.byte 0x13F++0x00 line.byte 0x00 "HC63,UDB Channel HC Tile Configuration" group.byte 0x140++0x00 line.byte 0x00 "HC64,UDB Channel HC Tile Configuration" group.byte 0x141++0x00 line.byte 0x00 "HC65,UDB Channel HC Tile Configuration" group.byte 0x142++0x00 line.byte 0x00 "HC66,UDB Channel HC Tile Configuration" group.byte 0x143++0x00 line.byte 0x00 "HC67,UDB Channel HC Tile Configuration" group.byte 0x144++0x00 line.byte 0x00 "HC68,UDB Channel HC Tile Configuration" group.byte 0x145++0x00 line.byte 0x00 "HC69,UDB Channel HC Tile Configuration" group.byte 0x146++0x00 line.byte 0x00 "HC70,UDB Channel HC Tile Configuration" group.byte 0x147++0x00 line.byte 0x00 "HC71,UDB Channel HC Tile Configuration" group.byte 0x148++0x00 line.byte 0x00 "HC72,UDB Channel HC Tile Configuration" group.byte 0x149++0x00 line.byte 0x00 "HC73,UDB Channel HC Tile Configuration" group.byte 0x14A++0x00 line.byte 0x00 "HC74,UDB Channel HC Tile Configuration" group.byte 0x14B++0x00 line.byte 0x00 "HC75,UDB Channel HC Tile Configuration" group.byte 0x14C++0x00 line.byte 0x00 "HC76,UDB Channel HC Tile Configuration" group.byte 0x14D++0x00 line.byte 0x00 "HC77,UDB Channel HC Tile Configuration" group.byte 0x14E++0x00 line.byte 0x00 "HC78,UDB Channel HC Tile Configuration" group.byte 0x14F++0x00 line.byte 0x00 "HC79,UDB Channel HC Tile Configuration" group.byte 0x150++0x00 line.byte 0x00 "HC80,UDB Channel HC Tile Configuration" group.byte 0x151++0x00 line.byte 0x00 "HC81,UDB Channel HC Tile Configuration" group.byte 0x152++0x00 line.byte 0x00 "HC82,UDB Channel HC Tile Configuration" group.byte 0x153++0x00 line.byte 0x00 "HC83,UDB Channel HC Tile Configuration" group.byte 0x154++0x00 line.byte 0x00 "HC84,UDB Channel HC Tile Configuration" group.byte 0x155++0x00 line.byte 0x00 "HC85,UDB Channel HC Tile Configuration" group.byte 0x156++0x00 line.byte 0x00 "HC86,UDB Channel HC Tile Configuration" group.byte 0x157++0x00 line.byte 0x00 "HC87,UDB Channel HC Tile Configuration" group.byte 0x158++0x00 line.byte 0x00 "HC88,UDB Channel HC Tile Configuration" group.byte 0x159++0x00 line.byte 0x00 "HC89,UDB Channel HC Tile Configuration" group.byte 0x15A++0x00 line.byte 0x00 "HC90,UDB Channel HC Tile Configuration" group.byte 0x15B++0x00 line.byte 0x00 "HC91,UDB Channel HC Tile Configuration" group.byte 0x15C++0x00 line.byte 0x00 "HC92,UDB Channel HC Tile Configuration" group.byte 0x15D++0x00 line.byte 0x00 "HC93,UDB Channel HC Tile Configuration" group.byte 0x15E++0x00 line.byte 0x00 "HC94,UDB Channel HC Tile Configuration" group.byte 0x15F++0x00 line.byte 0x00 "HC95,UDB Channel HC Tile Configuration" group.byte 0x160++0x00 line.byte 0x00 "HC96,UDB Channel HC Tile Configuration" group.byte 0x161++0x00 line.byte 0x00 "HC97,UDB Channel HC Tile Configuration" group.byte 0x162++0x00 line.byte 0x00 "HC98,UDB Channel HC Tile Configuration" group.byte 0x163++0x00 line.byte 0x00 "HC99,UDB Channel HC Tile Configuration" group.byte 0x164++0x00 line.byte 0x00 "HC100,UDB Channel HC Tile Configuration" group.byte 0x165++0x00 line.byte 0x00 "HC101,UDB Channel HC Tile Configuration" group.byte 0x166++0x00 line.byte 0x00 "HC102,UDB Channel HC Tile Configuration" group.byte 0x167++0x00 line.byte 0x00 "HC103,UDB Channel HC Tile Configuration" group.byte 0x168++0x00 line.byte 0x00 "HC104,UDB Channel HC Tile Configuration" group.byte 0x169++0x00 line.byte 0x00 "HC105,UDB Channel HC Tile Configuration" group.byte 0x16A++0x00 line.byte 0x00 "HC106,UDB Channel HC Tile Configuration" group.byte 0x16B++0x00 line.byte 0x00 "HC107,UDB Channel HC Tile Configuration" group.byte 0x16C++0x00 line.byte 0x00 "HC108,UDB Channel HC Tile Configuration" group.byte 0x16D++0x00 line.byte 0x00 "HC109,UDB Channel HC Tile Configuration" group.byte 0x16E++0x00 line.byte 0x00 "HC110,UDB Channel HC Tile Configuration" group.byte 0x16F++0x00 line.byte 0x00 "HC111,UDB Channel HC Tile Configuration" group.byte 0x170++0x00 line.byte 0x00 "HC112,UDB Channel HC Tile Configuration" group.byte 0x171++0x00 line.byte 0x00 "HC113,UDB Channel HC Tile Configuration" group.byte 0x172++0x00 line.byte 0x00 "HC114,UDB Channel HC Tile Configuration" group.byte 0x173++0x00 line.byte 0x00 "HC115,UDB Channel HC Tile Configuration" group.byte 0x174++0x00 line.byte 0x00 "HC116,UDB Channel HC Tile Configuration" group.byte 0x175++0x00 line.byte 0x00 "HC117,UDB Channel HC Tile Configuration" group.byte 0x176++0x00 line.byte 0x00 "HC118,UDB Channel HC Tile Configuration" group.byte 0x177++0x00 line.byte 0x00 "HC119,UDB Channel HC Tile Configuration" group.byte 0x178++0x00 line.byte 0x00 "HC120,UDB Channel HC Tile Configuration" group.byte 0x179++0x00 line.byte 0x00 "HC121,UDB Channel HC Tile Configuration" group.byte 0x17A++0x00 line.byte 0x00 "HC122,UDB Channel HC Tile Configuration" group.byte 0x17B++0x00 line.byte 0x00 "HC123,UDB Channel HC Tile Configuration" group.byte 0x17C++0x00 line.byte 0x00 "HC124,UDB Channel HC Tile Configuration" group.byte 0x17D++0x00 line.byte 0x00 "HC125,UDB Channel HC Tile Configuration" group.byte 0x17E++0x00 line.byte 0x00 "HC126,UDB Channel HC Tile Configuration" group.byte 0x17F++0x00 line.byte 0x00 "HC127,UDB Channel HC Tile Configuration" group.byte 0x180++0x00 line.byte 0x00 "HV_L0,UDB Channel HV Tile Configuration" group.byte 0x181++0x00 line.byte 0x00 "HV_L1,UDB Channel HV Tile Configuration" group.byte 0x182++0x00 line.byte 0x00 "HV_L2,UDB Channel HV Tile Configuration" group.byte 0x183++0x00 line.byte 0x00 "HV_L3,UDB Channel HV Tile Configuration" group.byte 0x184++0x00 line.byte 0x00 "HV_L4,UDB Channel HV Tile Configuration" group.byte 0x185++0x00 line.byte 0x00 "HV_L5,UDB Channel HV Tile Configuration" group.byte 0x186++0x00 line.byte 0x00 "HV_L6,UDB Channel HV Tile Configuration" group.byte 0x187++0x00 line.byte 0x00 "HV_L7,UDB Channel HV Tile Configuration" group.byte 0x188++0x00 line.byte 0x00 "HV_L8,UDB Channel HV Tile Configuration" group.byte 0x189++0x00 line.byte 0x00 "HV_L9,UDB Channel HV Tile Configuration" group.byte 0x18A++0x00 line.byte 0x00 "HV_L10,UDB Channel HV Tile Configuration" group.byte 0x18B++0x00 line.byte 0x00 "HV_L11,UDB Channel HV Tile Configuration" group.byte 0x18C++0x00 line.byte 0x00 "HV_L12,UDB Channel HV Tile Configuration" group.byte 0x18D++0x00 line.byte 0x00 "HV_L13,UDB Channel HV Tile Configuration" group.byte 0x18E++0x00 line.byte 0x00 "HV_L14,UDB Channel HV Tile Configuration" group.byte 0x18F++0x00 line.byte 0x00 "HV_L15,UDB Channel HV Tile Configuration" group.byte 0x190++0x00 line.byte 0x00 "HS0,UDB Channel HS Tile Configuration" group.byte 0x191++0x00 line.byte 0x00 "HS1,UDB Channel HS Tile Configuration" group.byte 0x192++0x00 line.byte 0x00 "HS2,UDB Channel HS Tile Configuration" group.byte 0x193++0x00 line.byte 0x00 "HS3,UDB Channel HS Tile Configuration" group.byte 0x194++0x00 line.byte 0x00 "HS4,UDB Channel HS Tile Configuration" group.byte 0x195++0x00 line.byte 0x00 "HS5,UDB Channel HS Tile Configuration" group.byte 0x196++0x00 line.byte 0x00 "HS6,UDB Channel HS Tile Configuration" group.byte 0x197++0x00 line.byte 0x00 "HS7,UDB Channel HS Tile Configuration" group.byte 0x198++0x00 line.byte 0x00 "HS8,UDB Channel HS Tile Configuration" group.byte 0x199++0x00 line.byte 0x00 "HS9,UDB Channel HS Tile Configuration" group.byte 0x19A++0x00 line.byte 0x00 "HS10,UDB Channel HS Tile Configuration" group.byte 0x19B++0x00 line.byte 0x00 "HS11,UDB Channel HS Tile Configuration" group.byte 0x19C++0x00 line.byte 0x00 "HS12,UDB Channel HS Tile Configuration" group.byte 0x19D++0x00 line.byte 0x00 "HS13,UDB Channel HS Tile Configuration" group.byte 0x19E++0x00 line.byte 0x00 "HS14,UDB Channel HS Tile Configuration" group.byte 0x19F++0x00 line.byte 0x00 "HS15,UDB Channel HS Tile Configuration" group.byte 0x1A0++0x00 line.byte 0x00 "HS16,UDB Channel HS Tile Configuration" group.byte 0x1A1++0x00 line.byte 0x00 "HS17,UDB Channel HS Tile Configuration" group.byte 0x1A2++0x00 line.byte 0x00 "HS18,UDB Channel HS Tile Configuration" group.byte 0x1A3++0x00 line.byte 0x00 "HS19,UDB Channel HS Tile Configuration" group.byte 0x1A4++0x00 line.byte 0x00 "HS20,UDB Channel HS Tile Configuration" group.byte 0x1A5++0x00 line.byte 0x00 "HS21,UDB Channel HS Tile Configuration" group.byte 0x1A6++0x00 line.byte 0x00 "HS22,UDB Channel HS Tile Configuration" group.byte 0x1A7++0x00 line.byte 0x00 "HS23,UDB Channel HS Tile Configuration" group.byte 0x1A8++0x00 line.byte 0x00 "HV_R0,UDB Channel HV Tile Configuration" group.byte 0x1A9++0x00 line.byte 0x00 "HV_R1,UDB Channel HV Tile Configuration" group.byte 0x1AA++0x00 line.byte 0x00 "HV_R2,UDB Channel HV Tile Configuration" group.byte 0x1AB++0x00 line.byte 0x00 "HV_R3,UDB Channel HV Tile Configuration" group.byte 0x1AC++0x00 line.byte 0x00 "HV_R4,UDB Channel HV Tile Configuration" group.byte 0x1AD++0x00 line.byte 0x00 "HV_R5,UDB Channel HV Tile Configuration" group.byte 0x1AE++0x00 line.byte 0x00 "HV_R6,UDB Channel HV Tile Configuration" group.byte 0x1AF++0x00 line.byte 0x00 "HV_R7,UDB Channel HV Tile Configuration" group.byte 0x1B0++0x00 line.byte 0x00 "HV_R8,UDB Channel HV Tile Configuration" group.byte 0x1B1++0x00 line.byte 0x00 "HV_R9,UDB Channel HV Tile Configuration" group.byte 0x1B2++0x00 line.byte 0x00 "HV_R10,UDB Channel HV Tile Configuration" group.byte 0x1B3++0x00 line.byte 0x00 "HV_R11,UDB Channel HV Tile Configuration" group.byte 0x1B4++0x00 line.byte 0x00 "HV_R12,UDB Channel HV Tile Configuration" group.byte 0x1B5++0x00 line.byte 0x00 "HV_R13,UDB Channel HV Tile Configuration" group.byte 0x1B6++0x00 line.byte 0x00 "HV_R14,UDB Channel HV Tile Configuration" group.byte 0x1B7++0x00 line.byte 0x00 "HV_R15,UDB Channel HV Tile Configuration" group.byte 0x1C0++0x00 line.byte 0x00 "PLD0IN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1C2++0x00 line.byte 0x00 "PLD0IN1,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1C4++0x00 line.byte 0x00 "PLD0IN2,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CA++0x00 line.byte 0x00 "PLD1IN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CC++0x00 line.byte 0x00 "PLD1IN1,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CE++0x00 line.byte 0x00 "PLD1IN2,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d0++0x00 line.byte 0x00 "DPIN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d2++0x00 line.byte 0x00 "DPIN1,UDB Channel PI Tile Configuration (half populated)" hexmask.byte 0x00 4.--5. 1. " PI_BOT ,RAM configuration for BOTTOM UDB port interface configuration" hexmask.byte 0x00 2.--3. 1. " PI_TOP ,RAM configuration for TOP UDB port interface configuration" group.byte 0x1d6++0x00 line.byte 0x00 "SCIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d8++0x00 line.byte 0x00 "SCIOIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1de++0x00 line.byte 0x00 "RCIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1E0++0x00 line.byte 0x00 "VS0,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E2++0x00 line.byte 0x00 "VS1,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E4++0x00 line.byte 0x00 "VS2,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E6++0x00 line.byte 0x00 "VS3,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E8++0x00 line.byte 0x00 "VS4,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EA++0x00 line.byte 0x00 "VS5,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EC++0x00 line.byte 0x00 "VS6,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EE++0x00 line.byte 0x00 "VS7,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" width 0x0B tree.end tree.end base ad:(0x40010000+0xA00) tree "P 5" tree "U 0" width 18. group.long 0x0++0x03 line.long 0x00 "PLD_IT0,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT0C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT0C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x4++0x03 line.long 0x00 "PLD_IT1,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT1C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT1C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x8++0x03 line.long 0x00 "PLD_IT2,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT2C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT2C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xC++0x03 line.long 0x00 "PLD_IT3,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT3C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT3C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x10++0x03 line.long 0x00 "PLD_IT4,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT4C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT4C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x14++0x03 line.long 0x00 "PLD_IT5,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT5C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT5C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x18++0x03 line.long 0x00 "PLD_IT6,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT6C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT6C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x1C++0x03 line.long 0x00 "PLD_IT7,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT7C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT7C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x20++0x03 line.long 0x00 "PLD_IT8,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT8C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT8C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x24++0x03 line.long 0x00 "PLD_IT9,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT9C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT9C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x28++0x03 line.long 0x00 "PLD_IT10,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT10C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT10C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x2C++0x03 line.long 0x00 "PLD_IT11,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " group.word 0x30++0x01 line.word 0x00 "PLD_ORT0,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT0_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT0_0 ,OR term" "Not OR,OR" group.word 0x32++0x01 line.word 0x00 "PLD_ORT1,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT1_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT1_0 ,OR term" "Not OR,OR" group.word 0x34++0x01 line.word 0x00 "PLD_ORT2,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT2_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT2_0 ,OR term" "Not OR,OR" group.word 0x36++0x01 line.word 0x00 "PLD_ORT3,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " group.word (0x30+0x08)++0x07 line.word 0x00 "MC_CFG_CEN_CONST,Macrocell Configuration for Carry Enable and Constant" bitfld.word 0x00 15. " PLD1_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 14. " PLD1_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 13. " PLD1_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 12. " PLD1_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " PLD1_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 10. " PLD1_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " PLD1_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 8. " PLD1_MC0_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " PLD0_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 6. " PLD0_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " PLD0_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 4. " PLD0_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " PLD0_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 2. " PLD0_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " PLD0_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 0. " PLD0_MC0_CEN ,Carry enable" "Disabled,Enabled" line.word 0x02 "MC_CFG_XORFB,Macrocell Configuration for XOR Feedback" bitfld.word 0x02 14.--15. " PLD1_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 12.--13. " PLD1_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 10.--11. " PLD1_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 8.--9. " PLD1_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 6.--7. " PLD0_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 4.--5. " PLD0_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 2.--3. " PLD0_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 0.--1. " PLD0_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" line.word 0x04 "MC_CFG_SET_RESET,Macrocell Configuration for Set and Reset" bitfld.word 0x04 15. " PLD1_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 14. " PLD1_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 13. " PLD1_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 12. " PLD1_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 11. " PLD1_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 10. " PLD1_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 9. " PLD1_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 8. " PLD1_MC0_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 7. " PLD0_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 6. " PLD0_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 5. " PLD0_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 4. " PLD0_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 3. " PLD0_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 2. " PLD0_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 1. " PLD0_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 0. " PLD0_MC0_SET_SEL ,Set select enable" "Not set,Set" line.word 0x06 "MC_CFG_BYPASS,Macrocell Configuration for Bypass" bitfld.word 0x06 14. " PLD1_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 12. " PLD1_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 10. " PLD1_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 8. " PLD1_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 6. " PLD0_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 4. " PLD0_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 2. " PLD0_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 0. " PLD0_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " group.byte (0x30+0x10)++0x10 line.byte 0x00 "CFG0,Datapath Input Selection" bitfld.byte 0x00 4.--6. " RAD1 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x00 0.--2. " RAD0 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x01 "CFG1,Datapath Input Selection" bitfld.byte 0x01 0.--2. " RAD2 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x02 "CFG2,Datapath Input Selection" bitfld.byte 0x02 4.--6. " F1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x02 0.--2. " F0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x03 "CFG3,Datapath Input Selection" bitfld.byte 0x03 4.--6. " D1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x03 0.--2. " D0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x04 "CFG4,Datapath Input Selection" bitfld.byte 0x04 4.--6. " CI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x04 0.--2. " SI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x05 "CFG5,Datapath Output Selection" bitfld.byte 0x05 4.--7. " OUT1 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x05 0.--3. " OUT0 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x06 "CFG6,Datapath Output Selection" bitfld.byte 0x06 4.--7. " OUT3 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x06 0.--3. " OUT2 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x07 "CFG7,Datapath Output Selection" bitfld.byte 0x07 4.--7. " OUT5 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x07 0.--3. " OUT4 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x08 "CFG8,Datapath Output Synchronization" hexmask.byte 0x08 0.--5. 1. " OUT_SYNC ,Output Synchronization field" line.byte 0x09 "CFG9,ALU Mask" line.byte 0x0a "CFG10,Compare 0 Mask" line.byte 0x0b "CFG11,Compare 1 Mask" line.byte 0x0c "CFG12,Datapath Static Configuration" bitfld.byte 0x0c 7. " CMASK1_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 6. " CMASK0_EN ,Datapath mask enable" "Disabled,Enabled" textline " " bitfld.byte 0x0c 5. " AMASK_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 4. " DEF_SI ,Datapath default shift value" "0,1" textline " " bitfld.byte 0x0c 2.--3. " SI_SELB ,Datapath shift in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0c 0.--1. " SI_SELA ,Datapath shift in source select" "Default,Registered,Route,Chain" line.byte 0x0d "CFG13,Datapath Static Configuration" bitfld.byte 0x0d 6.--7. " CMP_SELB ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" bitfld.byte 0x0d 4.--5. " CMP_SELA ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" textline " " bitfld.byte 0x0d 2.--3. " CI_SELB ,Datapath carry in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0d 0.--1. " CI_SELA ,Datapath carry in source select" "Default,Registered,Route,Chain" line.byte 0x0e "CFG14,Datapath Static Configuration" bitfld.byte 0x0e 7. " MSB_EN ,Datapath MSB selection enable" "Disabled,Enabled" bitfld.byte 0x0e 4.--6. " MSB_SEL ,Datapath MSB Selection" "Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7" textline " " bitfld.byte 0x0e 3. " CHAIN_CMSB ,Datapath CRC MSB chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 2. " CHAIN_FB ,Datapath CRC feedback chaining enable" "Disabled,Enabled" textline " " bitfld.byte 0x0e 1. " CHAIN1 ,Datapath condition chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 0. " CHAIN0 ,Datapath condition chaining enable" "Disabled,Enabled" line.byte 0x0f "CFG15,Datapath Static Configuration" bitfld.byte 0x0f 7. " PI_SEL ,Datapath parallel input selection" "Normal,Parallel" bitfld.byte 0x0f 6. " SHIFT_SEL ,Datapath shift out selection" "SOL_MSB,SOR" textline " " bitfld.byte 0x0f 5. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x0f 4. " NC0 ,Spare register bit" "0,1" textline " " bitfld.byte 0x0f 2.--3. " F1_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" bitfld.byte 0x0f 0.--1. " F0_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" line.byte 0x10 "CFG16,Datapath Static Configuration" bitfld.byte 0x10 7. " F1_CK_INV ,FIFO Clock Invert" "Normal,Inverted" bitfld.byte 0x10 6. " F0_CK_INV ,FIFO Clock Invert" "Normal,Inverted" textline " " bitfld.byte 0x10 5. " FIFO_FAST ,FIFO Fast Mode" "Disabled,Enabled" bitfld.byte 0x10 4. " FIFO_CAP ,FIFO Software Capture Mode" "Disabled,Enabled" textline " " bitfld.byte 0x10 3. " FIFO_EDGE ,Edge/level sensitive FIFO write control" "Level,Edge" bitfld.byte 0x10 2. " FIFO_ASYNC ,Asynchronous FIFO clocking support" "Synchronous,Asynchronous" textline " " bitfld.byte 0x10 1. " EXT_CRCPRS ,External CRC/PRS mode" "Internal,External" bitfld.byte 0x10 0. " WRK16_CONCAT ,Datapath register access mode" "Default,Concatenate" group.byte (0x30+0x24)++0x03 line.byte 0x00 "CFG20,Status input mode selection" line.byte 0x01 "CFG21,Spare register bits" bitfld.byte 0x01 1. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x01 0. " NC0 ,Spare register bit" "0,1" line.byte 0x02 "CFG22,Status Output Control" bitfld.byte 0x02 3. " SC_SYNC_MD ,SC Sync Mode" "Disabled,Enabled" bitfld.byte 0x02 2. " SC_INT_MD ,SC Interrupt Mode" "Normal,INT_MODE" textline " " bitfld.byte 0x02 0.--1. " SC_OUT_CTL ,Selects the output source for the Status and Control routing connections" "Control,Parallel,Counter,?..." line.byte 0x03 "CFG23,Counter Routing Control" bitfld.byte 0x03 5. " ROUTE_EN ,Configure the counter enable signal for routing input" "Disabled,Enabled" bitfld.byte 0x03 4. " ROUTE_LD ,Configure the counter load signal for routing input" "Disabled,Enabled" textline " " bitfld.byte 0x03 2.--3. " CNT_EN_SEL ,Selects the routing inputs for the counter enable signal" "SC_IN4,SC_IN5,SC_IN6,SC_IO" bitfld.byte 0x03 0.--1. " CNT_LD_SEL ,Selects the routing inputs for the counter load signal" "SC_IN0,SC_IN1,SC_IN2,SC_IN3" group.byte (0x30+0x28)++0x00 line.byte 0x00 "CFG24,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x29)++0x00 line.byte 0x00 "CFG25,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2A)++0x00 line.byte 0x00 "CFG26,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2B)++0x00 line.byte 0x00 "CFG27,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2C)++0x03 line.byte 0x00 "CFG28,Clock Selection" bitfld.byte 0x00 4.--7. " PLD1_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x00 0.--3. " PLD0_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x01 "CFG29,Clock Selection" bitfld.byte 0x01 4.--7. " SC_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x01 0.--3. " DP_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x02 "CFG30,Reset Selection Register" bitfld.byte 0x02 4. " GUDB_WR ,Enable global write operation for the configuration and working registers in this UDB" "Disabled,Enabled" bitfld.byte 0x02 3. " EN_RES_CNT ,Enable routed reset to counter/control register" "Disabled,Enabled" textline " " bitfld.byte 0x02 2. " RES_POL ,Select polarity of the routed reset control" "Not inverted,Inverted" bitfld.byte 0x02 0.--1. " RES_SEL ,Select routing input for routed reset control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" line.byte 0x03 "CFG31,Reset and Clock Input Enable" bitfld.byte 0x03 4.--5. " EXT_CK_SEL ,External clock selection" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" bitfld.byte 0x03 1. " EXT_SYNC ,Enable synchronization of selected external clock" "Disabled,Enabled" textline " " bitfld.byte 0x03 0. " NC0 ,Spare register bit" "0,1" group.word 0x60++0x01 line.word 0x00 "DCFG0,Dynamic Configuration RAM Register 0" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x62++0x01 line.word 0x00 "DCFG1,Dynamic Configuration RAM Register 1" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x64++0x01 line.word 0x00 "DCFG2,Dynamic Configuration RAM Register 2" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x66++0x01 line.word 0x00 "DCFG3,Dynamic Configuration RAM Register 3" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x68++0x01 line.word 0x00 "DCFG4,Dynamic Configuration RAM Register 4" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6A++0x01 line.word 0x00 "DCFG5,Dynamic Configuration RAM Register 5" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6C++0x01 line.word 0x00 "DCFG6,Dynamic Configuration RAM Register 6" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6E++0x01 line.word 0x00 "DCFG7,Dynamic Configuration RAM Register 7" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" width 0x0B tree.end tree "U 1" width 18. group.long 0x80++0x03 line.long 0x00 "PLD_IT0,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT0C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT0C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x84++0x03 line.long 0x00 "PLD_IT1,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT1C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT1C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x88++0x03 line.long 0x00 "PLD_IT2,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT2C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT2C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x8C++0x03 line.long 0x00 "PLD_IT3,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT3C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT3C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x90++0x03 line.long 0x00 "PLD_IT4,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT4C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT4C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x94++0x03 line.long 0x00 "PLD_IT5,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT5C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT5C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x98++0x03 line.long 0x00 "PLD_IT6,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT6C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT6C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x9C++0x03 line.long 0x00 "PLD_IT7,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT7C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT7C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA0++0x03 line.long 0x00 "PLD_IT8,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT8C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT8C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA4++0x03 line.long 0x00 "PLD_IT9,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT9C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT9C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA8++0x03 line.long 0x00 "PLD_IT10,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT10C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT10C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xAC++0x03 line.long 0x00 "PLD_IT11,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " group.word 0xB0++0x01 line.word 0x00 "PLD_ORT0,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT0_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT0_0 ,OR term" "Not OR,OR" group.word 0xB2++0x01 line.word 0x00 "PLD_ORT1,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT1_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT1_0 ,OR term" "Not OR,OR" group.word 0xB4++0x01 line.word 0x00 "PLD_ORT2,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT2_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT2_0 ,OR term" "Not OR,OR" group.word 0xB6++0x01 line.word 0x00 "PLD_ORT3,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " group.word (0xB0+0x08)++0x07 line.word 0x00 "MC_CFG_CEN_CONST,Macrocell Configuration for Carry Enable and Constant" bitfld.word 0x00 15. " PLD1_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 14. " PLD1_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 13. " PLD1_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 12. " PLD1_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " PLD1_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 10. " PLD1_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " PLD1_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 8. " PLD1_MC0_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " PLD0_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 6. " PLD0_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " PLD0_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 4. " PLD0_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " PLD0_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 2. " PLD0_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " PLD0_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 0. " PLD0_MC0_CEN ,Carry enable" "Disabled,Enabled" line.word 0x02 "MC_CFG_XORFB,Macrocell Configuration for XOR Feedback" bitfld.word 0x02 14.--15. " PLD1_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 12.--13. " PLD1_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 10.--11. " PLD1_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 8.--9. " PLD1_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 6.--7. " PLD0_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 4.--5. " PLD0_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 2.--3. " PLD0_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 0.--1. " PLD0_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" line.word 0x04 "MC_CFG_SET_RESET,Macrocell Configuration for Set and Reset" bitfld.word 0x04 15. " PLD1_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 14. " PLD1_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 13. " PLD1_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 12. " PLD1_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 11. " PLD1_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 10. " PLD1_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 9. " PLD1_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 8. " PLD1_MC0_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 7. " PLD0_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 6. " PLD0_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 5. " PLD0_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 4. " PLD0_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 3. " PLD0_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 2. " PLD0_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 1. " PLD0_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 0. " PLD0_MC0_SET_SEL ,Set select enable" "Not set,Set" line.word 0x06 "MC_CFG_BYPASS,Macrocell Configuration for Bypass" bitfld.word 0x06 14. " PLD1_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 12. " PLD1_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 10. " PLD1_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 8. " PLD1_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 6. " PLD0_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 4. " PLD0_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 2. " PLD0_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 0. " PLD0_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " group.byte (0xB0+0x10)++0x10 line.byte 0x00 "CFG0,Datapath Input Selection" bitfld.byte 0x00 4.--6. " RAD1 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x00 0.--2. " RAD0 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x01 "CFG1,Datapath Input Selection" bitfld.byte 0x01 0.--2. " RAD2 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x02 "CFG2,Datapath Input Selection" bitfld.byte 0x02 4.--6. " F1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x02 0.--2. " F0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x03 "CFG3,Datapath Input Selection" bitfld.byte 0x03 4.--6. " D1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x03 0.--2. " D0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x04 "CFG4,Datapath Input Selection" bitfld.byte 0x04 4.--6. " CI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x04 0.--2. " SI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x05 "CFG5,Datapath Output Selection" bitfld.byte 0x05 4.--7. " OUT1 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x05 0.--3. " OUT0 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x06 "CFG6,Datapath Output Selection" bitfld.byte 0x06 4.--7. " OUT3 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x06 0.--3. " OUT2 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x07 "CFG7,Datapath Output Selection" bitfld.byte 0x07 4.--7. " OUT5 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x07 0.--3. " OUT4 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x08 "CFG8,Datapath Output Synchronization" hexmask.byte 0x08 0.--5. 1. " OUT_SYNC ,Output Synchronization field" line.byte 0x09 "CFG9,ALU Mask" line.byte 0x0a "CFG10,Compare 0 Mask" line.byte 0x0b "CFG11,Compare 1 Mask" line.byte 0x0c "CFG12,Datapath Static Configuration" bitfld.byte 0x0c 7. " CMASK1_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 6. " CMASK0_EN ,Datapath mask enable" "Disabled,Enabled" textline " " bitfld.byte 0x0c 5. " AMASK_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 4. " DEF_SI ,Datapath default shift value" "0,1" textline " " bitfld.byte 0x0c 2.--3. " SI_SELB ,Datapath shift in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0c 0.--1. " SI_SELA ,Datapath shift in source select" "Default,Registered,Route,Chain" line.byte 0x0d "CFG13,Datapath Static Configuration" bitfld.byte 0x0d 6.--7. " CMP_SELB ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" bitfld.byte 0x0d 4.--5. " CMP_SELA ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" textline " " bitfld.byte 0x0d 2.--3. " CI_SELB ,Datapath carry in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0d 0.--1. " CI_SELA ,Datapath carry in source select" "Default,Registered,Route,Chain" line.byte 0x0e "CFG14,Datapath Static Configuration" bitfld.byte 0x0e 7. " MSB_EN ,Datapath MSB selection enable" "Disabled,Enabled" bitfld.byte 0x0e 4.--6. " MSB_SEL ,Datapath MSB Selection" "Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7" textline " " bitfld.byte 0x0e 3. " CHAIN_CMSB ,Datapath CRC MSB chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 2. " CHAIN_FB ,Datapath CRC feedback chaining enable" "Disabled,Enabled" textline " " bitfld.byte 0x0e 1. " CHAIN1 ,Datapath condition chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 0. " CHAIN0 ,Datapath condition chaining enable" "Disabled,Enabled" line.byte 0x0f "CFG15,Datapath Static Configuration" bitfld.byte 0x0f 7. " PI_SEL ,Datapath parallel input selection" "Normal,Parallel" bitfld.byte 0x0f 6. " SHIFT_SEL ,Datapath shift out selection" "SOL_MSB,SOR" textline " " bitfld.byte 0x0f 5. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x0f 4. " NC0 ,Spare register bit" "0,1" textline " " bitfld.byte 0x0f 2.--3. " F1_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" bitfld.byte 0x0f 0.--1. " F0_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" line.byte 0x10 "CFG16,Datapath Static Configuration" bitfld.byte 0x10 7. " F1_CK_INV ,FIFO Clock Invert" "Normal,Inverted" bitfld.byte 0x10 6. " F0_CK_INV ,FIFO Clock Invert" "Normal,Inverted" textline " " bitfld.byte 0x10 5. " FIFO_FAST ,FIFO Fast Mode" "Disabled,Enabled" bitfld.byte 0x10 4. " FIFO_CAP ,FIFO Software Capture Mode" "Disabled,Enabled" textline " " bitfld.byte 0x10 3. " FIFO_EDGE ,Edge/level sensitive FIFO write control" "Level,Edge" bitfld.byte 0x10 2. " FIFO_ASYNC ,Asynchronous FIFO clocking support" "Synchronous,Asynchronous" textline " " bitfld.byte 0x10 1. " EXT_CRCPRS ,External CRC/PRS mode" "Internal,External" bitfld.byte 0x10 0. " WRK16_CONCAT ,Datapath register access mode" "Default,Concatenate" group.byte (0xB0+0x24)++0x03 line.byte 0x00 "CFG20,Status input mode selection" line.byte 0x01 "CFG21,Spare register bits" bitfld.byte 0x01 1. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x01 0. " NC0 ,Spare register bit" "0,1" line.byte 0x02 "CFG22,Status Output Control" bitfld.byte 0x02 3. " SC_SYNC_MD ,SC Sync Mode" "Disabled,Enabled" bitfld.byte 0x02 2. " SC_INT_MD ,SC Interrupt Mode" "Normal,INT_MODE" textline " " bitfld.byte 0x02 0.--1. " SC_OUT_CTL ,Selects the output source for the Status and Control routing connections" "Control,Parallel,Counter,?..." line.byte 0x03 "CFG23,Counter Routing Control" bitfld.byte 0x03 5. " ROUTE_EN ,Configure the counter enable signal for routing input" "Disabled,Enabled" bitfld.byte 0x03 4. " ROUTE_LD ,Configure the counter load signal for routing input" "Disabled,Enabled" textline " " bitfld.byte 0x03 2.--3. " CNT_EN_SEL ,Selects the routing inputs for the counter enable signal" "SC_IN4,SC_IN5,SC_IN6,SC_IO" bitfld.byte 0x03 0.--1. " CNT_LD_SEL ,Selects the routing inputs for the counter load signal" "SC_IN0,SC_IN1,SC_IN2,SC_IN3" group.byte (0xB0+0x28)++0x00 line.byte 0x00 "CFG24,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x29)++0x00 line.byte 0x00 "CFG25,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2A)++0x00 line.byte 0x00 "CFG26,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2B)++0x00 line.byte 0x00 "CFG27,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2C)++0x03 line.byte 0x00 "CFG28,Clock Selection" bitfld.byte 0x00 4.--7. " PLD1_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x00 0.--3. " PLD0_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x01 "CFG29,Clock Selection" bitfld.byte 0x01 4.--7. " SC_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x01 0.--3. " DP_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x02 "CFG30,Reset Selection Register" bitfld.byte 0x02 4. " GUDB_WR ,Enable global write operation for the configuration and working registers in this UDB" "Disabled,Enabled" bitfld.byte 0x02 3. " EN_RES_CNT ,Enable routed reset to counter/control register" "Disabled,Enabled" textline " " bitfld.byte 0x02 2. " RES_POL ,Select polarity of the routed reset control" "Not inverted,Inverted" bitfld.byte 0x02 0.--1. " RES_SEL ,Select routing input for routed reset control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" line.byte 0x03 "CFG31,Reset and Clock Input Enable" bitfld.byte 0x03 4.--5. " EXT_CK_SEL ,External clock selection" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" bitfld.byte 0x03 1. " EXT_SYNC ,Enable synchronization of selected external clock" "Disabled,Enabled" textline " " bitfld.byte 0x03 0. " NC0 ,Spare register bit" "0,1" group.word 0xE0++0x01 line.word 0x00 "DCFG0,Dynamic Configuration RAM Register 0" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE2++0x01 line.word 0x00 "DCFG1,Dynamic Configuration RAM Register 1" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE4++0x01 line.word 0x00 "DCFG2,Dynamic Configuration RAM Register 2" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE6++0x01 line.word 0x00 "DCFG3,Dynamic Configuration RAM Register 3" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE8++0x01 line.word 0x00 "DCFG4,Dynamic Configuration RAM Register 4" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEA++0x01 line.word 0x00 "DCFG5,Dynamic Configuration RAM Register 5" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEC++0x01 line.word 0x00 "DCFG6,Dynamic Configuration RAM Register 6" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEE++0x01 line.word 0x00 "DCFG7,Dynamic Configuration RAM Register 7" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" width 0x0B tree.end tree "Route" width 9. group.byte 0x100++0x00 line.byte 0x00 "HC0,UDB Channel HC Tile Configuration" group.byte 0x101++0x00 line.byte 0x00 "HC1,UDB Channel HC Tile Configuration" group.byte 0x102++0x00 line.byte 0x00 "HC2,UDB Channel HC Tile Configuration" group.byte 0x103++0x00 line.byte 0x00 "HC3,UDB Channel HC Tile Configuration" group.byte 0x104++0x00 line.byte 0x00 "HC4,UDB Channel HC Tile Configuration" group.byte 0x105++0x00 line.byte 0x00 "HC5,UDB Channel HC Tile Configuration" group.byte 0x106++0x00 line.byte 0x00 "HC6,UDB Channel HC Tile Configuration" group.byte 0x107++0x00 line.byte 0x00 "HC7,UDB Channel HC Tile Configuration" group.byte 0x108++0x00 line.byte 0x00 "HC8,UDB Channel HC Tile Configuration" group.byte 0x109++0x00 line.byte 0x00 "HC9,UDB Channel HC Tile Configuration" group.byte 0x10A++0x00 line.byte 0x00 "HC10,UDB Channel HC Tile Configuration" group.byte 0x10B++0x00 line.byte 0x00 "HC11,UDB Channel HC Tile Configuration" group.byte 0x10C++0x00 line.byte 0x00 "HC12,UDB Channel HC Tile Configuration" group.byte 0x10D++0x00 line.byte 0x00 "HC13,UDB Channel HC Tile Configuration" group.byte 0x10E++0x00 line.byte 0x00 "HC14,UDB Channel HC Tile Configuration" group.byte 0x10F++0x00 line.byte 0x00 "HC15,UDB Channel HC Tile Configuration" group.byte 0x110++0x00 line.byte 0x00 "HC16,UDB Channel HC Tile Configuration" group.byte 0x111++0x00 line.byte 0x00 "HC17,UDB Channel HC Tile Configuration" group.byte 0x112++0x00 line.byte 0x00 "HC18,UDB Channel HC Tile Configuration" group.byte 0x113++0x00 line.byte 0x00 "HC19,UDB Channel HC Tile Configuration" group.byte 0x114++0x00 line.byte 0x00 "HC20,UDB Channel HC Tile Configuration" group.byte 0x115++0x00 line.byte 0x00 "HC21,UDB Channel HC Tile Configuration" group.byte 0x116++0x00 line.byte 0x00 "HC22,UDB Channel HC Tile Configuration" group.byte 0x117++0x00 line.byte 0x00 "HC23,UDB Channel HC Tile Configuration" group.byte 0x118++0x00 line.byte 0x00 "HC24,UDB Channel HC Tile Configuration" group.byte 0x119++0x00 line.byte 0x00 "HC25,UDB Channel HC Tile Configuration" group.byte 0x11A++0x00 line.byte 0x00 "HC26,UDB Channel HC Tile Configuration" group.byte 0x11B++0x00 line.byte 0x00 "HC27,UDB Channel HC Tile Configuration" group.byte 0x11C++0x00 line.byte 0x00 "HC28,UDB Channel HC Tile Configuration" group.byte 0x11D++0x00 line.byte 0x00 "HC29,UDB Channel HC Tile Configuration" group.byte 0x11E++0x00 line.byte 0x00 "HC30,UDB Channel HC Tile Configuration" group.byte 0x11F++0x00 line.byte 0x00 "HC31,UDB Channel HC Tile Configuration" group.byte 0x120++0x00 line.byte 0x00 "HC32,UDB Channel HC Tile Configuration" group.byte 0x121++0x00 line.byte 0x00 "HC33,UDB Channel HC Tile Configuration" group.byte 0x122++0x00 line.byte 0x00 "HC34,UDB Channel HC Tile Configuration" group.byte 0x123++0x00 line.byte 0x00 "HC35,UDB Channel HC Tile Configuration" group.byte 0x124++0x00 line.byte 0x00 "HC36,UDB Channel HC Tile Configuration" group.byte 0x125++0x00 line.byte 0x00 "HC37,UDB Channel HC Tile Configuration" group.byte 0x126++0x00 line.byte 0x00 "HC38,UDB Channel HC Tile Configuration" group.byte 0x127++0x00 line.byte 0x00 "HC39,UDB Channel HC Tile Configuration" group.byte 0x128++0x00 line.byte 0x00 "HC40,UDB Channel HC Tile Configuration" group.byte 0x129++0x00 line.byte 0x00 "HC41,UDB Channel HC Tile Configuration" group.byte 0x12A++0x00 line.byte 0x00 "HC42,UDB Channel HC Tile Configuration" group.byte 0x12B++0x00 line.byte 0x00 "HC43,UDB Channel HC Tile Configuration" group.byte 0x12C++0x00 line.byte 0x00 "HC44,UDB Channel HC Tile Configuration" group.byte 0x12D++0x00 line.byte 0x00 "HC45,UDB Channel HC Tile Configuration" group.byte 0x12E++0x00 line.byte 0x00 "HC46,UDB Channel HC Tile Configuration" group.byte 0x12F++0x00 line.byte 0x00 "HC47,UDB Channel HC Tile Configuration" group.byte 0x130++0x00 line.byte 0x00 "HC48,UDB Channel HC Tile Configuration" group.byte 0x131++0x00 line.byte 0x00 "HC49,UDB Channel HC Tile Configuration" group.byte 0x132++0x00 line.byte 0x00 "HC50,UDB Channel HC Tile Configuration" group.byte 0x133++0x00 line.byte 0x00 "HC51,UDB Channel HC Tile Configuration" group.byte 0x134++0x00 line.byte 0x00 "HC52,UDB Channel HC Tile Configuration" group.byte 0x135++0x00 line.byte 0x00 "HC53,UDB Channel HC Tile Configuration" group.byte 0x136++0x00 line.byte 0x00 "HC54,UDB Channel HC Tile Configuration" group.byte 0x137++0x00 line.byte 0x00 "HC55,UDB Channel HC Tile Configuration" group.byte 0x138++0x00 line.byte 0x00 "HC56,UDB Channel HC Tile Configuration" group.byte 0x139++0x00 line.byte 0x00 "HC57,UDB Channel HC Tile Configuration" group.byte 0x13A++0x00 line.byte 0x00 "HC58,UDB Channel HC Tile Configuration" group.byte 0x13B++0x00 line.byte 0x00 "HC59,UDB Channel HC Tile Configuration" group.byte 0x13C++0x00 line.byte 0x00 "HC60,UDB Channel HC Tile Configuration" group.byte 0x13D++0x00 line.byte 0x00 "HC61,UDB Channel HC Tile Configuration" group.byte 0x13E++0x00 line.byte 0x00 "HC62,UDB Channel HC Tile Configuration" group.byte 0x13F++0x00 line.byte 0x00 "HC63,UDB Channel HC Tile Configuration" group.byte 0x140++0x00 line.byte 0x00 "HC64,UDB Channel HC Tile Configuration" group.byte 0x141++0x00 line.byte 0x00 "HC65,UDB Channel HC Tile Configuration" group.byte 0x142++0x00 line.byte 0x00 "HC66,UDB Channel HC Tile Configuration" group.byte 0x143++0x00 line.byte 0x00 "HC67,UDB Channel HC Tile Configuration" group.byte 0x144++0x00 line.byte 0x00 "HC68,UDB Channel HC Tile Configuration" group.byte 0x145++0x00 line.byte 0x00 "HC69,UDB Channel HC Tile Configuration" group.byte 0x146++0x00 line.byte 0x00 "HC70,UDB Channel HC Tile Configuration" group.byte 0x147++0x00 line.byte 0x00 "HC71,UDB Channel HC Tile Configuration" group.byte 0x148++0x00 line.byte 0x00 "HC72,UDB Channel HC Tile Configuration" group.byte 0x149++0x00 line.byte 0x00 "HC73,UDB Channel HC Tile Configuration" group.byte 0x14A++0x00 line.byte 0x00 "HC74,UDB Channel HC Tile Configuration" group.byte 0x14B++0x00 line.byte 0x00 "HC75,UDB Channel HC Tile Configuration" group.byte 0x14C++0x00 line.byte 0x00 "HC76,UDB Channel HC Tile Configuration" group.byte 0x14D++0x00 line.byte 0x00 "HC77,UDB Channel HC Tile Configuration" group.byte 0x14E++0x00 line.byte 0x00 "HC78,UDB Channel HC Tile Configuration" group.byte 0x14F++0x00 line.byte 0x00 "HC79,UDB Channel HC Tile Configuration" group.byte 0x150++0x00 line.byte 0x00 "HC80,UDB Channel HC Tile Configuration" group.byte 0x151++0x00 line.byte 0x00 "HC81,UDB Channel HC Tile Configuration" group.byte 0x152++0x00 line.byte 0x00 "HC82,UDB Channel HC Tile Configuration" group.byte 0x153++0x00 line.byte 0x00 "HC83,UDB Channel HC Tile Configuration" group.byte 0x154++0x00 line.byte 0x00 "HC84,UDB Channel HC Tile Configuration" group.byte 0x155++0x00 line.byte 0x00 "HC85,UDB Channel HC Tile Configuration" group.byte 0x156++0x00 line.byte 0x00 "HC86,UDB Channel HC Tile Configuration" group.byte 0x157++0x00 line.byte 0x00 "HC87,UDB Channel HC Tile Configuration" group.byte 0x158++0x00 line.byte 0x00 "HC88,UDB Channel HC Tile Configuration" group.byte 0x159++0x00 line.byte 0x00 "HC89,UDB Channel HC Tile Configuration" group.byte 0x15A++0x00 line.byte 0x00 "HC90,UDB Channel HC Tile Configuration" group.byte 0x15B++0x00 line.byte 0x00 "HC91,UDB Channel HC Tile Configuration" group.byte 0x15C++0x00 line.byte 0x00 "HC92,UDB Channel HC Tile Configuration" group.byte 0x15D++0x00 line.byte 0x00 "HC93,UDB Channel HC Tile Configuration" group.byte 0x15E++0x00 line.byte 0x00 "HC94,UDB Channel HC Tile Configuration" group.byte 0x15F++0x00 line.byte 0x00 "HC95,UDB Channel HC Tile Configuration" group.byte 0x160++0x00 line.byte 0x00 "HC96,UDB Channel HC Tile Configuration" group.byte 0x161++0x00 line.byte 0x00 "HC97,UDB Channel HC Tile Configuration" group.byte 0x162++0x00 line.byte 0x00 "HC98,UDB Channel HC Tile Configuration" group.byte 0x163++0x00 line.byte 0x00 "HC99,UDB Channel HC Tile Configuration" group.byte 0x164++0x00 line.byte 0x00 "HC100,UDB Channel HC Tile Configuration" group.byte 0x165++0x00 line.byte 0x00 "HC101,UDB Channel HC Tile Configuration" group.byte 0x166++0x00 line.byte 0x00 "HC102,UDB Channel HC Tile Configuration" group.byte 0x167++0x00 line.byte 0x00 "HC103,UDB Channel HC Tile Configuration" group.byte 0x168++0x00 line.byte 0x00 "HC104,UDB Channel HC Tile Configuration" group.byte 0x169++0x00 line.byte 0x00 "HC105,UDB Channel HC Tile Configuration" group.byte 0x16A++0x00 line.byte 0x00 "HC106,UDB Channel HC Tile Configuration" group.byte 0x16B++0x00 line.byte 0x00 "HC107,UDB Channel HC Tile Configuration" group.byte 0x16C++0x00 line.byte 0x00 "HC108,UDB Channel HC Tile Configuration" group.byte 0x16D++0x00 line.byte 0x00 "HC109,UDB Channel HC Tile Configuration" group.byte 0x16E++0x00 line.byte 0x00 "HC110,UDB Channel HC Tile Configuration" group.byte 0x16F++0x00 line.byte 0x00 "HC111,UDB Channel HC Tile Configuration" group.byte 0x170++0x00 line.byte 0x00 "HC112,UDB Channel HC Tile Configuration" group.byte 0x171++0x00 line.byte 0x00 "HC113,UDB Channel HC Tile Configuration" group.byte 0x172++0x00 line.byte 0x00 "HC114,UDB Channel HC Tile Configuration" group.byte 0x173++0x00 line.byte 0x00 "HC115,UDB Channel HC Tile Configuration" group.byte 0x174++0x00 line.byte 0x00 "HC116,UDB Channel HC Tile Configuration" group.byte 0x175++0x00 line.byte 0x00 "HC117,UDB Channel HC Tile Configuration" group.byte 0x176++0x00 line.byte 0x00 "HC118,UDB Channel HC Tile Configuration" group.byte 0x177++0x00 line.byte 0x00 "HC119,UDB Channel HC Tile Configuration" group.byte 0x178++0x00 line.byte 0x00 "HC120,UDB Channel HC Tile Configuration" group.byte 0x179++0x00 line.byte 0x00 "HC121,UDB Channel HC Tile Configuration" group.byte 0x17A++0x00 line.byte 0x00 "HC122,UDB Channel HC Tile Configuration" group.byte 0x17B++0x00 line.byte 0x00 "HC123,UDB Channel HC Tile Configuration" group.byte 0x17C++0x00 line.byte 0x00 "HC124,UDB Channel HC Tile Configuration" group.byte 0x17D++0x00 line.byte 0x00 "HC125,UDB Channel HC Tile Configuration" group.byte 0x17E++0x00 line.byte 0x00 "HC126,UDB Channel HC Tile Configuration" group.byte 0x17F++0x00 line.byte 0x00 "HC127,UDB Channel HC Tile Configuration" group.byte 0x180++0x00 line.byte 0x00 "HV_L0,UDB Channel HV Tile Configuration" group.byte 0x181++0x00 line.byte 0x00 "HV_L1,UDB Channel HV Tile Configuration" group.byte 0x182++0x00 line.byte 0x00 "HV_L2,UDB Channel HV Tile Configuration" group.byte 0x183++0x00 line.byte 0x00 "HV_L3,UDB Channel HV Tile Configuration" group.byte 0x184++0x00 line.byte 0x00 "HV_L4,UDB Channel HV Tile Configuration" group.byte 0x185++0x00 line.byte 0x00 "HV_L5,UDB Channel HV Tile Configuration" group.byte 0x186++0x00 line.byte 0x00 "HV_L6,UDB Channel HV Tile Configuration" group.byte 0x187++0x00 line.byte 0x00 "HV_L7,UDB Channel HV Tile Configuration" group.byte 0x188++0x00 line.byte 0x00 "HV_L8,UDB Channel HV Tile Configuration" group.byte 0x189++0x00 line.byte 0x00 "HV_L9,UDB Channel HV Tile Configuration" group.byte 0x18A++0x00 line.byte 0x00 "HV_L10,UDB Channel HV Tile Configuration" group.byte 0x18B++0x00 line.byte 0x00 "HV_L11,UDB Channel HV Tile Configuration" group.byte 0x18C++0x00 line.byte 0x00 "HV_L12,UDB Channel HV Tile Configuration" group.byte 0x18D++0x00 line.byte 0x00 "HV_L13,UDB Channel HV Tile Configuration" group.byte 0x18E++0x00 line.byte 0x00 "HV_L14,UDB Channel HV Tile Configuration" group.byte 0x18F++0x00 line.byte 0x00 "HV_L15,UDB Channel HV Tile Configuration" group.byte 0x190++0x00 line.byte 0x00 "HS0,UDB Channel HS Tile Configuration" group.byte 0x191++0x00 line.byte 0x00 "HS1,UDB Channel HS Tile Configuration" group.byte 0x192++0x00 line.byte 0x00 "HS2,UDB Channel HS Tile Configuration" group.byte 0x193++0x00 line.byte 0x00 "HS3,UDB Channel HS Tile Configuration" group.byte 0x194++0x00 line.byte 0x00 "HS4,UDB Channel HS Tile Configuration" group.byte 0x195++0x00 line.byte 0x00 "HS5,UDB Channel HS Tile Configuration" group.byte 0x196++0x00 line.byte 0x00 "HS6,UDB Channel HS Tile Configuration" group.byte 0x197++0x00 line.byte 0x00 "HS7,UDB Channel HS Tile Configuration" group.byte 0x198++0x00 line.byte 0x00 "HS8,UDB Channel HS Tile Configuration" group.byte 0x199++0x00 line.byte 0x00 "HS9,UDB Channel HS Tile Configuration" group.byte 0x19A++0x00 line.byte 0x00 "HS10,UDB Channel HS Tile Configuration" group.byte 0x19B++0x00 line.byte 0x00 "HS11,UDB Channel HS Tile Configuration" group.byte 0x19C++0x00 line.byte 0x00 "HS12,UDB Channel HS Tile Configuration" group.byte 0x19D++0x00 line.byte 0x00 "HS13,UDB Channel HS Tile Configuration" group.byte 0x19E++0x00 line.byte 0x00 "HS14,UDB Channel HS Tile Configuration" group.byte 0x19F++0x00 line.byte 0x00 "HS15,UDB Channel HS Tile Configuration" group.byte 0x1A0++0x00 line.byte 0x00 "HS16,UDB Channel HS Tile Configuration" group.byte 0x1A1++0x00 line.byte 0x00 "HS17,UDB Channel HS Tile Configuration" group.byte 0x1A2++0x00 line.byte 0x00 "HS18,UDB Channel HS Tile Configuration" group.byte 0x1A3++0x00 line.byte 0x00 "HS19,UDB Channel HS Tile Configuration" group.byte 0x1A4++0x00 line.byte 0x00 "HS20,UDB Channel HS Tile Configuration" group.byte 0x1A5++0x00 line.byte 0x00 "HS21,UDB Channel HS Tile Configuration" group.byte 0x1A6++0x00 line.byte 0x00 "HS22,UDB Channel HS Tile Configuration" group.byte 0x1A7++0x00 line.byte 0x00 "HS23,UDB Channel HS Tile Configuration" group.byte 0x1A8++0x00 line.byte 0x00 "HV_R0,UDB Channel HV Tile Configuration" group.byte 0x1A9++0x00 line.byte 0x00 "HV_R1,UDB Channel HV Tile Configuration" group.byte 0x1AA++0x00 line.byte 0x00 "HV_R2,UDB Channel HV Tile Configuration" group.byte 0x1AB++0x00 line.byte 0x00 "HV_R3,UDB Channel HV Tile Configuration" group.byte 0x1AC++0x00 line.byte 0x00 "HV_R4,UDB Channel HV Tile Configuration" group.byte 0x1AD++0x00 line.byte 0x00 "HV_R5,UDB Channel HV Tile Configuration" group.byte 0x1AE++0x00 line.byte 0x00 "HV_R6,UDB Channel HV Tile Configuration" group.byte 0x1AF++0x00 line.byte 0x00 "HV_R7,UDB Channel HV Tile Configuration" group.byte 0x1B0++0x00 line.byte 0x00 "HV_R8,UDB Channel HV Tile Configuration" group.byte 0x1B1++0x00 line.byte 0x00 "HV_R9,UDB Channel HV Tile Configuration" group.byte 0x1B2++0x00 line.byte 0x00 "HV_R10,UDB Channel HV Tile Configuration" group.byte 0x1B3++0x00 line.byte 0x00 "HV_R11,UDB Channel HV Tile Configuration" group.byte 0x1B4++0x00 line.byte 0x00 "HV_R12,UDB Channel HV Tile Configuration" group.byte 0x1B5++0x00 line.byte 0x00 "HV_R13,UDB Channel HV Tile Configuration" group.byte 0x1B6++0x00 line.byte 0x00 "HV_R14,UDB Channel HV Tile Configuration" group.byte 0x1B7++0x00 line.byte 0x00 "HV_R15,UDB Channel HV Tile Configuration" group.byte 0x1C0++0x00 line.byte 0x00 "PLD0IN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1C2++0x00 line.byte 0x00 "PLD0IN1,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1C4++0x00 line.byte 0x00 "PLD0IN2,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CA++0x00 line.byte 0x00 "PLD1IN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CC++0x00 line.byte 0x00 "PLD1IN1,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CE++0x00 line.byte 0x00 "PLD1IN2,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d0++0x00 line.byte 0x00 "DPIN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d2++0x00 line.byte 0x00 "DPIN1,UDB Channel PI Tile Configuration (half populated)" hexmask.byte 0x00 4.--5. 1. " PI_BOT ,RAM configuration for BOTTOM UDB port interface configuration" hexmask.byte 0x00 2.--3. 1. " PI_TOP ,RAM configuration for TOP UDB port interface configuration" group.byte 0x1d6++0x00 line.byte 0x00 "SCIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d8++0x00 line.byte 0x00 "SCIOIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1de++0x00 line.byte 0x00 "RCIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1E0++0x00 line.byte 0x00 "VS0,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E2++0x00 line.byte 0x00 "VS1,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E4++0x00 line.byte 0x00 "VS2,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E6++0x00 line.byte 0x00 "VS3,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E8++0x00 line.byte 0x00 "VS4,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EA++0x00 line.byte 0x00 "VS5,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EC++0x00 line.byte 0x00 "VS6,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EE++0x00 line.byte 0x00 "VS7,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" width 0x0B tree.end tree.end base ad:(0x40010000+0xC00) tree "P 6" tree "U 0" width 18. group.long 0x0++0x03 line.long 0x00 "PLD_IT0,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT0C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT0C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x4++0x03 line.long 0x00 "PLD_IT1,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT1C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT1C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x8++0x03 line.long 0x00 "PLD_IT2,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT2C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT2C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xC++0x03 line.long 0x00 "PLD_IT3,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT3C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT3C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x10++0x03 line.long 0x00 "PLD_IT4,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT4C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT4C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x14++0x03 line.long 0x00 "PLD_IT5,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT5C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT5C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x18++0x03 line.long 0x00 "PLD_IT6,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT6C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT6C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x1C++0x03 line.long 0x00 "PLD_IT7,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT7C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT7C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x20++0x03 line.long 0x00 "PLD_IT8,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT8C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT8C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x24++0x03 line.long 0x00 "PLD_IT9,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT9C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT9C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x28++0x03 line.long 0x00 "PLD_IT10,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT10C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT10C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x2C++0x03 line.long 0x00 "PLD_IT11,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " group.word 0x30++0x01 line.word 0x00 "PLD_ORT0,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT0_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT0_0 ,OR term" "Not OR,OR" group.word 0x32++0x01 line.word 0x00 "PLD_ORT1,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT1_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT1_0 ,OR term" "Not OR,OR" group.word 0x34++0x01 line.word 0x00 "PLD_ORT2,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT2_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT2_0 ,OR term" "Not OR,OR" group.word 0x36++0x01 line.word 0x00 "PLD_ORT3,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " group.word (0x30+0x08)++0x07 line.word 0x00 "MC_CFG_CEN_CONST,Macrocell Configuration for Carry Enable and Constant" bitfld.word 0x00 15. " PLD1_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 14. " PLD1_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 13. " PLD1_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 12. " PLD1_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " PLD1_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 10. " PLD1_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " PLD1_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 8. " PLD1_MC0_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " PLD0_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 6. " PLD0_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " PLD0_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 4. " PLD0_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " PLD0_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 2. " PLD0_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " PLD0_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 0. " PLD0_MC0_CEN ,Carry enable" "Disabled,Enabled" line.word 0x02 "MC_CFG_XORFB,Macrocell Configuration for XOR Feedback" bitfld.word 0x02 14.--15. " PLD1_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 12.--13. " PLD1_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 10.--11. " PLD1_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 8.--9. " PLD1_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 6.--7. " PLD0_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 4.--5. " PLD0_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 2.--3. " PLD0_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 0.--1. " PLD0_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" line.word 0x04 "MC_CFG_SET_RESET,Macrocell Configuration for Set and Reset" bitfld.word 0x04 15. " PLD1_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 14. " PLD1_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 13. " PLD1_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 12. " PLD1_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 11. " PLD1_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 10. " PLD1_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 9. " PLD1_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 8. " PLD1_MC0_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 7. " PLD0_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 6. " PLD0_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 5. " PLD0_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 4. " PLD0_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 3. " PLD0_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 2. " PLD0_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 1. " PLD0_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 0. " PLD0_MC0_SET_SEL ,Set select enable" "Not set,Set" line.word 0x06 "MC_CFG_BYPASS,Macrocell Configuration for Bypass" bitfld.word 0x06 14. " PLD1_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 12. " PLD1_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 10. " PLD1_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 8. " PLD1_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 6. " PLD0_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 4. " PLD0_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 2. " PLD0_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 0. " PLD0_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " group.byte (0x30+0x10)++0x10 line.byte 0x00 "CFG0,Datapath Input Selection" bitfld.byte 0x00 4.--6. " RAD1 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x00 0.--2. " RAD0 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x01 "CFG1,Datapath Input Selection" bitfld.byte 0x01 0.--2. " RAD2 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x02 "CFG2,Datapath Input Selection" bitfld.byte 0x02 4.--6. " F1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x02 0.--2. " F0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x03 "CFG3,Datapath Input Selection" bitfld.byte 0x03 4.--6. " D1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x03 0.--2. " D0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x04 "CFG4,Datapath Input Selection" bitfld.byte 0x04 4.--6. " CI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x04 0.--2. " SI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x05 "CFG5,Datapath Output Selection" bitfld.byte 0x05 4.--7. " OUT1 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x05 0.--3. " OUT0 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x06 "CFG6,Datapath Output Selection" bitfld.byte 0x06 4.--7. " OUT3 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x06 0.--3. " OUT2 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x07 "CFG7,Datapath Output Selection" bitfld.byte 0x07 4.--7. " OUT5 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x07 0.--3. " OUT4 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x08 "CFG8,Datapath Output Synchronization" hexmask.byte 0x08 0.--5. 1. " OUT_SYNC ,Output Synchronization field" line.byte 0x09 "CFG9,ALU Mask" line.byte 0x0a "CFG10,Compare 0 Mask" line.byte 0x0b "CFG11,Compare 1 Mask" line.byte 0x0c "CFG12,Datapath Static Configuration" bitfld.byte 0x0c 7. " CMASK1_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 6. " CMASK0_EN ,Datapath mask enable" "Disabled,Enabled" textline " " bitfld.byte 0x0c 5. " AMASK_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 4. " DEF_SI ,Datapath default shift value" "0,1" textline " " bitfld.byte 0x0c 2.--3. " SI_SELB ,Datapath shift in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0c 0.--1. " SI_SELA ,Datapath shift in source select" "Default,Registered,Route,Chain" line.byte 0x0d "CFG13,Datapath Static Configuration" bitfld.byte 0x0d 6.--7. " CMP_SELB ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" bitfld.byte 0x0d 4.--5. " CMP_SELA ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" textline " " bitfld.byte 0x0d 2.--3. " CI_SELB ,Datapath carry in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0d 0.--1. " CI_SELA ,Datapath carry in source select" "Default,Registered,Route,Chain" line.byte 0x0e "CFG14,Datapath Static Configuration" bitfld.byte 0x0e 7. " MSB_EN ,Datapath MSB selection enable" "Disabled,Enabled" bitfld.byte 0x0e 4.--6. " MSB_SEL ,Datapath MSB Selection" "Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7" textline " " bitfld.byte 0x0e 3. " CHAIN_CMSB ,Datapath CRC MSB chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 2. " CHAIN_FB ,Datapath CRC feedback chaining enable" "Disabled,Enabled" textline " " bitfld.byte 0x0e 1. " CHAIN1 ,Datapath condition chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 0. " CHAIN0 ,Datapath condition chaining enable" "Disabled,Enabled" line.byte 0x0f "CFG15,Datapath Static Configuration" bitfld.byte 0x0f 7. " PI_SEL ,Datapath parallel input selection" "Normal,Parallel" bitfld.byte 0x0f 6. " SHIFT_SEL ,Datapath shift out selection" "SOL_MSB,SOR" textline " " bitfld.byte 0x0f 5. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x0f 4. " NC0 ,Spare register bit" "0,1" textline " " bitfld.byte 0x0f 2.--3. " F1_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" bitfld.byte 0x0f 0.--1. " F0_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" line.byte 0x10 "CFG16,Datapath Static Configuration" bitfld.byte 0x10 7. " F1_CK_INV ,FIFO Clock Invert" "Normal,Inverted" bitfld.byte 0x10 6. " F0_CK_INV ,FIFO Clock Invert" "Normal,Inverted" textline " " bitfld.byte 0x10 5. " FIFO_FAST ,FIFO Fast Mode" "Disabled,Enabled" bitfld.byte 0x10 4. " FIFO_CAP ,FIFO Software Capture Mode" "Disabled,Enabled" textline " " bitfld.byte 0x10 3. " FIFO_EDGE ,Edge/level sensitive FIFO write control" "Level,Edge" bitfld.byte 0x10 2. " FIFO_ASYNC ,Asynchronous FIFO clocking support" "Synchronous,Asynchronous" textline " " bitfld.byte 0x10 1. " EXT_CRCPRS ,External CRC/PRS mode" "Internal,External" bitfld.byte 0x10 0. " WRK16_CONCAT ,Datapath register access mode" "Default,Concatenate" group.byte (0x30+0x24)++0x03 line.byte 0x00 "CFG20,Status input mode selection" line.byte 0x01 "CFG21,Spare register bits" bitfld.byte 0x01 1. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x01 0. " NC0 ,Spare register bit" "0,1" line.byte 0x02 "CFG22,Status Output Control" bitfld.byte 0x02 3. " SC_SYNC_MD ,SC Sync Mode" "Disabled,Enabled" bitfld.byte 0x02 2. " SC_INT_MD ,SC Interrupt Mode" "Normal,INT_MODE" textline " " bitfld.byte 0x02 0.--1. " SC_OUT_CTL ,Selects the output source for the Status and Control routing connections" "Control,Parallel,Counter,?..." line.byte 0x03 "CFG23,Counter Routing Control" bitfld.byte 0x03 5. " ROUTE_EN ,Configure the counter enable signal for routing input" "Disabled,Enabled" bitfld.byte 0x03 4. " ROUTE_LD ,Configure the counter load signal for routing input" "Disabled,Enabled" textline " " bitfld.byte 0x03 2.--3. " CNT_EN_SEL ,Selects the routing inputs for the counter enable signal" "SC_IN4,SC_IN5,SC_IN6,SC_IO" bitfld.byte 0x03 0.--1. " CNT_LD_SEL ,Selects the routing inputs for the counter load signal" "SC_IN0,SC_IN1,SC_IN2,SC_IN3" group.byte (0x30+0x28)++0x00 line.byte 0x00 "CFG24,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x29)++0x00 line.byte 0x00 "CFG25,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2A)++0x00 line.byte 0x00 "CFG26,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2B)++0x00 line.byte 0x00 "CFG27,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2C)++0x03 line.byte 0x00 "CFG28,Clock Selection" bitfld.byte 0x00 4.--7. " PLD1_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x00 0.--3. " PLD0_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x01 "CFG29,Clock Selection" bitfld.byte 0x01 4.--7. " SC_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x01 0.--3. " DP_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x02 "CFG30,Reset Selection Register" bitfld.byte 0x02 4. " GUDB_WR ,Enable global write operation for the configuration and working registers in this UDB" "Disabled,Enabled" bitfld.byte 0x02 3. " EN_RES_CNT ,Enable routed reset to counter/control register" "Disabled,Enabled" textline " " bitfld.byte 0x02 2. " RES_POL ,Select polarity of the routed reset control" "Not inverted,Inverted" bitfld.byte 0x02 0.--1. " RES_SEL ,Select routing input for routed reset control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" line.byte 0x03 "CFG31,Reset and Clock Input Enable" bitfld.byte 0x03 4.--5. " EXT_CK_SEL ,External clock selection" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" bitfld.byte 0x03 1. " EXT_SYNC ,Enable synchronization of selected external clock" "Disabled,Enabled" textline " " bitfld.byte 0x03 0. " NC0 ,Spare register bit" "0,1" group.word 0x60++0x01 line.word 0x00 "DCFG0,Dynamic Configuration RAM Register 0" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x62++0x01 line.word 0x00 "DCFG1,Dynamic Configuration RAM Register 1" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x64++0x01 line.word 0x00 "DCFG2,Dynamic Configuration RAM Register 2" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x66++0x01 line.word 0x00 "DCFG3,Dynamic Configuration RAM Register 3" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x68++0x01 line.word 0x00 "DCFG4,Dynamic Configuration RAM Register 4" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6A++0x01 line.word 0x00 "DCFG5,Dynamic Configuration RAM Register 5" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6C++0x01 line.word 0x00 "DCFG6,Dynamic Configuration RAM Register 6" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6E++0x01 line.word 0x00 "DCFG7,Dynamic Configuration RAM Register 7" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" width 0x0B tree.end tree "U 1" width 18. group.long 0x80++0x03 line.long 0x00 "PLD_IT0,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT0C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT0C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x84++0x03 line.long 0x00 "PLD_IT1,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT1C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT1C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x88++0x03 line.long 0x00 "PLD_IT2,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT2C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT2C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x8C++0x03 line.long 0x00 "PLD_IT3,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT3C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT3C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x90++0x03 line.long 0x00 "PLD_IT4,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT4C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT4C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x94++0x03 line.long 0x00 "PLD_IT5,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT5C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT5C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x98++0x03 line.long 0x00 "PLD_IT6,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT6C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT6C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x9C++0x03 line.long 0x00 "PLD_IT7,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT7C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT7C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA0++0x03 line.long 0x00 "PLD_IT8,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT8C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT8C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA4++0x03 line.long 0x00 "PLD_IT9,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT9C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT9C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA8++0x03 line.long 0x00 "PLD_IT10,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT10C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT10C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xAC++0x03 line.long 0x00 "PLD_IT11,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " group.word 0xB0++0x01 line.word 0x00 "PLD_ORT0,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT0_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT0_0 ,OR term" "Not OR,OR" group.word 0xB2++0x01 line.word 0x00 "PLD_ORT1,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT1_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT1_0 ,OR term" "Not OR,OR" group.word 0xB4++0x01 line.word 0x00 "PLD_ORT2,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT2_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT2_0 ,OR term" "Not OR,OR" group.word 0xB6++0x01 line.word 0x00 "PLD_ORT3,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " group.word (0xB0+0x08)++0x07 line.word 0x00 "MC_CFG_CEN_CONST,Macrocell Configuration for Carry Enable and Constant" bitfld.word 0x00 15. " PLD1_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 14. " PLD1_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 13. " PLD1_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 12. " PLD1_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " PLD1_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 10. " PLD1_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " PLD1_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 8. " PLD1_MC0_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " PLD0_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 6. " PLD0_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " PLD0_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 4. " PLD0_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " PLD0_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 2. " PLD0_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " PLD0_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 0. " PLD0_MC0_CEN ,Carry enable" "Disabled,Enabled" line.word 0x02 "MC_CFG_XORFB,Macrocell Configuration for XOR Feedback" bitfld.word 0x02 14.--15. " PLD1_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 12.--13. " PLD1_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 10.--11. " PLD1_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 8.--9. " PLD1_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 6.--7. " PLD0_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 4.--5. " PLD0_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 2.--3. " PLD0_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 0.--1. " PLD0_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" line.word 0x04 "MC_CFG_SET_RESET,Macrocell Configuration for Set and Reset" bitfld.word 0x04 15. " PLD1_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 14. " PLD1_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 13. " PLD1_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 12. " PLD1_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 11. " PLD1_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 10. " PLD1_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 9. " PLD1_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 8. " PLD1_MC0_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 7. " PLD0_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 6. " PLD0_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 5. " PLD0_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 4. " PLD0_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 3. " PLD0_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 2. " PLD0_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 1. " PLD0_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 0. " PLD0_MC0_SET_SEL ,Set select enable" "Not set,Set" line.word 0x06 "MC_CFG_BYPASS,Macrocell Configuration for Bypass" bitfld.word 0x06 14. " PLD1_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 12. " PLD1_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 10. " PLD1_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 8. " PLD1_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 6. " PLD0_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 4. " PLD0_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 2. " PLD0_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 0. " PLD0_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " group.byte (0xB0+0x10)++0x10 line.byte 0x00 "CFG0,Datapath Input Selection" bitfld.byte 0x00 4.--6. " RAD1 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x00 0.--2. " RAD0 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x01 "CFG1,Datapath Input Selection" bitfld.byte 0x01 0.--2. " RAD2 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x02 "CFG2,Datapath Input Selection" bitfld.byte 0x02 4.--6. " F1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x02 0.--2. " F0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x03 "CFG3,Datapath Input Selection" bitfld.byte 0x03 4.--6. " D1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x03 0.--2. " D0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x04 "CFG4,Datapath Input Selection" bitfld.byte 0x04 4.--6. " CI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x04 0.--2. " SI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x05 "CFG5,Datapath Output Selection" bitfld.byte 0x05 4.--7. " OUT1 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x05 0.--3. " OUT0 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x06 "CFG6,Datapath Output Selection" bitfld.byte 0x06 4.--7. " OUT3 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x06 0.--3. " OUT2 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x07 "CFG7,Datapath Output Selection" bitfld.byte 0x07 4.--7. " OUT5 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x07 0.--3. " OUT4 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x08 "CFG8,Datapath Output Synchronization" hexmask.byte 0x08 0.--5. 1. " OUT_SYNC ,Output Synchronization field" line.byte 0x09 "CFG9,ALU Mask" line.byte 0x0a "CFG10,Compare 0 Mask" line.byte 0x0b "CFG11,Compare 1 Mask" line.byte 0x0c "CFG12,Datapath Static Configuration" bitfld.byte 0x0c 7. " CMASK1_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 6. " CMASK0_EN ,Datapath mask enable" "Disabled,Enabled" textline " " bitfld.byte 0x0c 5. " AMASK_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 4. " DEF_SI ,Datapath default shift value" "0,1" textline " " bitfld.byte 0x0c 2.--3. " SI_SELB ,Datapath shift in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0c 0.--1. " SI_SELA ,Datapath shift in source select" "Default,Registered,Route,Chain" line.byte 0x0d "CFG13,Datapath Static Configuration" bitfld.byte 0x0d 6.--7. " CMP_SELB ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" bitfld.byte 0x0d 4.--5. " CMP_SELA ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" textline " " bitfld.byte 0x0d 2.--3. " CI_SELB ,Datapath carry in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0d 0.--1. " CI_SELA ,Datapath carry in source select" "Default,Registered,Route,Chain" line.byte 0x0e "CFG14,Datapath Static Configuration" bitfld.byte 0x0e 7. " MSB_EN ,Datapath MSB selection enable" "Disabled,Enabled" bitfld.byte 0x0e 4.--6. " MSB_SEL ,Datapath MSB Selection" "Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7" textline " " bitfld.byte 0x0e 3. " CHAIN_CMSB ,Datapath CRC MSB chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 2. " CHAIN_FB ,Datapath CRC feedback chaining enable" "Disabled,Enabled" textline " " bitfld.byte 0x0e 1. " CHAIN1 ,Datapath condition chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 0. " CHAIN0 ,Datapath condition chaining enable" "Disabled,Enabled" line.byte 0x0f "CFG15,Datapath Static Configuration" bitfld.byte 0x0f 7. " PI_SEL ,Datapath parallel input selection" "Normal,Parallel" bitfld.byte 0x0f 6. " SHIFT_SEL ,Datapath shift out selection" "SOL_MSB,SOR" textline " " bitfld.byte 0x0f 5. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x0f 4. " NC0 ,Spare register bit" "0,1" textline " " bitfld.byte 0x0f 2.--3. " F1_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" bitfld.byte 0x0f 0.--1. " F0_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" line.byte 0x10 "CFG16,Datapath Static Configuration" bitfld.byte 0x10 7. " F1_CK_INV ,FIFO Clock Invert" "Normal,Inverted" bitfld.byte 0x10 6. " F0_CK_INV ,FIFO Clock Invert" "Normal,Inverted" textline " " bitfld.byte 0x10 5. " FIFO_FAST ,FIFO Fast Mode" "Disabled,Enabled" bitfld.byte 0x10 4. " FIFO_CAP ,FIFO Software Capture Mode" "Disabled,Enabled" textline " " bitfld.byte 0x10 3. " FIFO_EDGE ,Edge/level sensitive FIFO write control" "Level,Edge" bitfld.byte 0x10 2. " FIFO_ASYNC ,Asynchronous FIFO clocking support" "Synchronous,Asynchronous" textline " " bitfld.byte 0x10 1. " EXT_CRCPRS ,External CRC/PRS mode" "Internal,External" bitfld.byte 0x10 0. " WRK16_CONCAT ,Datapath register access mode" "Default,Concatenate" group.byte (0xB0+0x24)++0x03 line.byte 0x00 "CFG20,Status input mode selection" line.byte 0x01 "CFG21,Spare register bits" bitfld.byte 0x01 1. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x01 0. " NC0 ,Spare register bit" "0,1" line.byte 0x02 "CFG22,Status Output Control" bitfld.byte 0x02 3. " SC_SYNC_MD ,SC Sync Mode" "Disabled,Enabled" bitfld.byte 0x02 2. " SC_INT_MD ,SC Interrupt Mode" "Normal,INT_MODE" textline " " bitfld.byte 0x02 0.--1. " SC_OUT_CTL ,Selects the output source for the Status and Control routing connections" "Control,Parallel,Counter,?..." line.byte 0x03 "CFG23,Counter Routing Control" bitfld.byte 0x03 5. " ROUTE_EN ,Configure the counter enable signal for routing input" "Disabled,Enabled" bitfld.byte 0x03 4. " ROUTE_LD ,Configure the counter load signal for routing input" "Disabled,Enabled" textline " " bitfld.byte 0x03 2.--3. " CNT_EN_SEL ,Selects the routing inputs for the counter enable signal" "SC_IN4,SC_IN5,SC_IN6,SC_IO" bitfld.byte 0x03 0.--1. " CNT_LD_SEL ,Selects the routing inputs for the counter load signal" "SC_IN0,SC_IN1,SC_IN2,SC_IN3" group.byte (0xB0+0x28)++0x00 line.byte 0x00 "CFG24,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x29)++0x00 line.byte 0x00 "CFG25,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2A)++0x00 line.byte 0x00 "CFG26,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2B)++0x00 line.byte 0x00 "CFG27,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2C)++0x03 line.byte 0x00 "CFG28,Clock Selection" bitfld.byte 0x00 4.--7. " PLD1_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x00 0.--3. " PLD0_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x01 "CFG29,Clock Selection" bitfld.byte 0x01 4.--7. " SC_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x01 0.--3. " DP_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x02 "CFG30,Reset Selection Register" bitfld.byte 0x02 4. " GUDB_WR ,Enable global write operation for the configuration and working registers in this UDB" "Disabled,Enabled" bitfld.byte 0x02 3. " EN_RES_CNT ,Enable routed reset to counter/control register" "Disabled,Enabled" textline " " bitfld.byte 0x02 2. " RES_POL ,Select polarity of the routed reset control" "Not inverted,Inverted" bitfld.byte 0x02 0.--1. " RES_SEL ,Select routing input for routed reset control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" line.byte 0x03 "CFG31,Reset and Clock Input Enable" bitfld.byte 0x03 4.--5. " EXT_CK_SEL ,External clock selection" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" bitfld.byte 0x03 1. " EXT_SYNC ,Enable synchronization of selected external clock" "Disabled,Enabled" textline " " bitfld.byte 0x03 0. " NC0 ,Spare register bit" "0,1" group.word 0xE0++0x01 line.word 0x00 "DCFG0,Dynamic Configuration RAM Register 0" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE2++0x01 line.word 0x00 "DCFG1,Dynamic Configuration RAM Register 1" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE4++0x01 line.word 0x00 "DCFG2,Dynamic Configuration RAM Register 2" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE6++0x01 line.word 0x00 "DCFG3,Dynamic Configuration RAM Register 3" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE8++0x01 line.word 0x00 "DCFG4,Dynamic Configuration RAM Register 4" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEA++0x01 line.word 0x00 "DCFG5,Dynamic Configuration RAM Register 5" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEC++0x01 line.word 0x00 "DCFG6,Dynamic Configuration RAM Register 6" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEE++0x01 line.word 0x00 "DCFG7,Dynamic Configuration RAM Register 7" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" width 0x0B tree.end tree "Route" width 9. group.byte 0x100++0x00 line.byte 0x00 "HC0,UDB Channel HC Tile Configuration" group.byte 0x101++0x00 line.byte 0x00 "HC1,UDB Channel HC Tile Configuration" group.byte 0x102++0x00 line.byte 0x00 "HC2,UDB Channel HC Tile Configuration" group.byte 0x103++0x00 line.byte 0x00 "HC3,UDB Channel HC Tile Configuration" group.byte 0x104++0x00 line.byte 0x00 "HC4,UDB Channel HC Tile Configuration" group.byte 0x105++0x00 line.byte 0x00 "HC5,UDB Channel HC Tile Configuration" group.byte 0x106++0x00 line.byte 0x00 "HC6,UDB Channel HC Tile Configuration" group.byte 0x107++0x00 line.byte 0x00 "HC7,UDB Channel HC Tile Configuration" group.byte 0x108++0x00 line.byte 0x00 "HC8,UDB Channel HC Tile Configuration" group.byte 0x109++0x00 line.byte 0x00 "HC9,UDB Channel HC Tile Configuration" group.byte 0x10A++0x00 line.byte 0x00 "HC10,UDB Channel HC Tile Configuration" group.byte 0x10B++0x00 line.byte 0x00 "HC11,UDB Channel HC Tile Configuration" group.byte 0x10C++0x00 line.byte 0x00 "HC12,UDB Channel HC Tile Configuration" group.byte 0x10D++0x00 line.byte 0x00 "HC13,UDB Channel HC Tile Configuration" group.byte 0x10E++0x00 line.byte 0x00 "HC14,UDB Channel HC Tile Configuration" group.byte 0x10F++0x00 line.byte 0x00 "HC15,UDB Channel HC Tile Configuration" group.byte 0x110++0x00 line.byte 0x00 "HC16,UDB Channel HC Tile Configuration" group.byte 0x111++0x00 line.byte 0x00 "HC17,UDB Channel HC Tile Configuration" group.byte 0x112++0x00 line.byte 0x00 "HC18,UDB Channel HC Tile Configuration" group.byte 0x113++0x00 line.byte 0x00 "HC19,UDB Channel HC Tile Configuration" group.byte 0x114++0x00 line.byte 0x00 "HC20,UDB Channel HC Tile Configuration" group.byte 0x115++0x00 line.byte 0x00 "HC21,UDB Channel HC Tile Configuration" group.byte 0x116++0x00 line.byte 0x00 "HC22,UDB Channel HC Tile Configuration" group.byte 0x117++0x00 line.byte 0x00 "HC23,UDB Channel HC Tile Configuration" group.byte 0x118++0x00 line.byte 0x00 "HC24,UDB Channel HC Tile Configuration" group.byte 0x119++0x00 line.byte 0x00 "HC25,UDB Channel HC Tile Configuration" group.byte 0x11A++0x00 line.byte 0x00 "HC26,UDB Channel HC Tile Configuration" group.byte 0x11B++0x00 line.byte 0x00 "HC27,UDB Channel HC Tile Configuration" group.byte 0x11C++0x00 line.byte 0x00 "HC28,UDB Channel HC Tile Configuration" group.byte 0x11D++0x00 line.byte 0x00 "HC29,UDB Channel HC Tile Configuration" group.byte 0x11E++0x00 line.byte 0x00 "HC30,UDB Channel HC Tile Configuration" group.byte 0x11F++0x00 line.byte 0x00 "HC31,UDB Channel HC Tile Configuration" group.byte 0x120++0x00 line.byte 0x00 "HC32,UDB Channel HC Tile Configuration" group.byte 0x121++0x00 line.byte 0x00 "HC33,UDB Channel HC Tile Configuration" group.byte 0x122++0x00 line.byte 0x00 "HC34,UDB Channel HC Tile Configuration" group.byte 0x123++0x00 line.byte 0x00 "HC35,UDB Channel HC Tile Configuration" group.byte 0x124++0x00 line.byte 0x00 "HC36,UDB Channel HC Tile Configuration" group.byte 0x125++0x00 line.byte 0x00 "HC37,UDB Channel HC Tile Configuration" group.byte 0x126++0x00 line.byte 0x00 "HC38,UDB Channel HC Tile Configuration" group.byte 0x127++0x00 line.byte 0x00 "HC39,UDB Channel HC Tile Configuration" group.byte 0x128++0x00 line.byte 0x00 "HC40,UDB Channel HC Tile Configuration" group.byte 0x129++0x00 line.byte 0x00 "HC41,UDB Channel HC Tile Configuration" group.byte 0x12A++0x00 line.byte 0x00 "HC42,UDB Channel HC Tile Configuration" group.byte 0x12B++0x00 line.byte 0x00 "HC43,UDB Channel HC Tile Configuration" group.byte 0x12C++0x00 line.byte 0x00 "HC44,UDB Channel HC Tile Configuration" group.byte 0x12D++0x00 line.byte 0x00 "HC45,UDB Channel HC Tile Configuration" group.byte 0x12E++0x00 line.byte 0x00 "HC46,UDB Channel HC Tile Configuration" group.byte 0x12F++0x00 line.byte 0x00 "HC47,UDB Channel HC Tile Configuration" group.byte 0x130++0x00 line.byte 0x00 "HC48,UDB Channel HC Tile Configuration" group.byte 0x131++0x00 line.byte 0x00 "HC49,UDB Channel HC Tile Configuration" group.byte 0x132++0x00 line.byte 0x00 "HC50,UDB Channel HC Tile Configuration" group.byte 0x133++0x00 line.byte 0x00 "HC51,UDB Channel HC Tile Configuration" group.byte 0x134++0x00 line.byte 0x00 "HC52,UDB Channel HC Tile Configuration" group.byte 0x135++0x00 line.byte 0x00 "HC53,UDB Channel HC Tile Configuration" group.byte 0x136++0x00 line.byte 0x00 "HC54,UDB Channel HC Tile Configuration" group.byte 0x137++0x00 line.byte 0x00 "HC55,UDB Channel HC Tile Configuration" group.byte 0x138++0x00 line.byte 0x00 "HC56,UDB Channel HC Tile Configuration" group.byte 0x139++0x00 line.byte 0x00 "HC57,UDB Channel HC Tile Configuration" group.byte 0x13A++0x00 line.byte 0x00 "HC58,UDB Channel HC Tile Configuration" group.byte 0x13B++0x00 line.byte 0x00 "HC59,UDB Channel HC Tile Configuration" group.byte 0x13C++0x00 line.byte 0x00 "HC60,UDB Channel HC Tile Configuration" group.byte 0x13D++0x00 line.byte 0x00 "HC61,UDB Channel HC Tile Configuration" group.byte 0x13E++0x00 line.byte 0x00 "HC62,UDB Channel HC Tile Configuration" group.byte 0x13F++0x00 line.byte 0x00 "HC63,UDB Channel HC Tile Configuration" group.byte 0x140++0x00 line.byte 0x00 "HC64,UDB Channel HC Tile Configuration" group.byte 0x141++0x00 line.byte 0x00 "HC65,UDB Channel HC Tile Configuration" group.byte 0x142++0x00 line.byte 0x00 "HC66,UDB Channel HC Tile Configuration" group.byte 0x143++0x00 line.byte 0x00 "HC67,UDB Channel HC Tile Configuration" group.byte 0x144++0x00 line.byte 0x00 "HC68,UDB Channel HC Tile Configuration" group.byte 0x145++0x00 line.byte 0x00 "HC69,UDB Channel HC Tile Configuration" group.byte 0x146++0x00 line.byte 0x00 "HC70,UDB Channel HC Tile Configuration" group.byte 0x147++0x00 line.byte 0x00 "HC71,UDB Channel HC Tile Configuration" group.byte 0x148++0x00 line.byte 0x00 "HC72,UDB Channel HC Tile Configuration" group.byte 0x149++0x00 line.byte 0x00 "HC73,UDB Channel HC Tile Configuration" group.byte 0x14A++0x00 line.byte 0x00 "HC74,UDB Channel HC Tile Configuration" group.byte 0x14B++0x00 line.byte 0x00 "HC75,UDB Channel HC Tile Configuration" group.byte 0x14C++0x00 line.byte 0x00 "HC76,UDB Channel HC Tile Configuration" group.byte 0x14D++0x00 line.byte 0x00 "HC77,UDB Channel HC Tile Configuration" group.byte 0x14E++0x00 line.byte 0x00 "HC78,UDB Channel HC Tile Configuration" group.byte 0x14F++0x00 line.byte 0x00 "HC79,UDB Channel HC Tile Configuration" group.byte 0x150++0x00 line.byte 0x00 "HC80,UDB Channel HC Tile Configuration" group.byte 0x151++0x00 line.byte 0x00 "HC81,UDB Channel HC Tile Configuration" group.byte 0x152++0x00 line.byte 0x00 "HC82,UDB Channel HC Tile Configuration" group.byte 0x153++0x00 line.byte 0x00 "HC83,UDB Channel HC Tile Configuration" group.byte 0x154++0x00 line.byte 0x00 "HC84,UDB Channel HC Tile Configuration" group.byte 0x155++0x00 line.byte 0x00 "HC85,UDB Channel HC Tile Configuration" group.byte 0x156++0x00 line.byte 0x00 "HC86,UDB Channel HC Tile Configuration" group.byte 0x157++0x00 line.byte 0x00 "HC87,UDB Channel HC Tile Configuration" group.byte 0x158++0x00 line.byte 0x00 "HC88,UDB Channel HC Tile Configuration" group.byte 0x159++0x00 line.byte 0x00 "HC89,UDB Channel HC Tile Configuration" group.byte 0x15A++0x00 line.byte 0x00 "HC90,UDB Channel HC Tile Configuration" group.byte 0x15B++0x00 line.byte 0x00 "HC91,UDB Channel HC Tile Configuration" group.byte 0x15C++0x00 line.byte 0x00 "HC92,UDB Channel HC Tile Configuration" group.byte 0x15D++0x00 line.byte 0x00 "HC93,UDB Channel HC Tile Configuration" group.byte 0x15E++0x00 line.byte 0x00 "HC94,UDB Channel HC Tile Configuration" group.byte 0x15F++0x00 line.byte 0x00 "HC95,UDB Channel HC Tile Configuration" group.byte 0x160++0x00 line.byte 0x00 "HC96,UDB Channel HC Tile Configuration" group.byte 0x161++0x00 line.byte 0x00 "HC97,UDB Channel HC Tile Configuration" group.byte 0x162++0x00 line.byte 0x00 "HC98,UDB Channel HC Tile Configuration" group.byte 0x163++0x00 line.byte 0x00 "HC99,UDB Channel HC Tile Configuration" group.byte 0x164++0x00 line.byte 0x00 "HC100,UDB Channel HC Tile Configuration" group.byte 0x165++0x00 line.byte 0x00 "HC101,UDB Channel HC Tile Configuration" group.byte 0x166++0x00 line.byte 0x00 "HC102,UDB Channel HC Tile Configuration" group.byte 0x167++0x00 line.byte 0x00 "HC103,UDB Channel HC Tile Configuration" group.byte 0x168++0x00 line.byte 0x00 "HC104,UDB Channel HC Tile Configuration" group.byte 0x169++0x00 line.byte 0x00 "HC105,UDB Channel HC Tile Configuration" group.byte 0x16A++0x00 line.byte 0x00 "HC106,UDB Channel HC Tile Configuration" group.byte 0x16B++0x00 line.byte 0x00 "HC107,UDB Channel HC Tile Configuration" group.byte 0x16C++0x00 line.byte 0x00 "HC108,UDB Channel HC Tile Configuration" group.byte 0x16D++0x00 line.byte 0x00 "HC109,UDB Channel HC Tile Configuration" group.byte 0x16E++0x00 line.byte 0x00 "HC110,UDB Channel HC Tile Configuration" group.byte 0x16F++0x00 line.byte 0x00 "HC111,UDB Channel HC Tile Configuration" group.byte 0x170++0x00 line.byte 0x00 "HC112,UDB Channel HC Tile Configuration" group.byte 0x171++0x00 line.byte 0x00 "HC113,UDB Channel HC Tile Configuration" group.byte 0x172++0x00 line.byte 0x00 "HC114,UDB Channel HC Tile Configuration" group.byte 0x173++0x00 line.byte 0x00 "HC115,UDB Channel HC Tile Configuration" group.byte 0x174++0x00 line.byte 0x00 "HC116,UDB Channel HC Tile Configuration" group.byte 0x175++0x00 line.byte 0x00 "HC117,UDB Channel HC Tile Configuration" group.byte 0x176++0x00 line.byte 0x00 "HC118,UDB Channel HC Tile Configuration" group.byte 0x177++0x00 line.byte 0x00 "HC119,UDB Channel HC Tile Configuration" group.byte 0x178++0x00 line.byte 0x00 "HC120,UDB Channel HC Tile Configuration" group.byte 0x179++0x00 line.byte 0x00 "HC121,UDB Channel HC Tile Configuration" group.byte 0x17A++0x00 line.byte 0x00 "HC122,UDB Channel HC Tile Configuration" group.byte 0x17B++0x00 line.byte 0x00 "HC123,UDB Channel HC Tile Configuration" group.byte 0x17C++0x00 line.byte 0x00 "HC124,UDB Channel HC Tile Configuration" group.byte 0x17D++0x00 line.byte 0x00 "HC125,UDB Channel HC Tile Configuration" group.byte 0x17E++0x00 line.byte 0x00 "HC126,UDB Channel HC Tile Configuration" group.byte 0x17F++0x00 line.byte 0x00 "HC127,UDB Channel HC Tile Configuration" group.byte 0x180++0x00 line.byte 0x00 "HV_L0,UDB Channel HV Tile Configuration" group.byte 0x181++0x00 line.byte 0x00 "HV_L1,UDB Channel HV Tile Configuration" group.byte 0x182++0x00 line.byte 0x00 "HV_L2,UDB Channel HV Tile Configuration" group.byte 0x183++0x00 line.byte 0x00 "HV_L3,UDB Channel HV Tile Configuration" group.byte 0x184++0x00 line.byte 0x00 "HV_L4,UDB Channel HV Tile Configuration" group.byte 0x185++0x00 line.byte 0x00 "HV_L5,UDB Channel HV Tile Configuration" group.byte 0x186++0x00 line.byte 0x00 "HV_L6,UDB Channel HV Tile Configuration" group.byte 0x187++0x00 line.byte 0x00 "HV_L7,UDB Channel HV Tile Configuration" group.byte 0x188++0x00 line.byte 0x00 "HV_L8,UDB Channel HV Tile Configuration" group.byte 0x189++0x00 line.byte 0x00 "HV_L9,UDB Channel HV Tile Configuration" group.byte 0x18A++0x00 line.byte 0x00 "HV_L10,UDB Channel HV Tile Configuration" group.byte 0x18B++0x00 line.byte 0x00 "HV_L11,UDB Channel HV Tile Configuration" group.byte 0x18C++0x00 line.byte 0x00 "HV_L12,UDB Channel HV Tile Configuration" group.byte 0x18D++0x00 line.byte 0x00 "HV_L13,UDB Channel HV Tile Configuration" group.byte 0x18E++0x00 line.byte 0x00 "HV_L14,UDB Channel HV Tile Configuration" group.byte 0x18F++0x00 line.byte 0x00 "HV_L15,UDB Channel HV Tile Configuration" group.byte 0x190++0x00 line.byte 0x00 "HS0,UDB Channel HS Tile Configuration" group.byte 0x191++0x00 line.byte 0x00 "HS1,UDB Channel HS Tile Configuration" group.byte 0x192++0x00 line.byte 0x00 "HS2,UDB Channel HS Tile Configuration" group.byte 0x193++0x00 line.byte 0x00 "HS3,UDB Channel HS Tile Configuration" group.byte 0x194++0x00 line.byte 0x00 "HS4,UDB Channel HS Tile Configuration" group.byte 0x195++0x00 line.byte 0x00 "HS5,UDB Channel HS Tile Configuration" group.byte 0x196++0x00 line.byte 0x00 "HS6,UDB Channel HS Tile Configuration" group.byte 0x197++0x00 line.byte 0x00 "HS7,UDB Channel HS Tile Configuration" group.byte 0x198++0x00 line.byte 0x00 "HS8,UDB Channel HS Tile Configuration" group.byte 0x199++0x00 line.byte 0x00 "HS9,UDB Channel HS Tile Configuration" group.byte 0x19A++0x00 line.byte 0x00 "HS10,UDB Channel HS Tile Configuration" group.byte 0x19B++0x00 line.byte 0x00 "HS11,UDB Channel HS Tile Configuration" group.byte 0x19C++0x00 line.byte 0x00 "HS12,UDB Channel HS Tile Configuration" group.byte 0x19D++0x00 line.byte 0x00 "HS13,UDB Channel HS Tile Configuration" group.byte 0x19E++0x00 line.byte 0x00 "HS14,UDB Channel HS Tile Configuration" group.byte 0x19F++0x00 line.byte 0x00 "HS15,UDB Channel HS Tile Configuration" group.byte 0x1A0++0x00 line.byte 0x00 "HS16,UDB Channel HS Tile Configuration" group.byte 0x1A1++0x00 line.byte 0x00 "HS17,UDB Channel HS Tile Configuration" group.byte 0x1A2++0x00 line.byte 0x00 "HS18,UDB Channel HS Tile Configuration" group.byte 0x1A3++0x00 line.byte 0x00 "HS19,UDB Channel HS Tile Configuration" group.byte 0x1A4++0x00 line.byte 0x00 "HS20,UDB Channel HS Tile Configuration" group.byte 0x1A5++0x00 line.byte 0x00 "HS21,UDB Channel HS Tile Configuration" group.byte 0x1A6++0x00 line.byte 0x00 "HS22,UDB Channel HS Tile Configuration" group.byte 0x1A7++0x00 line.byte 0x00 "HS23,UDB Channel HS Tile Configuration" group.byte 0x1A8++0x00 line.byte 0x00 "HV_R0,UDB Channel HV Tile Configuration" group.byte 0x1A9++0x00 line.byte 0x00 "HV_R1,UDB Channel HV Tile Configuration" group.byte 0x1AA++0x00 line.byte 0x00 "HV_R2,UDB Channel HV Tile Configuration" group.byte 0x1AB++0x00 line.byte 0x00 "HV_R3,UDB Channel HV Tile Configuration" group.byte 0x1AC++0x00 line.byte 0x00 "HV_R4,UDB Channel HV Tile Configuration" group.byte 0x1AD++0x00 line.byte 0x00 "HV_R5,UDB Channel HV Tile Configuration" group.byte 0x1AE++0x00 line.byte 0x00 "HV_R6,UDB Channel HV Tile Configuration" group.byte 0x1AF++0x00 line.byte 0x00 "HV_R7,UDB Channel HV Tile Configuration" group.byte 0x1B0++0x00 line.byte 0x00 "HV_R8,UDB Channel HV Tile Configuration" group.byte 0x1B1++0x00 line.byte 0x00 "HV_R9,UDB Channel HV Tile Configuration" group.byte 0x1B2++0x00 line.byte 0x00 "HV_R10,UDB Channel HV Tile Configuration" group.byte 0x1B3++0x00 line.byte 0x00 "HV_R11,UDB Channel HV Tile Configuration" group.byte 0x1B4++0x00 line.byte 0x00 "HV_R12,UDB Channel HV Tile Configuration" group.byte 0x1B5++0x00 line.byte 0x00 "HV_R13,UDB Channel HV Tile Configuration" group.byte 0x1B6++0x00 line.byte 0x00 "HV_R14,UDB Channel HV Tile Configuration" group.byte 0x1B7++0x00 line.byte 0x00 "HV_R15,UDB Channel HV Tile Configuration" group.byte 0x1C0++0x00 line.byte 0x00 "PLD0IN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1C2++0x00 line.byte 0x00 "PLD0IN1,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1C4++0x00 line.byte 0x00 "PLD0IN2,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CA++0x00 line.byte 0x00 "PLD1IN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CC++0x00 line.byte 0x00 "PLD1IN1,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CE++0x00 line.byte 0x00 "PLD1IN2,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d0++0x00 line.byte 0x00 "DPIN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d2++0x00 line.byte 0x00 "DPIN1,UDB Channel PI Tile Configuration (half populated)" hexmask.byte 0x00 4.--5. 1. " PI_BOT ,RAM configuration for BOTTOM UDB port interface configuration" hexmask.byte 0x00 2.--3. 1. " PI_TOP ,RAM configuration for TOP UDB port interface configuration" group.byte 0x1d6++0x00 line.byte 0x00 "SCIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d8++0x00 line.byte 0x00 "SCIOIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1de++0x00 line.byte 0x00 "RCIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1E0++0x00 line.byte 0x00 "VS0,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E2++0x00 line.byte 0x00 "VS1,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E4++0x00 line.byte 0x00 "VS2,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E6++0x00 line.byte 0x00 "VS3,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E8++0x00 line.byte 0x00 "VS4,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EA++0x00 line.byte 0x00 "VS5,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EC++0x00 line.byte 0x00 "VS6,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EE++0x00 line.byte 0x00 "VS7,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" width 0x0B tree.end tree.end base ad:(0x40010000+0xE00) tree "P 7" tree "U 0" width 18. group.long 0x0++0x03 line.long 0x00 "PLD_IT0,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT0C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT0C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x4++0x03 line.long 0x00 "PLD_IT1,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT1C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT1C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x8++0x03 line.long 0x00 "PLD_IT2,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT2C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT2C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xC++0x03 line.long 0x00 "PLD_IT3,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT3C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT3C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x10++0x03 line.long 0x00 "PLD_IT4,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT4C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT4C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x14++0x03 line.long 0x00 "PLD_IT5,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT5C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT5C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x18++0x03 line.long 0x00 "PLD_IT6,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT6C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT6C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x1C++0x03 line.long 0x00 "PLD_IT7,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT7C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT7C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x20++0x03 line.long 0x00 "PLD_IT8,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT8C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT8C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x24++0x03 line.long 0x00 "PLD_IT9,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT9C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT9C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x28++0x03 line.long 0x00 "PLD_IT10,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT10C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT10C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x2C++0x03 line.long 0x00 "PLD_IT11,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " group.word 0x30++0x01 line.word 0x00 "PLD_ORT0,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT0_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT0_0 ,OR term" "Not OR,OR" group.word 0x32++0x01 line.word 0x00 "PLD_ORT1,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT1_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT1_0 ,OR term" "Not OR,OR" group.word 0x34++0x01 line.word 0x00 "PLD_ORT2,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT2_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT2_0 ,OR term" "Not OR,OR" group.word 0x36++0x01 line.word 0x00 "PLD_ORT3,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " group.word (0x30+0x08)++0x07 line.word 0x00 "MC_CFG_CEN_CONST,Macrocell Configuration for Carry Enable and Constant" bitfld.word 0x00 15. " PLD1_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 14. " PLD1_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 13. " PLD1_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 12. " PLD1_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " PLD1_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 10. " PLD1_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " PLD1_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 8. " PLD1_MC0_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " PLD0_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 6. " PLD0_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " PLD0_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 4. " PLD0_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " PLD0_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 2. " PLD0_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " PLD0_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 0. " PLD0_MC0_CEN ,Carry enable" "Disabled,Enabled" line.word 0x02 "MC_CFG_XORFB,Macrocell Configuration for XOR Feedback" bitfld.word 0x02 14.--15. " PLD1_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 12.--13. " PLD1_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 10.--11. " PLD1_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 8.--9. " PLD1_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 6.--7. " PLD0_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 4.--5. " PLD0_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 2.--3. " PLD0_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 0.--1. " PLD0_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" line.word 0x04 "MC_CFG_SET_RESET,Macrocell Configuration for Set and Reset" bitfld.word 0x04 15. " PLD1_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 14. " PLD1_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 13. " PLD1_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 12. " PLD1_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 11. " PLD1_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 10. " PLD1_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 9. " PLD1_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 8. " PLD1_MC0_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 7. " PLD0_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 6. " PLD0_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 5. " PLD0_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 4. " PLD0_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 3. " PLD0_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 2. " PLD0_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 1. " PLD0_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 0. " PLD0_MC0_SET_SEL ,Set select enable" "Not set,Set" line.word 0x06 "MC_CFG_BYPASS,Macrocell Configuration for Bypass" bitfld.word 0x06 14. " PLD1_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 12. " PLD1_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 10. " PLD1_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 8. " PLD1_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 6. " PLD0_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 4. " PLD0_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 2. " PLD0_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 0. " PLD0_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " group.byte (0x30+0x10)++0x10 line.byte 0x00 "CFG0,Datapath Input Selection" bitfld.byte 0x00 4.--6. " RAD1 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x00 0.--2. " RAD0 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x01 "CFG1,Datapath Input Selection" bitfld.byte 0x01 0.--2. " RAD2 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x02 "CFG2,Datapath Input Selection" bitfld.byte 0x02 4.--6. " F1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x02 0.--2. " F0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x03 "CFG3,Datapath Input Selection" bitfld.byte 0x03 4.--6. " D1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x03 0.--2. " D0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x04 "CFG4,Datapath Input Selection" bitfld.byte 0x04 4.--6. " CI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x04 0.--2. " SI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x05 "CFG5,Datapath Output Selection" bitfld.byte 0x05 4.--7. " OUT1 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x05 0.--3. " OUT0 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x06 "CFG6,Datapath Output Selection" bitfld.byte 0x06 4.--7. " OUT3 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x06 0.--3. " OUT2 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x07 "CFG7,Datapath Output Selection" bitfld.byte 0x07 4.--7. " OUT5 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x07 0.--3. " OUT4 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x08 "CFG8,Datapath Output Synchronization" hexmask.byte 0x08 0.--5. 1. " OUT_SYNC ,Output Synchronization field" line.byte 0x09 "CFG9,ALU Mask" line.byte 0x0a "CFG10,Compare 0 Mask" line.byte 0x0b "CFG11,Compare 1 Mask" line.byte 0x0c "CFG12,Datapath Static Configuration" bitfld.byte 0x0c 7. " CMASK1_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 6. " CMASK0_EN ,Datapath mask enable" "Disabled,Enabled" textline " " bitfld.byte 0x0c 5. " AMASK_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 4. " DEF_SI ,Datapath default shift value" "0,1" textline " " bitfld.byte 0x0c 2.--3. " SI_SELB ,Datapath shift in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0c 0.--1. " SI_SELA ,Datapath shift in source select" "Default,Registered,Route,Chain" line.byte 0x0d "CFG13,Datapath Static Configuration" bitfld.byte 0x0d 6.--7. " CMP_SELB ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" bitfld.byte 0x0d 4.--5. " CMP_SELA ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" textline " " bitfld.byte 0x0d 2.--3. " CI_SELB ,Datapath carry in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0d 0.--1. " CI_SELA ,Datapath carry in source select" "Default,Registered,Route,Chain" line.byte 0x0e "CFG14,Datapath Static Configuration" bitfld.byte 0x0e 7. " MSB_EN ,Datapath MSB selection enable" "Disabled,Enabled" bitfld.byte 0x0e 4.--6. " MSB_SEL ,Datapath MSB Selection" "Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7" textline " " bitfld.byte 0x0e 3. " CHAIN_CMSB ,Datapath CRC MSB chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 2. " CHAIN_FB ,Datapath CRC feedback chaining enable" "Disabled,Enabled" textline " " bitfld.byte 0x0e 1. " CHAIN1 ,Datapath condition chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 0. " CHAIN0 ,Datapath condition chaining enable" "Disabled,Enabled" line.byte 0x0f "CFG15,Datapath Static Configuration" bitfld.byte 0x0f 7. " PI_SEL ,Datapath parallel input selection" "Normal,Parallel" bitfld.byte 0x0f 6. " SHIFT_SEL ,Datapath shift out selection" "SOL_MSB,SOR" textline " " bitfld.byte 0x0f 5. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x0f 4. " NC0 ,Spare register bit" "0,1" textline " " bitfld.byte 0x0f 2.--3. " F1_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" bitfld.byte 0x0f 0.--1. " F0_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" line.byte 0x10 "CFG16,Datapath Static Configuration" bitfld.byte 0x10 7. " F1_CK_INV ,FIFO Clock Invert" "Normal,Inverted" bitfld.byte 0x10 6. " F0_CK_INV ,FIFO Clock Invert" "Normal,Inverted" textline " " bitfld.byte 0x10 5. " FIFO_FAST ,FIFO Fast Mode" "Disabled,Enabled" bitfld.byte 0x10 4. " FIFO_CAP ,FIFO Software Capture Mode" "Disabled,Enabled" textline " " bitfld.byte 0x10 3. " FIFO_EDGE ,Edge/level sensitive FIFO write control" "Level,Edge" bitfld.byte 0x10 2. " FIFO_ASYNC ,Asynchronous FIFO clocking support" "Synchronous,Asynchronous" textline " " bitfld.byte 0x10 1. " EXT_CRCPRS ,External CRC/PRS mode" "Internal,External" bitfld.byte 0x10 0. " WRK16_CONCAT ,Datapath register access mode" "Default,Concatenate" group.byte (0x30+0x24)++0x03 line.byte 0x00 "CFG20,Status input mode selection" line.byte 0x01 "CFG21,Spare register bits" bitfld.byte 0x01 1. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x01 0. " NC0 ,Spare register bit" "0,1" line.byte 0x02 "CFG22,Status Output Control" bitfld.byte 0x02 3. " SC_SYNC_MD ,SC Sync Mode" "Disabled,Enabled" bitfld.byte 0x02 2. " SC_INT_MD ,SC Interrupt Mode" "Normal,INT_MODE" textline " " bitfld.byte 0x02 0.--1. " SC_OUT_CTL ,Selects the output source for the Status and Control routing connections" "Control,Parallel,Counter,?..." line.byte 0x03 "CFG23,Counter Routing Control" bitfld.byte 0x03 5. " ROUTE_EN ,Configure the counter enable signal for routing input" "Disabled,Enabled" bitfld.byte 0x03 4. " ROUTE_LD ,Configure the counter load signal for routing input" "Disabled,Enabled" textline " " bitfld.byte 0x03 2.--3. " CNT_EN_SEL ,Selects the routing inputs for the counter enable signal" "SC_IN4,SC_IN5,SC_IN6,SC_IO" bitfld.byte 0x03 0.--1. " CNT_LD_SEL ,Selects the routing inputs for the counter load signal" "SC_IN0,SC_IN1,SC_IN2,SC_IN3" group.byte (0x30+0x28)++0x00 line.byte 0x00 "CFG24,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x29)++0x00 line.byte 0x00 "CFG25,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2A)++0x00 line.byte 0x00 "CFG26,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2B)++0x00 line.byte 0x00 "CFG27,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2C)++0x03 line.byte 0x00 "CFG28,Clock Selection" bitfld.byte 0x00 4.--7. " PLD1_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x00 0.--3. " PLD0_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x01 "CFG29,Clock Selection" bitfld.byte 0x01 4.--7. " SC_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x01 0.--3. " DP_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x02 "CFG30,Reset Selection Register" bitfld.byte 0x02 4. " GUDB_WR ,Enable global write operation for the configuration and working registers in this UDB" "Disabled,Enabled" bitfld.byte 0x02 3. " EN_RES_CNT ,Enable routed reset to counter/control register" "Disabled,Enabled" textline " " bitfld.byte 0x02 2. " RES_POL ,Select polarity of the routed reset control" "Not inverted,Inverted" bitfld.byte 0x02 0.--1. " RES_SEL ,Select routing input for routed reset control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" line.byte 0x03 "CFG31,Reset and Clock Input Enable" bitfld.byte 0x03 4.--5. " EXT_CK_SEL ,External clock selection" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" bitfld.byte 0x03 1. " EXT_SYNC ,Enable synchronization of selected external clock" "Disabled,Enabled" textline " " bitfld.byte 0x03 0. " NC0 ,Spare register bit" "0,1" group.word 0x60++0x01 line.word 0x00 "DCFG0,Dynamic Configuration RAM Register 0" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x62++0x01 line.word 0x00 "DCFG1,Dynamic Configuration RAM Register 1" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x64++0x01 line.word 0x00 "DCFG2,Dynamic Configuration RAM Register 2" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x66++0x01 line.word 0x00 "DCFG3,Dynamic Configuration RAM Register 3" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x68++0x01 line.word 0x00 "DCFG4,Dynamic Configuration RAM Register 4" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6A++0x01 line.word 0x00 "DCFG5,Dynamic Configuration RAM Register 5" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6C++0x01 line.word 0x00 "DCFG6,Dynamic Configuration RAM Register 6" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6E++0x01 line.word 0x00 "DCFG7,Dynamic Configuration RAM Register 7" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" width 0x0B tree.end tree "U 1" width 18. group.long 0x80++0x03 line.long 0x00 "PLD_IT0,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT0C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT0C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x84++0x03 line.long 0x00 "PLD_IT1,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT1C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT1C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x88++0x03 line.long 0x00 "PLD_IT2,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT2C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT2C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x8C++0x03 line.long 0x00 "PLD_IT3,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT3C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT3C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x90++0x03 line.long 0x00 "PLD_IT4,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT4C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT4C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x94++0x03 line.long 0x00 "PLD_IT5,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT5C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT5C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x98++0x03 line.long 0x00 "PLD_IT6,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT6C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT6C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x9C++0x03 line.long 0x00 "PLD_IT7,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT7C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT7C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA0++0x03 line.long 0x00 "PLD_IT8,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT8C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT8C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA4++0x03 line.long 0x00 "PLD_IT9,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT9C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT9C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA8++0x03 line.long 0x00 "PLD_IT10,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT10C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT10C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xAC++0x03 line.long 0x00 "PLD_IT11,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " group.word 0xB0++0x01 line.word 0x00 "PLD_ORT0,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT0_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT0_0 ,OR term" "Not OR,OR" group.word 0xB2++0x01 line.word 0x00 "PLD_ORT1,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT1_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT1_0 ,OR term" "Not OR,OR" group.word 0xB4++0x01 line.word 0x00 "PLD_ORT2,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT2_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT2_0 ,OR term" "Not OR,OR" group.word 0xB6++0x01 line.word 0x00 "PLD_ORT3,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " group.word (0xB0+0x08)++0x07 line.word 0x00 "MC_CFG_CEN_CONST,Macrocell Configuration for Carry Enable and Constant" bitfld.word 0x00 15. " PLD1_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 14. " PLD1_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 13. " PLD1_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 12. " PLD1_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " PLD1_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 10. " PLD1_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " PLD1_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 8. " PLD1_MC0_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " PLD0_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 6. " PLD0_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " PLD0_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 4. " PLD0_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " PLD0_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 2. " PLD0_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " PLD0_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 0. " PLD0_MC0_CEN ,Carry enable" "Disabled,Enabled" line.word 0x02 "MC_CFG_XORFB,Macrocell Configuration for XOR Feedback" bitfld.word 0x02 14.--15. " PLD1_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 12.--13. " PLD1_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 10.--11. " PLD1_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 8.--9. " PLD1_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 6.--7. " PLD0_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 4.--5. " PLD0_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 2.--3. " PLD0_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 0.--1. " PLD0_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" line.word 0x04 "MC_CFG_SET_RESET,Macrocell Configuration for Set and Reset" bitfld.word 0x04 15. " PLD1_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 14. " PLD1_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 13. " PLD1_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 12. " PLD1_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 11. " PLD1_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 10. " PLD1_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 9. " PLD1_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 8. " PLD1_MC0_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 7. " PLD0_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 6. " PLD0_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 5. " PLD0_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 4. " PLD0_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 3. " PLD0_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 2. " PLD0_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 1. " PLD0_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 0. " PLD0_MC0_SET_SEL ,Set select enable" "Not set,Set" line.word 0x06 "MC_CFG_BYPASS,Macrocell Configuration for Bypass" bitfld.word 0x06 14. " PLD1_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 12. " PLD1_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 10. " PLD1_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 8. " PLD1_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 6. " PLD0_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 4. " PLD0_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 2. " PLD0_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 0. " PLD0_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " group.byte (0xB0+0x10)++0x10 line.byte 0x00 "CFG0,Datapath Input Selection" bitfld.byte 0x00 4.--6. " RAD1 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x00 0.--2. " RAD0 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x01 "CFG1,Datapath Input Selection" bitfld.byte 0x01 0.--2. " RAD2 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x02 "CFG2,Datapath Input Selection" bitfld.byte 0x02 4.--6. " F1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x02 0.--2. " F0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x03 "CFG3,Datapath Input Selection" bitfld.byte 0x03 4.--6. " D1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x03 0.--2. " D0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x04 "CFG4,Datapath Input Selection" bitfld.byte 0x04 4.--6. " CI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x04 0.--2. " SI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x05 "CFG5,Datapath Output Selection" bitfld.byte 0x05 4.--7. " OUT1 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x05 0.--3. " OUT0 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x06 "CFG6,Datapath Output Selection" bitfld.byte 0x06 4.--7. " OUT3 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x06 0.--3. " OUT2 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x07 "CFG7,Datapath Output Selection" bitfld.byte 0x07 4.--7. " OUT5 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x07 0.--3. " OUT4 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x08 "CFG8,Datapath Output Synchronization" hexmask.byte 0x08 0.--5. 1. " OUT_SYNC ,Output Synchronization field" line.byte 0x09 "CFG9,ALU Mask" line.byte 0x0a "CFG10,Compare 0 Mask" line.byte 0x0b "CFG11,Compare 1 Mask" line.byte 0x0c "CFG12,Datapath Static Configuration" bitfld.byte 0x0c 7. " CMASK1_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 6. " CMASK0_EN ,Datapath mask enable" "Disabled,Enabled" textline " " bitfld.byte 0x0c 5. " AMASK_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 4. " DEF_SI ,Datapath default shift value" "0,1" textline " " bitfld.byte 0x0c 2.--3. " SI_SELB ,Datapath shift in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0c 0.--1. " SI_SELA ,Datapath shift in source select" "Default,Registered,Route,Chain" line.byte 0x0d "CFG13,Datapath Static Configuration" bitfld.byte 0x0d 6.--7. " CMP_SELB ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" bitfld.byte 0x0d 4.--5. " CMP_SELA ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" textline " " bitfld.byte 0x0d 2.--3. " CI_SELB ,Datapath carry in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0d 0.--1. " CI_SELA ,Datapath carry in source select" "Default,Registered,Route,Chain" line.byte 0x0e "CFG14,Datapath Static Configuration" bitfld.byte 0x0e 7. " MSB_EN ,Datapath MSB selection enable" "Disabled,Enabled" bitfld.byte 0x0e 4.--6. " MSB_SEL ,Datapath MSB Selection" "Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7" textline " " bitfld.byte 0x0e 3. " CHAIN_CMSB ,Datapath CRC MSB chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 2. " CHAIN_FB ,Datapath CRC feedback chaining enable" "Disabled,Enabled" textline " " bitfld.byte 0x0e 1. " CHAIN1 ,Datapath condition chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 0. " CHAIN0 ,Datapath condition chaining enable" "Disabled,Enabled" line.byte 0x0f "CFG15,Datapath Static Configuration" bitfld.byte 0x0f 7. " PI_SEL ,Datapath parallel input selection" "Normal,Parallel" bitfld.byte 0x0f 6. " SHIFT_SEL ,Datapath shift out selection" "SOL_MSB,SOR" textline " " bitfld.byte 0x0f 5. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x0f 4. " NC0 ,Spare register bit" "0,1" textline " " bitfld.byte 0x0f 2.--3. " F1_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" bitfld.byte 0x0f 0.--1. " F0_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" line.byte 0x10 "CFG16,Datapath Static Configuration" bitfld.byte 0x10 7. " F1_CK_INV ,FIFO Clock Invert" "Normal,Inverted" bitfld.byte 0x10 6. " F0_CK_INV ,FIFO Clock Invert" "Normal,Inverted" textline " " bitfld.byte 0x10 5. " FIFO_FAST ,FIFO Fast Mode" "Disabled,Enabled" bitfld.byte 0x10 4. " FIFO_CAP ,FIFO Software Capture Mode" "Disabled,Enabled" textline " " bitfld.byte 0x10 3. " FIFO_EDGE ,Edge/level sensitive FIFO write control" "Level,Edge" bitfld.byte 0x10 2. " FIFO_ASYNC ,Asynchronous FIFO clocking support" "Synchronous,Asynchronous" textline " " bitfld.byte 0x10 1. " EXT_CRCPRS ,External CRC/PRS mode" "Internal,External" bitfld.byte 0x10 0. " WRK16_CONCAT ,Datapath register access mode" "Default,Concatenate" group.byte (0xB0+0x24)++0x03 line.byte 0x00 "CFG20,Status input mode selection" line.byte 0x01 "CFG21,Spare register bits" bitfld.byte 0x01 1. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x01 0. " NC0 ,Spare register bit" "0,1" line.byte 0x02 "CFG22,Status Output Control" bitfld.byte 0x02 3. " SC_SYNC_MD ,SC Sync Mode" "Disabled,Enabled" bitfld.byte 0x02 2. " SC_INT_MD ,SC Interrupt Mode" "Normal,INT_MODE" textline " " bitfld.byte 0x02 0.--1. " SC_OUT_CTL ,Selects the output source for the Status and Control routing connections" "Control,Parallel,Counter,?..." line.byte 0x03 "CFG23,Counter Routing Control" bitfld.byte 0x03 5. " ROUTE_EN ,Configure the counter enable signal for routing input" "Disabled,Enabled" bitfld.byte 0x03 4. " ROUTE_LD ,Configure the counter load signal for routing input" "Disabled,Enabled" textline " " bitfld.byte 0x03 2.--3. " CNT_EN_SEL ,Selects the routing inputs for the counter enable signal" "SC_IN4,SC_IN5,SC_IN6,SC_IO" bitfld.byte 0x03 0.--1. " CNT_LD_SEL ,Selects the routing inputs for the counter load signal" "SC_IN0,SC_IN1,SC_IN2,SC_IN3" group.byte (0xB0+0x28)++0x00 line.byte 0x00 "CFG24,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x29)++0x00 line.byte 0x00 "CFG25,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2A)++0x00 line.byte 0x00 "CFG26,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2B)++0x00 line.byte 0x00 "CFG27,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2C)++0x03 line.byte 0x00 "CFG28,Clock Selection" bitfld.byte 0x00 4.--7. " PLD1_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x00 0.--3. " PLD0_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x01 "CFG29,Clock Selection" bitfld.byte 0x01 4.--7. " SC_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x01 0.--3. " DP_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x02 "CFG30,Reset Selection Register" bitfld.byte 0x02 4. " GUDB_WR ,Enable global write operation for the configuration and working registers in this UDB" "Disabled,Enabled" bitfld.byte 0x02 3. " EN_RES_CNT ,Enable routed reset to counter/control register" "Disabled,Enabled" textline " " bitfld.byte 0x02 2. " RES_POL ,Select polarity of the routed reset control" "Not inverted,Inverted" bitfld.byte 0x02 0.--1. " RES_SEL ,Select routing input for routed reset control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" line.byte 0x03 "CFG31,Reset and Clock Input Enable" bitfld.byte 0x03 4.--5. " EXT_CK_SEL ,External clock selection" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" bitfld.byte 0x03 1. " EXT_SYNC ,Enable synchronization of selected external clock" "Disabled,Enabled" textline " " bitfld.byte 0x03 0. " NC0 ,Spare register bit" "0,1" group.word 0xE0++0x01 line.word 0x00 "DCFG0,Dynamic Configuration RAM Register 0" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE2++0x01 line.word 0x00 "DCFG1,Dynamic Configuration RAM Register 1" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE4++0x01 line.word 0x00 "DCFG2,Dynamic Configuration RAM Register 2" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE6++0x01 line.word 0x00 "DCFG3,Dynamic Configuration RAM Register 3" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE8++0x01 line.word 0x00 "DCFG4,Dynamic Configuration RAM Register 4" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEA++0x01 line.word 0x00 "DCFG5,Dynamic Configuration RAM Register 5" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEC++0x01 line.word 0x00 "DCFG6,Dynamic Configuration RAM Register 6" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEE++0x01 line.word 0x00 "DCFG7,Dynamic Configuration RAM Register 7" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" width 0x0B tree.end tree "Route" width 9. group.byte 0x100++0x00 line.byte 0x00 "HC0,UDB Channel HC Tile Configuration" group.byte 0x101++0x00 line.byte 0x00 "HC1,UDB Channel HC Tile Configuration" group.byte 0x102++0x00 line.byte 0x00 "HC2,UDB Channel HC Tile Configuration" group.byte 0x103++0x00 line.byte 0x00 "HC3,UDB Channel HC Tile Configuration" group.byte 0x104++0x00 line.byte 0x00 "HC4,UDB Channel HC Tile Configuration" group.byte 0x105++0x00 line.byte 0x00 "HC5,UDB Channel HC Tile Configuration" group.byte 0x106++0x00 line.byte 0x00 "HC6,UDB Channel HC Tile Configuration" group.byte 0x107++0x00 line.byte 0x00 "HC7,UDB Channel HC Tile Configuration" group.byte 0x108++0x00 line.byte 0x00 "HC8,UDB Channel HC Tile Configuration" group.byte 0x109++0x00 line.byte 0x00 "HC9,UDB Channel HC Tile Configuration" group.byte 0x10A++0x00 line.byte 0x00 "HC10,UDB Channel HC Tile Configuration" group.byte 0x10B++0x00 line.byte 0x00 "HC11,UDB Channel HC Tile Configuration" group.byte 0x10C++0x00 line.byte 0x00 "HC12,UDB Channel HC Tile Configuration" group.byte 0x10D++0x00 line.byte 0x00 "HC13,UDB Channel HC Tile Configuration" group.byte 0x10E++0x00 line.byte 0x00 "HC14,UDB Channel HC Tile Configuration" group.byte 0x10F++0x00 line.byte 0x00 "HC15,UDB Channel HC Tile Configuration" group.byte 0x110++0x00 line.byte 0x00 "HC16,UDB Channel HC Tile Configuration" group.byte 0x111++0x00 line.byte 0x00 "HC17,UDB Channel HC Tile Configuration" group.byte 0x112++0x00 line.byte 0x00 "HC18,UDB Channel HC Tile Configuration" group.byte 0x113++0x00 line.byte 0x00 "HC19,UDB Channel HC Tile Configuration" group.byte 0x114++0x00 line.byte 0x00 "HC20,UDB Channel HC Tile Configuration" group.byte 0x115++0x00 line.byte 0x00 "HC21,UDB Channel HC Tile Configuration" group.byte 0x116++0x00 line.byte 0x00 "HC22,UDB Channel HC Tile Configuration" group.byte 0x117++0x00 line.byte 0x00 "HC23,UDB Channel HC Tile Configuration" group.byte 0x118++0x00 line.byte 0x00 "HC24,UDB Channel HC Tile Configuration" group.byte 0x119++0x00 line.byte 0x00 "HC25,UDB Channel HC Tile Configuration" group.byte 0x11A++0x00 line.byte 0x00 "HC26,UDB Channel HC Tile Configuration" group.byte 0x11B++0x00 line.byte 0x00 "HC27,UDB Channel HC Tile Configuration" group.byte 0x11C++0x00 line.byte 0x00 "HC28,UDB Channel HC Tile Configuration" group.byte 0x11D++0x00 line.byte 0x00 "HC29,UDB Channel HC Tile Configuration" group.byte 0x11E++0x00 line.byte 0x00 "HC30,UDB Channel HC Tile Configuration" group.byte 0x11F++0x00 line.byte 0x00 "HC31,UDB Channel HC Tile Configuration" group.byte 0x120++0x00 line.byte 0x00 "HC32,UDB Channel HC Tile Configuration" group.byte 0x121++0x00 line.byte 0x00 "HC33,UDB Channel HC Tile Configuration" group.byte 0x122++0x00 line.byte 0x00 "HC34,UDB Channel HC Tile Configuration" group.byte 0x123++0x00 line.byte 0x00 "HC35,UDB Channel HC Tile Configuration" group.byte 0x124++0x00 line.byte 0x00 "HC36,UDB Channel HC Tile Configuration" group.byte 0x125++0x00 line.byte 0x00 "HC37,UDB Channel HC Tile Configuration" group.byte 0x126++0x00 line.byte 0x00 "HC38,UDB Channel HC Tile Configuration" group.byte 0x127++0x00 line.byte 0x00 "HC39,UDB Channel HC Tile Configuration" group.byte 0x128++0x00 line.byte 0x00 "HC40,UDB Channel HC Tile Configuration" group.byte 0x129++0x00 line.byte 0x00 "HC41,UDB Channel HC Tile Configuration" group.byte 0x12A++0x00 line.byte 0x00 "HC42,UDB Channel HC Tile Configuration" group.byte 0x12B++0x00 line.byte 0x00 "HC43,UDB Channel HC Tile Configuration" group.byte 0x12C++0x00 line.byte 0x00 "HC44,UDB Channel HC Tile Configuration" group.byte 0x12D++0x00 line.byte 0x00 "HC45,UDB Channel HC Tile Configuration" group.byte 0x12E++0x00 line.byte 0x00 "HC46,UDB Channel HC Tile Configuration" group.byte 0x12F++0x00 line.byte 0x00 "HC47,UDB Channel HC Tile Configuration" group.byte 0x130++0x00 line.byte 0x00 "HC48,UDB Channel HC Tile Configuration" group.byte 0x131++0x00 line.byte 0x00 "HC49,UDB Channel HC Tile Configuration" group.byte 0x132++0x00 line.byte 0x00 "HC50,UDB Channel HC Tile Configuration" group.byte 0x133++0x00 line.byte 0x00 "HC51,UDB Channel HC Tile Configuration" group.byte 0x134++0x00 line.byte 0x00 "HC52,UDB Channel HC Tile Configuration" group.byte 0x135++0x00 line.byte 0x00 "HC53,UDB Channel HC Tile Configuration" group.byte 0x136++0x00 line.byte 0x00 "HC54,UDB Channel HC Tile Configuration" group.byte 0x137++0x00 line.byte 0x00 "HC55,UDB Channel HC Tile Configuration" group.byte 0x138++0x00 line.byte 0x00 "HC56,UDB Channel HC Tile Configuration" group.byte 0x139++0x00 line.byte 0x00 "HC57,UDB Channel HC Tile Configuration" group.byte 0x13A++0x00 line.byte 0x00 "HC58,UDB Channel HC Tile Configuration" group.byte 0x13B++0x00 line.byte 0x00 "HC59,UDB Channel HC Tile Configuration" group.byte 0x13C++0x00 line.byte 0x00 "HC60,UDB Channel HC Tile Configuration" group.byte 0x13D++0x00 line.byte 0x00 "HC61,UDB Channel HC Tile Configuration" group.byte 0x13E++0x00 line.byte 0x00 "HC62,UDB Channel HC Tile Configuration" group.byte 0x13F++0x00 line.byte 0x00 "HC63,UDB Channel HC Tile Configuration" group.byte 0x140++0x00 line.byte 0x00 "HC64,UDB Channel HC Tile Configuration" group.byte 0x141++0x00 line.byte 0x00 "HC65,UDB Channel HC Tile Configuration" group.byte 0x142++0x00 line.byte 0x00 "HC66,UDB Channel HC Tile Configuration" group.byte 0x143++0x00 line.byte 0x00 "HC67,UDB Channel HC Tile Configuration" group.byte 0x144++0x00 line.byte 0x00 "HC68,UDB Channel HC Tile Configuration" group.byte 0x145++0x00 line.byte 0x00 "HC69,UDB Channel HC Tile Configuration" group.byte 0x146++0x00 line.byte 0x00 "HC70,UDB Channel HC Tile Configuration" group.byte 0x147++0x00 line.byte 0x00 "HC71,UDB Channel HC Tile Configuration" group.byte 0x148++0x00 line.byte 0x00 "HC72,UDB Channel HC Tile Configuration" group.byte 0x149++0x00 line.byte 0x00 "HC73,UDB Channel HC Tile Configuration" group.byte 0x14A++0x00 line.byte 0x00 "HC74,UDB Channel HC Tile Configuration" group.byte 0x14B++0x00 line.byte 0x00 "HC75,UDB Channel HC Tile Configuration" group.byte 0x14C++0x00 line.byte 0x00 "HC76,UDB Channel HC Tile Configuration" group.byte 0x14D++0x00 line.byte 0x00 "HC77,UDB Channel HC Tile Configuration" group.byte 0x14E++0x00 line.byte 0x00 "HC78,UDB Channel HC Tile Configuration" group.byte 0x14F++0x00 line.byte 0x00 "HC79,UDB Channel HC Tile Configuration" group.byte 0x150++0x00 line.byte 0x00 "HC80,UDB Channel HC Tile Configuration" group.byte 0x151++0x00 line.byte 0x00 "HC81,UDB Channel HC Tile Configuration" group.byte 0x152++0x00 line.byte 0x00 "HC82,UDB Channel HC Tile Configuration" group.byte 0x153++0x00 line.byte 0x00 "HC83,UDB Channel HC Tile Configuration" group.byte 0x154++0x00 line.byte 0x00 "HC84,UDB Channel HC Tile Configuration" group.byte 0x155++0x00 line.byte 0x00 "HC85,UDB Channel HC Tile Configuration" group.byte 0x156++0x00 line.byte 0x00 "HC86,UDB Channel HC Tile Configuration" group.byte 0x157++0x00 line.byte 0x00 "HC87,UDB Channel HC Tile Configuration" group.byte 0x158++0x00 line.byte 0x00 "HC88,UDB Channel HC Tile Configuration" group.byte 0x159++0x00 line.byte 0x00 "HC89,UDB Channel HC Tile Configuration" group.byte 0x15A++0x00 line.byte 0x00 "HC90,UDB Channel HC Tile Configuration" group.byte 0x15B++0x00 line.byte 0x00 "HC91,UDB Channel HC Tile Configuration" group.byte 0x15C++0x00 line.byte 0x00 "HC92,UDB Channel HC Tile Configuration" group.byte 0x15D++0x00 line.byte 0x00 "HC93,UDB Channel HC Tile Configuration" group.byte 0x15E++0x00 line.byte 0x00 "HC94,UDB Channel HC Tile Configuration" group.byte 0x15F++0x00 line.byte 0x00 "HC95,UDB Channel HC Tile Configuration" group.byte 0x160++0x00 line.byte 0x00 "HC96,UDB Channel HC Tile Configuration" group.byte 0x161++0x00 line.byte 0x00 "HC97,UDB Channel HC Tile Configuration" group.byte 0x162++0x00 line.byte 0x00 "HC98,UDB Channel HC Tile Configuration" group.byte 0x163++0x00 line.byte 0x00 "HC99,UDB Channel HC Tile Configuration" group.byte 0x164++0x00 line.byte 0x00 "HC100,UDB Channel HC Tile Configuration" group.byte 0x165++0x00 line.byte 0x00 "HC101,UDB Channel HC Tile Configuration" group.byte 0x166++0x00 line.byte 0x00 "HC102,UDB Channel HC Tile Configuration" group.byte 0x167++0x00 line.byte 0x00 "HC103,UDB Channel HC Tile Configuration" group.byte 0x168++0x00 line.byte 0x00 "HC104,UDB Channel HC Tile Configuration" group.byte 0x169++0x00 line.byte 0x00 "HC105,UDB Channel HC Tile Configuration" group.byte 0x16A++0x00 line.byte 0x00 "HC106,UDB Channel HC Tile Configuration" group.byte 0x16B++0x00 line.byte 0x00 "HC107,UDB Channel HC Tile Configuration" group.byte 0x16C++0x00 line.byte 0x00 "HC108,UDB Channel HC Tile Configuration" group.byte 0x16D++0x00 line.byte 0x00 "HC109,UDB Channel HC Tile Configuration" group.byte 0x16E++0x00 line.byte 0x00 "HC110,UDB Channel HC Tile Configuration" group.byte 0x16F++0x00 line.byte 0x00 "HC111,UDB Channel HC Tile Configuration" group.byte 0x170++0x00 line.byte 0x00 "HC112,UDB Channel HC Tile Configuration" group.byte 0x171++0x00 line.byte 0x00 "HC113,UDB Channel HC Tile Configuration" group.byte 0x172++0x00 line.byte 0x00 "HC114,UDB Channel HC Tile Configuration" group.byte 0x173++0x00 line.byte 0x00 "HC115,UDB Channel HC Tile Configuration" group.byte 0x174++0x00 line.byte 0x00 "HC116,UDB Channel HC Tile Configuration" group.byte 0x175++0x00 line.byte 0x00 "HC117,UDB Channel HC Tile Configuration" group.byte 0x176++0x00 line.byte 0x00 "HC118,UDB Channel HC Tile Configuration" group.byte 0x177++0x00 line.byte 0x00 "HC119,UDB Channel HC Tile Configuration" group.byte 0x178++0x00 line.byte 0x00 "HC120,UDB Channel HC Tile Configuration" group.byte 0x179++0x00 line.byte 0x00 "HC121,UDB Channel HC Tile Configuration" group.byte 0x17A++0x00 line.byte 0x00 "HC122,UDB Channel HC Tile Configuration" group.byte 0x17B++0x00 line.byte 0x00 "HC123,UDB Channel HC Tile Configuration" group.byte 0x17C++0x00 line.byte 0x00 "HC124,UDB Channel HC Tile Configuration" group.byte 0x17D++0x00 line.byte 0x00 "HC125,UDB Channel HC Tile Configuration" group.byte 0x17E++0x00 line.byte 0x00 "HC126,UDB Channel HC Tile Configuration" group.byte 0x17F++0x00 line.byte 0x00 "HC127,UDB Channel HC Tile Configuration" group.byte 0x180++0x00 line.byte 0x00 "HV_L0,UDB Channel HV Tile Configuration" group.byte 0x181++0x00 line.byte 0x00 "HV_L1,UDB Channel HV Tile Configuration" group.byte 0x182++0x00 line.byte 0x00 "HV_L2,UDB Channel HV Tile Configuration" group.byte 0x183++0x00 line.byte 0x00 "HV_L3,UDB Channel HV Tile Configuration" group.byte 0x184++0x00 line.byte 0x00 "HV_L4,UDB Channel HV Tile Configuration" group.byte 0x185++0x00 line.byte 0x00 "HV_L5,UDB Channel HV Tile Configuration" group.byte 0x186++0x00 line.byte 0x00 "HV_L6,UDB Channel HV Tile Configuration" group.byte 0x187++0x00 line.byte 0x00 "HV_L7,UDB Channel HV Tile Configuration" group.byte 0x188++0x00 line.byte 0x00 "HV_L8,UDB Channel HV Tile Configuration" group.byte 0x189++0x00 line.byte 0x00 "HV_L9,UDB Channel HV Tile Configuration" group.byte 0x18A++0x00 line.byte 0x00 "HV_L10,UDB Channel HV Tile Configuration" group.byte 0x18B++0x00 line.byte 0x00 "HV_L11,UDB Channel HV Tile Configuration" group.byte 0x18C++0x00 line.byte 0x00 "HV_L12,UDB Channel HV Tile Configuration" group.byte 0x18D++0x00 line.byte 0x00 "HV_L13,UDB Channel HV Tile Configuration" group.byte 0x18E++0x00 line.byte 0x00 "HV_L14,UDB Channel HV Tile Configuration" group.byte 0x18F++0x00 line.byte 0x00 "HV_L15,UDB Channel HV Tile Configuration" group.byte 0x190++0x00 line.byte 0x00 "HS0,UDB Channel HS Tile Configuration" group.byte 0x191++0x00 line.byte 0x00 "HS1,UDB Channel HS Tile Configuration" group.byte 0x192++0x00 line.byte 0x00 "HS2,UDB Channel HS Tile Configuration" group.byte 0x193++0x00 line.byte 0x00 "HS3,UDB Channel HS Tile Configuration" group.byte 0x194++0x00 line.byte 0x00 "HS4,UDB Channel HS Tile Configuration" group.byte 0x195++0x00 line.byte 0x00 "HS5,UDB Channel HS Tile Configuration" group.byte 0x196++0x00 line.byte 0x00 "HS6,UDB Channel HS Tile Configuration" group.byte 0x197++0x00 line.byte 0x00 "HS7,UDB Channel HS Tile Configuration" group.byte 0x198++0x00 line.byte 0x00 "HS8,UDB Channel HS Tile Configuration" group.byte 0x199++0x00 line.byte 0x00 "HS9,UDB Channel HS Tile Configuration" group.byte 0x19A++0x00 line.byte 0x00 "HS10,UDB Channel HS Tile Configuration" group.byte 0x19B++0x00 line.byte 0x00 "HS11,UDB Channel HS Tile Configuration" group.byte 0x19C++0x00 line.byte 0x00 "HS12,UDB Channel HS Tile Configuration" group.byte 0x19D++0x00 line.byte 0x00 "HS13,UDB Channel HS Tile Configuration" group.byte 0x19E++0x00 line.byte 0x00 "HS14,UDB Channel HS Tile Configuration" group.byte 0x19F++0x00 line.byte 0x00 "HS15,UDB Channel HS Tile Configuration" group.byte 0x1A0++0x00 line.byte 0x00 "HS16,UDB Channel HS Tile Configuration" group.byte 0x1A1++0x00 line.byte 0x00 "HS17,UDB Channel HS Tile Configuration" group.byte 0x1A2++0x00 line.byte 0x00 "HS18,UDB Channel HS Tile Configuration" group.byte 0x1A3++0x00 line.byte 0x00 "HS19,UDB Channel HS Tile Configuration" group.byte 0x1A4++0x00 line.byte 0x00 "HS20,UDB Channel HS Tile Configuration" group.byte 0x1A5++0x00 line.byte 0x00 "HS21,UDB Channel HS Tile Configuration" group.byte 0x1A6++0x00 line.byte 0x00 "HS22,UDB Channel HS Tile Configuration" group.byte 0x1A7++0x00 line.byte 0x00 "HS23,UDB Channel HS Tile Configuration" group.byte 0x1A8++0x00 line.byte 0x00 "HV_R0,UDB Channel HV Tile Configuration" group.byte 0x1A9++0x00 line.byte 0x00 "HV_R1,UDB Channel HV Tile Configuration" group.byte 0x1AA++0x00 line.byte 0x00 "HV_R2,UDB Channel HV Tile Configuration" group.byte 0x1AB++0x00 line.byte 0x00 "HV_R3,UDB Channel HV Tile Configuration" group.byte 0x1AC++0x00 line.byte 0x00 "HV_R4,UDB Channel HV Tile Configuration" group.byte 0x1AD++0x00 line.byte 0x00 "HV_R5,UDB Channel HV Tile Configuration" group.byte 0x1AE++0x00 line.byte 0x00 "HV_R6,UDB Channel HV Tile Configuration" group.byte 0x1AF++0x00 line.byte 0x00 "HV_R7,UDB Channel HV Tile Configuration" group.byte 0x1B0++0x00 line.byte 0x00 "HV_R8,UDB Channel HV Tile Configuration" group.byte 0x1B1++0x00 line.byte 0x00 "HV_R9,UDB Channel HV Tile Configuration" group.byte 0x1B2++0x00 line.byte 0x00 "HV_R10,UDB Channel HV Tile Configuration" group.byte 0x1B3++0x00 line.byte 0x00 "HV_R11,UDB Channel HV Tile Configuration" group.byte 0x1B4++0x00 line.byte 0x00 "HV_R12,UDB Channel HV Tile Configuration" group.byte 0x1B5++0x00 line.byte 0x00 "HV_R13,UDB Channel HV Tile Configuration" group.byte 0x1B6++0x00 line.byte 0x00 "HV_R14,UDB Channel HV Tile Configuration" group.byte 0x1B7++0x00 line.byte 0x00 "HV_R15,UDB Channel HV Tile Configuration" group.byte 0x1C0++0x00 line.byte 0x00 "PLD0IN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1C2++0x00 line.byte 0x00 "PLD0IN1,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1C4++0x00 line.byte 0x00 "PLD0IN2,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CA++0x00 line.byte 0x00 "PLD1IN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CC++0x00 line.byte 0x00 "PLD1IN1,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CE++0x00 line.byte 0x00 "PLD1IN2,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d0++0x00 line.byte 0x00 "DPIN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d2++0x00 line.byte 0x00 "DPIN1,UDB Channel PI Tile Configuration (half populated)" hexmask.byte 0x00 4.--5. 1. " PI_BOT ,RAM configuration for BOTTOM UDB port interface configuration" hexmask.byte 0x00 2.--3. 1. " PI_TOP ,RAM configuration for TOP UDB port interface configuration" group.byte 0x1d6++0x00 line.byte 0x00 "SCIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d8++0x00 line.byte 0x00 "SCIOIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1de++0x00 line.byte 0x00 "RCIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1E0++0x00 line.byte 0x00 "VS0,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E2++0x00 line.byte 0x00 "VS1,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E4++0x00 line.byte 0x00 "VS2,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E6++0x00 line.byte 0x00 "VS3,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E8++0x00 line.byte 0x00 "VS4,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EA++0x00 line.byte 0x00 "VS5,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EC++0x00 line.byte 0x00 "VS6,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EE++0x00 line.byte 0x00 "VS7,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" width 0x0B tree.end tree.end width 0x0B tree.end tree "B 1" base ad:0x40011000 tree "UDB 4" width 12. if (((per.l(ad:(0x40011000+0x450)))&0x01)==0x00) base ad:0x40006504 group.byte 0x00++0x00 line.byte 0x00 "UDB04_A0,UDB04_A0" group.byte 0x10++0x00 line.byte 0x00 "UDB04_A1,UDB04_A1" group.byte 0x20++0x00 line.byte 0x00 "UDB04_D0,UDB04_D0" group.byte 0x30++0x00 line.byte 0x00 "UDB04_D1,UDB04_D1" group.byte 0x40++0x00 line.byte 0x00 "UDB04_F0,UDB04_F0" group.byte 0x50++0x00 line.byte 0x00 "UDB04_F1,UDB04_F1" rgroup.byte 0x60++0x00 line.byte 0x00 "UDB04_ST,UDB04_ST" bitfld.byte 0x00 7. " ST[7] ,Status register 7" "Low,High" bitfld.byte 0x00 6. " ST[6] ,Status register 6" "Low,High" bitfld.byte 0x00 5. " ST[5] ,Status register 5" "Low,High" bitfld.byte 0x00 4. " ST[4] ,Status register 4" "Low,High" textline " " bitfld.byte 0x00 3. " ST[3] ,Status register 3" "Low,High" bitfld.byte 0x00 2. " ST[2] ,Status register 2" "Low,High" bitfld.byte 0x00 1. " ST[1] ,Status register 1" "Low,High" bitfld.byte 0x00 0. " ST[0] ,Status register 0" "Low,High" group.byte 0x70++0x00 line.byte 0x00 "UDB04_CTL,UDB04_CTL" bitfld.byte 0x00 7. " CTL[7] ,Control register 7" "Disabled,Enabled" bitfld.byte 0x00 6. " CTL[6] ,Control register 6" "Disabled,Enabled" bitfld.byte 0x00 5. " CTL[5] ,Control register 5" "Disabled,Enabled" bitfld.byte 0x00 4. " CTL[4] ,Control register 4" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " CTL[3] ,Control register 3" "Disabled,Enabled" bitfld.byte 0x00 2. " CTL[2] ,Control register 2" "Disabled,Enabled" bitfld.byte 0x00 1. " CTL[1] ,Control register 1" "Disabled,Enabled" bitfld.byte 0x00 0. " CTL[0] ,Control register 0" "Disabled,Enabled" group.byte 0x80++0x00 line.byte 0x00 "UDB04_MSK,UDB04_MSK" bitfld.byte 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.byte 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.byte 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.byte 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.byte 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.byte 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" bitfld.byte 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" group.byte 0x90++0x00 line.byte 0x00 "UDB04_ACTL,UDB04_ACTL" bitfld.byte 0x00 5. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.byte 0x00 4. " INT_EN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 2. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 1. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.byte 0x00 0. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" rgroup.byte 0xa0++0x00 line.byte 0x00 "UDB04_MC,UDB04_MC" bitfld.byte 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else width 16. base ad:0x40006A08 group.word 0x00++0x01 line.word 0x00 "UDB04_A0_A1,UDB04_A0_A1" hexmask.word.byte 0x00 8.--15. 1. " A1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0 ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB04_D0_D1,UDB04_D0_D1" hexmask.word.byte 0x00 8.--15. 1. " D1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0 ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB04_F0_F1,UDB04_F0_F1" hexmask.word.byte 0x00 8.--15. 1. " F1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0 ,Generic field for 8 bit working registers" group.word 0xc0++0x01 line.word 0x00 "UDB04_ST_CTL,UDB04_ST_CTL" bitfld.word 0x00 15. " CTL[7] ,My Control register 7" "Disabled,Enabled" bitfld.word 0x00 14. " CTL[6] ,My Control register 6" "Disabled,Enabled" bitfld.word 0x00 13. " CTL[5] ,My Control register 5" "Disabled,Enabled" bitfld.word 0x00 12. " CTL[4] ,My Control register 4" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL[3] ,My Control register 3" "Disabled,Enabled" bitfld.word 0x00 10. " CTL[2] ,My Control register 2" "Disabled,Enabled" bitfld.word 0x00 9. " CTL[1] ,My Control register 1" "Disabled,Enabled" bitfld.word 0x00 8. " CTL[0] ,My Control register 0" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " ST[7] ,My Status register 7" "Low,High" bitfld.word 0x00 6. " ST[6] ,My Status register 6" "Low,High" bitfld.word 0x00 5. " ST[5] ,My Status register 5" "Low,High" bitfld.word 0x00 4. " ST[4] ,My Status register 4" "Low,High" textline " " bitfld.word 0x00 3. " ST[3] ,My Status register 3" "Low,High" bitfld.word 0x00 2. " ST[2] ,My Status register 2" "Low,High" bitfld.word 0x00 1. " ST[1] ,My Status register 1" "Low,High" bitfld.word 0x00 0. " ST[0] ,My Status register 0" "Low,High" group.word 0x100++0x01 line.word 0x00 "UDB04_MSK_ACTL,UDB04_MSK_ACTL" bitfld.word 0x00 13. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN ,Interrupt enable" "Disabled,Enabled" bitfld.word 0x00 11. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 10. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 9. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" textline " " bitfld.word 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.word 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.word 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.word 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.word 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.word 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" textline " " bitfld.word 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" rgroup.word 0x140++0x01 line.word 0x00 "UDB04_MC_00,UDB04_MC_00" bitfld.word 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif width 0x0B tree.end tree "UDB 5" width 12. if (((per.l(ad:(0x40011000+0x4d0)))&0x01)==0x00) base ad:0x40006505 group.byte 0x00++0x00 line.byte 0x00 "UDB05_A0,UDB05_A0" group.byte 0x10++0x00 line.byte 0x00 "UDB05_A1,UDB05_A1" group.byte 0x20++0x00 line.byte 0x00 "UDB05_D0,UDB05_D0" group.byte 0x30++0x00 line.byte 0x00 "UDB05_D1,UDB05_D1" group.byte 0x40++0x00 line.byte 0x00 "UDB05_F0,UDB05_F0" group.byte 0x50++0x00 line.byte 0x00 "UDB05_F1,UDB05_F1" rgroup.byte 0x60++0x00 line.byte 0x00 "UDB05_ST,UDB05_ST" bitfld.byte 0x00 7. " ST[7] ,Status register 7" "Low,High" bitfld.byte 0x00 6. " ST[6] ,Status register 6" "Low,High" bitfld.byte 0x00 5. " ST[5] ,Status register 5" "Low,High" bitfld.byte 0x00 4. " ST[4] ,Status register 4" "Low,High" textline " " bitfld.byte 0x00 3. " ST[3] ,Status register 3" "Low,High" bitfld.byte 0x00 2. " ST[2] ,Status register 2" "Low,High" bitfld.byte 0x00 1. " ST[1] ,Status register 1" "Low,High" bitfld.byte 0x00 0. " ST[0] ,Status register 0" "Low,High" group.byte 0x70++0x00 line.byte 0x00 "UDB05_CTL,UDB05_CTL" bitfld.byte 0x00 7. " CTL[7] ,Control register 7" "Disabled,Enabled" bitfld.byte 0x00 6. " CTL[6] ,Control register 6" "Disabled,Enabled" bitfld.byte 0x00 5. " CTL[5] ,Control register 5" "Disabled,Enabled" bitfld.byte 0x00 4. " CTL[4] ,Control register 4" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " CTL[3] ,Control register 3" "Disabled,Enabled" bitfld.byte 0x00 2. " CTL[2] ,Control register 2" "Disabled,Enabled" bitfld.byte 0x00 1. " CTL[1] ,Control register 1" "Disabled,Enabled" bitfld.byte 0x00 0. " CTL[0] ,Control register 0" "Disabled,Enabled" group.byte 0x80++0x00 line.byte 0x00 "UDB05_MSK,UDB05_MSK" bitfld.byte 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.byte 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.byte 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.byte 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.byte 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.byte 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" bitfld.byte 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" group.byte 0x90++0x00 line.byte 0x00 "UDB05_ACTL,UDB05_ACTL" bitfld.byte 0x00 5. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.byte 0x00 4. " INT_EN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 2. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 1. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.byte 0x00 0. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" rgroup.byte 0xa0++0x00 line.byte 0x00 "UDB05_MC,UDB05_MC" bitfld.byte 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else width 16. base ad:0x40006A0A group.word 0x00++0x01 line.word 0x00 "UDB05_A0_A1,UDB05_A0_A1" hexmask.word.byte 0x00 8.--15. 1. " A1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0 ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB05_D0_D1,UDB05_D0_D1" hexmask.word.byte 0x00 8.--15. 1. " D1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0 ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB05_F0_F1,UDB05_F0_F1" hexmask.word.byte 0x00 8.--15. 1. " F1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0 ,Generic field for 8 bit working registers" group.word 0xc0++0x01 line.word 0x00 "UDB05_ST_CTL,UDB05_ST_CTL" bitfld.word 0x00 15. " CTL[7] ,My Control register 7" "Disabled,Enabled" bitfld.word 0x00 14. " CTL[6] ,My Control register 6" "Disabled,Enabled" bitfld.word 0x00 13. " CTL[5] ,My Control register 5" "Disabled,Enabled" bitfld.word 0x00 12. " CTL[4] ,My Control register 4" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL[3] ,My Control register 3" "Disabled,Enabled" bitfld.word 0x00 10. " CTL[2] ,My Control register 2" "Disabled,Enabled" bitfld.word 0x00 9. " CTL[1] ,My Control register 1" "Disabled,Enabled" bitfld.word 0x00 8. " CTL[0] ,My Control register 0" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " ST[7] ,My Status register 7" "Low,High" bitfld.word 0x00 6. " ST[6] ,My Status register 6" "Low,High" bitfld.word 0x00 5. " ST[5] ,My Status register 5" "Low,High" bitfld.word 0x00 4. " ST[4] ,My Status register 4" "Low,High" textline " " bitfld.word 0x00 3. " ST[3] ,My Status register 3" "Low,High" bitfld.word 0x00 2. " ST[2] ,My Status register 2" "Low,High" bitfld.word 0x00 1. " ST[1] ,My Status register 1" "Low,High" bitfld.word 0x00 0. " ST[0] ,My Status register 0" "Low,High" group.word 0x100++0x01 line.word 0x00 "UDB05_MSK_ACTL,UDB05_MSK_ACTL" bitfld.word 0x00 13. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN ,Interrupt enable" "Disabled,Enabled" bitfld.word 0x00 11. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 10. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 9. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" textline " " bitfld.word 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.word 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.word 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.word 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.word 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.word 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" textline " " bitfld.word 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" rgroup.word 0x140++0x01 line.word 0x00 "UDB05_MC_00,UDB05_MC_00" bitfld.word 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif width 0x0B tree.end tree "UDB 6" width 12. if (((per.l(ad:(0x40011000+0x650)))&0x01)==0x00) base ad:0x40006506 group.byte 0x00++0x00 line.byte 0x00 "UDB06_A0,UDB06_A0" group.byte 0x10++0x00 line.byte 0x00 "UDB06_A1,UDB06_A1" group.byte 0x20++0x00 line.byte 0x00 "UDB06_D0,UDB06_D0" group.byte 0x30++0x00 line.byte 0x00 "UDB06_D1,UDB06_D1" group.byte 0x40++0x00 line.byte 0x00 "UDB06_F0,UDB06_F0" group.byte 0x50++0x00 line.byte 0x00 "UDB06_F1,UDB06_F1" rgroup.byte 0x60++0x00 line.byte 0x00 "UDB06_ST,UDB06_ST" bitfld.byte 0x00 7. " ST[7] ,Status register 7" "Low,High" bitfld.byte 0x00 6. " ST[6] ,Status register 6" "Low,High" bitfld.byte 0x00 5. " ST[5] ,Status register 5" "Low,High" bitfld.byte 0x00 4. " ST[4] ,Status register 4" "Low,High" textline " " bitfld.byte 0x00 3. " ST[3] ,Status register 3" "Low,High" bitfld.byte 0x00 2. " ST[2] ,Status register 2" "Low,High" bitfld.byte 0x00 1. " ST[1] ,Status register 1" "Low,High" bitfld.byte 0x00 0. " ST[0] ,Status register 0" "Low,High" group.byte 0x70++0x00 line.byte 0x00 "UDB06_CTL,UDB06_CTL" bitfld.byte 0x00 7. " CTL[7] ,Control register 7" "Disabled,Enabled" bitfld.byte 0x00 6. " CTL[6] ,Control register 6" "Disabled,Enabled" bitfld.byte 0x00 5. " CTL[5] ,Control register 5" "Disabled,Enabled" bitfld.byte 0x00 4. " CTL[4] ,Control register 4" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " CTL[3] ,Control register 3" "Disabled,Enabled" bitfld.byte 0x00 2. " CTL[2] ,Control register 2" "Disabled,Enabled" bitfld.byte 0x00 1. " CTL[1] ,Control register 1" "Disabled,Enabled" bitfld.byte 0x00 0. " CTL[0] ,Control register 0" "Disabled,Enabled" group.byte 0x80++0x00 line.byte 0x00 "UDB06_MSK,UDB06_MSK" bitfld.byte 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.byte 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.byte 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.byte 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.byte 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.byte 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" bitfld.byte 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" group.byte 0x90++0x00 line.byte 0x00 "UDB06_ACTL,UDB06_ACTL" bitfld.byte 0x00 5. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.byte 0x00 4. " INT_EN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 2. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 1. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.byte 0x00 0. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" rgroup.byte 0xa0++0x00 line.byte 0x00 "UDB06_MC,UDB06_MC" bitfld.byte 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else width 16. base ad:0x40006A0C group.word 0x00++0x01 line.word 0x00 "UDB06_A0_A1,UDB06_A0_A1" hexmask.word.byte 0x00 8.--15. 1. " A1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0 ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB06_D0_D1,UDB06_D0_D1" hexmask.word.byte 0x00 8.--15. 1. " D1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0 ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB06_F0_F1,UDB06_F0_F1" hexmask.word.byte 0x00 8.--15. 1. " F1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0 ,Generic field for 8 bit working registers" group.word 0xc0++0x01 line.word 0x00 "UDB06_ST_CTL,UDB06_ST_CTL" bitfld.word 0x00 15. " CTL[7] ,My Control register 7" "Disabled,Enabled" bitfld.word 0x00 14. " CTL[6] ,My Control register 6" "Disabled,Enabled" bitfld.word 0x00 13. " CTL[5] ,My Control register 5" "Disabled,Enabled" bitfld.word 0x00 12. " CTL[4] ,My Control register 4" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL[3] ,My Control register 3" "Disabled,Enabled" bitfld.word 0x00 10. " CTL[2] ,My Control register 2" "Disabled,Enabled" bitfld.word 0x00 9. " CTL[1] ,My Control register 1" "Disabled,Enabled" bitfld.word 0x00 8. " CTL[0] ,My Control register 0" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " ST[7] ,My Status register 7" "Low,High" bitfld.word 0x00 6. " ST[6] ,My Status register 6" "Low,High" bitfld.word 0x00 5. " ST[5] ,My Status register 5" "Low,High" bitfld.word 0x00 4. " ST[4] ,My Status register 4" "Low,High" textline " " bitfld.word 0x00 3. " ST[3] ,My Status register 3" "Low,High" bitfld.word 0x00 2. " ST[2] ,My Status register 2" "Low,High" bitfld.word 0x00 1. " ST[1] ,My Status register 1" "Low,High" bitfld.word 0x00 0. " ST[0] ,My Status register 0" "Low,High" group.word 0x100++0x01 line.word 0x00 "UDB06_MSK_ACTL,UDB06_MSK_ACTL" bitfld.word 0x00 13. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN ,Interrupt enable" "Disabled,Enabled" bitfld.word 0x00 11. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 10. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 9. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" textline " " bitfld.word 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.word 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.word 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.word 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.word 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.word 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" textline " " bitfld.word 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" rgroup.word 0x140++0x01 line.word 0x00 "UDB06_MC_00,UDB06_MC_00" bitfld.word 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif width 0x0B tree.end tree "UDB 7" width 12. if (((per.l(ad:(0x40011000+0x6d0)))&0x01)==0x00) base ad:0x40006507 group.byte 0x00++0x00 line.byte 0x00 "UDB07_A0,UDB07_A0" group.byte 0x10++0x00 line.byte 0x00 "UDB07_A1,UDB07_A1" group.byte 0x20++0x00 line.byte 0x00 "UDB07_D0,UDB07_D0" group.byte 0x30++0x00 line.byte 0x00 "UDB07_D1,UDB07_D1" group.byte 0x40++0x00 line.byte 0x00 "UDB07_F0,UDB07_F0" group.byte 0x50++0x00 line.byte 0x00 "UDB07_F1,UDB07_F1" rgroup.byte 0x60++0x00 line.byte 0x00 "UDB07_ST,UDB07_ST" bitfld.byte 0x00 7. " ST[7] ,Status register 7" "Low,High" bitfld.byte 0x00 6. " ST[6] ,Status register 6" "Low,High" bitfld.byte 0x00 5. " ST[5] ,Status register 5" "Low,High" bitfld.byte 0x00 4. " ST[4] ,Status register 4" "Low,High" textline " " bitfld.byte 0x00 3. " ST[3] ,Status register 3" "Low,High" bitfld.byte 0x00 2. " ST[2] ,Status register 2" "Low,High" bitfld.byte 0x00 1. " ST[1] ,Status register 1" "Low,High" bitfld.byte 0x00 0. " ST[0] ,Status register 0" "Low,High" group.byte 0x70++0x00 line.byte 0x00 "UDB07_CTL,UDB07_CTL" bitfld.byte 0x00 7. " CTL[7] ,Control register 7" "Disabled,Enabled" bitfld.byte 0x00 6. " CTL[6] ,Control register 6" "Disabled,Enabled" bitfld.byte 0x00 5. " CTL[5] ,Control register 5" "Disabled,Enabled" bitfld.byte 0x00 4. " CTL[4] ,Control register 4" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " CTL[3] ,Control register 3" "Disabled,Enabled" bitfld.byte 0x00 2. " CTL[2] ,Control register 2" "Disabled,Enabled" bitfld.byte 0x00 1. " CTL[1] ,Control register 1" "Disabled,Enabled" bitfld.byte 0x00 0. " CTL[0] ,Control register 0" "Disabled,Enabled" group.byte 0x80++0x00 line.byte 0x00 "UDB07_MSK,UDB07_MSK" bitfld.byte 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.byte 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.byte 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.byte 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.byte 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.byte 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" bitfld.byte 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" group.byte 0x90++0x00 line.byte 0x00 "UDB07_ACTL,UDB07_ACTL" bitfld.byte 0x00 5. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.byte 0x00 4. " INT_EN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 2. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 1. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.byte 0x00 0. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" rgroup.byte 0xa0++0x00 line.byte 0x00 "UDB07_MC,UDB07_MC" bitfld.byte 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else width 16. base ad:0x40006A0E group.word 0x00++0x01 line.word 0x00 "UDB07_A0_A1,UDB07_A0_A1" hexmask.word.byte 0x00 8.--15. 1. " A1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0 ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB07_D0_D1,UDB07_D0_D1" hexmask.word.byte 0x00 8.--15. 1. " D1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0 ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB07_F0_F1,UDB07_F0_F1" hexmask.word.byte 0x00 8.--15. 1. " F1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0 ,Generic field for 8 bit working registers" group.word 0xc0++0x01 line.word 0x00 "UDB07_ST_CTL,UDB07_ST_CTL" bitfld.word 0x00 15. " CTL[7] ,My Control register 7" "Disabled,Enabled" bitfld.word 0x00 14. " CTL[6] ,My Control register 6" "Disabled,Enabled" bitfld.word 0x00 13. " CTL[5] ,My Control register 5" "Disabled,Enabled" bitfld.word 0x00 12. " CTL[4] ,My Control register 4" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL[3] ,My Control register 3" "Disabled,Enabled" bitfld.word 0x00 10. " CTL[2] ,My Control register 2" "Disabled,Enabled" bitfld.word 0x00 9. " CTL[1] ,My Control register 1" "Disabled,Enabled" bitfld.word 0x00 8. " CTL[0] ,My Control register 0" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " ST[7] ,My Status register 7" "Low,High" bitfld.word 0x00 6. " ST[6] ,My Status register 6" "Low,High" bitfld.word 0x00 5. " ST[5] ,My Status register 5" "Low,High" bitfld.word 0x00 4. " ST[4] ,My Status register 4" "Low,High" textline " " bitfld.word 0x00 3. " ST[3] ,My Status register 3" "Low,High" bitfld.word 0x00 2. " ST[2] ,My Status register 2" "Low,High" bitfld.word 0x00 1. " ST[1] ,My Status register 1" "Low,High" bitfld.word 0x00 0. " ST[0] ,My Status register 0" "Low,High" group.word 0x100++0x01 line.word 0x00 "UDB07_MSK_ACTL,UDB07_MSK_ACTL" bitfld.word 0x00 13. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN ,Interrupt enable" "Disabled,Enabled" bitfld.word 0x00 11. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 10. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 9. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" textline " " bitfld.word 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.word 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.word 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.word 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.word 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.word 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" textline " " bitfld.word 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" rgroup.word 0x140++0x01 line.word 0x00 "UDB07_MC_00,UDB07_MC_00" bitfld.word 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif width 0x0B tree.end tree "UDB 8" width 12. if (((per.l(ad:(0x40011000+0x850)))&0x01)==0x00) base ad:0x40006508 group.byte 0x00++0x00 line.byte 0x00 "UDB08_A0,UDB08_A0" group.byte 0x10++0x00 line.byte 0x00 "UDB08_A1,UDB08_A1" group.byte 0x20++0x00 line.byte 0x00 "UDB08_D0,UDB08_D0" group.byte 0x30++0x00 line.byte 0x00 "UDB08_D1,UDB08_D1" group.byte 0x40++0x00 line.byte 0x00 "UDB08_F0,UDB08_F0" group.byte 0x50++0x00 line.byte 0x00 "UDB08_F1,UDB08_F1" rgroup.byte 0x60++0x00 line.byte 0x00 "UDB08_ST,UDB08_ST" bitfld.byte 0x00 7. " ST[7] ,Status register 7" "Low,High" bitfld.byte 0x00 6. " ST[6] ,Status register 6" "Low,High" bitfld.byte 0x00 5. " ST[5] ,Status register 5" "Low,High" bitfld.byte 0x00 4. " ST[4] ,Status register 4" "Low,High" textline " " bitfld.byte 0x00 3. " ST[3] ,Status register 3" "Low,High" bitfld.byte 0x00 2. " ST[2] ,Status register 2" "Low,High" bitfld.byte 0x00 1. " ST[1] ,Status register 1" "Low,High" bitfld.byte 0x00 0. " ST[0] ,Status register 0" "Low,High" group.byte 0x70++0x00 line.byte 0x00 "UDB08_CTL,UDB08_CTL" bitfld.byte 0x00 7. " CTL[7] ,Control register 7" "Disabled,Enabled" bitfld.byte 0x00 6. " CTL[6] ,Control register 6" "Disabled,Enabled" bitfld.byte 0x00 5. " CTL[5] ,Control register 5" "Disabled,Enabled" bitfld.byte 0x00 4. " CTL[4] ,Control register 4" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " CTL[3] ,Control register 3" "Disabled,Enabled" bitfld.byte 0x00 2. " CTL[2] ,Control register 2" "Disabled,Enabled" bitfld.byte 0x00 1. " CTL[1] ,Control register 1" "Disabled,Enabled" bitfld.byte 0x00 0. " CTL[0] ,Control register 0" "Disabled,Enabled" group.byte 0x80++0x00 line.byte 0x00 "UDB08_MSK,UDB08_MSK" bitfld.byte 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.byte 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.byte 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.byte 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.byte 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.byte 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" bitfld.byte 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" group.byte 0x90++0x00 line.byte 0x00 "UDB08_ACTL,UDB08_ACTL" bitfld.byte 0x00 5. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.byte 0x00 4. " INT_EN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 2. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 1. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.byte 0x00 0. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" rgroup.byte 0xa0++0x00 line.byte 0x00 "UDB08_MC,UDB08_MC" bitfld.byte 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else width 16. base ad:0x40006A10 group.word 0x00++0x01 line.word 0x00 "UDB08_A0_A1,UDB08_A0_A1" hexmask.word.byte 0x00 8.--15. 1. " A1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0 ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB08_D0_D1,UDB08_D0_D1" hexmask.word.byte 0x00 8.--15. 1. " D1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0 ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB08_F0_F1,UDB08_F0_F1" hexmask.word.byte 0x00 8.--15. 1. " F1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0 ,Generic field for 8 bit working registers" group.word 0xc0++0x01 line.word 0x00 "UDB08_ST_CTL,UDB08_ST_CTL" bitfld.word 0x00 15. " CTL[7] ,My Control register 7" "Disabled,Enabled" bitfld.word 0x00 14. " CTL[6] ,My Control register 6" "Disabled,Enabled" bitfld.word 0x00 13. " CTL[5] ,My Control register 5" "Disabled,Enabled" bitfld.word 0x00 12. " CTL[4] ,My Control register 4" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL[3] ,My Control register 3" "Disabled,Enabled" bitfld.word 0x00 10. " CTL[2] ,My Control register 2" "Disabled,Enabled" bitfld.word 0x00 9. " CTL[1] ,My Control register 1" "Disabled,Enabled" bitfld.word 0x00 8. " CTL[0] ,My Control register 0" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " ST[7] ,My Status register 7" "Low,High" bitfld.word 0x00 6. " ST[6] ,My Status register 6" "Low,High" bitfld.word 0x00 5. " ST[5] ,My Status register 5" "Low,High" bitfld.word 0x00 4. " ST[4] ,My Status register 4" "Low,High" textline " " bitfld.word 0x00 3. " ST[3] ,My Status register 3" "Low,High" bitfld.word 0x00 2. " ST[2] ,My Status register 2" "Low,High" bitfld.word 0x00 1. " ST[1] ,My Status register 1" "Low,High" bitfld.word 0x00 0. " ST[0] ,My Status register 0" "Low,High" group.word 0x100++0x01 line.word 0x00 "UDB08_MSK_ACTL,UDB08_MSK_ACTL" bitfld.word 0x00 13. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN ,Interrupt enable" "Disabled,Enabled" bitfld.word 0x00 11. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 10. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 9. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" textline " " bitfld.word 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.word 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.word 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.word 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.word 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.word 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" textline " " bitfld.word 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" rgroup.word 0x140++0x01 line.word 0x00 "UDB08_MC_00,UDB08_MC_00" bitfld.word 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif width 0x0B tree.end tree "UDB 9" width 12. if (((per.l(ad:(0x40011000+0x8d0)))&0x01)==0x00) base ad:0x40006509 group.byte 0x00++0x00 line.byte 0x00 "UDB09_A0,UDB09_A0" group.byte 0x10++0x00 line.byte 0x00 "UDB09_A1,UDB09_A1" group.byte 0x20++0x00 line.byte 0x00 "UDB09_D0,UDB09_D0" group.byte 0x30++0x00 line.byte 0x00 "UDB09_D1,UDB09_D1" group.byte 0x40++0x00 line.byte 0x00 "UDB09_F0,UDB09_F0" group.byte 0x50++0x00 line.byte 0x00 "UDB09_F1,UDB09_F1" rgroup.byte 0x60++0x00 line.byte 0x00 "UDB09_ST,UDB09_ST" bitfld.byte 0x00 7. " ST[7] ,Status register 7" "Low,High" bitfld.byte 0x00 6. " ST[6] ,Status register 6" "Low,High" bitfld.byte 0x00 5. " ST[5] ,Status register 5" "Low,High" bitfld.byte 0x00 4. " ST[4] ,Status register 4" "Low,High" textline " " bitfld.byte 0x00 3. " ST[3] ,Status register 3" "Low,High" bitfld.byte 0x00 2. " ST[2] ,Status register 2" "Low,High" bitfld.byte 0x00 1. " ST[1] ,Status register 1" "Low,High" bitfld.byte 0x00 0. " ST[0] ,Status register 0" "Low,High" group.byte 0x70++0x00 line.byte 0x00 "UDB09_CTL,UDB09_CTL" bitfld.byte 0x00 7. " CTL[7] ,Control register 7" "Disabled,Enabled" bitfld.byte 0x00 6. " CTL[6] ,Control register 6" "Disabled,Enabled" bitfld.byte 0x00 5. " CTL[5] ,Control register 5" "Disabled,Enabled" bitfld.byte 0x00 4. " CTL[4] ,Control register 4" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " CTL[3] ,Control register 3" "Disabled,Enabled" bitfld.byte 0x00 2. " CTL[2] ,Control register 2" "Disabled,Enabled" bitfld.byte 0x00 1. " CTL[1] ,Control register 1" "Disabled,Enabled" bitfld.byte 0x00 0. " CTL[0] ,Control register 0" "Disabled,Enabled" group.byte 0x80++0x00 line.byte 0x00 "UDB09_MSK,UDB09_MSK" bitfld.byte 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.byte 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.byte 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.byte 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.byte 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.byte 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" bitfld.byte 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" group.byte 0x90++0x00 line.byte 0x00 "UDB09_ACTL,UDB09_ACTL" bitfld.byte 0x00 5. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.byte 0x00 4. " INT_EN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 2. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 1. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.byte 0x00 0. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" rgroup.byte 0xa0++0x00 line.byte 0x00 "UDB09_MC,UDB09_MC" bitfld.byte 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else width 16. base ad:0x40006A12 group.word 0x00++0x01 line.word 0x00 "UDB09_A0_A1,UDB09_A0_A1" hexmask.word.byte 0x00 8.--15. 1. " A1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0 ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB09_D0_D1,UDB09_D0_D1" hexmask.word.byte 0x00 8.--15. 1. " D1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0 ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB09_F0_F1,UDB09_F0_F1" hexmask.word.byte 0x00 8.--15. 1. " F1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0 ,Generic field for 8 bit working registers" group.word 0xc0++0x01 line.word 0x00 "UDB09_ST_CTL,UDB09_ST_CTL" bitfld.word 0x00 15. " CTL[7] ,My Control register 7" "Disabled,Enabled" bitfld.word 0x00 14. " CTL[6] ,My Control register 6" "Disabled,Enabled" bitfld.word 0x00 13. " CTL[5] ,My Control register 5" "Disabled,Enabled" bitfld.word 0x00 12. " CTL[4] ,My Control register 4" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL[3] ,My Control register 3" "Disabled,Enabled" bitfld.word 0x00 10. " CTL[2] ,My Control register 2" "Disabled,Enabled" bitfld.word 0x00 9. " CTL[1] ,My Control register 1" "Disabled,Enabled" bitfld.word 0x00 8. " CTL[0] ,My Control register 0" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " ST[7] ,My Status register 7" "Low,High" bitfld.word 0x00 6. " ST[6] ,My Status register 6" "Low,High" bitfld.word 0x00 5. " ST[5] ,My Status register 5" "Low,High" bitfld.word 0x00 4. " ST[4] ,My Status register 4" "Low,High" textline " " bitfld.word 0x00 3. " ST[3] ,My Status register 3" "Low,High" bitfld.word 0x00 2. " ST[2] ,My Status register 2" "Low,High" bitfld.word 0x00 1. " ST[1] ,My Status register 1" "Low,High" bitfld.word 0x00 0. " ST[0] ,My Status register 0" "Low,High" group.word 0x100++0x01 line.word 0x00 "UDB09_MSK_ACTL,UDB09_MSK_ACTL" bitfld.word 0x00 13. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN ,Interrupt enable" "Disabled,Enabled" bitfld.word 0x00 11. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 10. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 9. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" textline " " bitfld.word 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.word 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.word 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.word 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.word 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.word 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" textline " " bitfld.word 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" rgroup.word 0x140++0x01 line.word 0x00 "UDB09_MC_00,UDB09_MC_00" bitfld.word 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif width 0x0B tree.end tree "UDB 10" width 12. if (((per.l(ad:(0x40011000+0xa50)))&0x01)==0x00) base ad:0x4000650A group.byte 0x00++0x00 line.byte 0x00 "UDB10_A0,UDB10_A0" group.byte 0x10++0x00 line.byte 0x00 "UDB10_A1,UDB10_A1" group.byte 0x20++0x00 line.byte 0x00 "UDB10_D0,UDB10_D0" group.byte 0x30++0x00 line.byte 0x00 "UDB10_D1,UDB10_D1" group.byte 0x40++0x00 line.byte 0x00 "UDB10_F0,UDB10_F0" group.byte 0x50++0x00 line.byte 0x00 "UDB10_F1,UDB10_F1" rgroup.byte 0x60++0x00 line.byte 0x00 "UDB10_ST,UDB10_ST" bitfld.byte 0x00 7. " ST[7] ,Status register 7" "Low,High" bitfld.byte 0x00 6. " ST[6] ,Status register 6" "Low,High" bitfld.byte 0x00 5. " ST[5] ,Status register 5" "Low,High" bitfld.byte 0x00 4. " ST[4] ,Status register 4" "Low,High" textline " " bitfld.byte 0x00 3. " ST[3] ,Status register 3" "Low,High" bitfld.byte 0x00 2. " ST[2] ,Status register 2" "Low,High" bitfld.byte 0x00 1. " ST[1] ,Status register 1" "Low,High" bitfld.byte 0x00 0. " ST[0] ,Status register 0" "Low,High" group.byte 0x70++0x00 line.byte 0x00 "UDB10_CTL,UDB10_CTL" bitfld.byte 0x00 7. " CTL[7] ,Control register 7" "Disabled,Enabled" bitfld.byte 0x00 6. " CTL[6] ,Control register 6" "Disabled,Enabled" bitfld.byte 0x00 5. " CTL[5] ,Control register 5" "Disabled,Enabled" bitfld.byte 0x00 4. " CTL[4] ,Control register 4" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " CTL[3] ,Control register 3" "Disabled,Enabled" bitfld.byte 0x00 2. " CTL[2] ,Control register 2" "Disabled,Enabled" bitfld.byte 0x00 1. " CTL[1] ,Control register 1" "Disabled,Enabled" bitfld.byte 0x00 0. " CTL[0] ,Control register 0" "Disabled,Enabled" group.byte 0x80++0x00 line.byte 0x00 "UDB10_MSK,UDB10_MSK" bitfld.byte 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.byte 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.byte 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.byte 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.byte 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.byte 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" bitfld.byte 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" group.byte 0x90++0x00 line.byte 0x00 "UDB10_ACTL,UDB10_ACTL" bitfld.byte 0x00 5. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.byte 0x00 4. " INT_EN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 2. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 1. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.byte 0x00 0. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" rgroup.byte 0xa0++0x00 line.byte 0x00 "UDB10_MC,UDB10_MC" bitfld.byte 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else width 16. base ad:0x40006A14 group.word 0x00++0x01 line.word 0x00 "UDB10_A0_A1,UDB10_A0_A1" hexmask.word.byte 0x00 8.--15. 1. " A1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0 ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB10_D0_D1,UDB10_D0_D1" hexmask.word.byte 0x00 8.--15. 1. " D1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0 ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB10_F0_F1,UDB10_F0_F1" hexmask.word.byte 0x00 8.--15. 1. " F1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0 ,Generic field for 8 bit working registers" group.word 0xc0++0x01 line.word 0x00 "UDB10_ST_CTL,UDB10_ST_CTL" bitfld.word 0x00 15. " CTL[7] ,My Control register 7" "Disabled,Enabled" bitfld.word 0x00 14. " CTL[6] ,My Control register 6" "Disabled,Enabled" bitfld.word 0x00 13. " CTL[5] ,My Control register 5" "Disabled,Enabled" bitfld.word 0x00 12. " CTL[4] ,My Control register 4" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL[3] ,My Control register 3" "Disabled,Enabled" bitfld.word 0x00 10. " CTL[2] ,My Control register 2" "Disabled,Enabled" bitfld.word 0x00 9. " CTL[1] ,My Control register 1" "Disabled,Enabled" bitfld.word 0x00 8. " CTL[0] ,My Control register 0" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " ST[7] ,My Status register 7" "Low,High" bitfld.word 0x00 6. " ST[6] ,My Status register 6" "Low,High" bitfld.word 0x00 5. " ST[5] ,My Status register 5" "Low,High" bitfld.word 0x00 4. " ST[4] ,My Status register 4" "Low,High" textline " " bitfld.word 0x00 3. " ST[3] ,My Status register 3" "Low,High" bitfld.word 0x00 2. " ST[2] ,My Status register 2" "Low,High" bitfld.word 0x00 1. " ST[1] ,My Status register 1" "Low,High" bitfld.word 0x00 0. " ST[0] ,My Status register 0" "Low,High" group.word 0x100++0x01 line.word 0x00 "UDB10_MSK_ACTL,UDB10_MSK_ACTL" bitfld.word 0x00 13. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN ,Interrupt enable" "Disabled,Enabled" bitfld.word 0x00 11. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 10. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 9. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" textline " " bitfld.word 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.word 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.word 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.word 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.word 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.word 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" textline " " bitfld.word 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" rgroup.word 0x140++0x01 line.word 0x00 "UDB10_MC_00,UDB10_MC_00" bitfld.word 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif width 0x0B tree.end tree "UDB 11" width 12. if (((per.l(ad:(0x40011000+0xad0)))&0x01)==0x00) base ad:0x4000650B group.byte 0x00++0x00 line.byte 0x00 "UDB11_A0,UDB11_A0" group.byte 0x10++0x00 line.byte 0x00 "UDB11_A1,UDB11_A1" group.byte 0x20++0x00 line.byte 0x00 "UDB11_D0,UDB11_D0" group.byte 0x30++0x00 line.byte 0x00 "UDB11_D1,UDB11_D1" group.byte 0x40++0x00 line.byte 0x00 "UDB11_F0,UDB11_F0" group.byte 0x50++0x00 line.byte 0x00 "UDB11_F1,UDB11_F1" rgroup.byte 0x60++0x00 line.byte 0x00 "UDB11_ST,UDB11_ST" bitfld.byte 0x00 7. " ST[7] ,Status register 7" "Low,High" bitfld.byte 0x00 6. " ST[6] ,Status register 6" "Low,High" bitfld.byte 0x00 5. " ST[5] ,Status register 5" "Low,High" bitfld.byte 0x00 4. " ST[4] ,Status register 4" "Low,High" textline " " bitfld.byte 0x00 3. " ST[3] ,Status register 3" "Low,High" bitfld.byte 0x00 2. " ST[2] ,Status register 2" "Low,High" bitfld.byte 0x00 1. " ST[1] ,Status register 1" "Low,High" bitfld.byte 0x00 0. " ST[0] ,Status register 0" "Low,High" group.byte 0x70++0x00 line.byte 0x00 "UDB11_CTL,UDB11_CTL" bitfld.byte 0x00 7. " CTL[7] ,Control register 7" "Disabled,Enabled" bitfld.byte 0x00 6. " CTL[6] ,Control register 6" "Disabled,Enabled" bitfld.byte 0x00 5. " CTL[5] ,Control register 5" "Disabled,Enabled" bitfld.byte 0x00 4. " CTL[4] ,Control register 4" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " CTL[3] ,Control register 3" "Disabled,Enabled" bitfld.byte 0x00 2. " CTL[2] ,Control register 2" "Disabled,Enabled" bitfld.byte 0x00 1. " CTL[1] ,Control register 1" "Disabled,Enabled" bitfld.byte 0x00 0. " CTL[0] ,Control register 0" "Disabled,Enabled" group.byte 0x80++0x00 line.byte 0x00 "UDB11_MSK,UDB11_MSK" bitfld.byte 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.byte 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.byte 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.byte 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.byte 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.byte 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" bitfld.byte 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" group.byte 0x90++0x00 line.byte 0x00 "UDB11_ACTL,UDB11_ACTL" bitfld.byte 0x00 5. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.byte 0x00 4. " INT_EN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 2. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.byte 0x00 1. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.byte 0x00 0. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" rgroup.byte 0xa0++0x00 line.byte 0x00 "UDB11_MC,UDB11_MC" bitfld.byte 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else width 16. base ad:0x40006A16 group.word 0x00++0x01 line.word 0x00 "UDB11_A0_A1,UDB11_A0_A1" hexmask.word.byte 0x00 8.--15. 1. " A1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0 ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB11_D0_D1,UDB11_D0_D1" hexmask.word.byte 0x00 8.--15. 1. " D1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0 ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB11_F0_F1,UDB11_F0_F1" hexmask.word.byte 0x00 8.--15. 1. " F1 ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0 ,Generic field for 8 bit working registers" group.word 0xc0++0x01 line.word 0x00 "UDB11_ST_CTL,UDB11_ST_CTL" bitfld.word 0x00 15. " CTL[7] ,My Control register 7" "Disabled,Enabled" bitfld.word 0x00 14. " CTL[6] ,My Control register 6" "Disabled,Enabled" bitfld.word 0x00 13. " CTL[5] ,My Control register 5" "Disabled,Enabled" bitfld.word 0x00 12. " CTL[4] ,My Control register 4" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL[3] ,My Control register 3" "Disabled,Enabled" bitfld.word 0x00 10. " CTL[2] ,My Control register 2" "Disabled,Enabled" bitfld.word 0x00 9. " CTL[1] ,My Control register 1" "Disabled,Enabled" bitfld.word 0x00 8. " CTL[0] ,My Control register 0" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " ST[7] ,My Status register 7" "Low,High" bitfld.word 0x00 6. " ST[6] ,My Status register 6" "Low,High" bitfld.word 0x00 5. " ST[5] ,My Status register 5" "Low,High" bitfld.word 0x00 4. " ST[4] ,My Status register 4" "Low,High" textline " " bitfld.word 0x00 3. " ST[3] ,My Status register 3" "Low,High" bitfld.word 0x00 2. " ST[2] ,My Status register 2" "Low,High" bitfld.word 0x00 1. " ST[1] ,My Status register 1" "Low,High" bitfld.word 0x00 0. " ST[0] ,My Status register 0" "Low,High" group.word 0x100++0x01 line.word 0x00 "UDB11_MSK_ACTL,UDB11_MSK_ACTL" bitfld.word 0x00 13. " CNT_START ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN ,Interrupt enable" "Disabled,Enabled" bitfld.word 0x00 11. " FIFO1_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 10. " FIFO0_LVL ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 9. " FIFO1_CLR ,FIFO clear" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR ,FIFO clear" "Normal,Cleared" textline " " bitfld.word 0x00 6. " MSK[6] ,Mask register 6" "Not masked,Masked" bitfld.word 0x00 5. " MSK[5] ,Mask register 5" "Not masked,Masked" bitfld.word 0x00 4. " MSK[4] ,Mask register 4" "Not masked,Masked" textline " " bitfld.word 0x00 3. " MSK[3] ,Mask register 3" "Not masked,Masked" bitfld.word 0x00 2. " MSK[2] ,Mask register 2" "Not masked,Masked" bitfld.word 0x00 1. " MSK[1] ,Mask register 1" "Not masked,Masked" textline " " bitfld.word 0x00 0. " MSK[0] ,Mask register 0" "Not masked,Masked" rgroup.word 0x140++0x01 line.word 0x00 "UDB11_MC_00,UDB11_MC_00" bitfld.word 0x00 4.--7. " PLD1_MC ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif width 0x0B tree.end tree "UDB 04_05" base ad:0x40006A08 width 15. group.word 0x00++0x01 line.word 0x00 "UDB04_05_A0,UDB04_05_A0" hexmask.word.byte 0x00 8.--15. 1. " A0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0_LS ,Generic field for 8 bit working registers" group.word 0x20++0x01 line.word 0x00 "UDB04_05_A1,UDB04_05_A1" hexmask.word.byte 0x00 8.--15. 1. " A1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A1_LS ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB04_05_D0,UDB04_05_D0" hexmask.word.byte 0x00 8.--15. 1. " D0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0_LS ,Generic field for 8 bit working registers" group.word 0x60++0x01 line.word 0x00 "UDB04_05_D1,UDB04_05_D1" hexmask.word.byte 0x00 8.--15. 1. " D1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D1_LS ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB04_05_F0,UDB04_05_F0" hexmask.word.byte 0x00 8.--15. 1. " F0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0_LS ,Generic field for 8 bit working registers" group.word 0xa0++0x01 line.word 0x00 "UDB04_05_F1,UDB04_05_F1" hexmask.word.byte 0x00 8.--15. 1. " F1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F1_LS ,Generic field for 8 bit working registers" rgroup.word 0xc0++0x01 line.word 0x00 "UDB04_05_ST,UDB04_05_ST" bitfld.word 0x00 15. " ST_MS[7] ,Status register" "Low,High" bitfld.word 0x00 14. " ST_MS[6] ,Status register" "Low,High" bitfld.word 0x00 13. " ST_MS[5] ,Status register" "Low,High" bitfld.word 0x00 12. " ST_MS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 11. " ST_MS[3] ,Status register" "Low,High" bitfld.word 0x00 10. " ST_MS[2] ,Status register" "Low,High" bitfld.word 0x00 9. " ST_MS[1] ,Status register" "Low,High" bitfld.word 0x00 8. " ST_MS[0] ,Status register" "Low,High" textline " " bitfld.word 0x00 7. " ST_LS[7] ,Status register" "Low,High" bitfld.word 0x00 6. " ST_LS[6] ,Status register" "Low,High" bitfld.word 0x00 5. " ST_LS[5] ,Status register" "Low,High" bitfld.word 0x00 4. " ST_LS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 3. " ST_LS[3] ,Status register" "Low,High" bitfld.word 0x00 2. " ST_LS[2] ,Status register" "Low,High" bitfld.word 0x00 1. " ST_LS[1] ,Status register" "Low,High" bitfld.word 0x00 0. " ST_LS[0] ,Status register" "Low,High" group.word 0xe0++0x01 line.word 0x00 "UDB04_05_CTL,UDB04_05_CTL" bitfld.word 0x00 15. " CTL_MS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 14. " CTL_MS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 13. " CTL_MS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 12. " CTL_MS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL_MS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 10. " CTL_MS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 9. " CTL_MS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 8. " CTL_MS[0] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " CTL_LS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 6. " CTL_LS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 5. " CTL_LS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 4. " CTL_LS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " CTL_LS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 2. " CTL_LS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 1. " CTL_LS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 0. " CTL_LS[0] ,Control register" "Disabled,Enabled" textline " " group.word 0x100++0x01 line.word 0x00 "UDB04_05_MSK,UDB04_05_MSK" bitfld.word 0x00 14. " MSK_MS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 13. " MSK_MS[5] ,Mask register" "Not masked,Masked" bitfld.word 0x00 12. " MSK_MS[4] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 11. " MSK_MS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 10. " MSK_MS[2] ,Mask register" "Not masked,Masked" bitfld.word 0x00 9. " MSK_MS[1] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 8. " MSK_MS[0] ,Mask register" "Not masked,Masked" bitfld.word 0x00 6. " MSK_LS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 5. " MSK_LS[5] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 4. " MSK_LS[4] ,Mask register" "Not masked,Masked" bitfld.word 0x00 3. " MSK_LS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 2. " MSK_LS[2] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 1. " MSK_LS[1] ,Mask register" "Not masked,Masked" bitfld.word 0x00 0. " MSK_LS[0] ,Mask register" "Not masked,Masked" textline " " group.word 0x120++0x01 line.word 0x00 "UDB04_05_ACTL,UDB04_05_ACTL" bitfld.word 0x00 13. " CNT_START_MS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN_MS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FIFO1_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 10. " FIFO0_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 9. " FIFO1_CLR_MS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR_MS ,FIFO clear 0" "Normal,Cleared" textline " " bitfld.word 0x00 5. " CNT_START_LS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 4. " INT_EN_LS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " FIFO1_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 2. " FIFO0_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 1. " FIFO1_CLR_LS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 0. " FIFO0_CLR_LS ,FIFO clear 0" "Normal,Cleared" textline " " rgroup.word 0x140++0x01 line.word 0x00 "UDB04_05_MC,UDB04_05_MC" bitfld.word 0x00 12.--15. " PLD1_MC_MS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " PLD0_MC_MS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " PLD1_MC_LS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC_LS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "UDB 05_06" base ad:0x40006A0A width 15. group.word 0x00++0x01 line.word 0x00 "UDB05_06_A0,UDB05_06_A0" hexmask.word.byte 0x00 8.--15. 1. " A0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0_LS ,Generic field for 8 bit working registers" group.word 0x20++0x01 line.word 0x00 "UDB05_06_A1,UDB05_06_A1" hexmask.word.byte 0x00 8.--15. 1. " A1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A1_LS ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB05_06_D0,UDB05_06_D0" hexmask.word.byte 0x00 8.--15. 1. " D0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0_LS ,Generic field for 8 bit working registers" group.word 0x60++0x01 line.word 0x00 "UDB05_06_D1,UDB05_06_D1" hexmask.word.byte 0x00 8.--15. 1. " D1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D1_LS ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB05_06_F0,UDB05_06_F0" hexmask.word.byte 0x00 8.--15. 1. " F0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0_LS ,Generic field for 8 bit working registers" group.word 0xa0++0x01 line.word 0x00 "UDB05_06_F1,UDB05_06_F1" hexmask.word.byte 0x00 8.--15. 1. " F1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F1_LS ,Generic field for 8 bit working registers" rgroup.word 0xc0++0x01 line.word 0x00 "UDB05_06_ST,UDB05_06_ST" bitfld.word 0x00 15. " ST_MS[7] ,Status register" "Low,High" bitfld.word 0x00 14. " ST_MS[6] ,Status register" "Low,High" bitfld.word 0x00 13. " ST_MS[5] ,Status register" "Low,High" bitfld.word 0x00 12. " ST_MS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 11. " ST_MS[3] ,Status register" "Low,High" bitfld.word 0x00 10. " ST_MS[2] ,Status register" "Low,High" bitfld.word 0x00 9. " ST_MS[1] ,Status register" "Low,High" bitfld.word 0x00 8. " ST_MS[0] ,Status register" "Low,High" textline " " bitfld.word 0x00 7. " ST_LS[7] ,Status register" "Low,High" bitfld.word 0x00 6. " ST_LS[6] ,Status register" "Low,High" bitfld.word 0x00 5. " ST_LS[5] ,Status register" "Low,High" bitfld.word 0x00 4. " ST_LS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 3. " ST_LS[3] ,Status register" "Low,High" bitfld.word 0x00 2. " ST_LS[2] ,Status register" "Low,High" bitfld.word 0x00 1. " ST_LS[1] ,Status register" "Low,High" bitfld.word 0x00 0. " ST_LS[0] ,Status register" "Low,High" group.word 0xe0++0x01 line.word 0x00 "UDB05_06_CTL,UDB05_06_CTL" bitfld.word 0x00 15. " CTL_MS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 14. " CTL_MS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 13. " CTL_MS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 12. " CTL_MS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL_MS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 10. " CTL_MS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 9. " CTL_MS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 8. " CTL_MS[0] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " CTL_LS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 6. " CTL_LS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 5. " CTL_LS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 4. " CTL_LS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " CTL_LS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 2. " CTL_LS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 1. " CTL_LS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 0. " CTL_LS[0] ,Control register" "Disabled,Enabled" textline " " group.word 0x100++0x01 line.word 0x00 "UDB05_06_MSK,UDB05_06_MSK" bitfld.word 0x00 14. " MSK_MS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 13. " MSK_MS[5] ,Mask register" "Not masked,Masked" bitfld.word 0x00 12. " MSK_MS[4] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 11. " MSK_MS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 10. " MSK_MS[2] ,Mask register" "Not masked,Masked" bitfld.word 0x00 9. " MSK_MS[1] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 8. " MSK_MS[0] ,Mask register" "Not masked,Masked" bitfld.word 0x00 6. " MSK_LS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 5. " MSK_LS[5] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 4. " MSK_LS[4] ,Mask register" "Not masked,Masked" bitfld.word 0x00 3. " MSK_LS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 2. " MSK_LS[2] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 1. " MSK_LS[1] ,Mask register" "Not masked,Masked" bitfld.word 0x00 0. " MSK_LS[0] ,Mask register" "Not masked,Masked" textline " " group.word 0x120++0x01 line.word 0x00 "UDB05_06_ACTL,UDB05_06_ACTL" bitfld.word 0x00 13. " CNT_START_MS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN_MS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FIFO1_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 10. " FIFO0_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 9. " FIFO1_CLR_MS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR_MS ,FIFO clear 0" "Normal,Cleared" textline " " bitfld.word 0x00 5. " CNT_START_LS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 4. " INT_EN_LS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " FIFO1_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 2. " FIFO0_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 1. " FIFO1_CLR_LS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 0. " FIFO0_CLR_LS ,FIFO clear 0" "Normal,Cleared" textline " " rgroup.word 0x140++0x01 line.word 0x00 "UDB05_06_MC,UDB05_06_MC" bitfld.word 0x00 12.--15. " PLD1_MC_MS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " PLD0_MC_MS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " PLD1_MC_LS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC_LS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "UDB 06_07" base ad:0x40006A0C width 15. group.word 0x00++0x01 line.word 0x00 "UDB06_07_A0,UDB06_07_A0" hexmask.word.byte 0x00 8.--15. 1. " A0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0_LS ,Generic field for 8 bit working registers" group.word 0x20++0x01 line.word 0x00 "UDB06_07_A1,UDB06_07_A1" hexmask.word.byte 0x00 8.--15. 1. " A1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A1_LS ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB06_07_D0,UDB06_07_D0" hexmask.word.byte 0x00 8.--15. 1. " D0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0_LS ,Generic field for 8 bit working registers" group.word 0x60++0x01 line.word 0x00 "UDB06_07_D1,UDB06_07_D1" hexmask.word.byte 0x00 8.--15. 1. " D1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D1_LS ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB06_07_F0,UDB06_07_F0" hexmask.word.byte 0x00 8.--15. 1. " F0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0_LS ,Generic field for 8 bit working registers" group.word 0xa0++0x01 line.word 0x00 "UDB06_07_F1,UDB06_07_F1" hexmask.word.byte 0x00 8.--15. 1. " F1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F1_LS ,Generic field for 8 bit working registers" rgroup.word 0xc0++0x01 line.word 0x00 "UDB06_07_ST,UDB06_07_ST" bitfld.word 0x00 15. " ST_MS[7] ,Status register" "Low,High" bitfld.word 0x00 14. " ST_MS[6] ,Status register" "Low,High" bitfld.word 0x00 13. " ST_MS[5] ,Status register" "Low,High" bitfld.word 0x00 12. " ST_MS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 11. " ST_MS[3] ,Status register" "Low,High" bitfld.word 0x00 10. " ST_MS[2] ,Status register" "Low,High" bitfld.word 0x00 9. " ST_MS[1] ,Status register" "Low,High" bitfld.word 0x00 8. " ST_MS[0] ,Status register" "Low,High" textline " " bitfld.word 0x00 7. " ST_LS[7] ,Status register" "Low,High" bitfld.word 0x00 6. " ST_LS[6] ,Status register" "Low,High" bitfld.word 0x00 5. " ST_LS[5] ,Status register" "Low,High" bitfld.word 0x00 4. " ST_LS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 3. " ST_LS[3] ,Status register" "Low,High" bitfld.word 0x00 2. " ST_LS[2] ,Status register" "Low,High" bitfld.word 0x00 1. " ST_LS[1] ,Status register" "Low,High" bitfld.word 0x00 0. " ST_LS[0] ,Status register" "Low,High" group.word 0xe0++0x01 line.word 0x00 "UDB06_07_CTL,UDB06_07_CTL" bitfld.word 0x00 15. " CTL_MS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 14. " CTL_MS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 13. " CTL_MS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 12. " CTL_MS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL_MS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 10. " CTL_MS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 9. " CTL_MS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 8. " CTL_MS[0] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " CTL_LS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 6. " CTL_LS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 5. " CTL_LS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 4. " CTL_LS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " CTL_LS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 2. " CTL_LS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 1. " CTL_LS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 0. " CTL_LS[0] ,Control register" "Disabled,Enabled" textline " " group.word 0x100++0x01 line.word 0x00 "UDB06_07_MSK,UDB06_07_MSK" bitfld.word 0x00 14. " MSK_MS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 13. " MSK_MS[5] ,Mask register" "Not masked,Masked" bitfld.word 0x00 12. " MSK_MS[4] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 11. " MSK_MS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 10. " MSK_MS[2] ,Mask register" "Not masked,Masked" bitfld.word 0x00 9. " MSK_MS[1] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 8. " MSK_MS[0] ,Mask register" "Not masked,Masked" bitfld.word 0x00 6. " MSK_LS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 5. " MSK_LS[5] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 4. " MSK_LS[4] ,Mask register" "Not masked,Masked" bitfld.word 0x00 3. " MSK_LS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 2. " MSK_LS[2] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 1. " MSK_LS[1] ,Mask register" "Not masked,Masked" bitfld.word 0x00 0. " MSK_LS[0] ,Mask register" "Not masked,Masked" textline " " group.word 0x120++0x01 line.word 0x00 "UDB06_07_ACTL,UDB06_07_ACTL" bitfld.word 0x00 13. " CNT_START_MS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN_MS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FIFO1_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 10. " FIFO0_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 9. " FIFO1_CLR_MS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR_MS ,FIFO clear 0" "Normal,Cleared" textline " " bitfld.word 0x00 5. " CNT_START_LS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 4. " INT_EN_LS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " FIFO1_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 2. " FIFO0_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 1. " FIFO1_CLR_LS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 0. " FIFO0_CLR_LS ,FIFO clear 0" "Normal,Cleared" textline " " rgroup.word 0x140++0x01 line.word 0x00 "UDB06_07_MC,UDB06_07_MC" bitfld.word 0x00 12.--15. " PLD1_MC_MS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " PLD0_MC_MS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " PLD1_MC_LS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC_LS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "UDB 07_08" base ad:0x40006A0E width 15. group.word 0x00++0x01 line.word 0x00 "UDB07_08_A0,UDB07_08_A0" hexmask.word.byte 0x00 8.--15. 1. " A0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0_LS ,Generic field for 8 bit working registers" group.word 0x20++0x01 line.word 0x00 "UDB07_08_A1,UDB07_08_A1" hexmask.word.byte 0x00 8.--15. 1. " A1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A1_LS ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB07_08_D0,UDB07_08_D0" hexmask.word.byte 0x00 8.--15. 1. " D0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0_LS ,Generic field for 8 bit working registers" group.word 0x60++0x01 line.word 0x00 "UDB07_08_D1,UDB07_08_D1" hexmask.word.byte 0x00 8.--15. 1. " D1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D1_LS ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB07_08_F0,UDB07_08_F0" hexmask.word.byte 0x00 8.--15. 1. " F0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0_LS ,Generic field for 8 bit working registers" group.word 0xa0++0x01 line.word 0x00 "UDB07_08_F1,UDB07_08_F1" hexmask.word.byte 0x00 8.--15. 1. " F1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F1_LS ,Generic field for 8 bit working registers" rgroup.word 0xc0++0x01 line.word 0x00 "UDB07_08_ST,UDB07_08_ST" bitfld.word 0x00 15. " ST_MS[7] ,Status register" "Low,High" bitfld.word 0x00 14. " ST_MS[6] ,Status register" "Low,High" bitfld.word 0x00 13. " ST_MS[5] ,Status register" "Low,High" bitfld.word 0x00 12. " ST_MS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 11. " ST_MS[3] ,Status register" "Low,High" bitfld.word 0x00 10. " ST_MS[2] ,Status register" "Low,High" bitfld.word 0x00 9. " ST_MS[1] ,Status register" "Low,High" bitfld.word 0x00 8. " ST_MS[0] ,Status register" "Low,High" textline " " bitfld.word 0x00 7. " ST_LS[7] ,Status register" "Low,High" bitfld.word 0x00 6. " ST_LS[6] ,Status register" "Low,High" bitfld.word 0x00 5. " ST_LS[5] ,Status register" "Low,High" bitfld.word 0x00 4. " ST_LS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 3. " ST_LS[3] ,Status register" "Low,High" bitfld.word 0x00 2. " ST_LS[2] ,Status register" "Low,High" bitfld.word 0x00 1. " ST_LS[1] ,Status register" "Low,High" bitfld.word 0x00 0. " ST_LS[0] ,Status register" "Low,High" group.word 0xe0++0x01 line.word 0x00 "UDB07_08_CTL,UDB07_08_CTL" bitfld.word 0x00 15. " CTL_MS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 14. " CTL_MS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 13. " CTL_MS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 12. " CTL_MS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL_MS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 10. " CTL_MS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 9. " CTL_MS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 8. " CTL_MS[0] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " CTL_LS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 6. " CTL_LS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 5. " CTL_LS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 4. " CTL_LS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " CTL_LS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 2. " CTL_LS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 1. " CTL_LS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 0. " CTL_LS[0] ,Control register" "Disabled,Enabled" textline " " group.word 0x100++0x01 line.word 0x00 "UDB07_08_MSK,UDB07_08_MSK" bitfld.word 0x00 14. " MSK_MS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 13. " MSK_MS[5] ,Mask register" "Not masked,Masked" bitfld.word 0x00 12. " MSK_MS[4] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 11. " MSK_MS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 10. " MSK_MS[2] ,Mask register" "Not masked,Masked" bitfld.word 0x00 9. " MSK_MS[1] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 8. " MSK_MS[0] ,Mask register" "Not masked,Masked" bitfld.word 0x00 6. " MSK_LS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 5. " MSK_LS[5] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 4. " MSK_LS[4] ,Mask register" "Not masked,Masked" bitfld.word 0x00 3. " MSK_LS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 2. " MSK_LS[2] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 1. " MSK_LS[1] ,Mask register" "Not masked,Masked" bitfld.word 0x00 0. " MSK_LS[0] ,Mask register" "Not masked,Masked" textline " " group.word 0x120++0x01 line.word 0x00 "UDB07_08_ACTL,UDB07_08_ACTL" bitfld.word 0x00 13. " CNT_START_MS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN_MS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FIFO1_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 10. " FIFO0_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 9. " FIFO1_CLR_MS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR_MS ,FIFO clear 0" "Normal,Cleared" textline " " bitfld.word 0x00 5. " CNT_START_LS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 4. " INT_EN_LS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " FIFO1_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 2. " FIFO0_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 1. " FIFO1_CLR_LS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 0. " FIFO0_CLR_LS ,FIFO clear 0" "Normal,Cleared" textline " " rgroup.word 0x140++0x01 line.word 0x00 "UDB07_08_MC,UDB07_08_MC" bitfld.word 0x00 12.--15. " PLD1_MC_MS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " PLD0_MC_MS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " PLD1_MC_LS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC_LS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "UDB 08_09" base ad:0x40006A10 width 15. group.word 0x00++0x01 line.word 0x00 "UDB08_09_A0,UDB08_09_A0" hexmask.word.byte 0x00 8.--15. 1. " A0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0_LS ,Generic field for 8 bit working registers" group.word 0x20++0x01 line.word 0x00 "UDB08_09_A1,UDB08_09_A1" hexmask.word.byte 0x00 8.--15. 1. " A1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A1_LS ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB08_09_D0,UDB08_09_D0" hexmask.word.byte 0x00 8.--15. 1. " D0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0_LS ,Generic field for 8 bit working registers" group.word 0x60++0x01 line.word 0x00 "UDB08_09_D1,UDB08_09_D1" hexmask.word.byte 0x00 8.--15. 1. " D1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D1_LS ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB08_09_F0,UDB08_09_F0" hexmask.word.byte 0x00 8.--15. 1. " F0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0_LS ,Generic field for 8 bit working registers" group.word 0xa0++0x01 line.word 0x00 "UDB08_09_F1,UDB08_09_F1" hexmask.word.byte 0x00 8.--15. 1. " F1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F1_LS ,Generic field for 8 bit working registers" rgroup.word 0xc0++0x01 line.word 0x00 "UDB08_09_ST,UDB08_09_ST" bitfld.word 0x00 15. " ST_MS[7] ,Status register" "Low,High" bitfld.word 0x00 14. " ST_MS[6] ,Status register" "Low,High" bitfld.word 0x00 13. " ST_MS[5] ,Status register" "Low,High" bitfld.word 0x00 12. " ST_MS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 11. " ST_MS[3] ,Status register" "Low,High" bitfld.word 0x00 10. " ST_MS[2] ,Status register" "Low,High" bitfld.word 0x00 9. " ST_MS[1] ,Status register" "Low,High" bitfld.word 0x00 8. " ST_MS[0] ,Status register" "Low,High" textline " " bitfld.word 0x00 7. " ST_LS[7] ,Status register" "Low,High" bitfld.word 0x00 6. " ST_LS[6] ,Status register" "Low,High" bitfld.word 0x00 5. " ST_LS[5] ,Status register" "Low,High" bitfld.word 0x00 4. " ST_LS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 3. " ST_LS[3] ,Status register" "Low,High" bitfld.word 0x00 2. " ST_LS[2] ,Status register" "Low,High" bitfld.word 0x00 1. " ST_LS[1] ,Status register" "Low,High" bitfld.word 0x00 0. " ST_LS[0] ,Status register" "Low,High" group.word 0xe0++0x01 line.word 0x00 "UDB08_09_CTL,UDB08_09_CTL" bitfld.word 0x00 15. " CTL_MS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 14. " CTL_MS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 13. " CTL_MS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 12. " CTL_MS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL_MS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 10. " CTL_MS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 9. " CTL_MS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 8. " CTL_MS[0] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " CTL_LS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 6. " CTL_LS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 5. " CTL_LS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 4. " CTL_LS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " CTL_LS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 2. " CTL_LS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 1. " CTL_LS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 0. " CTL_LS[0] ,Control register" "Disabled,Enabled" textline " " group.word 0x100++0x01 line.word 0x00 "UDB08_09_MSK,UDB08_09_MSK" bitfld.word 0x00 14. " MSK_MS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 13. " MSK_MS[5] ,Mask register" "Not masked,Masked" bitfld.word 0x00 12. " MSK_MS[4] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 11. " MSK_MS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 10. " MSK_MS[2] ,Mask register" "Not masked,Masked" bitfld.word 0x00 9. " MSK_MS[1] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 8. " MSK_MS[0] ,Mask register" "Not masked,Masked" bitfld.word 0x00 6. " MSK_LS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 5. " MSK_LS[5] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 4. " MSK_LS[4] ,Mask register" "Not masked,Masked" bitfld.word 0x00 3. " MSK_LS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 2. " MSK_LS[2] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 1. " MSK_LS[1] ,Mask register" "Not masked,Masked" bitfld.word 0x00 0. " MSK_LS[0] ,Mask register" "Not masked,Masked" textline " " group.word 0x120++0x01 line.word 0x00 "UDB08_09_ACTL,UDB08_09_ACTL" bitfld.word 0x00 13. " CNT_START_MS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN_MS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FIFO1_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 10. " FIFO0_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 9. " FIFO1_CLR_MS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR_MS ,FIFO clear 0" "Normal,Cleared" textline " " bitfld.word 0x00 5. " CNT_START_LS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 4. " INT_EN_LS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " FIFO1_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 2. " FIFO0_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 1. " FIFO1_CLR_LS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 0. " FIFO0_CLR_LS ,FIFO clear 0" "Normal,Cleared" textline " " rgroup.word 0x140++0x01 line.word 0x00 "UDB08_09_MC,UDB08_09_MC" bitfld.word 0x00 12.--15. " PLD1_MC_MS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " PLD0_MC_MS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " PLD1_MC_LS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC_LS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "UDB 09_10" base ad:0x40006A12 width 15. group.word 0x00++0x01 line.word 0x00 "UDB09_10_A0,UDB09_10_A0" hexmask.word.byte 0x00 8.--15. 1. " A0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0_LS ,Generic field for 8 bit working registers" group.word 0x20++0x01 line.word 0x00 "UDB09_10_A1,UDB09_10_A1" hexmask.word.byte 0x00 8.--15. 1. " A1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A1_LS ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB09_10_D0,UDB09_10_D0" hexmask.word.byte 0x00 8.--15. 1. " D0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0_LS ,Generic field for 8 bit working registers" group.word 0x60++0x01 line.word 0x00 "UDB09_10_D1,UDB09_10_D1" hexmask.word.byte 0x00 8.--15. 1. " D1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D1_LS ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB09_10_F0,UDB09_10_F0" hexmask.word.byte 0x00 8.--15. 1. " F0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0_LS ,Generic field for 8 bit working registers" group.word 0xa0++0x01 line.word 0x00 "UDB09_10_F1,UDB09_10_F1" hexmask.word.byte 0x00 8.--15. 1. " F1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F1_LS ,Generic field for 8 bit working registers" rgroup.word 0xc0++0x01 line.word 0x00 "UDB09_10_ST,UDB09_10_ST" bitfld.word 0x00 15. " ST_MS[7] ,Status register" "Low,High" bitfld.word 0x00 14. " ST_MS[6] ,Status register" "Low,High" bitfld.word 0x00 13. " ST_MS[5] ,Status register" "Low,High" bitfld.word 0x00 12. " ST_MS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 11. " ST_MS[3] ,Status register" "Low,High" bitfld.word 0x00 10. " ST_MS[2] ,Status register" "Low,High" bitfld.word 0x00 9. " ST_MS[1] ,Status register" "Low,High" bitfld.word 0x00 8. " ST_MS[0] ,Status register" "Low,High" textline " " bitfld.word 0x00 7. " ST_LS[7] ,Status register" "Low,High" bitfld.word 0x00 6. " ST_LS[6] ,Status register" "Low,High" bitfld.word 0x00 5. " ST_LS[5] ,Status register" "Low,High" bitfld.word 0x00 4. " ST_LS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 3. " ST_LS[3] ,Status register" "Low,High" bitfld.word 0x00 2. " ST_LS[2] ,Status register" "Low,High" bitfld.word 0x00 1. " ST_LS[1] ,Status register" "Low,High" bitfld.word 0x00 0. " ST_LS[0] ,Status register" "Low,High" group.word 0xe0++0x01 line.word 0x00 "UDB09_10_CTL,UDB09_10_CTL" bitfld.word 0x00 15. " CTL_MS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 14. " CTL_MS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 13. " CTL_MS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 12. " CTL_MS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL_MS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 10. " CTL_MS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 9. " CTL_MS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 8. " CTL_MS[0] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " CTL_LS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 6. " CTL_LS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 5. " CTL_LS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 4. " CTL_LS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " CTL_LS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 2. " CTL_LS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 1. " CTL_LS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 0. " CTL_LS[0] ,Control register" "Disabled,Enabled" textline " " group.word 0x100++0x01 line.word 0x00 "UDB09_10_MSK,UDB09_10_MSK" bitfld.word 0x00 14. " MSK_MS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 13. " MSK_MS[5] ,Mask register" "Not masked,Masked" bitfld.word 0x00 12. " MSK_MS[4] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 11. " MSK_MS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 10. " MSK_MS[2] ,Mask register" "Not masked,Masked" bitfld.word 0x00 9. " MSK_MS[1] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 8. " MSK_MS[0] ,Mask register" "Not masked,Masked" bitfld.word 0x00 6. " MSK_LS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 5. " MSK_LS[5] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 4. " MSK_LS[4] ,Mask register" "Not masked,Masked" bitfld.word 0x00 3. " MSK_LS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 2. " MSK_LS[2] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 1. " MSK_LS[1] ,Mask register" "Not masked,Masked" bitfld.word 0x00 0. " MSK_LS[0] ,Mask register" "Not masked,Masked" textline " " group.word 0x120++0x01 line.word 0x00 "UDB09_10_ACTL,UDB09_10_ACTL" bitfld.word 0x00 13. " CNT_START_MS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN_MS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FIFO1_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 10. " FIFO0_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 9. " FIFO1_CLR_MS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR_MS ,FIFO clear 0" "Normal,Cleared" textline " " bitfld.word 0x00 5. " CNT_START_LS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 4. " INT_EN_LS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " FIFO1_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 2. " FIFO0_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 1. " FIFO1_CLR_LS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 0. " FIFO0_CLR_LS ,FIFO clear 0" "Normal,Cleared" textline " " rgroup.word 0x140++0x01 line.word 0x00 "UDB09_10_MC,UDB09_10_MC" bitfld.word 0x00 12.--15. " PLD1_MC_MS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " PLD0_MC_MS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " PLD1_MC_LS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC_LS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "UDB 10_11" base ad:0x40006A14 width 15. group.word 0x00++0x01 line.word 0x00 "UDB10_11_A0,UDB10_11_A0" hexmask.word.byte 0x00 8.--15. 1. " A0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0_LS ,Generic field for 8 bit working registers" group.word 0x20++0x01 line.word 0x00 "UDB10_11_A1,UDB10_11_A1" hexmask.word.byte 0x00 8.--15. 1. " A1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A1_LS ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB10_11_D0,UDB10_11_D0" hexmask.word.byte 0x00 8.--15. 1. " D0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0_LS ,Generic field for 8 bit working registers" group.word 0x60++0x01 line.word 0x00 "UDB10_11_D1,UDB10_11_D1" hexmask.word.byte 0x00 8.--15. 1. " D1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D1_LS ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB10_11_F0,UDB10_11_F0" hexmask.word.byte 0x00 8.--15. 1. " F0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0_LS ,Generic field for 8 bit working registers" group.word 0xa0++0x01 line.word 0x00 "UDB10_11_F1,UDB10_11_F1" hexmask.word.byte 0x00 8.--15. 1. " F1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F1_LS ,Generic field for 8 bit working registers" rgroup.word 0xc0++0x01 line.word 0x00 "UDB10_11_ST,UDB10_11_ST" bitfld.word 0x00 15. " ST_MS[7] ,Status register" "Low,High" bitfld.word 0x00 14. " ST_MS[6] ,Status register" "Low,High" bitfld.word 0x00 13. " ST_MS[5] ,Status register" "Low,High" bitfld.word 0x00 12. " ST_MS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 11. " ST_MS[3] ,Status register" "Low,High" bitfld.word 0x00 10. " ST_MS[2] ,Status register" "Low,High" bitfld.word 0x00 9. " ST_MS[1] ,Status register" "Low,High" bitfld.word 0x00 8. " ST_MS[0] ,Status register" "Low,High" textline " " bitfld.word 0x00 7. " ST_LS[7] ,Status register" "Low,High" bitfld.word 0x00 6. " ST_LS[6] ,Status register" "Low,High" bitfld.word 0x00 5. " ST_LS[5] ,Status register" "Low,High" bitfld.word 0x00 4. " ST_LS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 3. " ST_LS[3] ,Status register" "Low,High" bitfld.word 0x00 2. " ST_LS[2] ,Status register" "Low,High" bitfld.word 0x00 1. " ST_LS[1] ,Status register" "Low,High" bitfld.word 0x00 0. " ST_LS[0] ,Status register" "Low,High" group.word 0xe0++0x01 line.word 0x00 "UDB10_11_CTL,UDB10_11_CTL" bitfld.word 0x00 15. " CTL_MS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 14. " CTL_MS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 13. " CTL_MS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 12. " CTL_MS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL_MS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 10. " CTL_MS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 9. " CTL_MS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 8. " CTL_MS[0] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " CTL_LS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 6. " CTL_LS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 5. " CTL_LS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 4. " CTL_LS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " CTL_LS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 2. " CTL_LS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 1. " CTL_LS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 0. " CTL_LS[0] ,Control register" "Disabled,Enabled" textline " " group.word 0x100++0x01 line.word 0x00 "UDB10_11_MSK,UDB10_11_MSK" bitfld.word 0x00 14. " MSK_MS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 13. " MSK_MS[5] ,Mask register" "Not masked,Masked" bitfld.word 0x00 12. " MSK_MS[4] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 11. " MSK_MS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 10. " MSK_MS[2] ,Mask register" "Not masked,Masked" bitfld.word 0x00 9. " MSK_MS[1] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 8. " MSK_MS[0] ,Mask register" "Not masked,Masked" bitfld.word 0x00 6. " MSK_LS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 5. " MSK_LS[5] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 4. " MSK_LS[4] ,Mask register" "Not masked,Masked" bitfld.word 0x00 3. " MSK_LS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 2. " MSK_LS[2] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 1. " MSK_LS[1] ,Mask register" "Not masked,Masked" bitfld.word 0x00 0. " MSK_LS[0] ,Mask register" "Not masked,Masked" textline " " group.word 0x120++0x01 line.word 0x00 "UDB10_11_ACTL,UDB10_11_ACTL" bitfld.word 0x00 13. " CNT_START_MS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN_MS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FIFO1_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 10. " FIFO0_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 9. " FIFO1_CLR_MS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR_MS ,FIFO clear 0" "Normal,Cleared" textline " " bitfld.word 0x00 5. " CNT_START_LS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 4. " INT_EN_LS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " FIFO1_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 2. " FIFO0_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 1. " FIFO1_CLR_LS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 0. " FIFO0_CLR_LS ,FIFO clear 0" "Normal,Cleared" textline " " rgroup.word 0x140++0x01 line.word 0x00 "UDB10_11_MC,UDB10_11_MC" bitfld.word 0x00 12.--15. " PLD1_MC_MS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " PLD0_MC_MS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " PLD1_MC_LS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC_LS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "UDB 11_12" base ad:0x40006A16 width 15. group.word 0x00++0x01 line.word 0x00 "UDB11_12_A0,UDB11_12_A0" hexmask.word.byte 0x00 8.--15. 1. " A0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A0_LS ,Generic field for 8 bit working registers" group.word 0x20++0x01 line.word 0x00 "UDB11_12_A1,UDB11_12_A1" hexmask.word.byte 0x00 8.--15. 1. " A1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " A1_LS ,Generic field for 8 bit working registers" group.word 0x40++0x01 line.word 0x00 "UDB11_12_D0,UDB11_12_D0" hexmask.word.byte 0x00 8.--15. 1. " D0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D0_LS ,Generic field for 8 bit working registers" group.word 0x60++0x01 line.word 0x00 "UDB11_12_D1,UDB11_12_D1" hexmask.word.byte 0x00 8.--15. 1. " D1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " D1_LS ,Generic field for 8 bit working registers" group.word 0x80++0x01 line.word 0x00 "UDB11_12_F0,UDB11_12_F0" hexmask.word.byte 0x00 8.--15. 1. " F0_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F0_LS ,Generic field for 8 bit working registers" group.word 0xa0++0x01 line.word 0x00 "UDB11_12_F1,UDB11_12_F1" hexmask.word.byte 0x00 8.--15. 1. " F1_MS ,Generic field for 8 bit working registers" hexmask.word.byte 0x00 0.--7. 1. " F1_LS ,Generic field for 8 bit working registers" rgroup.word 0xc0++0x01 line.word 0x00 "UDB11_12_ST,UDB11_12_ST" bitfld.word 0x00 15. " ST_MS[7] ,Status register" "Low,High" bitfld.word 0x00 14. " ST_MS[6] ,Status register" "Low,High" bitfld.word 0x00 13. " ST_MS[5] ,Status register" "Low,High" bitfld.word 0x00 12. " ST_MS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 11. " ST_MS[3] ,Status register" "Low,High" bitfld.word 0x00 10. " ST_MS[2] ,Status register" "Low,High" bitfld.word 0x00 9. " ST_MS[1] ,Status register" "Low,High" bitfld.word 0x00 8. " ST_MS[0] ,Status register" "Low,High" textline " " bitfld.word 0x00 7. " ST_LS[7] ,Status register" "Low,High" bitfld.word 0x00 6. " ST_LS[6] ,Status register" "Low,High" bitfld.word 0x00 5. " ST_LS[5] ,Status register" "Low,High" bitfld.word 0x00 4. " ST_LS[4] ,Status register" "Low,High" textline " " bitfld.word 0x00 3. " ST_LS[3] ,Status register" "Low,High" bitfld.word 0x00 2. " ST_LS[2] ,Status register" "Low,High" bitfld.word 0x00 1. " ST_LS[1] ,Status register" "Low,High" bitfld.word 0x00 0. " ST_LS[0] ,Status register" "Low,High" group.word 0xe0++0x01 line.word 0x00 "UDB11_12_CTL,UDB11_12_CTL" bitfld.word 0x00 15. " CTL_MS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 14. " CTL_MS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 13. " CTL_MS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 12. " CTL_MS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " CTL_MS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 10. " CTL_MS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 9. " CTL_MS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 8. " CTL_MS[0] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " CTL_LS[7] ,Control register" "Disabled,Enabled" bitfld.word 0x00 6. " CTL_LS[6] ,Control register" "Disabled,Enabled" bitfld.word 0x00 5. " CTL_LS[5] ,Control register" "Disabled,Enabled" bitfld.word 0x00 4. " CTL_LS[4] ,Control register" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " CTL_LS[3] ,Control register" "Disabled,Enabled" bitfld.word 0x00 2. " CTL_LS[2] ,Control register" "Disabled,Enabled" bitfld.word 0x00 1. " CTL_LS[1] ,Control register" "Disabled,Enabled" bitfld.word 0x00 0. " CTL_LS[0] ,Control register" "Disabled,Enabled" textline " " group.word 0x100++0x01 line.word 0x00 "UDB11_12_MSK,UDB11_12_MSK" bitfld.word 0x00 14. " MSK_MS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 13. " MSK_MS[5] ,Mask register" "Not masked,Masked" bitfld.word 0x00 12. " MSK_MS[4] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 11. " MSK_MS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 10. " MSK_MS[2] ,Mask register" "Not masked,Masked" bitfld.word 0x00 9. " MSK_MS[1] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 8. " MSK_MS[0] ,Mask register" "Not masked,Masked" bitfld.word 0x00 6. " MSK_LS[6] ,Mask register" "Not masked,Masked" bitfld.word 0x00 5. " MSK_LS[5] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 4. " MSK_LS[4] ,Mask register" "Not masked,Masked" bitfld.word 0x00 3. " MSK_LS[3] ,Mask register" "Not masked,Masked" bitfld.word 0x00 2. " MSK_LS[2] ,Mask register" "Not masked,Masked" textline " " bitfld.word 0x00 1. " MSK_LS[1] ,Mask register" "Not masked,Masked" bitfld.word 0x00 0. " MSK_LS[0] ,Mask register" "Not masked,Masked" textline " " group.word 0x120++0x01 line.word 0x00 "UDB11_12_ACTL,UDB11_12_ACTL" bitfld.word 0x00 13. " CNT_START_MS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 12. " INT_EN_MS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FIFO1_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 10. " FIFO0_LVL_MS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 9. " FIFO1_CLR_MS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 8. " FIFO0_CLR_MS ,FIFO clear 0" "Normal,Cleared" textline " " bitfld.word 0x00 5. " CNT_START_LS ,Enable counter" "Disabled,Enabled" bitfld.word 0x00 4. " INT_EN_LS ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " FIFO1_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" bitfld.word 0x00 2. " FIFO0_LVL_LS ,FIFO level(input|output mode)" "Not full|Not empty,1/2 empty|1/2 full" textline " " bitfld.word 0x00 1. " FIFO1_CLR_LS ,FIFO clear 1" "Normal,Cleared" bitfld.word 0x00 0. " FIFO0_CLR_LS ,FIFO clear 0" "Normal,Cleared" textline " " rgroup.word 0x140++0x01 line.word 0x00 "UDB11_12_MC,UDB11_12_MC" bitfld.word 0x00 12.--15. " PLD1_MC_MS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " PLD0_MC_MS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " PLD1_MC_LS ,Read Macrocell 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. " PLD0_MC_LS ,Read Macrocell 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end base ad:(0x40011000+0x400) tree "P 2" tree "U 0" width 18. group.long 0x0++0x03 line.long 0x00 "PLD_IT0,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT0C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT0C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x4++0x03 line.long 0x00 "PLD_IT1,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT1C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT1C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x8++0x03 line.long 0x00 "PLD_IT2,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT2C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT2C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xC++0x03 line.long 0x00 "PLD_IT3,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT3C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT3C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x10++0x03 line.long 0x00 "PLD_IT4,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT4C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT4C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x14++0x03 line.long 0x00 "PLD_IT5,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT5C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT5C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x18++0x03 line.long 0x00 "PLD_IT6,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT6C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT6C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x1C++0x03 line.long 0x00 "PLD_IT7,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT7C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT7C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x20++0x03 line.long 0x00 "PLD_IT8,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT8C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT8C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x24++0x03 line.long 0x00 "PLD_IT9,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT9C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT9C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x28++0x03 line.long 0x00 "PLD_IT10,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT10C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT10C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x2C++0x03 line.long 0x00 "PLD_IT11,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " group.word 0x30++0x01 line.word 0x00 "PLD_ORT0,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT0_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT0_0 ,OR term" "Not OR,OR" group.word 0x32++0x01 line.word 0x00 "PLD_ORT1,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT1_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT1_0 ,OR term" "Not OR,OR" group.word 0x34++0x01 line.word 0x00 "PLD_ORT2,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT2_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT2_0 ,OR term" "Not OR,OR" group.word 0x36++0x01 line.word 0x00 "PLD_ORT3,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " group.word (0x30+0x08)++0x07 line.word 0x00 "MC_CFG_CEN_CONST,Macrocell Configuration for Carry Enable and Constant" bitfld.word 0x00 15. " PLD1_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 14. " PLD1_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 13. " PLD1_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 12. " PLD1_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " PLD1_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 10. " PLD1_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " PLD1_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 8. " PLD1_MC0_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " PLD0_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 6. " PLD0_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " PLD0_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 4. " PLD0_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " PLD0_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 2. " PLD0_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " PLD0_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 0. " PLD0_MC0_CEN ,Carry enable" "Disabled,Enabled" line.word 0x02 "MC_CFG_XORFB,Macrocell Configuration for XOR Feedback" bitfld.word 0x02 14.--15. " PLD1_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 12.--13. " PLD1_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 10.--11. " PLD1_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 8.--9. " PLD1_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 6.--7. " PLD0_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 4.--5. " PLD0_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 2.--3. " PLD0_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 0.--1. " PLD0_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" line.word 0x04 "MC_CFG_SET_RESET,Macrocell Configuration for Set and Reset" bitfld.word 0x04 15. " PLD1_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 14. " PLD1_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 13. " PLD1_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 12. " PLD1_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 11. " PLD1_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 10. " PLD1_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 9. " PLD1_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 8. " PLD1_MC0_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 7. " PLD0_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 6. " PLD0_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 5. " PLD0_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 4. " PLD0_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 3. " PLD0_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 2. " PLD0_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 1. " PLD0_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 0. " PLD0_MC0_SET_SEL ,Set select enable" "Not set,Set" line.word 0x06 "MC_CFG_BYPASS,Macrocell Configuration for Bypass" bitfld.word 0x06 14. " PLD1_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 12. " PLD1_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 10. " PLD1_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 8. " PLD1_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 6. " PLD0_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 4. " PLD0_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 2. " PLD0_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 0. " PLD0_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " group.byte (0x30+0x10)++0x10 line.byte 0x00 "CFG0,Datapath Input Selection" bitfld.byte 0x00 4.--6. " RAD1 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x00 0.--2. " RAD0 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x01 "CFG1,Datapath Input Selection" bitfld.byte 0x01 0.--2. " RAD2 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x02 "CFG2,Datapath Input Selection" bitfld.byte 0x02 4.--6. " F1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x02 0.--2. " F0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x03 "CFG3,Datapath Input Selection" bitfld.byte 0x03 4.--6. " D1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x03 0.--2. " D0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x04 "CFG4,Datapath Input Selection" bitfld.byte 0x04 4.--6. " CI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x04 0.--2. " SI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x05 "CFG5,Datapath Output Selection" bitfld.byte 0x05 4.--7. " OUT1 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x05 0.--3. " OUT0 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x06 "CFG6,Datapath Output Selection" bitfld.byte 0x06 4.--7. " OUT3 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x06 0.--3. " OUT2 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x07 "CFG7,Datapath Output Selection" bitfld.byte 0x07 4.--7. " OUT5 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x07 0.--3. " OUT4 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x08 "CFG8,Datapath Output Synchronization" hexmask.byte 0x08 0.--5. 1. " OUT_SYNC ,Output Synchronization field" line.byte 0x09 "CFG9,ALU Mask" line.byte 0x0a "CFG10,Compare 0 Mask" line.byte 0x0b "CFG11,Compare 1 Mask" line.byte 0x0c "CFG12,Datapath Static Configuration" bitfld.byte 0x0c 7. " CMASK1_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 6. " CMASK0_EN ,Datapath mask enable" "Disabled,Enabled" textline " " bitfld.byte 0x0c 5. " AMASK_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 4. " DEF_SI ,Datapath default shift value" "0,1" textline " " bitfld.byte 0x0c 2.--3. " SI_SELB ,Datapath shift in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0c 0.--1. " SI_SELA ,Datapath shift in source select" "Default,Registered,Route,Chain" line.byte 0x0d "CFG13,Datapath Static Configuration" bitfld.byte 0x0d 6.--7. " CMP_SELB ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" bitfld.byte 0x0d 4.--5. " CMP_SELA ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" textline " " bitfld.byte 0x0d 2.--3. " CI_SELB ,Datapath carry in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0d 0.--1. " CI_SELA ,Datapath carry in source select" "Default,Registered,Route,Chain" line.byte 0x0e "CFG14,Datapath Static Configuration" bitfld.byte 0x0e 7. " MSB_EN ,Datapath MSB selection enable" "Disabled,Enabled" bitfld.byte 0x0e 4.--6. " MSB_SEL ,Datapath MSB Selection" "Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7" textline " " bitfld.byte 0x0e 3. " CHAIN_CMSB ,Datapath CRC MSB chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 2. " CHAIN_FB ,Datapath CRC feedback chaining enable" "Disabled,Enabled" textline " " bitfld.byte 0x0e 1. " CHAIN1 ,Datapath condition chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 0. " CHAIN0 ,Datapath condition chaining enable" "Disabled,Enabled" line.byte 0x0f "CFG15,Datapath Static Configuration" bitfld.byte 0x0f 7. " PI_SEL ,Datapath parallel input selection" "Normal,Parallel" bitfld.byte 0x0f 6. " SHIFT_SEL ,Datapath shift out selection" "SOL_MSB,SOR" textline " " bitfld.byte 0x0f 5. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x0f 4. " NC0 ,Spare register bit" "0,1" textline " " bitfld.byte 0x0f 2.--3. " F1_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" bitfld.byte 0x0f 0.--1. " F0_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" line.byte 0x10 "CFG16,Datapath Static Configuration" bitfld.byte 0x10 7. " F1_CK_INV ,FIFO Clock Invert" "Normal,Inverted" bitfld.byte 0x10 6. " F0_CK_INV ,FIFO Clock Invert" "Normal,Inverted" textline " " bitfld.byte 0x10 5. " FIFO_FAST ,FIFO Fast Mode" "Disabled,Enabled" bitfld.byte 0x10 4. " FIFO_CAP ,FIFO Software Capture Mode" "Disabled,Enabled" textline " " bitfld.byte 0x10 3. " FIFO_EDGE ,Edge/level sensitive FIFO write control" "Level,Edge" bitfld.byte 0x10 2. " FIFO_ASYNC ,Asynchronous FIFO clocking support" "Synchronous,Asynchronous" textline " " bitfld.byte 0x10 1. " EXT_CRCPRS ,External CRC/PRS mode" "Internal,External" bitfld.byte 0x10 0. " WRK16_CONCAT ,Datapath register access mode" "Default,Concatenate" group.byte (0x30+0x24)++0x03 line.byte 0x00 "CFG20,Status input mode selection" line.byte 0x01 "CFG21,Spare register bits" bitfld.byte 0x01 1. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x01 0. " NC0 ,Spare register bit" "0,1" line.byte 0x02 "CFG22,Status Output Control" bitfld.byte 0x02 3. " SC_SYNC_MD ,SC Sync Mode" "Disabled,Enabled" bitfld.byte 0x02 2. " SC_INT_MD ,SC Interrupt Mode" "Normal,INT_MODE" textline " " bitfld.byte 0x02 0.--1. " SC_OUT_CTL ,Selects the output source for the Status and Control routing connections" "Control,Parallel,Counter,?..." line.byte 0x03 "CFG23,Counter Routing Control" bitfld.byte 0x03 5. " ROUTE_EN ,Configure the counter enable signal for routing input" "Disabled,Enabled" bitfld.byte 0x03 4. " ROUTE_LD ,Configure the counter load signal for routing input" "Disabled,Enabled" textline " " bitfld.byte 0x03 2.--3. " CNT_EN_SEL ,Selects the routing inputs for the counter enable signal" "SC_IN4,SC_IN5,SC_IN6,SC_IO" bitfld.byte 0x03 0.--1. " CNT_LD_SEL ,Selects the routing inputs for the counter load signal" "SC_IN0,SC_IN1,SC_IN2,SC_IN3" group.byte (0x30+0x28)++0x00 line.byte 0x00 "CFG24,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x29)++0x00 line.byte 0x00 "CFG25,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2A)++0x00 line.byte 0x00 "CFG26,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2B)++0x00 line.byte 0x00 "CFG27,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2C)++0x03 line.byte 0x00 "CFG28,Clock Selection" bitfld.byte 0x00 4.--7. " PLD1_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x00 0.--3. " PLD0_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x01 "CFG29,Clock Selection" bitfld.byte 0x01 4.--7. " SC_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x01 0.--3. " DP_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x02 "CFG30,Reset Selection Register" bitfld.byte 0x02 4. " GUDB_WR ,Enable global write operation for the configuration and working registers in this UDB" "Disabled,Enabled" bitfld.byte 0x02 3. " EN_RES_CNT ,Enable routed reset to counter/control register" "Disabled,Enabled" textline " " bitfld.byte 0x02 2. " RES_POL ,Select polarity of the routed reset control" "Not inverted,Inverted" bitfld.byte 0x02 0.--1. " RES_SEL ,Select routing input for routed reset control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" line.byte 0x03 "CFG31,Reset and Clock Input Enable" bitfld.byte 0x03 4.--5. " EXT_CK_SEL ,External clock selection" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" bitfld.byte 0x03 1. " EXT_SYNC ,Enable synchronization of selected external clock" "Disabled,Enabled" textline " " bitfld.byte 0x03 0. " NC0 ,Spare register bit" "0,1" group.word 0x60++0x01 line.word 0x00 "DCFG0,Dynamic Configuration RAM Register 0" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x62++0x01 line.word 0x00 "DCFG1,Dynamic Configuration RAM Register 1" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x64++0x01 line.word 0x00 "DCFG2,Dynamic Configuration RAM Register 2" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x66++0x01 line.word 0x00 "DCFG3,Dynamic Configuration RAM Register 3" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x68++0x01 line.word 0x00 "DCFG4,Dynamic Configuration RAM Register 4" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6A++0x01 line.word 0x00 "DCFG5,Dynamic Configuration RAM Register 5" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6C++0x01 line.word 0x00 "DCFG6,Dynamic Configuration RAM Register 6" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6E++0x01 line.word 0x00 "DCFG7,Dynamic Configuration RAM Register 7" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" width 0x0B tree.end tree "U 1" width 18. group.long 0x80++0x03 line.long 0x00 "PLD_IT0,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT0C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT0C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x84++0x03 line.long 0x00 "PLD_IT1,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT1C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT1C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x88++0x03 line.long 0x00 "PLD_IT2,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT2C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT2C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x8C++0x03 line.long 0x00 "PLD_IT3,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT3C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT3C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x90++0x03 line.long 0x00 "PLD_IT4,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT4C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT4C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x94++0x03 line.long 0x00 "PLD_IT5,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT5C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT5C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x98++0x03 line.long 0x00 "PLD_IT6,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT6C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT6C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x9C++0x03 line.long 0x00 "PLD_IT7,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT7C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT7C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA0++0x03 line.long 0x00 "PLD_IT8,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT8C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT8C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA4++0x03 line.long 0x00 "PLD_IT9,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT9C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT9C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA8++0x03 line.long 0x00 "PLD_IT10,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT10C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT10C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xAC++0x03 line.long 0x00 "PLD_IT11,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " group.word 0xB0++0x01 line.word 0x00 "PLD_ORT0,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT0_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT0_0 ,OR term" "Not OR,OR" group.word 0xB2++0x01 line.word 0x00 "PLD_ORT1,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT1_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT1_0 ,OR term" "Not OR,OR" group.word 0xB4++0x01 line.word 0x00 "PLD_ORT2,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT2_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT2_0 ,OR term" "Not OR,OR" group.word 0xB6++0x01 line.word 0x00 "PLD_ORT3,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " group.word (0xB0+0x08)++0x07 line.word 0x00 "MC_CFG_CEN_CONST,Macrocell Configuration for Carry Enable and Constant" bitfld.word 0x00 15. " PLD1_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 14. " PLD1_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 13. " PLD1_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 12. " PLD1_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " PLD1_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 10. " PLD1_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " PLD1_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 8. " PLD1_MC0_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " PLD0_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 6. " PLD0_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " PLD0_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 4. " PLD0_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " PLD0_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 2. " PLD0_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " PLD0_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 0. " PLD0_MC0_CEN ,Carry enable" "Disabled,Enabled" line.word 0x02 "MC_CFG_XORFB,Macrocell Configuration for XOR Feedback" bitfld.word 0x02 14.--15. " PLD1_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 12.--13. " PLD1_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 10.--11. " PLD1_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 8.--9. " PLD1_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 6.--7. " PLD0_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 4.--5. " PLD0_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 2.--3. " PLD0_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 0.--1. " PLD0_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" line.word 0x04 "MC_CFG_SET_RESET,Macrocell Configuration for Set and Reset" bitfld.word 0x04 15. " PLD1_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 14. " PLD1_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 13. " PLD1_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 12. " PLD1_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 11. " PLD1_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 10. " PLD1_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 9. " PLD1_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 8. " PLD1_MC0_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 7. " PLD0_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 6. " PLD0_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 5. " PLD0_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 4. " PLD0_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 3. " PLD0_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 2. " PLD0_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 1. " PLD0_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 0. " PLD0_MC0_SET_SEL ,Set select enable" "Not set,Set" line.word 0x06 "MC_CFG_BYPASS,Macrocell Configuration for Bypass" bitfld.word 0x06 14. " PLD1_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 12. " PLD1_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 10. " PLD1_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 8. " PLD1_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 6. " PLD0_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 4. " PLD0_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 2. " PLD0_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 0. " PLD0_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " group.byte (0xB0+0x10)++0x10 line.byte 0x00 "CFG0,Datapath Input Selection" bitfld.byte 0x00 4.--6. " RAD1 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x00 0.--2. " RAD0 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x01 "CFG1,Datapath Input Selection" bitfld.byte 0x01 0.--2. " RAD2 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x02 "CFG2,Datapath Input Selection" bitfld.byte 0x02 4.--6. " F1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x02 0.--2. " F0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x03 "CFG3,Datapath Input Selection" bitfld.byte 0x03 4.--6. " D1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x03 0.--2. " D0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x04 "CFG4,Datapath Input Selection" bitfld.byte 0x04 4.--6. " CI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x04 0.--2. " SI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x05 "CFG5,Datapath Output Selection" bitfld.byte 0x05 4.--7. " OUT1 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x05 0.--3. " OUT0 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x06 "CFG6,Datapath Output Selection" bitfld.byte 0x06 4.--7. " OUT3 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x06 0.--3. " OUT2 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x07 "CFG7,Datapath Output Selection" bitfld.byte 0x07 4.--7. " OUT5 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x07 0.--3. " OUT4 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x08 "CFG8,Datapath Output Synchronization" hexmask.byte 0x08 0.--5. 1. " OUT_SYNC ,Output Synchronization field" line.byte 0x09 "CFG9,ALU Mask" line.byte 0x0a "CFG10,Compare 0 Mask" line.byte 0x0b "CFG11,Compare 1 Mask" line.byte 0x0c "CFG12,Datapath Static Configuration" bitfld.byte 0x0c 7. " CMASK1_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 6. " CMASK0_EN ,Datapath mask enable" "Disabled,Enabled" textline " " bitfld.byte 0x0c 5. " AMASK_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 4. " DEF_SI ,Datapath default shift value" "0,1" textline " " bitfld.byte 0x0c 2.--3. " SI_SELB ,Datapath shift in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0c 0.--1. " SI_SELA ,Datapath shift in source select" "Default,Registered,Route,Chain" line.byte 0x0d "CFG13,Datapath Static Configuration" bitfld.byte 0x0d 6.--7. " CMP_SELB ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" bitfld.byte 0x0d 4.--5. " CMP_SELA ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" textline " " bitfld.byte 0x0d 2.--3. " CI_SELB ,Datapath carry in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0d 0.--1. " CI_SELA ,Datapath carry in source select" "Default,Registered,Route,Chain" line.byte 0x0e "CFG14,Datapath Static Configuration" bitfld.byte 0x0e 7. " MSB_EN ,Datapath MSB selection enable" "Disabled,Enabled" bitfld.byte 0x0e 4.--6. " MSB_SEL ,Datapath MSB Selection" "Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7" textline " " bitfld.byte 0x0e 3. " CHAIN_CMSB ,Datapath CRC MSB chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 2. " CHAIN_FB ,Datapath CRC feedback chaining enable" "Disabled,Enabled" textline " " bitfld.byte 0x0e 1. " CHAIN1 ,Datapath condition chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 0. " CHAIN0 ,Datapath condition chaining enable" "Disabled,Enabled" line.byte 0x0f "CFG15,Datapath Static Configuration" bitfld.byte 0x0f 7. " PI_SEL ,Datapath parallel input selection" "Normal,Parallel" bitfld.byte 0x0f 6. " SHIFT_SEL ,Datapath shift out selection" "SOL_MSB,SOR" textline " " bitfld.byte 0x0f 5. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x0f 4. " NC0 ,Spare register bit" "0,1" textline " " bitfld.byte 0x0f 2.--3. " F1_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" bitfld.byte 0x0f 0.--1. " F0_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" line.byte 0x10 "CFG16,Datapath Static Configuration" bitfld.byte 0x10 7. " F1_CK_INV ,FIFO Clock Invert" "Normal,Inverted" bitfld.byte 0x10 6. " F0_CK_INV ,FIFO Clock Invert" "Normal,Inverted" textline " " bitfld.byte 0x10 5. " FIFO_FAST ,FIFO Fast Mode" "Disabled,Enabled" bitfld.byte 0x10 4. " FIFO_CAP ,FIFO Software Capture Mode" "Disabled,Enabled" textline " " bitfld.byte 0x10 3. " FIFO_EDGE ,Edge/level sensitive FIFO write control" "Level,Edge" bitfld.byte 0x10 2. " FIFO_ASYNC ,Asynchronous FIFO clocking support" "Synchronous,Asynchronous" textline " " bitfld.byte 0x10 1. " EXT_CRCPRS ,External CRC/PRS mode" "Internal,External" bitfld.byte 0x10 0. " WRK16_CONCAT ,Datapath register access mode" "Default,Concatenate" group.byte (0xB0+0x24)++0x03 line.byte 0x00 "CFG20,Status input mode selection" line.byte 0x01 "CFG21,Spare register bits" bitfld.byte 0x01 1. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x01 0. " NC0 ,Spare register bit" "0,1" line.byte 0x02 "CFG22,Status Output Control" bitfld.byte 0x02 3. " SC_SYNC_MD ,SC Sync Mode" "Disabled,Enabled" bitfld.byte 0x02 2. " SC_INT_MD ,SC Interrupt Mode" "Normal,INT_MODE" textline " " bitfld.byte 0x02 0.--1. " SC_OUT_CTL ,Selects the output source for the Status and Control routing connections" "Control,Parallel,Counter,?..." line.byte 0x03 "CFG23,Counter Routing Control" bitfld.byte 0x03 5. " ROUTE_EN ,Configure the counter enable signal for routing input" "Disabled,Enabled" bitfld.byte 0x03 4. " ROUTE_LD ,Configure the counter load signal for routing input" "Disabled,Enabled" textline " " bitfld.byte 0x03 2.--3. " CNT_EN_SEL ,Selects the routing inputs for the counter enable signal" "SC_IN4,SC_IN5,SC_IN6,SC_IO" bitfld.byte 0x03 0.--1. " CNT_LD_SEL ,Selects the routing inputs for the counter load signal" "SC_IN0,SC_IN1,SC_IN2,SC_IN3" group.byte (0xB0+0x28)++0x00 line.byte 0x00 "CFG24,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x29)++0x00 line.byte 0x00 "CFG25,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2A)++0x00 line.byte 0x00 "CFG26,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2B)++0x00 line.byte 0x00 "CFG27,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2C)++0x03 line.byte 0x00 "CFG28,Clock Selection" bitfld.byte 0x00 4.--7. " PLD1_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x00 0.--3. " PLD0_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x01 "CFG29,Clock Selection" bitfld.byte 0x01 4.--7. " SC_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x01 0.--3. " DP_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x02 "CFG30,Reset Selection Register" bitfld.byte 0x02 4. " GUDB_WR ,Enable global write operation for the configuration and working registers in this UDB" "Disabled,Enabled" bitfld.byte 0x02 3. " EN_RES_CNT ,Enable routed reset to counter/control register" "Disabled,Enabled" textline " " bitfld.byte 0x02 2. " RES_POL ,Select polarity of the routed reset control" "Not inverted,Inverted" bitfld.byte 0x02 0.--1. " RES_SEL ,Select routing input for routed reset control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" line.byte 0x03 "CFG31,Reset and Clock Input Enable" bitfld.byte 0x03 4.--5. " EXT_CK_SEL ,External clock selection" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" bitfld.byte 0x03 1. " EXT_SYNC ,Enable synchronization of selected external clock" "Disabled,Enabled" textline " " bitfld.byte 0x03 0. " NC0 ,Spare register bit" "0,1" group.word 0xE0++0x01 line.word 0x00 "DCFG0,Dynamic Configuration RAM Register 0" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE2++0x01 line.word 0x00 "DCFG1,Dynamic Configuration RAM Register 1" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE4++0x01 line.word 0x00 "DCFG2,Dynamic Configuration RAM Register 2" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE6++0x01 line.word 0x00 "DCFG3,Dynamic Configuration RAM Register 3" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE8++0x01 line.word 0x00 "DCFG4,Dynamic Configuration RAM Register 4" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEA++0x01 line.word 0x00 "DCFG5,Dynamic Configuration RAM Register 5" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEC++0x01 line.word 0x00 "DCFG6,Dynamic Configuration RAM Register 6" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEE++0x01 line.word 0x00 "DCFG7,Dynamic Configuration RAM Register 7" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" width 0x0B tree.end tree "Route" width 9. group.byte 0x100++0x00 line.byte 0x00 "HC0,UDB Channel HC Tile Configuration" group.byte 0x101++0x00 line.byte 0x00 "HC1,UDB Channel HC Tile Configuration" group.byte 0x102++0x00 line.byte 0x00 "HC2,UDB Channel HC Tile Configuration" group.byte 0x103++0x00 line.byte 0x00 "HC3,UDB Channel HC Tile Configuration" group.byte 0x104++0x00 line.byte 0x00 "HC4,UDB Channel HC Tile Configuration" group.byte 0x105++0x00 line.byte 0x00 "HC5,UDB Channel HC Tile Configuration" group.byte 0x106++0x00 line.byte 0x00 "HC6,UDB Channel HC Tile Configuration" group.byte 0x107++0x00 line.byte 0x00 "HC7,UDB Channel HC Tile Configuration" group.byte 0x108++0x00 line.byte 0x00 "HC8,UDB Channel HC Tile Configuration" group.byte 0x109++0x00 line.byte 0x00 "HC9,UDB Channel HC Tile Configuration" group.byte 0x10A++0x00 line.byte 0x00 "HC10,UDB Channel HC Tile Configuration" group.byte 0x10B++0x00 line.byte 0x00 "HC11,UDB Channel HC Tile Configuration" group.byte 0x10C++0x00 line.byte 0x00 "HC12,UDB Channel HC Tile Configuration" group.byte 0x10D++0x00 line.byte 0x00 "HC13,UDB Channel HC Tile Configuration" group.byte 0x10E++0x00 line.byte 0x00 "HC14,UDB Channel HC Tile Configuration" group.byte 0x10F++0x00 line.byte 0x00 "HC15,UDB Channel HC Tile Configuration" group.byte 0x110++0x00 line.byte 0x00 "HC16,UDB Channel HC Tile Configuration" group.byte 0x111++0x00 line.byte 0x00 "HC17,UDB Channel HC Tile Configuration" group.byte 0x112++0x00 line.byte 0x00 "HC18,UDB Channel HC Tile Configuration" group.byte 0x113++0x00 line.byte 0x00 "HC19,UDB Channel HC Tile Configuration" group.byte 0x114++0x00 line.byte 0x00 "HC20,UDB Channel HC Tile Configuration" group.byte 0x115++0x00 line.byte 0x00 "HC21,UDB Channel HC Tile Configuration" group.byte 0x116++0x00 line.byte 0x00 "HC22,UDB Channel HC Tile Configuration" group.byte 0x117++0x00 line.byte 0x00 "HC23,UDB Channel HC Tile Configuration" group.byte 0x118++0x00 line.byte 0x00 "HC24,UDB Channel HC Tile Configuration" group.byte 0x119++0x00 line.byte 0x00 "HC25,UDB Channel HC Tile Configuration" group.byte 0x11A++0x00 line.byte 0x00 "HC26,UDB Channel HC Tile Configuration" group.byte 0x11B++0x00 line.byte 0x00 "HC27,UDB Channel HC Tile Configuration" group.byte 0x11C++0x00 line.byte 0x00 "HC28,UDB Channel HC Tile Configuration" group.byte 0x11D++0x00 line.byte 0x00 "HC29,UDB Channel HC Tile Configuration" group.byte 0x11E++0x00 line.byte 0x00 "HC30,UDB Channel HC Tile Configuration" group.byte 0x11F++0x00 line.byte 0x00 "HC31,UDB Channel HC Tile Configuration" group.byte 0x120++0x00 line.byte 0x00 "HC32,UDB Channel HC Tile Configuration" group.byte 0x121++0x00 line.byte 0x00 "HC33,UDB Channel HC Tile Configuration" group.byte 0x122++0x00 line.byte 0x00 "HC34,UDB Channel HC Tile Configuration" group.byte 0x123++0x00 line.byte 0x00 "HC35,UDB Channel HC Tile Configuration" group.byte 0x124++0x00 line.byte 0x00 "HC36,UDB Channel HC Tile Configuration" group.byte 0x125++0x00 line.byte 0x00 "HC37,UDB Channel HC Tile Configuration" group.byte 0x126++0x00 line.byte 0x00 "HC38,UDB Channel HC Tile Configuration" group.byte 0x127++0x00 line.byte 0x00 "HC39,UDB Channel HC Tile Configuration" group.byte 0x128++0x00 line.byte 0x00 "HC40,UDB Channel HC Tile Configuration" group.byte 0x129++0x00 line.byte 0x00 "HC41,UDB Channel HC Tile Configuration" group.byte 0x12A++0x00 line.byte 0x00 "HC42,UDB Channel HC Tile Configuration" group.byte 0x12B++0x00 line.byte 0x00 "HC43,UDB Channel HC Tile Configuration" group.byte 0x12C++0x00 line.byte 0x00 "HC44,UDB Channel HC Tile Configuration" group.byte 0x12D++0x00 line.byte 0x00 "HC45,UDB Channel HC Tile Configuration" group.byte 0x12E++0x00 line.byte 0x00 "HC46,UDB Channel HC Tile Configuration" group.byte 0x12F++0x00 line.byte 0x00 "HC47,UDB Channel HC Tile Configuration" group.byte 0x130++0x00 line.byte 0x00 "HC48,UDB Channel HC Tile Configuration" group.byte 0x131++0x00 line.byte 0x00 "HC49,UDB Channel HC Tile Configuration" group.byte 0x132++0x00 line.byte 0x00 "HC50,UDB Channel HC Tile Configuration" group.byte 0x133++0x00 line.byte 0x00 "HC51,UDB Channel HC Tile Configuration" group.byte 0x134++0x00 line.byte 0x00 "HC52,UDB Channel HC Tile Configuration" group.byte 0x135++0x00 line.byte 0x00 "HC53,UDB Channel HC Tile Configuration" group.byte 0x136++0x00 line.byte 0x00 "HC54,UDB Channel HC Tile Configuration" group.byte 0x137++0x00 line.byte 0x00 "HC55,UDB Channel HC Tile Configuration" group.byte 0x138++0x00 line.byte 0x00 "HC56,UDB Channel HC Tile Configuration" group.byte 0x139++0x00 line.byte 0x00 "HC57,UDB Channel HC Tile Configuration" group.byte 0x13A++0x00 line.byte 0x00 "HC58,UDB Channel HC Tile Configuration" group.byte 0x13B++0x00 line.byte 0x00 "HC59,UDB Channel HC Tile Configuration" group.byte 0x13C++0x00 line.byte 0x00 "HC60,UDB Channel HC Tile Configuration" group.byte 0x13D++0x00 line.byte 0x00 "HC61,UDB Channel HC Tile Configuration" group.byte 0x13E++0x00 line.byte 0x00 "HC62,UDB Channel HC Tile Configuration" group.byte 0x13F++0x00 line.byte 0x00 "HC63,UDB Channel HC Tile Configuration" group.byte 0x140++0x00 line.byte 0x00 "HC64,UDB Channel HC Tile Configuration" group.byte 0x141++0x00 line.byte 0x00 "HC65,UDB Channel HC Tile Configuration" group.byte 0x142++0x00 line.byte 0x00 "HC66,UDB Channel HC Tile Configuration" group.byte 0x143++0x00 line.byte 0x00 "HC67,UDB Channel HC Tile Configuration" group.byte 0x144++0x00 line.byte 0x00 "HC68,UDB Channel HC Tile Configuration" group.byte 0x145++0x00 line.byte 0x00 "HC69,UDB Channel HC Tile Configuration" group.byte 0x146++0x00 line.byte 0x00 "HC70,UDB Channel HC Tile Configuration" group.byte 0x147++0x00 line.byte 0x00 "HC71,UDB Channel HC Tile Configuration" group.byte 0x148++0x00 line.byte 0x00 "HC72,UDB Channel HC Tile Configuration" group.byte 0x149++0x00 line.byte 0x00 "HC73,UDB Channel HC Tile Configuration" group.byte 0x14A++0x00 line.byte 0x00 "HC74,UDB Channel HC Tile Configuration" group.byte 0x14B++0x00 line.byte 0x00 "HC75,UDB Channel HC Tile Configuration" group.byte 0x14C++0x00 line.byte 0x00 "HC76,UDB Channel HC Tile Configuration" group.byte 0x14D++0x00 line.byte 0x00 "HC77,UDB Channel HC Tile Configuration" group.byte 0x14E++0x00 line.byte 0x00 "HC78,UDB Channel HC Tile Configuration" group.byte 0x14F++0x00 line.byte 0x00 "HC79,UDB Channel HC Tile Configuration" group.byte 0x150++0x00 line.byte 0x00 "HC80,UDB Channel HC Tile Configuration" group.byte 0x151++0x00 line.byte 0x00 "HC81,UDB Channel HC Tile Configuration" group.byte 0x152++0x00 line.byte 0x00 "HC82,UDB Channel HC Tile Configuration" group.byte 0x153++0x00 line.byte 0x00 "HC83,UDB Channel HC Tile Configuration" group.byte 0x154++0x00 line.byte 0x00 "HC84,UDB Channel HC Tile Configuration" group.byte 0x155++0x00 line.byte 0x00 "HC85,UDB Channel HC Tile Configuration" group.byte 0x156++0x00 line.byte 0x00 "HC86,UDB Channel HC Tile Configuration" group.byte 0x157++0x00 line.byte 0x00 "HC87,UDB Channel HC Tile Configuration" group.byte 0x158++0x00 line.byte 0x00 "HC88,UDB Channel HC Tile Configuration" group.byte 0x159++0x00 line.byte 0x00 "HC89,UDB Channel HC Tile Configuration" group.byte 0x15A++0x00 line.byte 0x00 "HC90,UDB Channel HC Tile Configuration" group.byte 0x15B++0x00 line.byte 0x00 "HC91,UDB Channel HC Tile Configuration" group.byte 0x15C++0x00 line.byte 0x00 "HC92,UDB Channel HC Tile Configuration" group.byte 0x15D++0x00 line.byte 0x00 "HC93,UDB Channel HC Tile Configuration" group.byte 0x15E++0x00 line.byte 0x00 "HC94,UDB Channel HC Tile Configuration" group.byte 0x15F++0x00 line.byte 0x00 "HC95,UDB Channel HC Tile Configuration" group.byte 0x160++0x00 line.byte 0x00 "HC96,UDB Channel HC Tile Configuration" group.byte 0x161++0x00 line.byte 0x00 "HC97,UDB Channel HC Tile Configuration" group.byte 0x162++0x00 line.byte 0x00 "HC98,UDB Channel HC Tile Configuration" group.byte 0x163++0x00 line.byte 0x00 "HC99,UDB Channel HC Tile Configuration" group.byte 0x164++0x00 line.byte 0x00 "HC100,UDB Channel HC Tile Configuration" group.byte 0x165++0x00 line.byte 0x00 "HC101,UDB Channel HC Tile Configuration" group.byte 0x166++0x00 line.byte 0x00 "HC102,UDB Channel HC Tile Configuration" group.byte 0x167++0x00 line.byte 0x00 "HC103,UDB Channel HC Tile Configuration" group.byte 0x168++0x00 line.byte 0x00 "HC104,UDB Channel HC Tile Configuration" group.byte 0x169++0x00 line.byte 0x00 "HC105,UDB Channel HC Tile Configuration" group.byte 0x16A++0x00 line.byte 0x00 "HC106,UDB Channel HC Tile Configuration" group.byte 0x16B++0x00 line.byte 0x00 "HC107,UDB Channel HC Tile Configuration" group.byte 0x16C++0x00 line.byte 0x00 "HC108,UDB Channel HC Tile Configuration" group.byte 0x16D++0x00 line.byte 0x00 "HC109,UDB Channel HC Tile Configuration" group.byte 0x16E++0x00 line.byte 0x00 "HC110,UDB Channel HC Tile Configuration" group.byte 0x16F++0x00 line.byte 0x00 "HC111,UDB Channel HC Tile Configuration" group.byte 0x170++0x00 line.byte 0x00 "HC112,UDB Channel HC Tile Configuration" group.byte 0x171++0x00 line.byte 0x00 "HC113,UDB Channel HC Tile Configuration" group.byte 0x172++0x00 line.byte 0x00 "HC114,UDB Channel HC Tile Configuration" group.byte 0x173++0x00 line.byte 0x00 "HC115,UDB Channel HC Tile Configuration" group.byte 0x174++0x00 line.byte 0x00 "HC116,UDB Channel HC Tile Configuration" group.byte 0x175++0x00 line.byte 0x00 "HC117,UDB Channel HC Tile Configuration" group.byte 0x176++0x00 line.byte 0x00 "HC118,UDB Channel HC Tile Configuration" group.byte 0x177++0x00 line.byte 0x00 "HC119,UDB Channel HC Tile Configuration" group.byte 0x178++0x00 line.byte 0x00 "HC120,UDB Channel HC Tile Configuration" group.byte 0x179++0x00 line.byte 0x00 "HC121,UDB Channel HC Tile Configuration" group.byte 0x17A++0x00 line.byte 0x00 "HC122,UDB Channel HC Tile Configuration" group.byte 0x17B++0x00 line.byte 0x00 "HC123,UDB Channel HC Tile Configuration" group.byte 0x17C++0x00 line.byte 0x00 "HC124,UDB Channel HC Tile Configuration" group.byte 0x17D++0x00 line.byte 0x00 "HC125,UDB Channel HC Tile Configuration" group.byte 0x17E++0x00 line.byte 0x00 "HC126,UDB Channel HC Tile Configuration" group.byte 0x17F++0x00 line.byte 0x00 "HC127,UDB Channel HC Tile Configuration" group.byte 0x180++0x00 line.byte 0x00 "HV_L0,UDB Channel HV Tile Configuration" group.byte 0x181++0x00 line.byte 0x00 "HV_L1,UDB Channel HV Tile Configuration" group.byte 0x182++0x00 line.byte 0x00 "HV_L2,UDB Channel HV Tile Configuration" group.byte 0x183++0x00 line.byte 0x00 "HV_L3,UDB Channel HV Tile Configuration" group.byte 0x184++0x00 line.byte 0x00 "HV_L4,UDB Channel HV Tile Configuration" group.byte 0x185++0x00 line.byte 0x00 "HV_L5,UDB Channel HV Tile Configuration" group.byte 0x186++0x00 line.byte 0x00 "HV_L6,UDB Channel HV Tile Configuration" group.byte 0x187++0x00 line.byte 0x00 "HV_L7,UDB Channel HV Tile Configuration" group.byte 0x188++0x00 line.byte 0x00 "HV_L8,UDB Channel HV Tile Configuration" group.byte 0x189++0x00 line.byte 0x00 "HV_L9,UDB Channel HV Tile Configuration" group.byte 0x18A++0x00 line.byte 0x00 "HV_L10,UDB Channel HV Tile Configuration" group.byte 0x18B++0x00 line.byte 0x00 "HV_L11,UDB Channel HV Tile Configuration" group.byte 0x18C++0x00 line.byte 0x00 "HV_L12,UDB Channel HV Tile Configuration" group.byte 0x18D++0x00 line.byte 0x00 "HV_L13,UDB Channel HV Tile Configuration" group.byte 0x18E++0x00 line.byte 0x00 "HV_L14,UDB Channel HV Tile Configuration" group.byte 0x18F++0x00 line.byte 0x00 "HV_L15,UDB Channel HV Tile Configuration" group.byte 0x190++0x00 line.byte 0x00 "HS0,UDB Channel HS Tile Configuration" group.byte 0x191++0x00 line.byte 0x00 "HS1,UDB Channel HS Tile Configuration" group.byte 0x192++0x00 line.byte 0x00 "HS2,UDB Channel HS Tile Configuration" group.byte 0x193++0x00 line.byte 0x00 "HS3,UDB Channel HS Tile Configuration" group.byte 0x194++0x00 line.byte 0x00 "HS4,UDB Channel HS Tile Configuration" group.byte 0x195++0x00 line.byte 0x00 "HS5,UDB Channel HS Tile Configuration" group.byte 0x196++0x00 line.byte 0x00 "HS6,UDB Channel HS Tile Configuration" group.byte 0x197++0x00 line.byte 0x00 "HS7,UDB Channel HS Tile Configuration" group.byte 0x198++0x00 line.byte 0x00 "HS8,UDB Channel HS Tile Configuration" group.byte 0x199++0x00 line.byte 0x00 "HS9,UDB Channel HS Tile Configuration" group.byte 0x19A++0x00 line.byte 0x00 "HS10,UDB Channel HS Tile Configuration" group.byte 0x19B++0x00 line.byte 0x00 "HS11,UDB Channel HS Tile Configuration" group.byte 0x19C++0x00 line.byte 0x00 "HS12,UDB Channel HS Tile Configuration" group.byte 0x19D++0x00 line.byte 0x00 "HS13,UDB Channel HS Tile Configuration" group.byte 0x19E++0x00 line.byte 0x00 "HS14,UDB Channel HS Tile Configuration" group.byte 0x19F++0x00 line.byte 0x00 "HS15,UDB Channel HS Tile Configuration" group.byte 0x1A0++0x00 line.byte 0x00 "HS16,UDB Channel HS Tile Configuration" group.byte 0x1A1++0x00 line.byte 0x00 "HS17,UDB Channel HS Tile Configuration" group.byte 0x1A2++0x00 line.byte 0x00 "HS18,UDB Channel HS Tile Configuration" group.byte 0x1A3++0x00 line.byte 0x00 "HS19,UDB Channel HS Tile Configuration" group.byte 0x1A4++0x00 line.byte 0x00 "HS20,UDB Channel HS Tile Configuration" group.byte 0x1A5++0x00 line.byte 0x00 "HS21,UDB Channel HS Tile Configuration" group.byte 0x1A6++0x00 line.byte 0x00 "HS22,UDB Channel HS Tile Configuration" group.byte 0x1A7++0x00 line.byte 0x00 "HS23,UDB Channel HS Tile Configuration" group.byte 0x1A8++0x00 line.byte 0x00 "HV_R0,UDB Channel HV Tile Configuration" group.byte 0x1A9++0x00 line.byte 0x00 "HV_R1,UDB Channel HV Tile Configuration" group.byte 0x1AA++0x00 line.byte 0x00 "HV_R2,UDB Channel HV Tile Configuration" group.byte 0x1AB++0x00 line.byte 0x00 "HV_R3,UDB Channel HV Tile Configuration" group.byte 0x1AC++0x00 line.byte 0x00 "HV_R4,UDB Channel HV Tile Configuration" group.byte 0x1AD++0x00 line.byte 0x00 "HV_R5,UDB Channel HV Tile Configuration" group.byte 0x1AE++0x00 line.byte 0x00 "HV_R6,UDB Channel HV Tile Configuration" group.byte 0x1AF++0x00 line.byte 0x00 "HV_R7,UDB Channel HV Tile Configuration" group.byte 0x1B0++0x00 line.byte 0x00 "HV_R8,UDB Channel HV Tile Configuration" group.byte 0x1B1++0x00 line.byte 0x00 "HV_R9,UDB Channel HV Tile Configuration" group.byte 0x1B2++0x00 line.byte 0x00 "HV_R10,UDB Channel HV Tile Configuration" group.byte 0x1B3++0x00 line.byte 0x00 "HV_R11,UDB Channel HV Tile Configuration" group.byte 0x1B4++0x00 line.byte 0x00 "HV_R12,UDB Channel HV Tile Configuration" group.byte 0x1B5++0x00 line.byte 0x00 "HV_R13,UDB Channel HV Tile Configuration" group.byte 0x1B6++0x00 line.byte 0x00 "HV_R14,UDB Channel HV Tile Configuration" group.byte 0x1B7++0x00 line.byte 0x00 "HV_R15,UDB Channel HV Tile Configuration" group.byte 0x1C0++0x00 line.byte 0x00 "PLD0IN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1C2++0x00 line.byte 0x00 "PLD0IN1,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1C4++0x00 line.byte 0x00 "PLD0IN2,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CA++0x00 line.byte 0x00 "PLD1IN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CC++0x00 line.byte 0x00 "PLD1IN1,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CE++0x00 line.byte 0x00 "PLD1IN2,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d0++0x00 line.byte 0x00 "DPIN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d2++0x00 line.byte 0x00 "DPIN1,UDB Channel PI Tile Configuration (half populated)" hexmask.byte 0x00 4.--5. 1. " PI_BOT ,RAM configuration for BOTTOM UDB port interface configuration" hexmask.byte 0x00 2.--3. 1. " PI_TOP ,RAM configuration for TOP UDB port interface configuration" group.byte 0x1d6++0x00 line.byte 0x00 "SCIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d8++0x00 line.byte 0x00 "SCIOIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1de++0x00 line.byte 0x00 "RCIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1E0++0x00 line.byte 0x00 "VS0,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E2++0x00 line.byte 0x00 "VS1,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E4++0x00 line.byte 0x00 "VS2,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E6++0x00 line.byte 0x00 "VS3,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E8++0x00 line.byte 0x00 "VS4,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EA++0x00 line.byte 0x00 "VS5,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EC++0x00 line.byte 0x00 "VS6,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EE++0x00 line.byte 0x00 "VS7,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" width 0x0B tree.end tree.end base ad:(0x40011000+0x600) tree "P 3" tree "U 0" width 18. group.long 0x0++0x03 line.long 0x00 "PLD_IT0,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT0C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT0C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x4++0x03 line.long 0x00 "PLD_IT1,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT1C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT1C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x8++0x03 line.long 0x00 "PLD_IT2,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT2C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT2C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xC++0x03 line.long 0x00 "PLD_IT3,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT3C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT3C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x10++0x03 line.long 0x00 "PLD_IT4,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT4C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT4C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x14++0x03 line.long 0x00 "PLD_IT5,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT5C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT5C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x18++0x03 line.long 0x00 "PLD_IT6,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT6C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT6C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x1C++0x03 line.long 0x00 "PLD_IT7,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT7C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT7C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x20++0x03 line.long 0x00 "PLD_IT8,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT8C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT8C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x24++0x03 line.long 0x00 "PLD_IT9,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT9C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT9C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x28++0x03 line.long 0x00 "PLD_IT10,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT10C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT10C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x2C++0x03 line.long 0x00 "PLD_IT11,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " group.word 0x30++0x01 line.word 0x00 "PLD_ORT0,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT0_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT0_0 ,OR term" "Not OR,OR" group.word 0x32++0x01 line.word 0x00 "PLD_ORT1,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT1_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT1_0 ,OR term" "Not OR,OR" group.word 0x34++0x01 line.word 0x00 "PLD_ORT2,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT2_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT2_0 ,OR term" "Not OR,OR" group.word 0x36++0x01 line.word 0x00 "PLD_ORT3,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " group.word (0x30+0x08)++0x07 line.word 0x00 "MC_CFG_CEN_CONST,Macrocell Configuration for Carry Enable and Constant" bitfld.word 0x00 15. " PLD1_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 14. " PLD1_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 13. " PLD1_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 12. " PLD1_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " PLD1_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 10. " PLD1_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " PLD1_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 8. " PLD1_MC0_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " PLD0_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 6. " PLD0_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " PLD0_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 4. " PLD0_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " PLD0_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 2. " PLD0_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " PLD0_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 0. " PLD0_MC0_CEN ,Carry enable" "Disabled,Enabled" line.word 0x02 "MC_CFG_XORFB,Macrocell Configuration for XOR Feedback" bitfld.word 0x02 14.--15. " PLD1_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 12.--13. " PLD1_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 10.--11. " PLD1_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 8.--9. " PLD1_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 6.--7. " PLD0_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 4.--5. " PLD0_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 2.--3. " PLD0_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 0.--1. " PLD0_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" line.word 0x04 "MC_CFG_SET_RESET,Macrocell Configuration for Set and Reset" bitfld.word 0x04 15. " PLD1_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 14. " PLD1_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 13. " PLD1_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 12. " PLD1_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 11. " PLD1_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 10. " PLD1_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 9. " PLD1_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 8. " PLD1_MC0_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 7. " PLD0_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 6. " PLD0_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 5. " PLD0_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 4. " PLD0_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 3. " PLD0_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 2. " PLD0_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 1. " PLD0_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 0. " PLD0_MC0_SET_SEL ,Set select enable" "Not set,Set" line.word 0x06 "MC_CFG_BYPASS,Macrocell Configuration for Bypass" bitfld.word 0x06 14. " PLD1_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 12. " PLD1_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 10. " PLD1_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 8. " PLD1_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 6. " PLD0_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 4. " PLD0_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 2. " PLD0_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 0. " PLD0_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " group.byte (0x30+0x10)++0x10 line.byte 0x00 "CFG0,Datapath Input Selection" bitfld.byte 0x00 4.--6. " RAD1 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x00 0.--2. " RAD0 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x01 "CFG1,Datapath Input Selection" bitfld.byte 0x01 0.--2. " RAD2 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x02 "CFG2,Datapath Input Selection" bitfld.byte 0x02 4.--6. " F1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x02 0.--2. " F0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x03 "CFG3,Datapath Input Selection" bitfld.byte 0x03 4.--6. " D1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x03 0.--2. " D0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x04 "CFG4,Datapath Input Selection" bitfld.byte 0x04 4.--6. " CI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x04 0.--2. " SI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x05 "CFG5,Datapath Output Selection" bitfld.byte 0x05 4.--7. " OUT1 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x05 0.--3. " OUT0 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x06 "CFG6,Datapath Output Selection" bitfld.byte 0x06 4.--7. " OUT3 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x06 0.--3. " OUT2 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x07 "CFG7,Datapath Output Selection" bitfld.byte 0x07 4.--7. " OUT5 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x07 0.--3. " OUT4 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x08 "CFG8,Datapath Output Synchronization" hexmask.byte 0x08 0.--5. 1. " OUT_SYNC ,Output Synchronization field" line.byte 0x09 "CFG9,ALU Mask" line.byte 0x0a "CFG10,Compare 0 Mask" line.byte 0x0b "CFG11,Compare 1 Mask" line.byte 0x0c "CFG12,Datapath Static Configuration" bitfld.byte 0x0c 7. " CMASK1_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 6. " CMASK0_EN ,Datapath mask enable" "Disabled,Enabled" textline " " bitfld.byte 0x0c 5. " AMASK_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 4. " DEF_SI ,Datapath default shift value" "0,1" textline " " bitfld.byte 0x0c 2.--3. " SI_SELB ,Datapath shift in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0c 0.--1. " SI_SELA ,Datapath shift in source select" "Default,Registered,Route,Chain" line.byte 0x0d "CFG13,Datapath Static Configuration" bitfld.byte 0x0d 6.--7. " CMP_SELB ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" bitfld.byte 0x0d 4.--5. " CMP_SELA ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" textline " " bitfld.byte 0x0d 2.--3. " CI_SELB ,Datapath carry in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0d 0.--1. " CI_SELA ,Datapath carry in source select" "Default,Registered,Route,Chain" line.byte 0x0e "CFG14,Datapath Static Configuration" bitfld.byte 0x0e 7. " MSB_EN ,Datapath MSB selection enable" "Disabled,Enabled" bitfld.byte 0x0e 4.--6. " MSB_SEL ,Datapath MSB Selection" "Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7" textline " " bitfld.byte 0x0e 3. " CHAIN_CMSB ,Datapath CRC MSB chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 2. " CHAIN_FB ,Datapath CRC feedback chaining enable" "Disabled,Enabled" textline " " bitfld.byte 0x0e 1. " CHAIN1 ,Datapath condition chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 0. " CHAIN0 ,Datapath condition chaining enable" "Disabled,Enabled" line.byte 0x0f "CFG15,Datapath Static Configuration" bitfld.byte 0x0f 7. " PI_SEL ,Datapath parallel input selection" "Normal,Parallel" bitfld.byte 0x0f 6. " SHIFT_SEL ,Datapath shift out selection" "SOL_MSB,SOR" textline " " bitfld.byte 0x0f 5. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x0f 4. " NC0 ,Spare register bit" "0,1" textline " " bitfld.byte 0x0f 2.--3. " F1_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" bitfld.byte 0x0f 0.--1. " F0_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" line.byte 0x10 "CFG16,Datapath Static Configuration" bitfld.byte 0x10 7. " F1_CK_INV ,FIFO Clock Invert" "Normal,Inverted" bitfld.byte 0x10 6. " F0_CK_INV ,FIFO Clock Invert" "Normal,Inverted" textline " " bitfld.byte 0x10 5. " FIFO_FAST ,FIFO Fast Mode" "Disabled,Enabled" bitfld.byte 0x10 4. " FIFO_CAP ,FIFO Software Capture Mode" "Disabled,Enabled" textline " " bitfld.byte 0x10 3. " FIFO_EDGE ,Edge/level sensitive FIFO write control" "Level,Edge" bitfld.byte 0x10 2. " FIFO_ASYNC ,Asynchronous FIFO clocking support" "Synchronous,Asynchronous" textline " " bitfld.byte 0x10 1. " EXT_CRCPRS ,External CRC/PRS mode" "Internal,External" bitfld.byte 0x10 0. " WRK16_CONCAT ,Datapath register access mode" "Default,Concatenate" group.byte (0x30+0x24)++0x03 line.byte 0x00 "CFG20,Status input mode selection" line.byte 0x01 "CFG21,Spare register bits" bitfld.byte 0x01 1. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x01 0. " NC0 ,Spare register bit" "0,1" line.byte 0x02 "CFG22,Status Output Control" bitfld.byte 0x02 3. " SC_SYNC_MD ,SC Sync Mode" "Disabled,Enabled" bitfld.byte 0x02 2. " SC_INT_MD ,SC Interrupt Mode" "Normal,INT_MODE" textline " " bitfld.byte 0x02 0.--1. " SC_OUT_CTL ,Selects the output source for the Status and Control routing connections" "Control,Parallel,Counter,?..." line.byte 0x03 "CFG23,Counter Routing Control" bitfld.byte 0x03 5. " ROUTE_EN ,Configure the counter enable signal for routing input" "Disabled,Enabled" bitfld.byte 0x03 4. " ROUTE_LD ,Configure the counter load signal for routing input" "Disabled,Enabled" textline " " bitfld.byte 0x03 2.--3. " CNT_EN_SEL ,Selects the routing inputs for the counter enable signal" "SC_IN4,SC_IN5,SC_IN6,SC_IO" bitfld.byte 0x03 0.--1. " CNT_LD_SEL ,Selects the routing inputs for the counter load signal" "SC_IN0,SC_IN1,SC_IN2,SC_IN3" group.byte (0x30+0x28)++0x00 line.byte 0x00 "CFG24,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x29)++0x00 line.byte 0x00 "CFG25,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2A)++0x00 line.byte 0x00 "CFG26,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2B)++0x00 line.byte 0x00 "CFG27,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2C)++0x03 line.byte 0x00 "CFG28,Clock Selection" bitfld.byte 0x00 4.--7. " PLD1_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x00 0.--3. " PLD0_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x01 "CFG29,Clock Selection" bitfld.byte 0x01 4.--7. " SC_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x01 0.--3. " DP_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x02 "CFG30,Reset Selection Register" bitfld.byte 0x02 4. " GUDB_WR ,Enable global write operation for the configuration and working registers in this UDB" "Disabled,Enabled" bitfld.byte 0x02 3. " EN_RES_CNT ,Enable routed reset to counter/control register" "Disabled,Enabled" textline " " bitfld.byte 0x02 2. " RES_POL ,Select polarity of the routed reset control" "Not inverted,Inverted" bitfld.byte 0x02 0.--1. " RES_SEL ,Select routing input for routed reset control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" line.byte 0x03 "CFG31,Reset and Clock Input Enable" bitfld.byte 0x03 4.--5. " EXT_CK_SEL ,External clock selection" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" bitfld.byte 0x03 1. " EXT_SYNC ,Enable synchronization of selected external clock" "Disabled,Enabled" textline " " bitfld.byte 0x03 0. " NC0 ,Spare register bit" "0,1" group.word 0x60++0x01 line.word 0x00 "DCFG0,Dynamic Configuration RAM Register 0" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x62++0x01 line.word 0x00 "DCFG1,Dynamic Configuration RAM Register 1" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x64++0x01 line.word 0x00 "DCFG2,Dynamic Configuration RAM Register 2" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x66++0x01 line.word 0x00 "DCFG3,Dynamic Configuration RAM Register 3" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x68++0x01 line.word 0x00 "DCFG4,Dynamic Configuration RAM Register 4" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6A++0x01 line.word 0x00 "DCFG5,Dynamic Configuration RAM Register 5" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6C++0x01 line.word 0x00 "DCFG6,Dynamic Configuration RAM Register 6" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6E++0x01 line.word 0x00 "DCFG7,Dynamic Configuration RAM Register 7" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" width 0x0B tree.end tree "U 1" width 18. group.long 0x80++0x03 line.long 0x00 "PLD_IT0,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT0C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT0C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x84++0x03 line.long 0x00 "PLD_IT1,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT1C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT1C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x88++0x03 line.long 0x00 "PLD_IT2,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT2C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT2C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x8C++0x03 line.long 0x00 "PLD_IT3,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT3C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT3C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x90++0x03 line.long 0x00 "PLD_IT4,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT4C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT4C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x94++0x03 line.long 0x00 "PLD_IT5,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT5C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT5C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x98++0x03 line.long 0x00 "PLD_IT6,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT6C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT6C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x9C++0x03 line.long 0x00 "PLD_IT7,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT7C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT7C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA0++0x03 line.long 0x00 "PLD_IT8,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT8C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT8C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA4++0x03 line.long 0x00 "PLD_IT9,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT9C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT9C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA8++0x03 line.long 0x00 "PLD_IT10,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT10C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT10C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xAC++0x03 line.long 0x00 "PLD_IT11,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " group.word 0xB0++0x01 line.word 0x00 "PLD_ORT0,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT0_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT0_0 ,OR term" "Not OR,OR" group.word 0xB2++0x01 line.word 0x00 "PLD_ORT1,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT1_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT1_0 ,OR term" "Not OR,OR" group.word 0xB4++0x01 line.word 0x00 "PLD_ORT2,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT2_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT2_0 ,OR term" "Not OR,OR" group.word 0xB6++0x01 line.word 0x00 "PLD_ORT3,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " group.word (0xB0+0x08)++0x07 line.word 0x00 "MC_CFG_CEN_CONST,Macrocell Configuration for Carry Enable and Constant" bitfld.word 0x00 15. " PLD1_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 14. " PLD1_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 13. " PLD1_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 12. " PLD1_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " PLD1_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 10. " PLD1_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " PLD1_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 8. " PLD1_MC0_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " PLD0_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 6. " PLD0_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " PLD0_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 4. " PLD0_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " PLD0_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 2. " PLD0_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " PLD0_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 0. " PLD0_MC0_CEN ,Carry enable" "Disabled,Enabled" line.word 0x02 "MC_CFG_XORFB,Macrocell Configuration for XOR Feedback" bitfld.word 0x02 14.--15. " PLD1_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 12.--13. " PLD1_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 10.--11. " PLD1_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 8.--9. " PLD1_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 6.--7. " PLD0_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 4.--5. " PLD0_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 2.--3. " PLD0_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 0.--1. " PLD0_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" line.word 0x04 "MC_CFG_SET_RESET,Macrocell Configuration for Set and Reset" bitfld.word 0x04 15. " PLD1_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 14. " PLD1_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 13. " PLD1_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 12. " PLD1_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 11. " PLD1_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 10. " PLD1_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 9. " PLD1_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 8. " PLD1_MC0_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 7. " PLD0_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 6. " PLD0_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 5. " PLD0_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 4. " PLD0_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 3. " PLD0_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 2. " PLD0_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 1. " PLD0_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 0. " PLD0_MC0_SET_SEL ,Set select enable" "Not set,Set" line.word 0x06 "MC_CFG_BYPASS,Macrocell Configuration for Bypass" bitfld.word 0x06 14. " PLD1_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 12. " PLD1_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 10. " PLD1_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 8. " PLD1_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 6. " PLD0_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 4. " PLD0_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 2. " PLD0_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 0. " PLD0_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " group.byte (0xB0+0x10)++0x10 line.byte 0x00 "CFG0,Datapath Input Selection" bitfld.byte 0x00 4.--6. " RAD1 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x00 0.--2. " RAD0 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x01 "CFG1,Datapath Input Selection" bitfld.byte 0x01 0.--2. " RAD2 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x02 "CFG2,Datapath Input Selection" bitfld.byte 0x02 4.--6. " F1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x02 0.--2. " F0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x03 "CFG3,Datapath Input Selection" bitfld.byte 0x03 4.--6. " D1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x03 0.--2. " D0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x04 "CFG4,Datapath Input Selection" bitfld.byte 0x04 4.--6. " CI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x04 0.--2. " SI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x05 "CFG5,Datapath Output Selection" bitfld.byte 0x05 4.--7. " OUT1 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x05 0.--3. " OUT0 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x06 "CFG6,Datapath Output Selection" bitfld.byte 0x06 4.--7. " OUT3 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x06 0.--3. " OUT2 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x07 "CFG7,Datapath Output Selection" bitfld.byte 0x07 4.--7. " OUT5 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x07 0.--3. " OUT4 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x08 "CFG8,Datapath Output Synchronization" hexmask.byte 0x08 0.--5. 1. " OUT_SYNC ,Output Synchronization field" line.byte 0x09 "CFG9,ALU Mask" line.byte 0x0a "CFG10,Compare 0 Mask" line.byte 0x0b "CFG11,Compare 1 Mask" line.byte 0x0c "CFG12,Datapath Static Configuration" bitfld.byte 0x0c 7. " CMASK1_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 6. " CMASK0_EN ,Datapath mask enable" "Disabled,Enabled" textline " " bitfld.byte 0x0c 5. " AMASK_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 4. " DEF_SI ,Datapath default shift value" "0,1" textline " " bitfld.byte 0x0c 2.--3. " SI_SELB ,Datapath shift in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0c 0.--1. " SI_SELA ,Datapath shift in source select" "Default,Registered,Route,Chain" line.byte 0x0d "CFG13,Datapath Static Configuration" bitfld.byte 0x0d 6.--7. " CMP_SELB ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" bitfld.byte 0x0d 4.--5. " CMP_SELA ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" textline " " bitfld.byte 0x0d 2.--3. " CI_SELB ,Datapath carry in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0d 0.--1. " CI_SELA ,Datapath carry in source select" "Default,Registered,Route,Chain" line.byte 0x0e "CFG14,Datapath Static Configuration" bitfld.byte 0x0e 7. " MSB_EN ,Datapath MSB selection enable" "Disabled,Enabled" bitfld.byte 0x0e 4.--6. " MSB_SEL ,Datapath MSB Selection" "Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7" textline " " bitfld.byte 0x0e 3. " CHAIN_CMSB ,Datapath CRC MSB chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 2. " CHAIN_FB ,Datapath CRC feedback chaining enable" "Disabled,Enabled" textline " " bitfld.byte 0x0e 1. " CHAIN1 ,Datapath condition chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 0. " CHAIN0 ,Datapath condition chaining enable" "Disabled,Enabled" line.byte 0x0f "CFG15,Datapath Static Configuration" bitfld.byte 0x0f 7. " PI_SEL ,Datapath parallel input selection" "Normal,Parallel" bitfld.byte 0x0f 6. " SHIFT_SEL ,Datapath shift out selection" "SOL_MSB,SOR" textline " " bitfld.byte 0x0f 5. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x0f 4. " NC0 ,Spare register bit" "0,1" textline " " bitfld.byte 0x0f 2.--3. " F1_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" bitfld.byte 0x0f 0.--1. " F0_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" line.byte 0x10 "CFG16,Datapath Static Configuration" bitfld.byte 0x10 7. " F1_CK_INV ,FIFO Clock Invert" "Normal,Inverted" bitfld.byte 0x10 6. " F0_CK_INV ,FIFO Clock Invert" "Normal,Inverted" textline " " bitfld.byte 0x10 5. " FIFO_FAST ,FIFO Fast Mode" "Disabled,Enabled" bitfld.byte 0x10 4. " FIFO_CAP ,FIFO Software Capture Mode" "Disabled,Enabled" textline " " bitfld.byte 0x10 3. " FIFO_EDGE ,Edge/level sensitive FIFO write control" "Level,Edge" bitfld.byte 0x10 2. " FIFO_ASYNC ,Asynchronous FIFO clocking support" "Synchronous,Asynchronous" textline " " bitfld.byte 0x10 1. " EXT_CRCPRS ,External CRC/PRS mode" "Internal,External" bitfld.byte 0x10 0. " WRK16_CONCAT ,Datapath register access mode" "Default,Concatenate" group.byte (0xB0+0x24)++0x03 line.byte 0x00 "CFG20,Status input mode selection" line.byte 0x01 "CFG21,Spare register bits" bitfld.byte 0x01 1. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x01 0. " NC0 ,Spare register bit" "0,1" line.byte 0x02 "CFG22,Status Output Control" bitfld.byte 0x02 3. " SC_SYNC_MD ,SC Sync Mode" "Disabled,Enabled" bitfld.byte 0x02 2. " SC_INT_MD ,SC Interrupt Mode" "Normal,INT_MODE" textline " " bitfld.byte 0x02 0.--1. " SC_OUT_CTL ,Selects the output source for the Status and Control routing connections" "Control,Parallel,Counter,?..." line.byte 0x03 "CFG23,Counter Routing Control" bitfld.byte 0x03 5. " ROUTE_EN ,Configure the counter enable signal for routing input" "Disabled,Enabled" bitfld.byte 0x03 4. " ROUTE_LD ,Configure the counter load signal for routing input" "Disabled,Enabled" textline " " bitfld.byte 0x03 2.--3. " CNT_EN_SEL ,Selects the routing inputs for the counter enable signal" "SC_IN4,SC_IN5,SC_IN6,SC_IO" bitfld.byte 0x03 0.--1. " CNT_LD_SEL ,Selects the routing inputs for the counter load signal" "SC_IN0,SC_IN1,SC_IN2,SC_IN3" group.byte (0xB0+0x28)++0x00 line.byte 0x00 "CFG24,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x29)++0x00 line.byte 0x00 "CFG25,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2A)++0x00 line.byte 0x00 "CFG26,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2B)++0x00 line.byte 0x00 "CFG27,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2C)++0x03 line.byte 0x00 "CFG28,Clock Selection" bitfld.byte 0x00 4.--7. " PLD1_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x00 0.--3. " PLD0_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x01 "CFG29,Clock Selection" bitfld.byte 0x01 4.--7. " SC_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x01 0.--3. " DP_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x02 "CFG30,Reset Selection Register" bitfld.byte 0x02 4. " GUDB_WR ,Enable global write operation for the configuration and working registers in this UDB" "Disabled,Enabled" bitfld.byte 0x02 3. " EN_RES_CNT ,Enable routed reset to counter/control register" "Disabled,Enabled" textline " " bitfld.byte 0x02 2. " RES_POL ,Select polarity of the routed reset control" "Not inverted,Inverted" bitfld.byte 0x02 0.--1. " RES_SEL ,Select routing input for routed reset control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" line.byte 0x03 "CFG31,Reset and Clock Input Enable" bitfld.byte 0x03 4.--5. " EXT_CK_SEL ,External clock selection" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" bitfld.byte 0x03 1. " EXT_SYNC ,Enable synchronization of selected external clock" "Disabled,Enabled" textline " " bitfld.byte 0x03 0. " NC0 ,Spare register bit" "0,1" group.word 0xE0++0x01 line.word 0x00 "DCFG0,Dynamic Configuration RAM Register 0" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE2++0x01 line.word 0x00 "DCFG1,Dynamic Configuration RAM Register 1" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE4++0x01 line.word 0x00 "DCFG2,Dynamic Configuration RAM Register 2" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE6++0x01 line.word 0x00 "DCFG3,Dynamic Configuration RAM Register 3" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE8++0x01 line.word 0x00 "DCFG4,Dynamic Configuration RAM Register 4" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEA++0x01 line.word 0x00 "DCFG5,Dynamic Configuration RAM Register 5" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEC++0x01 line.word 0x00 "DCFG6,Dynamic Configuration RAM Register 6" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEE++0x01 line.word 0x00 "DCFG7,Dynamic Configuration RAM Register 7" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" width 0x0B tree.end tree "Route" width 9. group.byte 0x100++0x00 line.byte 0x00 "HC0,UDB Channel HC Tile Configuration" group.byte 0x101++0x00 line.byte 0x00 "HC1,UDB Channel HC Tile Configuration" group.byte 0x102++0x00 line.byte 0x00 "HC2,UDB Channel HC Tile Configuration" group.byte 0x103++0x00 line.byte 0x00 "HC3,UDB Channel HC Tile Configuration" group.byte 0x104++0x00 line.byte 0x00 "HC4,UDB Channel HC Tile Configuration" group.byte 0x105++0x00 line.byte 0x00 "HC5,UDB Channel HC Tile Configuration" group.byte 0x106++0x00 line.byte 0x00 "HC6,UDB Channel HC Tile Configuration" group.byte 0x107++0x00 line.byte 0x00 "HC7,UDB Channel HC Tile Configuration" group.byte 0x108++0x00 line.byte 0x00 "HC8,UDB Channel HC Tile Configuration" group.byte 0x109++0x00 line.byte 0x00 "HC9,UDB Channel HC Tile Configuration" group.byte 0x10A++0x00 line.byte 0x00 "HC10,UDB Channel HC Tile Configuration" group.byte 0x10B++0x00 line.byte 0x00 "HC11,UDB Channel HC Tile Configuration" group.byte 0x10C++0x00 line.byte 0x00 "HC12,UDB Channel HC Tile Configuration" group.byte 0x10D++0x00 line.byte 0x00 "HC13,UDB Channel HC Tile Configuration" group.byte 0x10E++0x00 line.byte 0x00 "HC14,UDB Channel HC Tile Configuration" group.byte 0x10F++0x00 line.byte 0x00 "HC15,UDB Channel HC Tile Configuration" group.byte 0x110++0x00 line.byte 0x00 "HC16,UDB Channel HC Tile Configuration" group.byte 0x111++0x00 line.byte 0x00 "HC17,UDB Channel HC Tile Configuration" group.byte 0x112++0x00 line.byte 0x00 "HC18,UDB Channel HC Tile Configuration" group.byte 0x113++0x00 line.byte 0x00 "HC19,UDB Channel HC Tile Configuration" group.byte 0x114++0x00 line.byte 0x00 "HC20,UDB Channel HC Tile Configuration" group.byte 0x115++0x00 line.byte 0x00 "HC21,UDB Channel HC Tile Configuration" group.byte 0x116++0x00 line.byte 0x00 "HC22,UDB Channel HC Tile Configuration" group.byte 0x117++0x00 line.byte 0x00 "HC23,UDB Channel HC Tile Configuration" group.byte 0x118++0x00 line.byte 0x00 "HC24,UDB Channel HC Tile Configuration" group.byte 0x119++0x00 line.byte 0x00 "HC25,UDB Channel HC Tile Configuration" group.byte 0x11A++0x00 line.byte 0x00 "HC26,UDB Channel HC Tile Configuration" group.byte 0x11B++0x00 line.byte 0x00 "HC27,UDB Channel HC Tile Configuration" group.byte 0x11C++0x00 line.byte 0x00 "HC28,UDB Channel HC Tile Configuration" group.byte 0x11D++0x00 line.byte 0x00 "HC29,UDB Channel HC Tile Configuration" group.byte 0x11E++0x00 line.byte 0x00 "HC30,UDB Channel HC Tile Configuration" group.byte 0x11F++0x00 line.byte 0x00 "HC31,UDB Channel HC Tile Configuration" group.byte 0x120++0x00 line.byte 0x00 "HC32,UDB Channel HC Tile Configuration" group.byte 0x121++0x00 line.byte 0x00 "HC33,UDB Channel HC Tile Configuration" group.byte 0x122++0x00 line.byte 0x00 "HC34,UDB Channel HC Tile Configuration" group.byte 0x123++0x00 line.byte 0x00 "HC35,UDB Channel HC Tile Configuration" group.byte 0x124++0x00 line.byte 0x00 "HC36,UDB Channel HC Tile Configuration" group.byte 0x125++0x00 line.byte 0x00 "HC37,UDB Channel HC Tile Configuration" group.byte 0x126++0x00 line.byte 0x00 "HC38,UDB Channel HC Tile Configuration" group.byte 0x127++0x00 line.byte 0x00 "HC39,UDB Channel HC Tile Configuration" group.byte 0x128++0x00 line.byte 0x00 "HC40,UDB Channel HC Tile Configuration" group.byte 0x129++0x00 line.byte 0x00 "HC41,UDB Channel HC Tile Configuration" group.byte 0x12A++0x00 line.byte 0x00 "HC42,UDB Channel HC Tile Configuration" group.byte 0x12B++0x00 line.byte 0x00 "HC43,UDB Channel HC Tile Configuration" group.byte 0x12C++0x00 line.byte 0x00 "HC44,UDB Channel HC Tile Configuration" group.byte 0x12D++0x00 line.byte 0x00 "HC45,UDB Channel HC Tile Configuration" group.byte 0x12E++0x00 line.byte 0x00 "HC46,UDB Channel HC Tile Configuration" group.byte 0x12F++0x00 line.byte 0x00 "HC47,UDB Channel HC Tile Configuration" group.byte 0x130++0x00 line.byte 0x00 "HC48,UDB Channel HC Tile Configuration" group.byte 0x131++0x00 line.byte 0x00 "HC49,UDB Channel HC Tile Configuration" group.byte 0x132++0x00 line.byte 0x00 "HC50,UDB Channel HC Tile Configuration" group.byte 0x133++0x00 line.byte 0x00 "HC51,UDB Channel HC Tile Configuration" group.byte 0x134++0x00 line.byte 0x00 "HC52,UDB Channel HC Tile Configuration" group.byte 0x135++0x00 line.byte 0x00 "HC53,UDB Channel HC Tile Configuration" group.byte 0x136++0x00 line.byte 0x00 "HC54,UDB Channel HC Tile Configuration" group.byte 0x137++0x00 line.byte 0x00 "HC55,UDB Channel HC Tile Configuration" group.byte 0x138++0x00 line.byte 0x00 "HC56,UDB Channel HC Tile Configuration" group.byte 0x139++0x00 line.byte 0x00 "HC57,UDB Channel HC Tile Configuration" group.byte 0x13A++0x00 line.byte 0x00 "HC58,UDB Channel HC Tile Configuration" group.byte 0x13B++0x00 line.byte 0x00 "HC59,UDB Channel HC Tile Configuration" group.byte 0x13C++0x00 line.byte 0x00 "HC60,UDB Channel HC Tile Configuration" group.byte 0x13D++0x00 line.byte 0x00 "HC61,UDB Channel HC Tile Configuration" group.byte 0x13E++0x00 line.byte 0x00 "HC62,UDB Channel HC Tile Configuration" group.byte 0x13F++0x00 line.byte 0x00 "HC63,UDB Channel HC Tile Configuration" group.byte 0x140++0x00 line.byte 0x00 "HC64,UDB Channel HC Tile Configuration" group.byte 0x141++0x00 line.byte 0x00 "HC65,UDB Channel HC Tile Configuration" group.byte 0x142++0x00 line.byte 0x00 "HC66,UDB Channel HC Tile Configuration" group.byte 0x143++0x00 line.byte 0x00 "HC67,UDB Channel HC Tile Configuration" group.byte 0x144++0x00 line.byte 0x00 "HC68,UDB Channel HC Tile Configuration" group.byte 0x145++0x00 line.byte 0x00 "HC69,UDB Channel HC Tile Configuration" group.byte 0x146++0x00 line.byte 0x00 "HC70,UDB Channel HC Tile Configuration" group.byte 0x147++0x00 line.byte 0x00 "HC71,UDB Channel HC Tile Configuration" group.byte 0x148++0x00 line.byte 0x00 "HC72,UDB Channel HC Tile Configuration" group.byte 0x149++0x00 line.byte 0x00 "HC73,UDB Channel HC Tile Configuration" group.byte 0x14A++0x00 line.byte 0x00 "HC74,UDB Channel HC Tile Configuration" group.byte 0x14B++0x00 line.byte 0x00 "HC75,UDB Channel HC Tile Configuration" group.byte 0x14C++0x00 line.byte 0x00 "HC76,UDB Channel HC Tile Configuration" group.byte 0x14D++0x00 line.byte 0x00 "HC77,UDB Channel HC Tile Configuration" group.byte 0x14E++0x00 line.byte 0x00 "HC78,UDB Channel HC Tile Configuration" group.byte 0x14F++0x00 line.byte 0x00 "HC79,UDB Channel HC Tile Configuration" group.byte 0x150++0x00 line.byte 0x00 "HC80,UDB Channel HC Tile Configuration" group.byte 0x151++0x00 line.byte 0x00 "HC81,UDB Channel HC Tile Configuration" group.byte 0x152++0x00 line.byte 0x00 "HC82,UDB Channel HC Tile Configuration" group.byte 0x153++0x00 line.byte 0x00 "HC83,UDB Channel HC Tile Configuration" group.byte 0x154++0x00 line.byte 0x00 "HC84,UDB Channel HC Tile Configuration" group.byte 0x155++0x00 line.byte 0x00 "HC85,UDB Channel HC Tile Configuration" group.byte 0x156++0x00 line.byte 0x00 "HC86,UDB Channel HC Tile Configuration" group.byte 0x157++0x00 line.byte 0x00 "HC87,UDB Channel HC Tile Configuration" group.byte 0x158++0x00 line.byte 0x00 "HC88,UDB Channel HC Tile Configuration" group.byte 0x159++0x00 line.byte 0x00 "HC89,UDB Channel HC Tile Configuration" group.byte 0x15A++0x00 line.byte 0x00 "HC90,UDB Channel HC Tile Configuration" group.byte 0x15B++0x00 line.byte 0x00 "HC91,UDB Channel HC Tile Configuration" group.byte 0x15C++0x00 line.byte 0x00 "HC92,UDB Channel HC Tile Configuration" group.byte 0x15D++0x00 line.byte 0x00 "HC93,UDB Channel HC Tile Configuration" group.byte 0x15E++0x00 line.byte 0x00 "HC94,UDB Channel HC Tile Configuration" group.byte 0x15F++0x00 line.byte 0x00 "HC95,UDB Channel HC Tile Configuration" group.byte 0x160++0x00 line.byte 0x00 "HC96,UDB Channel HC Tile Configuration" group.byte 0x161++0x00 line.byte 0x00 "HC97,UDB Channel HC Tile Configuration" group.byte 0x162++0x00 line.byte 0x00 "HC98,UDB Channel HC Tile Configuration" group.byte 0x163++0x00 line.byte 0x00 "HC99,UDB Channel HC Tile Configuration" group.byte 0x164++0x00 line.byte 0x00 "HC100,UDB Channel HC Tile Configuration" group.byte 0x165++0x00 line.byte 0x00 "HC101,UDB Channel HC Tile Configuration" group.byte 0x166++0x00 line.byte 0x00 "HC102,UDB Channel HC Tile Configuration" group.byte 0x167++0x00 line.byte 0x00 "HC103,UDB Channel HC Tile Configuration" group.byte 0x168++0x00 line.byte 0x00 "HC104,UDB Channel HC Tile Configuration" group.byte 0x169++0x00 line.byte 0x00 "HC105,UDB Channel HC Tile Configuration" group.byte 0x16A++0x00 line.byte 0x00 "HC106,UDB Channel HC Tile Configuration" group.byte 0x16B++0x00 line.byte 0x00 "HC107,UDB Channel HC Tile Configuration" group.byte 0x16C++0x00 line.byte 0x00 "HC108,UDB Channel HC Tile Configuration" group.byte 0x16D++0x00 line.byte 0x00 "HC109,UDB Channel HC Tile Configuration" group.byte 0x16E++0x00 line.byte 0x00 "HC110,UDB Channel HC Tile Configuration" group.byte 0x16F++0x00 line.byte 0x00 "HC111,UDB Channel HC Tile Configuration" group.byte 0x170++0x00 line.byte 0x00 "HC112,UDB Channel HC Tile Configuration" group.byte 0x171++0x00 line.byte 0x00 "HC113,UDB Channel HC Tile Configuration" group.byte 0x172++0x00 line.byte 0x00 "HC114,UDB Channel HC Tile Configuration" group.byte 0x173++0x00 line.byte 0x00 "HC115,UDB Channel HC Tile Configuration" group.byte 0x174++0x00 line.byte 0x00 "HC116,UDB Channel HC Tile Configuration" group.byte 0x175++0x00 line.byte 0x00 "HC117,UDB Channel HC Tile Configuration" group.byte 0x176++0x00 line.byte 0x00 "HC118,UDB Channel HC Tile Configuration" group.byte 0x177++0x00 line.byte 0x00 "HC119,UDB Channel HC Tile Configuration" group.byte 0x178++0x00 line.byte 0x00 "HC120,UDB Channel HC Tile Configuration" group.byte 0x179++0x00 line.byte 0x00 "HC121,UDB Channel HC Tile Configuration" group.byte 0x17A++0x00 line.byte 0x00 "HC122,UDB Channel HC Tile Configuration" group.byte 0x17B++0x00 line.byte 0x00 "HC123,UDB Channel HC Tile Configuration" group.byte 0x17C++0x00 line.byte 0x00 "HC124,UDB Channel HC Tile Configuration" group.byte 0x17D++0x00 line.byte 0x00 "HC125,UDB Channel HC Tile Configuration" group.byte 0x17E++0x00 line.byte 0x00 "HC126,UDB Channel HC Tile Configuration" group.byte 0x17F++0x00 line.byte 0x00 "HC127,UDB Channel HC Tile Configuration" group.byte 0x180++0x00 line.byte 0x00 "HV_L0,UDB Channel HV Tile Configuration" group.byte 0x181++0x00 line.byte 0x00 "HV_L1,UDB Channel HV Tile Configuration" group.byte 0x182++0x00 line.byte 0x00 "HV_L2,UDB Channel HV Tile Configuration" group.byte 0x183++0x00 line.byte 0x00 "HV_L3,UDB Channel HV Tile Configuration" group.byte 0x184++0x00 line.byte 0x00 "HV_L4,UDB Channel HV Tile Configuration" group.byte 0x185++0x00 line.byte 0x00 "HV_L5,UDB Channel HV Tile Configuration" group.byte 0x186++0x00 line.byte 0x00 "HV_L6,UDB Channel HV Tile Configuration" group.byte 0x187++0x00 line.byte 0x00 "HV_L7,UDB Channel HV Tile Configuration" group.byte 0x188++0x00 line.byte 0x00 "HV_L8,UDB Channel HV Tile Configuration" group.byte 0x189++0x00 line.byte 0x00 "HV_L9,UDB Channel HV Tile Configuration" group.byte 0x18A++0x00 line.byte 0x00 "HV_L10,UDB Channel HV Tile Configuration" group.byte 0x18B++0x00 line.byte 0x00 "HV_L11,UDB Channel HV Tile Configuration" group.byte 0x18C++0x00 line.byte 0x00 "HV_L12,UDB Channel HV Tile Configuration" group.byte 0x18D++0x00 line.byte 0x00 "HV_L13,UDB Channel HV Tile Configuration" group.byte 0x18E++0x00 line.byte 0x00 "HV_L14,UDB Channel HV Tile Configuration" group.byte 0x18F++0x00 line.byte 0x00 "HV_L15,UDB Channel HV Tile Configuration" group.byte 0x190++0x00 line.byte 0x00 "HS0,UDB Channel HS Tile Configuration" group.byte 0x191++0x00 line.byte 0x00 "HS1,UDB Channel HS Tile Configuration" group.byte 0x192++0x00 line.byte 0x00 "HS2,UDB Channel HS Tile Configuration" group.byte 0x193++0x00 line.byte 0x00 "HS3,UDB Channel HS Tile Configuration" group.byte 0x194++0x00 line.byte 0x00 "HS4,UDB Channel HS Tile Configuration" group.byte 0x195++0x00 line.byte 0x00 "HS5,UDB Channel HS Tile Configuration" group.byte 0x196++0x00 line.byte 0x00 "HS6,UDB Channel HS Tile Configuration" group.byte 0x197++0x00 line.byte 0x00 "HS7,UDB Channel HS Tile Configuration" group.byte 0x198++0x00 line.byte 0x00 "HS8,UDB Channel HS Tile Configuration" group.byte 0x199++0x00 line.byte 0x00 "HS9,UDB Channel HS Tile Configuration" group.byte 0x19A++0x00 line.byte 0x00 "HS10,UDB Channel HS Tile Configuration" group.byte 0x19B++0x00 line.byte 0x00 "HS11,UDB Channel HS Tile Configuration" group.byte 0x19C++0x00 line.byte 0x00 "HS12,UDB Channel HS Tile Configuration" group.byte 0x19D++0x00 line.byte 0x00 "HS13,UDB Channel HS Tile Configuration" group.byte 0x19E++0x00 line.byte 0x00 "HS14,UDB Channel HS Tile Configuration" group.byte 0x19F++0x00 line.byte 0x00 "HS15,UDB Channel HS Tile Configuration" group.byte 0x1A0++0x00 line.byte 0x00 "HS16,UDB Channel HS Tile Configuration" group.byte 0x1A1++0x00 line.byte 0x00 "HS17,UDB Channel HS Tile Configuration" group.byte 0x1A2++0x00 line.byte 0x00 "HS18,UDB Channel HS Tile Configuration" group.byte 0x1A3++0x00 line.byte 0x00 "HS19,UDB Channel HS Tile Configuration" group.byte 0x1A4++0x00 line.byte 0x00 "HS20,UDB Channel HS Tile Configuration" group.byte 0x1A5++0x00 line.byte 0x00 "HS21,UDB Channel HS Tile Configuration" group.byte 0x1A6++0x00 line.byte 0x00 "HS22,UDB Channel HS Tile Configuration" group.byte 0x1A7++0x00 line.byte 0x00 "HS23,UDB Channel HS Tile Configuration" group.byte 0x1A8++0x00 line.byte 0x00 "HV_R0,UDB Channel HV Tile Configuration" group.byte 0x1A9++0x00 line.byte 0x00 "HV_R1,UDB Channel HV Tile Configuration" group.byte 0x1AA++0x00 line.byte 0x00 "HV_R2,UDB Channel HV Tile Configuration" group.byte 0x1AB++0x00 line.byte 0x00 "HV_R3,UDB Channel HV Tile Configuration" group.byte 0x1AC++0x00 line.byte 0x00 "HV_R4,UDB Channel HV Tile Configuration" group.byte 0x1AD++0x00 line.byte 0x00 "HV_R5,UDB Channel HV Tile Configuration" group.byte 0x1AE++0x00 line.byte 0x00 "HV_R6,UDB Channel HV Tile Configuration" group.byte 0x1AF++0x00 line.byte 0x00 "HV_R7,UDB Channel HV Tile Configuration" group.byte 0x1B0++0x00 line.byte 0x00 "HV_R8,UDB Channel HV Tile Configuration" group.byte 0x1B1++0x00 line.byte 0x00 "HV_R9,UDB Channel HV Tile Configuration" group.byte 0x1B2++0x00 line.byte 0x00 "HV_R10,UDB Channel HV Tile Configuration" group.byte 0x1B3++0x00 line.byte 0x00 "HV_R11,UDB Channel HV Tile Configuration" group.byte 0x1B4++0x00 line.byte 0x00 "HV_R12,UDB Channel HV Tile Configuration" group.byte 0x1B5++0x00 line.byte 0x00 "HV_R13,UDB Channel HV Tile Configuration" group.byte 0x1B6++0x00 line.byte 0x00 "HV_R14,UDB Channel HV Tile Configuration" group.byte 0x1B7++0x00 line.byte 0x00 "HV_R15,UDB Channel HV Tile Configuration" group.byte 0x1C0++0x00 line.byte 0x00 "PLD0IN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1C2++0x00 line.byte 0x00 "PLD0IN1,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1C4++0x00 line.byte 0x00 "PLD0IN2,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CA++0x00 line.byte 0x00 "PLD1IN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CC++0x00 line.byte 0x00 "PLD1IN1,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CE++0x00 line.byte 0x00 "PLD1IN2,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d0++0x00 line.byte 0x00 "DPIN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d2++0x00 line.byte 0x00 "DPIN1,UDB Channel PI Tile Configuration (half populated)" hexmask.byte 0x00 4.--5. 1. " PI_BOT ,RAM configuration for BOTTOM UDB port interface configuration" hexmask.byte 0x00 2.--3. 1. " PI_TOP ,RAM configuration for TOP UDB port interface configuration" group.byte 0x1d6++0x00 line.byte 0x00 "SCIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d8++0x00 line.byte 0x00 "SCIOIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1de++0x00 line.byte 0x00 "RCIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1E0++0x00 line.byte 0x00 "VS0,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E2++0x00 line.byte 0x00 "VS1,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E4++0x00 line.byte 0x00 "VS2,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E6++0x00 line.byte 0x00 "VS3,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E8++0x00 line.byte 0x00 "VS4,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EA++0x00 line.byte 0x00 "VS5,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EC++0x00 line.byte 0x00 "VS6,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EE++0x00 line.byte 0x00 "VS7,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" width 0x0B tree.end tree.end base ad:(0x40011000+0x800) tree "P 4" tree "U 0" width 18. group.long 0x0++0x03 line.long 0x00 "PLD_IT0,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT0C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT0C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x4++0x03 line.long 0x00 "PLD_IT1,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT1C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT1C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x8++0x03 line.long 0x00 "PLD_IT2,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT2C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT2C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xC++0x03 line.long 0x00 "PLD_IT3,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT3C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT3C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x10++0x03 line.long 0x00 "PLD_IT4,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT4C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT4C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x14++0x03 line.long 0x00 "PLD_IT5,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT5C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT5C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x18++0x03 line.long 0x00 "PLD_IT6,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT6C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT6C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x1C++0x03 line.long 0x00 "PLD_IT7,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT7C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT7C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x20++0x03 line.long 0x00 "PLD_IT8,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT8C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT8C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x24++0x03 line.long 0x00 "PLD_IT9,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT9C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT9C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x28++0x03 line.long 0x00 "PLD_IT10,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT10C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT10C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x2C++0x03 line.long 0x00 "PLD_IT11,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " group.word 0x30++0x01 line.word 0x00 "PLD_ORT0,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT0_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT0_0 ,OR term" "Not OR,OR" group.word 0x32++0x01 line.word 0x00 "PLD_ORT1,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT1_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT1_0 ,OR term" "Not OR,OR" group.word 0x34++0x01 line.word 0x00 "PLD_ORT2,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT2_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT2_0 ,OR term" "Not OR,OR" group.word 0x36++0x01 line.word 0x00 "PLD_ORT3,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " group.word (0x30+0x08)++0x07 line.word 0x00 "MC_CFG_CEN_CONST,Macrocell Configuration for Carry Enable and Constant" bitfld.word 0x00 15. " PLD1_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 14. " PLD1_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 13. " PLD1_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 12. " PLD1_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " PLD1_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 10. " PLD1_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " PLD1_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 8. " PLD1_MC0_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " PLD0_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 6. " PLD0_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " PLD0_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 4. " PLD0_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " PLD0_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 2. " PLD0_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " PLD0_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 0. " PLD0_MC0_CEN ,Carry enable" "Disabled,Enabled" line.word 0x02 "MC_CFG_XORFB,Macrocell Configuration for XOR Feedback" bitfld.word 0x02 14.--15. " PLD1_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 12.--13. " PLD1_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 10.--11. " PLD1_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 8.--9. " PLD1_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 6.--7. " PLD0_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 4.--5. " PLD0_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 2.--3. " PLD0_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 0.--1. " PLD0_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" line.word 0x04 "MC_CFG_SET_RESET,Macrocell Configuration for Set and Reset" bitfld.word 0x04 15. " PLD1_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 14. " PLD1_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 13. " PLD1_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 12. " PLD1_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 11. " PLD1_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 10. " PLD1_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 9. " PLD1_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 8. " PLD1_MC0_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 7. " PLD0_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 6. " PLD0_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 5. " PLD0_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 4. " PLD0_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 3. " PLD0_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 2. " PLD0_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 1. " PLD0_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 0. " PLD0_MC0_SET_SEL ,Set select enable" "Not set,Set" line.word 0x06 "MC_CFG_BYPASS,Macrocell Configuration for Bypass" bitfld.word 0x06 14. " PLD1_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 12. " PLD1_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 10. " PLD1_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 8. " PLD1_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 6. " PLD0_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 4. " PLD0_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 2. " PLD0_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 0. " PLD0_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " group.byte (0x30+0x10)++0x10 line.byte 0x00 "CFG0,Datapath Input Selection" bitfld.byte 0x00 4.--6. " RAD1 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x00 0.--2. " RAD0 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x01 "CFG1,Datapath Input Selection" bitfld.byte 0x01 0.--2. " RAD2 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x02 "CFG2,Datapath Input Selection" bitfld.byte 0x02 4.--6. " F1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x02 0.--2. " F0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x03 "CFG3,Datapath Input Selection" bitfld.byte 0x03 4.--6. " D1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x03 0.--2. " D0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x04 "CFG4,Datapath Input Selection" bitfld.byte 0x04 4.--6. " CI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x04 0.--2. " SI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x05 "CFG5,Datapath Output Selection" bitfld.byte 0x05 4.--7. " OUT1 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x05 0.--3. " OUT0 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x06 "CFG6,Datapath Output Selection" bitfld.byte 0x06 4.--7. " OUT3 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x06 0.--3. " OUT2 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x07 "CFG7,Datapath Output Selection" bitfld.byte 0x07 4.--7. " OUT5 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x07 0.--3. " OUT4 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x08 "CFG8,Datapath Output Synchronization" hexmask.byte 0x08 0.--5. 1. " OUT_SYNC ,Output Synchronization field" line.byte 0x09 "CFG9,ALU Mask" line.byte 0x0a "CFG10,Compare 0 Mask" line.byte 0x0b "CFG11,Compare 1 Mask" line.byte 0x0c "CFG12,Datapath Static Configuration" bitfld.byte 0x0c 7. " CMASK1_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 6. " CMASK0_EN ,Datapath mask enable" "Disabled,Enabled" textline " " bitfld.byte 0x0c 5. " AMASK_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 4. " DEF_SI ,Datapath default shift value" "0,1" textline " " bitfld.byte 0x0c 2.--3. " SI_SELB ,Datapath shift in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0c 0.--1. " SI_SELA ,Datapath shift in source select" "Default,Registered,Route,Chain" line.byte 0x0d "CFG13,Datapath Static Configuration" bitfld.byte 0x0d 6.--7. " CMP_SELB ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" bitfld.byte 0x0d 4.--5. " CMP_SELA ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" textline " " bitfld.byte 0x0d 2.--3. " CI_SELB ,Datapath carry in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0d 0.--1. " CI_SELA ,Datapath carry in source select" "Default,Registered,Route,Chain" line.byte 0x0e "CFG14,Datapath Static Configuration" bitfld.byte 0x0e 7. " MSB_EN ,Datapath MSB selection enable" "Disabled,Enabled" bitfld.byte 0x0e 4.--6. " MSB_SEL ,Datapath MSB Selection" "Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7" textline " " bitfld.byte 0x0e 3. " CHAIN_CMSB ,Datapath CRC MSB chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 2. " CHAIN_FB ,Datapath CRC feedback chaining enable" "Disabled,Enabled" textline " " bitfld.byte 0x0e 1. " CHAIN1 ,Datapath condition chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 0. " CHAIN0 ,Datapath condition chaining enable" "Disabled,Enabled" line.byte 0x0f "CFG15,Datapath Static Configuration" bitfld.byte 0x0f 7. " PI_SEL ,Datapath parallel input selection" "Normal,Parallel" bitfld.byte 0x0f 6. " SHIFT_SEL ,Datapath shift out selection" "SOL_MSB,SOR" textline " " bitfld.byte 0x0f 5. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x0f 4. " NC0 ,Spare register bit" "0,1" textline " " bitfld.byte 0x0f 2.--3. " F1_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" bitfld.byte 0x0f 0.--1. " F0_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" line.byte 0x10 "CFG16,Datapath Static Configuration" bitfld.byte 0x10 7. " F1_CK_INV ,FIFO Clock Invert" "Normal,Inverted" bitfld.byte 0x10 6. " F0_CK_INV ,FIFO Clock Invert" "Normal,Inverted" textline " " bitfld.byte 0x10 5. " FIFO_FAST ,FIFO Fast Mode" "Disabled,Enabled" bitfld.byte 0x10 4. " FIFO_CAP ,FIFO Software Capture Mode" "Disabled,Enabled" textline " " bitfld.byte 0x10 3. " FIFO_EDGE ,Edge/level sensitive FIFO write control" "Level,Edge" bitfld.byte 0x10 2. " FIFO_ASYNC ,Asynchronous FIFO clocking support" "Synchronous,Asynchronous" textline " " bitfld.byte 0x10 1. " EXT_CRCPRS ,External CRC/PRS mode" "Internal,External" bitfld.byte 0x10 0. " WRK16_CONCAT ,Datapath register access mode" "Default,Concatenate" group.byte (0x30+0x24)++0x03 line.byte 0x00 "CFG20,Status input mode selection" line.byte 0x01 "CFG21,Spare register bits" bitfld.byte 0x01 1. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x01 0. " NC0 ,Spare register bit" "0,1" line.byte 0x02 "CFG22,Status Output Control" bitfld.byte 0x02 3. " SC_SYNC_MD ,SC Sync Mode" "Disabled,Enabled" bitfld.byte 0x02 2. " SC_INT_MD ,SC Interrupt Mode" "Normal,INT_MODE" textline " " bitfld.byte 0x02 0.--1. " SC_OUT_CTL ,Selects the output source for the Status and Control routing connections" "Control,Parallel,Counter,?..." line.byte 0x03 "CFG23,Counter Routing Control" bitfld.byte 0x03 5. " ROUTE_EN ,Configure the counter enable signal for routing input" "Disabled,Enabled" bitfld.byte 0x03 4. " ROUTE_LD ,Configure the counter load signal for routing input" "Disabled,Enabled" textline " " bitfld.byte 0x03 2.--3. " CNT_EN_SEL ,Selects the routing inputs for the counter enable signal" "SC_IN4,SC_IN5,SC_IN6,SC_IO" bitfld.byte 0x03 0.--1. " CNT_LD_SEL ,Selects the routing inputs for the counter load signal" "SC_IN0,SC_IN1,SC_IN2,SC_IN3" group.byte (0x30+0x28)++0x00 line.byte 0x00 "CFG24,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x29)++0x00 line.byte 0x00 "CFG25,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2A)++0x00 line.byte 0x00 "CFG26,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2B)++0x00 line.byte 0x00 "CFG27,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2C)++0x03 line.byte 0x00 "CFG28,Clock Selection" bitfld.byte 0x00 4.--7. " PLD1_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x00 0.--3. " PLD0_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x01 "CFG29,Clock Selection" bitfld.byte 0x01 4.--7. " SC_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x01 0.--3. " DP_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x02 "CFG30,Reset Selection Register" bitfld.byte 0x02 4. " GUDB_WR ,Enable global write operation for the configuration and working registers in this UDB" "Disabled,Enabled" bitfld.byte 0x02 3. " EN_RES_CNT ,Enable routed reset to counter/control register" "Disabled,Enabled" textline " " bitfld.byte 0x02 2. " RES_POL ,Select polarity of the routed reset control" "Not inverted,Inverted" bitfld.byte 0x02 0.--1. " RES_SEL ,Select routing input for routed reset control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" line.byte 0x03 "CFG31,Reset and Clock Input Enable" bitfld.byte 0x03 4.--5. " EXT_CK_SEL ,External clock selection" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" bitfld.byte 0x03 1. " EXT_SYNC ,Enable synchronization of selected external clock" "Disabled,Enabled" textline " " bitfld.byte 0x03 0. " NC0 ,Spare register bit" "0,1" group.word 0x60++0x01 line.word 0x00 "DCFG0,Dynamic Configuration RAM Register 0" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x62++0x01 line.word 0x00 "DCFG1,Dynamic Configuration RAM Register 1" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x64++0x01 line.word 0x00 "DCFG2,Dynamic Configuration RAM Register 2" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x66++0x01 line.word 0x00 "DCFG3,Dynamic Configuration RAM Register 3" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x68++0x01 line.word 0x00 "DCFG4,Dynamic Configuration RAM Register 4" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6A++0x01 line.word 0x00 "DCFG5,Dynamic Configuration RAM Register 5" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6C++0x01 line.word 0x00 "DCFG6,Dynamic Configuration RAM Register 6" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6E++0x01 line.word 0x00 "DCFG7,Dynamic Configuration RAM Register 7" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" width 0x0B tree.end tree "U 1" width 18. group.long 0x80++0x03 line.long 0x00 "PLD_IT0,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT0C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT0C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x84++0x03 line.long 0x00 "PLD_IT1,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT1C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT1C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x88++0x03 line.long 0x00 "PLD_IT2,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT2C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT2C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x8C++0x03 line.long 0x00 "PLD_IT3,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT3C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT3C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x90++0x03 line.long 0x00 "PLD_IT4,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT4C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT4C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x94++0x03 line.long 0x00 "PLD_IT5,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT5C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT5C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x98++0x03 line.long 0x00 "PLD_IT6,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT6C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT6C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x9C++0x03 line.long 0x00 "PLD_IT7,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT7C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT7C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA0++0x03 line.long 0x00 "PLD_IT8,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT8C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT8C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA4++0x03 line.long 0x00 "PLD_IT9,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT9C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT9C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA8++0x03 line.long 0x00 "PLD_IT10,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT10C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT10C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xAC++0x03 line.long 0x00 "PLD_IT11,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " group.word 0xB0++0x01 line.word 0x00 "PLD_ORT0,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT0_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT0_0 ,OR term" "Not OR,OR" group.word 0xB2++0x01 line.word 0x00 "PLD_ORT1,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT1_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT1_0 ,OR term" "Not OR,OR" group.word 0xB4++0x01 line.word 0x00 "PLD_ORT2,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT2_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT2_0 ,OR term" "Not OR,OR" group.word 0xB6++0x01 line.word 0x00 "PLD_ORT3,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " group.word (0xB0+0x08)++0x07 line.word 0x00 "MC_CFG_CEN_CONST,Macrocell Configuration for Carry Enable and Constant" bitfld.word 0x00 15. " PLD1_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 14. " PLD1_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 13. " PLD1_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 12. " PLD1_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " PLD1_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 10. " PLD1_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " PLD1_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 8. " PLD1_MC0_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " PLD0_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 6. " PLD0_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " PLD0_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 4. " PLD0_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " PLD0_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 2. " PLD0_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " PLD0_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 0. " PLD0_MC0_CEN ,Carry enable" "Disabled,Enabled" line.word 0x02 "MC_CFG_XORFB,Macrocell Configuration for XOR Feedback" bitfld.word 0x02 14.--15. " PLD1_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 12.--13. " PLD1_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 10.--11. " PLD1_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 8.--9. " PLD1_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 6.--7. " PLD0_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 4.--5. " PLD0_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 2.--3. " PLD0_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 0.--1. " PLD0_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" line.word 0x04 "MC_CFG_SET_RESET,Macrocell Configuration for Set and Reset" bitfld.word 0x04 15. " PLD1_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 14. " PLD1_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 13. " PLD1_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 12. " PLD1_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 11. " PLD1_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 10. " PLD1_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 9. " PLD1_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 8. " PLD1_MC0_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 7. " PLD0_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 6. " PLD0_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 5. " PLD0_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 4. " PLD0_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 3. " PLD0_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 2. " PLD0_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 1. " PLD0_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 0. " PLD0_MC0_SET_SEL ,Set select enable" "Not set,Set" line.word 0x06 "MC_CFG_BYPASS,Macrocell Configuration for Bypass" bitfld.word 0x06 14. " PLD1_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 12. " PLD1_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 10. " PLD1_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 8. " PLD1_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 6. " PLD0_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 4. " PLD0_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 2. " PLD0_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 0. " PLD0_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " group.byte (0xB0+0x10)++0x10 line.byte 0x00 "CFG0,Datapath Input Selection" bitfld.byte 0x00 4.--6. " RAD1 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x00 0.--2. " RAD0 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x01 "CFG1,Datapath Input Selection" bitfld.byte 0x01 0.--2. " RAD2 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x02 "CFG2,Datapath Input Selection" bitfld.byte 0x02 4.--6. " F1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x02 0.--2. " F0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x03 "CFG3,Datapath Input Selection" bitfld.byte 0x03 4.--6. " D1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x03 0.--2. " D0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x04 "CFG4,Datapath Input Selection" bitfld.byte 0x04 4.--6. " CI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x04 0.--2. " SI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x05 "CFG5,Datapath Output Selection" bitfld.byte 0x05 4.--7. " OUT1 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x05 0.--3. " OUT0 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x06 "CFG6,Datapath Output Selection" bitfld.byte 0x06 4.--7. " OUT3 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x06 0.--3. " OUT2 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x07 "CFG7,Datapath Output Selection" bitfld.byte 0x07 4.--7. " OUT5 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x07 0.--3. " OUT4 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x08 "CFG8,Datapath Output Synchronization" hexmask.byte 0x08 0.--5. 1. " OUT_SYNC ,Output Synchronization field" line.byte 0x09 "CFG9,ALU Mask" line.byte 0x0a "CFG10,Compare 0 Mask" line.byte 0x0b "CFG11,Compare 1 Mask" line.byte 0x0c "CFG12,Datapath Static Configuration" bitfld.byte 0x0c 7. " CMASK1_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 6. " CMASK0_EN ,Datapath mask enable" "Disabled,Enabled" textline " " bitfld.byte 0x0c 5. " AMASK_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 4. " DEF_SI ,Datapath default shift value" "0,1" textline " " bitfld.byte 0x0c 2.--3. " SI_SELB ,Datapath shift in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0c 0.--1. " SI_SELA ,Datapath shift in source select" "Default,Registered,Route,Chain" line.byte 0x0d "CFG13,Datapath Static Configuration" bitfld.byte 0x0d 6.--7. " CMP_SELB ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" bitfld.byte 0x0d 4.--5. " CMP_SELA ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" textline " " bitfld.byte 0x0d 2.--3. " CI_SELB ,Datapath carry in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0d 0.--1. " CI_SELA ,Datapath carry in source select" "Default,Registered,Route,Chain" line.byte 0x0e "CFG14,Datapath Static Configuration" bitfld.byte 0x0e 7. " MSB_EN ,Datapath MSB selection enable" "Disabled,Enabled" bitfld.byte 0x0e 4.--6. " MSB_SEL ,Datapath MSB Selection" "Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7" textline " " bitfld.byte 0x0e 3. " CHAIN_CMSB ,Datapath CRC MSB chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 2. " CHAIN_FB ,Datapath CRC feedback chaining enable" "Disabled,Enabled" textline " " bitfld.byte 0x0e 1. " CHAIN1 ,Datapath condition chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 0. " CHAIN0 ,Datapath condition chaining enable" "Disabled,Enabled" line.byte 0x0f "CFG15,Datapath Static Configuration" bitfld.byte 0x0f 7. " PI_SEL ,Datapath parallel input selection" "Normal,Parallel" bitfld.byte 0x0f 6. " SHIFT_SEL ,Datapath shift out selection" "SOL_MSB,SOR" textline " " bitfld.byte 0x0f 5. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x0f 4. " NC0 ,Spare register bit" "0,1" textline " " bitfld.byte 0x0f 2.--3. " F1_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" bitfld.byte 0x0f 0.--1. " F0_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" line.byte 0x10 "CFG16,Datapath Static Configuration" bitfld.byte 0x10 7. " F1_CK_INV ,FIFO Clock Invert" "Normal,Inverted" bitfld.byte 0x10 6. " F0_CK_INV ,FIFO Clock Invert" "Normal,Inverted" textline " " bitfld.byte 0x10 5. " FIFO_FAST ,FIFO Fast Mode" "Disabled,Enabled" bitfld.byte 0x10 4. " FIFO_CAP ,FIFO Software Capture Mode" "Disabled,Enabled" textline " " bitfld.byte 0x10 3. " FIFO_EDGE ,Edge/level sensitive FIFO write control" "Level,Edge" bitfld.byte 0x10 2. " FIFO_ASYNC ,Asynchronous FIFO clocking support" "Synchronous,Asynchronous" textline " " bitfld.byte 0x10 1. " EXT_CRCPRS ,External CRC/PRS mode" "Internal,External" bitfld.byte 0x10 0. " WRK16_CONCAT ,Datapath register access mode" "Default,Concatenate" group.byte (0xB0+0x24)++0x03 line.byte 0x00 "CFG20,Status input mode selection" line.byte 0x01 "CFG21,Spare register bits" bitfld.byte 0x01 1. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x01 0. " NC0 ,Spare register bit" "0,1" line.byte 0x02 "CFG22,Status Output Control" bitfld.byte 0x02 3. " SC_SYNC_MD ,SC Sync Mode" "Disabled,Enabled" bitfld.byte 0x02 2. " SC_INT_MD ,SC Interrupt Mode" "Normal,INT_MODE" textline " " bitfld.byte 0x02 0.--1. " SC_OUT_CTL ,Selects the output source for the Status and Control routing connections" "Control,Parallel,Counter,?..." line.byte 0x03 "CFG23,Counter Routing Control" bitfld.byte 0x03 5. " ROUTE_EN ,Configure the counter enable signal for routing input" "Disabled,Enabled" bitfld.byte 0x03 4. " ROUTE_LD ,Configure the counter load signal for routing input" "Disabled,Enabled" textline " " bitfld.byte 0x03 2.--3. " CNT_EN_SEL ,Selects the routing inputs for the counter enable signal" "SC_IN4,SC_IN5,SC_IN6,SC_IO" bitfld.byte 0x03 0.--1. " CNT_LD_SEL ,Selects the routing inputs for the counter load signal" "SC_IN0,SC_IN1,SC_IN2,SC_IN3" group.byte (0xB0+0x28)++0x00 line.byte 0x00 "CFG24,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x29)++0x00 line.byte 0x00 "CFG25,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2A)++0x00 line.byte 0x00 "CFG26,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2B)++0x00 line.byte 0x00 "CFG27,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2C)++0x03 line.byte 0x00 "CFG28,Clock Selection" bitfld.byte 0x00 4.--7. " PLD1_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x00 0.--3. " PLD0_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x01 "CFG29,Clock Selection" bitfld.byte 0x01 4.--7. " SC_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x01 0.--3. " DP_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x02 "CFG30,Reset Selection Register" bitfld.byte 0x02 4. " GUDB_WR ,Enable global write operation for the configuration and working registers in this UDB" "Disabled,Enabled" bitfld.byte 0x02 3. " EN_RES_CNT ,Enable routed reset to counter/control register" "Disabled,Enabled" textline " " bitfld.byte 0x02 2. " RES_POL ,Select polarity of the routed reset control" "Not inverted,Inverted" bitfld.byte 0x02 0.--1. " RES_SEL ,Select routing input for routed reset control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" line.byte 0x03 "CFG31,Reset and Clock Input Enable" bitfld.byte 0x03 4.--5. " EXT_CK_SEL ,External clock selection" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" bitfld.byte 0x03 1. " EXT_SYNC ,Enable synchronization of selected external clock" "Disabled,Enabled" textline " " bitfld.byte 0x03 0. " NC0 ,Spare register bit" "0,1" group.word 0xE0++0x01 line.word 0x00 "DCFG0,Dynamic Configuration RAM Register 0" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE2++0x01 line.word 0x00 "DCFG1,Dynamic Configuration RAM Register 1" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE4++0x01 line.word 0x00 "DCFG2,Dynamic Configuration RAM Register 2" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE6++0x01 line.word 0x00 "DCFG3,Dynamic Configuration RAM Register 3" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE8++0x01 line.word 0x00 "DCFG4,Dynamic Configuration RAM Register 4" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEA++0x01 line.word 0x00 "DCFG5,Dynamic Configuration RAM Register 5" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEC++0x01 line.word 0x00 "DCFG6,Dynamic Configuration RAM Register 6" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEE++0x01 line.word 0x00 "DCFG7,Dynamic Configuration RAM Register 7" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" width 0x0B tree.end tree "Route" width 9. group.byte 0x100++0x00 line.byte 0x00 "HC0,UDB Channel HC Tile Configuration" group.byte 0x101++0x00 line.byte 0x00 "HC1,UDB Channel HC Tile Configuration" group.byte 0x102++0x00 line.byte 0x00 "HC2,UDB Channel HC Tile Configuration" group.byte 0x103++0x00 line.byte 0x00 "HC3,UDB Channel HC Tile Configuration" group.byte 0x104++0x00 line.byte 0x00 "HC4,UDB Channel HC Tile Configuration" group.byte 0x105++0x00 line.byte 0x00 "HC5,UDB Channel HC Tile Configuration" group.byte 0x106++0x00 line.byte 0x00 "HC6,UDB Channel HC Tile Configuration" group.byte 0x107++0x00 line.byte 0x00 "HC7,UDB Channel HC Tile Configuration" group.byte 0x108++0x00 line.byte 0x00 "HC8,UDB Channel HC Tile Configuration" group.byte 0x109++0x00 line.byte 0x00 "HC9,UDB Channel HC Tile Configuration" group.byte 0x10A++0x00 line.byte 0x00 "HC10,UDB Channel HC Tile Configuration" group.byte 0x10B++0x00 line.byte 0x00 "HC11,UDB Channel HC Tile Configuration" group.byte 0x10C++0x00 line.byte 0x00 "HC12,UDB Channel HC Tile Configuration" group.byte 0x10D++0x00 line.byte 0x00 "HC13,UDB Channel HC Tile Configuration" group.byte 0x10E++0x00 line.byte 0x00 "HC14,UDB Channel HC Tile Configuration" group.byte 0x10F++0x00 line.byte 0x00 "HC15,UDB Channel HC Tile Configuration" group.byte 0x110++0x00 line.byte 0x00 "HC16,UDB Channel HC Tile Configuration" group.byte 0x111++0x00 line.byte 0x00 "HC17,UDB Channel HC Tile Configuration" group.byte 0x112++0x00 line.byte 0x00 "HC18,UDB Channel HC Tile Configuration" group.byte 0x113++0x00 line.byte 0x00 "HC19,UDB Channel HC Tile Configuration" group.byte 0x114++0x00 line.byte 0x00 "HC20,UDB Channel HC Tile Configuration" group.byte 0x115++0x00 line.byte 0x00 "HC21,UDB Channel HC Tile Configuration" group.byte 0x116++0x00 line.byte 0x00 "HC22,UDB Channel HC Tile Configuration" group.byte 0x117++0x00 line.byte 0x00 "HC23,UDB Channel HC Tile Configuration" group.byte 0x118++0x00 line.byte 0x00 "HC24,UDB Channel HC Tile Configuration" group.byte 0x119++0x00 line.byte 0x00 "HC25,UDB Channel HC Tile Configuration" group.byte 0x11A++0x00 line.byte 0x00 "HC26,UDB Channel HC Tile Configuration" group.byte 0x11B++0x00 line.byte 0x00 "HC27,UDB Channel HC Tile Configuration" group.byte 0x11C++0x00 line.byte 0x00 "HC28,UDB Channel HC Tile Configuration" group.byte 0x11D++0x00 line.byte 0x00 "HC29,UDB Channel HC Tile Configuration" group.byte 0x11E++0x00 line.byte 0x00 "HC30,UDB Channel HC Tile Configuration" group.byte 0x11F++0x00 line.byte 0x00 "HC31,UDB Channel HC Tile Configuration" group.byte 0x120++0x00 line.byte 0x00 "HC32,UDB Channel HC Tile Configuration" group.byte 0x121++0x00 line.byte 0x00 "HC33,UDB Channel HC Tile Configuration" group.byte 0x122++0x00 line.byte 0x00 "HC34,UDB Channel HC Tile Configuration" group.byte 0x123++0x00 line.byte 0x00 "HC35,UDB Channel HC Tile Configuration" group.byte 0x124++0x00 line.byte 0x00 "HC36,UDB Channel HC Tile Configuration" group.byte 0x125++0x00 line.byte 0x00 "HC37,UDB Channel HC Tile Configuration" group.byte 0x126++0x00 line.byte 0x00 "HC38,UDB Channel HC Tile Configuration" group.byte 0x127++0x00 line.byte 0x00 "HC39,UDB Channel HC Tile Configuration" group.byte 0x128++0x00 line.byte 0x00 "HC40,UDB Channel HC Tile Configuration" group.byte 0x129++0x00 line.byte 0x00 "HC41,UDB Channel HC Tile Configuration" group.byte 0x12A++0x00 line.byte 0x00 "HC42,UDB Channel HC Tile Configuration" group.byte 0x12B++0x00 line.byte 0x00 "HC43,UDB Channel HC Tile Configuration" group.byte 0x12C++0x00 line.byte 0x00 "HC44,UDB Channel HC Tile Configuration" group.byte 0x12D++0x00 line.byte 0x00 "HC45,UDB Channel HC Tile Configuration" group.byte 0x12E++0x00 line.byte 0x00 "HC46,UDB Channel HC Tile Configuration" group.byte 0x12F++0x00 line.byte 0x00 "HC47,UDB Channel HC Tile Configuration" group.byte 0x130++0x00 line.byte 0x00 "HC48,UDB Channel HC Tile Configuration" group.byte 0x131++0x00 line.byte 0x00 "HC49,UDB Channel HC Tile Configuration" group.byte 0x132++0x00 line.byte 0x00 "HC50,UDB Channel HC Tile Configuration" group.byte 0x133++0x00 line.byte 0x00 "HC51,UDB Channel HC Tile Configuration" group.byte 0x134++0x00 line.byte 0x00 "HC52,UDB Channel HC Tile Configuration" group.byte 0x135++0x00 line.byte 0x00 "HC53,UDB Channel HC Tile Configuration" group.byte 0x136++0x00 line.byte 0x00 "HC54,UDB Channel HC Tile Configuration" group.byte 0x137++0x00 line.byte 0x00 "HC55,UDB Channel HC Tile Configuration" group.byte 0x138++0x00 line.byte 0x00 "HC56,UDB Channel HC Tile Configuration" group.byte 0x139++0x00 line.byte 0x00 "HC57,UDB Channel HC Tile Configuration" group.byte 0x13A++0x00 line.byte 0x00 "HC58,UDB Channel HC Tile Configuration" group.byte 0x13B++0x00 line.byte 0x00 "HC59,UDB Channel HC Tile Configuration" group.byte 0x13C++0x00 line.byte 0x00 "HC60,UDB Channel HC Tile Configuration" group.byte 0x13D++0x00 line.byte 0x00 "HC61,UDB Channel HC Tile Configuration" group.byte 0x13E++0x00 line.byte 0x00 "HC62,UDB Channel HC Tile Configuration" group.byte 0x13F++0x00 line.byte 0x00 "HC63,UDB Channel HC Tile Configuration" group.byte 0x140++0x00 line.byte 0x00 "HC64,UDB Channel HC Tile Configuration" group.byte 0x141++0x00 line.byte 0x00 "HC65,UDB Channel HC Tile Configuration" group.byte 0x142++0x00 line.byte 0x00 "HC66,UDB Channel HC Tile Configuration" group.byte 0x143++0x00 line.byte 0x00 "HC67,UDB Channel HC Tile Configuration" group.byte 0x144++0x00 line.byte 0x00 "HC68,UDB Channel HC Tile Configuration" group.byte 0x145++0x00 line.byte 0x00 "HC69,UDB Channel HC Tile Configuration" group.byte 0x146++0x00 line.byte 0x00 "HC70,UDB Channel HC Tile Configuration" group.byte 0x147++0x00 line.byte 0x00 "HC71,UDB Channel HC Tile Configuration" group.byte 0x148++0x00 line.byte 0x00 "HC72,UDB Channel HC Tile Configuration" group.byte 0x149++0x00 line.byte 0x00 "HC73,UDB Channel HC Tile Configuration" group.byte 0x14A++0x00 line.byte 0x00 "HC74,UDB Channel HC Tile Configuration" group.byte 0x14B++0x00 line.byte 0x00 "HC75,UDB Channel HC Tile Configuration" group.byte 0x14C++0x00 line.byte 0x00 "HC76,UDB Channel HC Tile Configuration" group.byte 0x14D++0x00 line.byte 0x00 "HC77,UDB Channel HC Tile Configuration" group.byte 0x14E++0x00 line.byte 0x00 "HC78,UDB Channel HC Tile Configuration" group.byte 0x14F++0x00 line.byte 0x00 "HC79,UDB Channel HC Tile Configuration" group.byte 0x150++0x00 line.byte 0x00 "HC80,UDB Channel HC Tile Configuration" group.byte 0x151++0x00 line.byte 0x00 "HC81,UDB Channel HC Tile Configuration" group.byte 0x152++0x00 line.byte 0x00 "HC82,UDB Channel HC Tile Configuration" group.byte 0x153++0x00 line.byte 0x00 "HC83,UDB Channel HC Tile Configuration" group.byte 0x154++0x00 line.byte 0x00 "HC84,UDB Channel HC Tile Configuration" group.byte 0x155++0x00 line.byte 0x00 "HC85,UDB Channel HC Tile Configuration" group.byte 0x156++0x00 line.byte 0x00 "HC86,UDB Channel HC Tile Configuration" group.byte 0x157++0x00 line.byte 0x00 "HC87,UDB Channel HC Tile Configuration" group.byte 0x158++0x00 line.byte 0x00 "HC88,UDB Channel HC Tile Configuration" group.byte 0x159++0x00 line.byte 0x00 "HC89,UDB Channel HC Tile Configuration" group.byte 0x15A++0x00 line.byte 0x00 "HC90,UDB Channel HC Tile Configuration" group.byte 0x15B++0x00 line.byte 0x00 "HC91,UDB Channel HC Tile Configuration" group.byte 0x15C++0x00 line.byte 0x00 "HC92,UDB Channel HC Tile Configuration" group.byte 0x15D++0x00 line.byte 0x00 "HC93,UDB Channel HC Tile Configuration" group.byte 0x15E++0x00 line.byte 0x00 "HC94,UDB Channel HC Tile Configuration" group.byte 0x15F++0x00 line.byte 0x00 "HC95,UDB Channel HC Tile Configuration" group.byte 0x160++0x00 line.byte 0x00 "HC96,UDB Channel HC Tile Configuration" group.byte 0x161++0x00 line.byte 0x00 "HC97,UDB Channel HC Tile Configuration" group.byte 0x162++0x00 line.byte 0x00 "HC98,UDB Channel HC Tile Configuration" group.byte 0x163++0x00 line.byte 0x00 "HC99,UDB Channel HC Tile Configuration" group.byte 0x164++0x00 line.byte 0x00 "HC100,UDB Channel HC Tile Configuration" group.byte 0x165++0x00 line.byte 0x00 "HC101,UDB Channel HC Tile Configuration" group.byte 0x166++0x00 line.byte 0x00 "HC102,UDB Channel HC Tile Configuration" group.byte 0x167++0x00 line.byte 0x00 "HC103,UDB Channel HC Tile Configuration" group.byte 0x168++0x00 line.byte 0x00 "HC104,UDB Channel HC Tile Configuration" group.byte 0x169++0x00 line.byte 0x00 "HC105,UDB Channel HC Tile Configuration" group.byte 0x16A++0x00 line.byte 0x00 "HC106,UDB Channel HC Tile Configuration" group.byte 0x16B++0x00 line.byte 0x00 "HC107,UDB Channel HC Tile Configuration" group.byte 0x16C++0x00 line.byte 0x00 "HC108,UDB Channel HC Tile Configuration" group.byte 0x16D++0x00 line.byte 0x00 "HC109,UDB Channel HC Tile Configuration" group.byte 0x16E++0x00 line.byte 0x00 "HC110,UDB Channel HC Tile Configuration" group.byte 0x16F++0x00 line.byte 0x00 "HC111,UDB Channel HC Tile Configuration" group.byte 0x170++0x00 line.byte 0x00 "HC112,UDB Channel HC Tile Configuration" group.byte 0x171++0x00 line.byte 0x00 "HC113,UDB Channel HC Tile Configuration" group.byte 0x172++0x00 line.byte 0x00 "HC114,UDB Channel HC Tile Configuration" group.byte 0x173++0x00 line.byte 0x00 "HC115,UDB Channel HC Tile Configuration" group.byte 0x174++0x00 line.byte 0x00 "HC116,UDB Channel HC Tile Configuration" group.byte 0x175++0x00 line.byte 0x00 "HC117,UDB Channel HC Tile Configuration" group.byte 0x176++0x00 line.byte 0x00 "HC118,UDB Channel HC Tile Configuration" group.byte 0x177++0x00 line.byte 0x00 "HC119,UDB Channel HC Tile Configuration" group.byte 0x178++0x00 line.byte 0x00 "HC120,UDB Channel HC Tile Configuration" group.byte 0x179++0x00 line.byte 0x00 "HC121,UDB Channel HC Tile Configuration" group.byte 0x17A++0x00 line.byte 0x00 "HC122,UDB Channel HC Tile Configuration" group.byte 0x17B++0x00 line.byte 0x00 "HC123,UDB Channel HC Tile Configuration" group.byte 0x17C++0x00 line.byte 0x00 "HC124,UDB Channel HC Tile Configuration" group.byte 0x17D++0x00 line.byte 0x00 "HC125,UDB Channel HC Tile Configuration" group.byte 0x17E++0x00 line.byte 0x00 "HC126,UDB Channel HC Tile Configuration" group.byte 0x17F++0x00 line.byte 0x00 "HC127,UDB Channel HC Tile Configuration" group.byte 0x180++0x00 line.byte 0x00 "HV_L0,UDB Channel HV Tile Configuration" group.byte 0x181++0x00 line.byte 0x00 "HV_L1,UDB Channel HV Tile Configuration" group.byte 0x182++0x00 line.byte 0x00 "HV_L2,UDB Channel HV Tile Configuration" group.byte 0x183++0x00 line.byte 0x00 "HV_L3,UDB Channel HV Tile Configuration" group.byte 0x184++0x00 line.byte 0x00 "HV_L4,UDB Channel HV Tile Configuration" group.byte 0x185++0x00 line.byte 0x00 "HV_L5,UDB Channel HV Tile Configuration" group.byte 0x186++0x00 line.byte 0x00 "HV_L6,UDB Channel HV Tile Configuration" group.byte 0x187++0x00 line.byte 0x00 "HV_L7,UDB Channel HV Tile Configuration" group.byte 0x188++0x00 line.byte 0x00 "HV_L8,UDB Channel HV Tile Configuration" group.byte 0x189++0x00 line.byte 0x00 "HV_L9,UDB Channel HV Tile Configuration" group.byte 0x18A++0x00 line.byte 0x00 "HV_L10,UDB Channel HV Tile Configuration" group.byte 0x18B++0x00 line.byte 0x00 "HV_L11,UDB Channel HV Tile Configuration" group.byte 0x18C++0x00 line.byte 0x00 "HV_L12,UDB Channel HV Tile Configuration" group.byte 0x18D++0x00 line.byte 0x00 "HV_L13,UDB Channel HV Tile Configuration" group.byte 0x18E++0x00 line.byte 0x00 "HV_L14,UDB Channel HV Tile Configuration" group.byte 0x18F++0x00 line.byte 0x00 "HV_L15,UDB Channel HV Tile Configuration" group.byte 0x190++0x00 line.byte 0x00 "HS0,UDB Channel HS Tile Configuration" group.byte 0x191++0x00 line.byte 0x00 "HS1,UDB Channel HS Tile Configuration" group.byte 0x192++0x00 line.byte 0x00 "HS2,UDB Channel HS Tile Configuration" group.byte 0x193++0x00 line.byte 0x00 "HS3,UDB Channel HS Tile Configuration" group.byte 0x194++0x00 line.byte 0x00 "HS4,UDB Channel HS Tile Configuration" group.byte 0x195++0x00 line.byte 0x00 "HS5,UDB Channel HS Tile Configuration" group.byte 0x196++0x00 line.byte 0x00 "HS6,UDB Channel HS Tile Configuration" group.byte 0x197++0x00 line.byte 0x00 "HS7,UDB Channel HS Tile Configuration" group.byte 0x198++0x00 line.byte 0x00 "HS8,UDB Channel HS Tile Configuration" group.byte 0x199++0x00 line.byte 0x00 "HS9,UDB Channel HS Tile Configuration" group.byte 0x19A++0x00 line.byte 0x00 "HS10,UDB Channel HS Tile Configuration" group.byte 0x19B++0x00 line.byte 0x00 "HS11,UDB Channel HS Tile Configuration" group.byte 0x19C++0x00 line.byte 0x00 "HS12,UDB Channel HS Tile Configuration" group.byte 0x19D++0x00 line.byte 0x00 "HS13,UDB Channel HS Tile Configuration" group.byte 0x19E++0x00 line.byte 0x00 "HS14,UDB Channel HS Tile Configuration" group.byte 0x19F++0x00 line.byte 0x00 "HS15,UDB Channel HS Tile Configuration" group.byte 0x1A0++0x00 line.byte 0x00 "HS16,UDB Channel HS Tile Configuration" group.byte 0x1A1++0x00 line.byte 0x00 "HS17,UDB Channel HS Tile Configuration" group.byte 0x1A2++0x00 line.byte 0x00 "HS18,UDB Channel HS Tile Configuration" group.byte 0x1A3++0x00 line.byte 0x00 "HS19,UDB Channel HS Tile Configuration" group.byte 0x1A4++0x00 line.byte 0x00 "HS20,UDB Channel HS Tile Configuration" group.byte 0x1A5++0x00 line.byte 0x00 "HS21,UDB Channel HS Tile Configuration" group.byte 0x1A6++0x00 line.byte 0x00 "HS22,UDB Channel HS Tile Configuration" group.byte 0x1A7++0x00 line.byte 0x00 "HS23,UDB Channel HS Tile Configuration" group.byte 0x1A8++0x00 line.byte 0x00 "HV_R0,UDB Channel HV Tile Configuration" group.byte 0x1A9++0x00 line.byte 0x00 "HV_R1,UDB Channel HV Tile Configuration" group.byte 0x1AA++0x00 line.byte 0x00 "HV_R2,UDB Channel HV Tile Configuration" group.byte 0x1AB++0x00 line.byte 0x00 "HV_R3,UDB Channel HV Tile Configuration" group.byte 0x1AC++0x00 line.byte 0x00 "HV_R4,UDB Channel HV Tile Configuration" group.byte 0x1AD++0x00 line.byte 0x00 "HV_R5,UDB Channel HV Tile Configuration" group.byte 0x1AE++0x00 line.byte 0x00 "HV_R6,UDB Channel HV Tile Configuration" group.byte 0x1AF++0x00 line.byte 0x00 "HV_R7,UDB Channel HV Tile Configuration" group.byte 0x1B0++0x00 line.byte 0x00 "HV_R8,UDB Channel HV Tile Configuration" group.byte 0x1B1++0x00 line.byte 0x00 "HV_R9,UDB Channel HV Tile Configuration" group.byte 0x1B2++0x00 line.byte 0x00 "HV_R10,UDB Channel HV Tile Configuration" group.byte 0x1B3++0x00 line.byte 0x00 "HV_R11,UDB Channel HV Tile Configuration" group.byte 0x1B4++0x00 line.byte 0x00 "HV_R12,UDB Channel HV Tile Configuration" group.byte 0x1B5++0x00 line.byte 0x00 "HV_R13,UDB Channel HV Tile Configuration" group.byte 0x1B6++0x00 line.byte 0x00 "HV_R14,UDB Channel HV Tile Configuration" group.byte 0x1B7++0x00 line.byte 0x00 "HV_R15,UDB Channel HV Tile Configuration" group.byte 0x1C0++0x00 line.byte 0x00 "PLD0IN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1C2++0x00 line.byte 0x00 "PLD0IN1,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1C4++0x00 line.byte 0x00 "PLD0IN2,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CA++0x00 line.byte 0x00 "PLD1IN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CC++0x00 line.byte 0x00 "PLD1IN1,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CE++0x00 line.byte 0x00 "PLD1IN2,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d0++0x00 line.byte 0x00 "DPIN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d2++0x00 line.byte 0x00 "DPIN1,UDB Channel PI Tile Configuration (half populated)" hexmask.byte 0x00 4.--5. 1. " PI_BOT ,RAM configuration for BOTTOM UDB port interface configuration" hexmask.byte 0x00 2.--3. 1. " PI_TOP ,RAM configuration for TOP UDB port interface configuration" group.byte 0x1d6++0x00 line.byte 0x00 "SCIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d8++0x00 line.byte 0x00 "SCIOIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1de++0x00 line.byte 0x00 "RCIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1E0++0x00 line.byte 0x00 "VS0,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E2++0x00 line.byte 0x00 "VS1,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E4++0x00 line.byte 0x00 "VS2,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E6++0x00 line.byte 0x00 "VS3,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E8++0x00 line.byte 0x00 "VS4,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EA++0x00 line.byte 0x00 "VS5,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EC++0x00 line.byte 0x00 "VS6,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EE++0x00 line.byte 0x00 "VS7,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" width 0x0B tree.end tree.end base ad:(0x40011000+0xA00) tree "P 5" tree "U 0" width 18. group.long 0x0++0x03 line.long 0x00 "PLD_IT0,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT0C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT0C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x4++0x03 line.long 0x00 "PLD_IT1,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT1C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT1C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x8++0x03 line.long 0x00 "PLD_IT2,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT2C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT2C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xC++0x03 line.long 0x00 "PLD_IT3,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT3C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT3C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x10++0x03 line.long 0x00 "PLD_IT4,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT4C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT4C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x14++0x03 line.long 0x00 "PLD_IT5,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT5C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT5C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x18++0x03 line.long 0x00 "PLD_IT6,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT6C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT6C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x1C++0x03 line.long 0x00 "PLD_IT7,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT7C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT7C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x20++0x03 line.long 0x00 "PLD_IT8,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT8C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT8C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x24++0x03 line.long 0x00 "PLD_IT9,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT9C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT9C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x28++0x03 line.long 0x00 "PLD_IT10,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT10C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT10C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x2C++0x03 line.long 0x00 "PLD_IT11,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " group.word 0x30++0x01 line.word 0x00 "PLD_ORT0,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT0_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT0_0 ,OR term" "Not OR,OR" group.word 0x32++0x01 line.word 0x00 "PLD_ORT1,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT1_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT1_0 ,OR term" "Not OR,OR" group.word 0x34++0x01 line.word 0x00 "PLD_ORT2,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT2_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT2_0 ,OR term" "Not OR,OR" group.word 0x36++0x01 line.word 0x00 "PLD_ORT3,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " group.word (0x30+0x08)++0x07 line.word 0x00 "MC_CFG_CEN_CONST,Macrocell Configuration for Carry Enable and Constant" bitfld.word 0x00 15. " PLD1_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 14. " PLD1_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 13. " PLD1_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 12. " PLD1_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " PLD1_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 10. " PLD1_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " PLD1_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 8. " PLD1_MC0_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " PLD0_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 6. " PLD0_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " PLD0_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 4. " PLD0_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " PLD0_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 2. " PLD0_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " PLD0_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 0. " PLD0_MC0_CEN ,Carry enable" "Disabled,Enabled" line.word 0x02 "MC_CFG_XORFB,Macrocell Configuration for XOR Feedback" bitfld.word 0x02 14.--15. " PLD1_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 12.--13. " PLD1_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 10.--11. " PLD1_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 8.--9. " PLD1_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 6.--7. " PLD0_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 4.--5. " PLD0_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 2.--3. " PLD0_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 0.--1. " PLD0_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" line.word 0x04 "MC_CFG_SET_RESET,Macrocell Configuration for Set and Reset" bitfld.word 0x04 15. " PLD1_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 14. " PLD1_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 13. " PLD1_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 12. " PLD1_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 11. " PLD1_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 10. " PLD1_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 9. " PLD1_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 8. " PLD1_MC0_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 7. " PLD0_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 6. " PLD0_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 5. " PLD0_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 4. " PLD0_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 3. " PLD0_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 2. " PLD0_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 1. " PLD0_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 0. " PLD0_MC0_SET_SEL ,Set select enable" "Not set,Set" line.word 0x06 "MC_CFG_BYPASS,Macrocell Configuration for Bypass" bitfld.word 0x06 14. " PLD1_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 12. " PLD1_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 10. " PLD1_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 8. " PLD1_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 6. " PLD0_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 4. " PLD0_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 2. " PLD0_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 0. " PLD0_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " group.byte (0x30+0x10)++0x10 line.byte 0x00 "CFG0,Datapath Input Selection" bitfld.byte 0x00 4.--6. " RAD1 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x00 0.--2. " RAD0 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x01 "CFG1,Datapath Input Selection" bitfld.byte 0x01 0.--2. " RAD2 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x02 "CFG2,Datapath Input Selection" bitfld.byte 0x02 4.--6. " F1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x02 0.--2. " F0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x03 "CFG3,Datapath Input Selection" bitfld.byte 0x03 4.--6. " D1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x03 0.--2. " D0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x04 "CFG4,Datapath Input Selection" bitfld.byte 0x04 4.--6. " CI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x04 0.--2. " SI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x05 "CFG5,Datapath Output Selection" bitfld.byte 0x05 4.--7. " OUT1 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x05 0.--3. " OUT0 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x06 "CFG6,Datapath Output Selection" bitfld.byte 0x06 4.--7. " OUT3 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x06 0.--3. " OUT2 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x07 "CFG7,Datapath Output Selection" bitfld.byte 0x07 4.--7. " OUT5 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x07 0.--3. " OUT4 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x08 "CFG8,Datapath Output Synchronization" hexmask.byte 0x08 0.--5. 1. " OUT_SYNC ,Output Synchronization field" line.byte 0x09 "CFG9,ALU Mask" line.byte 0x0a "CFG10,Compare 0 Mask" line.byte 0x0b "CFG11,Compare 1 Mask" line.byte 0x0c "CFG12,Datapath Static Configuration" bitfld.byte 0x0c 7. " CMASK1_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 6. " CMASK0_EN ,Datapath mask enable" "Disabled,Enabled" textline " " bitfld.byte 0x0c 5. " AMASK_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 4. " DEF_SI ,Datapath default shift value" "0,1" textline " " bitfld.byte 0x0c 2.--3. " SI_SELB ,Datapath shift in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0c 0.--1. " SI_SELA ,Datapath shift in source select" "Default,Registered,Route,Chain" line.byte 0x0d "CFG13,Datapath Static Configuration" bitfld.byte 0x0d 6.--7. " CMP_SELB ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" bitfld.byte 0x0d 4.--5. " CMP_SELA ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" textline " " bitfld.byte 0x0d 2.--3. " CI_SELB ,Datapath carry in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0d 0.--1. " CI_SELA ,Datapath carry in source select" "Default,Registered,Route,Chain" line.byte 0x0e "CFG14,Datapath Static Configuration" bitfld.byte 0x0e 7. " MSB_EN ,Datapath MSB selection enable" "Disabled,Enabled" bitfld.byte 0x0e 4.--6. " MSB_SEL ,Datapath MSB Selection" "Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7" textline " " bitfld.byte 0x0e 3. " CHAIN_CMSB ,Datapath CRC MSB chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 2. " CHAIN_FB ,Datapath CRC feedback chaining enable" "Disabled,Enabled" textline " " bitfld.byte 0x0e 1. " CHAIN1 ,Datapath condition chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 0. " CHAIN0 ,Datapath condition chaining enable" "Disabled,Enabled" line.byte 0x0f "CFG15,Datapath Static Configuration" bitfld.byte 0x0f 7. " PI_SEL ,Datapath parallel input selection" "Normal,Parallel" bitfld.byte 0x0f 6. " SHIFT_SEL ,Datapath shift out selection" "SOL_MSB,SOR" textline " " bitfld.byte 0x0f 5. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x0f 4. " NC0 ,Spare register bit" "0,1" textline " " bitfld.byte 0x0f 2.--3. " F1_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" bitfld.byte 0x0f 0.--1. " F0_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" line.byte 0x10 "CFG16,Datapath Static Configuration" bitfld.byte 0x10 7. " F1_CK_INV ,FIFO Clock Invert" "Normal,Inverted" bitfld.byte 0x10 6. " F0_CK_INV ,FIFO Clock Invert" "Normal,Inverted" textline " " bitfld.byte 0x10 5. " FIFO_FAST ,FIFO Fast Mode" "Disabled,Enabled" bitfld.byte 0x10 4. " FIFO_CAP ,FIFO Software Capture Mode" "Disabled,Enabled" textline " " bitfld.byte 0x10 3. " FIFO_EDGE ,Edge/level sensitive FIFO write control" "Level,Edge" bitfld.byte 0x10 2. " FIFO_ASYNC ,Asynchronous FIFO clocking support" "Synchronous,Asynchronous" textline " " bitfld.byte 0x10 1. " EXT_CRCPRS ,External CRC/PRS mode" "Internal,External" bitfld.byte 0x10 0. " WRK16_CONCAT ,Datapath register access mode" "Default,Concatenate" group.byte (0x30+0x24)++0x03 line.byte 0x00 "CFG20,Status input mode selection" line.byte 0x01 "CFG21,Spare register bits" bitfld.byte 0x01 1. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x01 0. " NC0 ,Spare register bit" "0,1" line.byte 0x02 "CFG22,Status Output Control" bitfld.byte 0x02 3. " SC_SYNC_MD ,SC Sync Mode" "Disabled,Enabled" bitfld.byte 0x02 2. " SC_INT_MD ,SC Interrupt Mode" "Normal,INT_MODE" textline " " bitfld.byte 0x02 0.--1. " SC_OUT_CTL ,Selects the output source for the Status and Control routing connections" "Control,Parallel,Counter,?..." line.byte 0x03 "CFG23,Counter Routing Control" bitfld.byte 0x03 5. " ROUTE_EN ,Configure the counter enable signal for routing input" "Disabled,Enabled" bitfld.byte 0x03 4. " ROUTE_LD ,Configure the counter load signal for routing input" "Disabled,Enabled" textline " " bitfld.byte 0x03 2.--3. " CNT_EN_SEL ,Selects the routing inputs for the counter enable signal" "SC_IN4,SC_IN5,SC_IN6,SC_IO" bitfld.byte 0x03 0.--1. " CNT_LD_SEL ,Selects the routing inputs for the counter load signal" "SC_IN0,SC_IN1,SC_IN2,SC_IN3" group.byte (0x30+0x28)++0x00 line.byte 0x00 "CFG24,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x29)++0x00 line.byte 0x00 "CFG25,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2A)++0x00 line.byte 0x00 "CFG26,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2B)++0x00 line.byte 0x00 "CFG27,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0x30+0x2C)++0x03 line.byte 0x00 "CFG28,Clock Selection" bitfld.byte 0x00 4.--7. " PLD1_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x00 0.--3. " PLD0_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x01 "CFG29,Clock Selection" bitfld.byte 0x01 4.--7. " SC_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x01 0.--3. " DP_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x02 "CFG30,Reset Selection Register" bitfld.byte 0x02 4. " GUDB_WR ,Enable global write operation for the configuration and working registers in this UDB" "Disabled,Enabled" bitfld.byte 0x02 3. " EN_RES_CNT ,Enable routed reset to counter/control register" "Disabled,Enabled" textline " " bitfld.byte 0x02 2. " RES_POL ,Select polarity of the routed reset control" "Not inverted,Inverted" bitfld.byte 0x02 0.--1. " RES_SEL ,Select routing input for routed reset control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" line.byte 0x03 "CFG31,Reset and Clock Input Enable" bitfld.byte 0x03 4.--5. " EXT_CK_SEL ,External clock selection" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" bitfld.byte 0x03 1. " EXT_SYNC ,Enable synchronization of selected external clock" "Disabled,Enabled" textline " " bitfld.byte 0x03 0. " NC0 ,Spare register bit" "0,1" group.word 0x60++0x01 line.word 0x00 "DCFG0,Dynamic Configuration RAM Register 0" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x62++0x01 line.word 0x00 "DCFG1,Dynamic Configuration RAM Register 1" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x64++0x01 line.word 0x00 "DCFG2,Dynamic Configuration RAM Register 2" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x66++0x01 line.word 0x00 "DCFG3,Dynamic Configuration RAM Register 3" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x68++0x01 line.word 0x00 "DCFG4,Dynamic Configuration RAM Register 4" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6A++0x01 line.word 0x00 "DCFG5,Dynamic Configuration RAM Register 5" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6C++0x01 line.word 0x00 "DCFG6,Dynamic Configuration RAM Register 6" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0x6E++0x01 line.word 0x00 "DCFG7,Dynamic Configuration RAM Register 7" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" width 0x0B tree.end tree "U 1" width 18. group.long 0x80++0x03 line.long 0x00 "PLD_IT0,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT0T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT0T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT0T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT0T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT0T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT0T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT0T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT0T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT0C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT0C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT0C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT0C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT0C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT0C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT0C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT0C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT0C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x84++0x03 line.long 0x00 "PLD_IT1,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT1T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT1T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT1T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT1T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT1T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT1T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT1T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT1T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT1C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT1C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT1C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT1C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT1C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT1C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT1C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT1C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT1C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x88++0x03 line.long 0x00 "PLD_IT2,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT2T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT2T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT2T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT2T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT2T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT2T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT2T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT2T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT2C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT2C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT2C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT2C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT2C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT2C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT2C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT2C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT2C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x8C++0x03 line.long 0x00 "PLD_IT3,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT3T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT3T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT3T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT3T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT3T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT3T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT3T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT3T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT3C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT3C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT3C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT3C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT3C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT3C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT3C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT3C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT3C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x90++0x03 line.long 0x00 "PLD_IT4,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT4T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT4T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT4T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT4T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT4T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT4T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT4T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT4T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT4C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT4C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT4C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT4C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT4C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT4C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT4C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT4C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT4C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x94++0x03 line.long 0x00 "PLD_IT5,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT5T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT5T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT5T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT5T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT5T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT5T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT5T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT5T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT5C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT5C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT5C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT5C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT5C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT5C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT5C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT5C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT5C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x98++0x03 line.long 0x00 "PLD_IT6,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT6T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT6T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT6T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT6T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT6T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT6T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT6T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT6T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT6C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT6C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT6C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT6C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT6C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT6C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT6C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT6C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT6C_0 ,Complement input term" "Not complemented,Complemented" group.long 0x9C++0x03 line.long 0x00 "PLD_IT7,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT7T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT7T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT7T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT7T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT7T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT7T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT7T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT7T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT7C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT7C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT7C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT7C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT7C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT7C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT7C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT7C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT7C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA0++0x03 line.long 0x00 "PLD_IT8,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT8T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT8T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT8T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT8T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT8T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT8T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT8T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT8T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT8C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT8C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT8C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT8C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT8C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT8C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT8C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT8C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT8C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA4++0x03 line.long 0x00 "PLD_IT9,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT9T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT9T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT9T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT9T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT9T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT9T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT9T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT9T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT9C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT9C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT9C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT9C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT9C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT9C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT9C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT9C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT9C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xA8++0x03 line.long 0x00 "PLD_IT10,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT10T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT10T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT10T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT10T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT10T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT10T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT10T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT10T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT10C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT10C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT10C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT10C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT10C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT10C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT10C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT10C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT10C_0 ,Complement input term" "Not complemented,Complemented" group.long 0xAC++0x03 line.long 0x00 "PLD_IT11,Complement Input Term Byte" bitfld.long 0x00 31. " PLD1_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 30. " PLD1_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 29. " PLD1_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 28. " PLD1_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 27. " PLD1_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 26. " PLD1_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 25. " PLD1_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 24. " PLD1_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 23. " PLD0_IT11T_7 ,True input term" "Not true,True" bitfld.long 0x00 22. " PLD0_IT11T_6 ,True input term" "Not true,True" textline " " bitfld.long 0x00 21. " PLD0_IT11T_5 ,True input term" "Not true,True" bitfld.long 0x00 20. " PLD0_IT11T_4 ,True input term" "Not true,True" textline " " bitfld.long 0x00 19. " PLD0_IT11T_3 ,True input term" "Not true,True" bitfld.long 0x00 18. " PLD0_IT11T_2 ,True input term" "Not true,True" textline " " bitfld.long 0x00 17. " PLD0_IT11T_1 ,True input term" "Not true,True" bitfld.long 0x00 16. " PLD0_IT11T_0 ,True input term" "Not true,True" textline " " bitfld.long 0x00 15. " PLD1_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 14. " PLD1_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 13. " PLD1_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 12. " PLD1_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 11. " PLD1_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 10. " PLD1_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 9. " PLD1_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 8. " PLD1_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 7. " PLD0_IT11C_7 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 6. " PLD0_IT11C_6 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 5. " PLD0_IT11C_5 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 4. " PLD0_IT11C_4 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 3. " PLD0_IT11C_3 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 2. " PLD0_IT11C_2 ,Complement input term" "Not complemented,Complemented" textline " " bitfld.long 0x00 1. " PLD0_IT11C_1 ,Complement input term" "Not complemented,Complemented" bitfld.long 0x00 0. " PLD0_IT11C_0 ,Complement input term" "Not complemented,Complemented" textline " " group.word 0xB0++0x01 line.word 0x00 "PLD_ORT0,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT0_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT0_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT0_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT0_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT0_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT0_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT0_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT0_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT0_0 ,OR term" "Not OR,OR" group.word 0xB2++0x01 line.word 0x00 "PLD_ORT1,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT1_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT1_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT1_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT1_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT1_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT1_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT1_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT1_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT1_0 ,OR term" "Not OR,OR" group.word 0xB4++0x01 line.word 0x00 "PLD_ORT2,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT2_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT2_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT2_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT2_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT2_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT2_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT2_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT2_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT2_0 ,OR term" "Not OR,OR" group.word 0xB6++0x01 line.word 0x00 "PLD_ORT3,OR Term Byte" bitfld.word 0x00 15. " PLD1_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 14. " PLD1_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 13. " PLD1_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 12. " PLD1_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 11. " PLD1_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 10. " PLD1_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 9. " PLD1_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 8. " PLD1_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 7. " PLD0_ORT_PT3_7 ,OR term" "Not OR,OR" bitfld.word 0x00 6. " PLD0_ORT_PT3_6 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 5. " PLD0_ORT_PT3_5 ,OR term" "Not OR,OR" bitfld.word 0x00 4. " PLD0_ORT_PT3_4 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 3. " PLD0_ORT_PT3_3 ,OR term" "Not OR,OR" bitfld.word 0x00 2. " PLD0_ORT_PT3_2 ,OR term" "Not OR,OR" textline " " bitfld.word 0x00 1. " PLD0_ORT_PT3_1 ,OR term" "Not OR,OR" bitfld.word 0x00 0. " PLD0_ORT_PT3_0 ,OR term" "Not OR,OR" textline " " group.word (0xB0+0x08)++0x07 line.word 0x00 "MC_CFG_CEN_CONST,Macrocell Configuration for Carry Enable and Constant" bitfld.word 0x00 15. " PLD1_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 14. " PLD1_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 13. " PLD1_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 12. " PLD1_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " PLD1_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 10. " PLD1_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " PLD1_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 8. " PLD1_MC0_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 7. " PLD0_MC3_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 6. " PLD0_MC3_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " PLD0_MC2_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 4. " PLD0_MC2_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " PLD0_MC1_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 2. " PLD0_MC1_CEN ,Carry enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " PLD0_MC0_DFF_C ,DFF Constant" "Not inverted,Inverted" bitfld.word 0x00 0. " PLD0_MC0_CEN ,Carry enable" "Disabled,Enabled" line.word 0x02 "MC_CFG_XORFB,Macrocell Configuration for XOR Feedback" bitfld.word 0x02 14.--15. " PLD1_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 12.--13. " PLD1_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 10.--11. " PLD1_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 8.--9. " PLD1_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 6.--7. " PLD0_MC3_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 4.--5. " PLD0_MC2_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" textline " " bitfld.word 0x02 2.--3. " PLD0_MC1_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" bitfld.word 0x02 0.--1. " PLD0_MC0_XORFB ,XOR feedback" "DFF,CARRY,TFF_H,TFF_L" line.word 0x04 "MC_CFG_SET_RESET,Macrocell Configuration for Set and Reset" bitfld.word 0x04 15. " PLD1_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 14. " PLD1_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 13. " PLD1_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 12. " PLD1_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 11. " PLD1_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 10. " PLD1_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 9. " PLD1_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 8. " PLD1_MC0_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 7. " PLD0_MC3_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 6. " PLD0_MC3_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 5. " PLD0_MC2_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 4. " PLD0_MC2_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 3. " PLD0_MC1_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 2. " PLD0_MC1_SET_SEL ,Set select enable" "Not set,Set" textline " " bitfld.word 0x04 1. " PLD0_MC0_RESET_SEL ,Reset select enable" "No reset,Reset" bitfld.word 0x04 0. " PLD0_MC0_SET_SEL ,Set select enable" "Not set,Set" line.word 0x06 "MC_CFG_BYPASS,Macrocell Configuration for Bypass" bitfld.word 0x06 14. " PLD1_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 12. " PLD1_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 10. " PLD1_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 8. " PLD1_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 6. " PLD0_MC3_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 4. " PLD0_MC2_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " bitfld.word 0x06 2. " PLD0_MC1_BYPASS ,Bypass selection" "Registered output,Combinational output" bitfld.word 0x06 0. " PLD0_MC0_BYPASS ,Bypass selection" "Registered output,Combinational output" textline " " group.byte (0xB0+0x10)++0x10 line.byte 0x00 "CFG0,Datapath Input Selection" bitfld.byte 0x00 4.--6. " RAD1 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x00 0.--2. " RAD0 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x01 "CFG1,Datapath Input Selection" bitfld.byte 0x01 0.--2. " RAD2 ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x02 "CFG2,Datapath Input Selection" bitfld.byte 0x02 4.--6. " F1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x02 0.--2. " F0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x03 "CFG3,Datapath Input Selection" bitfld.byte 0x03 4.--6. " D1_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x03 0.--2. " D0_LD ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x04 "CFG4,Datapath Input Selection" bitfld.byte 0x04 4.--6. " CI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." bitfld.byte 0x04 0.--2. " SI_MUX ,Datapath Permutable Input Mux" "OFF,DP_IN0,DP_IN1,DP_IN2,DP_IN3,DP_IN4,DP_IN5,?..." line.byte 0x05 "CFG5,Datapath Output Selection" bitfld.byte 0x05 4.--7. " OUT1 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x05 0.--3. " OUT0 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x06 "CFG6,Datapath Output Selection" bitfld.byte 0x06 4.--7. " OUT3 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x06 0.--3. " OUT2 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x07 "CFG7,Datapath Output Selection" bitfld.byte 0x07 4.--7. " OUT5 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" bitfld.byte 0x07 0.--3. " OUT4 ,Datapath Permutable Ouput Mux" "CE0,CL0,Z0,FF0,CE1,CL1,Z1,FF1,OV_MSB,CO_MSB,CMSBO,SO,F0_BUS_STAT,F0_BLK_STAT,F1_BUS_STAT,F1_BLK_STAT" line.byte 0x08 "CFG8,Datapath Output Synchronization" hexmask.byte 0x08 0.--5. 1. " OUT_SYNC ,Output Synchronization field" line.byte 0x09 "CFG9,ALU Mask" line.byte 0x0a "CFG10,Compare 0 Mask" line.byte 0x0b "CFG11,Compare 1 Mask" line.byte 0x0c "CFG12,Datapath Static Configuration" bitfld.byte 0x0c 7. " CMASK1_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 6. " CMASK0_EN ,Datapath mask enable" "Disabled,Enabled" textline " " bitfld.byte 0x0c 5. " AMASK_EN ,Datapath mask enable" "Disabled,Enabled" bitfld.byte 0x0c 4. " DEF_SI ,Datapath default shift value" "0,1" textline " " bitfld.byte 0x0c 2.--3. " SI_SELB ,Datapath shift in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0c 0.--1. " SI_SELA ,Datapath shift in source select" "Default,Registered,Route,Chain" line.byte 0x0d "CFG13,Datapath Static Configuration" bitfld.byte 0x0d 6.--7. " CMP_SELB ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" bitfld.byte 0x0d 4.--5. " CMP_SELA ,Datapath compare select" "A1_D1,A1_A0,A0_D1,A0_A0" textline " " bitfld.byte 0x0d 2.--3. " CI_SELB ,Datapath carry in source select" "Default,Registered,Route,Chain" bitfld.byte 0x0d 0.--1. " CI_SELA ,Datapath carry in source select" "Default,Registered,Route,Chain" line.byte 0x0e "CFG14,Datapath Static Configuration" bitfld.byte 0x0e 7. " MSB_EN ,Datapath MSB selection enable" "Disabled,Enabled" bitfld.byte 0x0e 4.--6. " MSB_SEL ,Datapath MSB Selection" "Bit0,Bit1,Bit2,Bit3,Bit4,Bit5,Bit6,Bit7" textline " " bitfld.byte 0x0e 3. " CHAIN_CMSB ,Datapath CRC MSB chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 2. " CHAIN_FB ,Datapath CRC feedback chaining enable" "Disabled,Enabled" textline " " bitfld.byte 0x0e 1. " CHAIN1 ,Datapath condition chaining enable" "Disabled,Enabled" bitfld.byte 0x0e 0. " CHAIN0 ,Datapath condition chaining enable" "Disabled,Enabled" line.byte 0x0f "CFG15,Datapath Static Configuration" bitfld.byte 0x0f 7. " PI_SEL ,Datapath parallel input selection" "Normal,Parallel" bitfld.byte 0x0f 6. " SHIFT_SEL ,Datapath shift out selection" "SOL_MSB,SOR" textline " " bitfld.byte 0x0f 5. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x0f 4. " NC0 ,Spare register bit" "0,1" textline " " bitfld.byte 0x0f 2.--3. " F1_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" bitfld.byte 0x0f 0.--1. " F0_INSEL ,Datapath FIFO Configuration" "INPUT,OUTPUT_A0,OUTPUT_A1,OUTPUT_ALU" line.byte 0x10 "CFG16,Datapath Static Configuration" bitfld.byte 0x10 7. " F1_CK_INV ,FIFO Clock Invert" "Normal,Inverted" bitfld.byte 0x10 6. " F0_CK_INV ,FIFO Clock Invert" "Normal,Inverted" textline " " bitfld.byte 0x10 5. " FIFO_FAST ,FIFO Fast Mode" "Disabled,Enabled" bitfld.byte 0x10 4. " FIFO_CAP ,FIFO Software Capture Mode" "Disabled,Enabled" textline " " bitfld.byte 0x10 3. " FIFO_EDGE ,Edge/level sensitive FIFO write control" "Level,Edge" bitfld.byte 0x10 2. " FIFO_ASYNC ,Asynchronous FIFO clocking support" "Synchronous,Asynchronous" textline " " bitfld.byte 0x10 1. " EXT_CRCPRS ,External CRC/PRS mode" "Internal,External" bitfld.byte 0x10 0. " WRK16_CONCAT ,Datapath register access mode" "Default,Concatenate" group.byte (0xB0+0x24)++0x03 line.byte 0x00 "CFG20,Status input mode selection" line.byte 0x01 "CFG21,Spare register bits" bitfld.byte 0x01 1. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x01 0. " NC0 ,Spare register bit" "0,1" line.byte 0x02 "CFG22,Status Output Control" bitfld.byte 0x02 3. " SC_SYNC_MD ,SC Sync Mode" "Disabled,Enabled" bitfld.byte 0x02 2. " SC_INT_MD ,SC Interrupt Mode" "Normal,INT_MODE" textline " " bitfld.byte 0x02 0.--1. " SC_OUT_CTL ,Selects the output source for the Status and Control routing connections" "Control,Parallel,Counter,?..." line.byte 0x03 "CFG23,Counter Routing Control" bitfld.byte 0x03 5. " ROUTE_EN ,Configure the counter enable signal for routing input" "Disabled,Enabled" bitfld.byte 0x03 4. " ROUTE_LD ,Configure the counter load signal for routing input" "Disabled,Enabled" textline " " bitfld.byte 0x03 2.--3. " CNT_EN_SEL ,Selects the routing inputs for the counter enable signal" "SC_IN4,SC_IN5,SC_IN6,SC_IO" bitfld.byte 0x03 0.--1. " CNT_LD_SEL ,Selects the routing inputs for the counter load signal" "SC_IN0,SC_IN1,SC_IN2,SC_IN3" group.byte (0xB0+0x28)++0x00 line.byte 0x00 "CFG24,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x29)++0x00 line.byte 0x00 "CFG25,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2A)++0x00 line.byte 0x00 "CFG26,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2B)++0x00 line.byte 0x00 "CFG27,PLD0 Clock Enable Selection Register" bitfld.byte 0x00 6. " RC_FRES ,Block firmware reset" "No reset,Reset" bitfld.byte 0x00 5. " RC_INV ,Inverted clock selection" "Not inverted,Inverted" textline " " bitfld.byte 0x00 4. " RC_EN_INV ,Inverted enable selection" "Not inverted,Inverted" bitfld.byte 0x00 2.--3. " RC_EN_MODE ,Select operating mode" "OFF,ON,POSEDGE,LEVEL" textline " " bitfld.byte 0x00 0.--1. " RC_EN_SEL ,Select channel route for enable control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" group.byte (0xB0+0x2C)++0x03 line.byte 0x00 "CFG28,Clock Selection" bitfld.byte 0x00 4.--7. " PLD1_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x00 0.--3. " PLD0_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x01 "CFG29,Clock Selection" bitfld.byte 0x01 4.--7. " SC_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." bitfld.byte 0x01 0.--3. " DP_CK_SEL ,Clock selection registers" "GCLK0,GCLK1,GCLK2,GCLK3,GCLK4,GCLK5,GCLK6,GCLK7,EXT_CLK,SYSCLK,?..." line.byte 0x02 "CFG30,Reset Selection Register" bitfld.byte 0x02 4. " GUDB_WR ,Enable global write operation for the configuration and working registers in this UDB" "Disabled,Enabled" bitfld.byte 0x02 3. " EN_RES_CNT ,Enable routed reset to counter/control register" "Disabled,Enabled" textline " " bitfld.byte 0x02 2. " RES_POL ,Select polarity of the routed reset control" "Not inverted,Inverted" bitfld.byte 0x02 0.--1. " RES_SEL ,Select routing input for routed reset control" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" line.byte 0x03 "CFG31,Reset and Clock Input Enable" bitfld.byte 0x03 4.--5. " EXT_CK_SEL ,External clock selection" "RC_IN0,RC_IN1,RC_IN2,RC_IN3" bitfld.byte 0x03 1. " EXT_SYNC ,Enable synchronization of selected external clock" "Disabled,Enabled" textline " " bitfld.byte 0x03 0. " NC0 ,Spare register bit" "0,1" group.word 0xE0++0x01 line.word 0x00 "DCFG0,Dynamic Configuration RAM Register 0" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE2++0x01 line.word 0x00 "DCFG1,Dynamic Configuration RAM Register 1" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE4++0x01 line.word 0x00 "DCFG2,Dynamic Configuration RAM Register 2" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE6++0x01 line.word 0x00 "DCFG3,Dynamic Configuration RAM Register 3" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xE8++0x01 line.word 0x00 "DCFG4,Dynamic Configuration RAM Register 4" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEA++0x01 line.word 0x00 "DCFG5,Dynamic Configuration RAM Register 5" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEC++0x01 line.word 0x00 "DCFG6,Dynamic Configuration RAM Register 6" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" group.word 0xEE++0x01 line.word 0x00 "DCFG7,Dynamic Configuration RAM Register 7" bitfld.word 0x00 13.--15. " FUNC ,Dynamic ALU function selection" "PASS,INC_A,DEC_A,ADD,SUB,XOR,AND,OR" bitfld.word 0x00 12. " SRC_A ,Dynamic ALU source A selection" "A0,A1" textline " " bitfld.word 0x00 10.--11. " SRC_B ,Dynamic ALU source B selection" "D0,D1,A0,A1" bitfld.word 0x00 8.--9. " SHIFT ,Dynamic shift selection" "No shift,Left shift,Right shift,Nibble swap" textline " " bitfld.word 0x00 6.--7. " A0_WR_SRC ,Dynamic A0 write source selection" "No write,ALU,D0,F0" bitfld.word 0x00 4.--5. " A1_WR_SRC ,Dynamic A1 write srouce selection" "No write,ALU,D0,F0" textline " " bitfld.word 0x00 3. " CFB_EN ,Dynamic CRC feedback selection" "Disabled,Enabled" bitfld.word 0x00 2. " CI_SEL ,Dynamic carry in selection" "CFG_A,CFG_B" textline " " bitfld.word 0x00 1. " SI_SEL ,Dynamic shift in selection" "CFG_A,CFG_B" bitfld.word 0x00 0. " CMP_SEL ,Dynamic compare selection" "CFG_A,CFG_B" width 0x0B tree.end tree "Route" width 9. group.byte 0x100++0x00 line.byte 0x00 "HC0,UDB Channel HC Tile Configuration" group.byte 0x101++0x00 line.byte 0x00 "HC1,UDB Channel HC Tile Configuration" group.byte 0x102++0x00 line.byte 0x00 "HC2,UDB Channel HC Tile Configuration" group.byte 0x103++0x00 line.byte 0x00 "HC3,UDB Channel HC Tile Configuration" group.byte 0x104++0x00 line.byte 0x00 "HC4,UDB Channel HC Tile Configuration" group.byte 0x105++0x00 line.byte 0x00 "HC5,UDB Channel HC Tile Configuration" group.byte 0x106++0x00 line.byte 0x00 "HC6,UDB Channel HC Tile Configuration" group.byte 0x107++0x00 line.byte 0x00 "HC7,UDB Channel HC Tile Configuration" group.byte 0x108++0x00 line.byte 0x00 "HC8,UDB Channel HC Tile Configuration" group.byte 0x109++0x00 line.byte 0x00 "HC9,UDB Channel HC Tile Configuration" group.byte 0x10A++0x00 line.byte 0x00 "HC10,UDB Channel HC Tile Configuration" group.byte 0x10B++0x00 line.byte 0x00 "HC11,UDB Channel HC Tile Configuration" group.byte 0x10C++0x00 line.byte 0x00 "HC12,UDB Channel HC Tile Configuration" group.byte 0x10D++0x00 line.byte 0x00 "HC13,UDB Channel HC Tile Configuration" group.byte 0x10E++0x00 line.byte 0x00 "HC14,UDB Channel HC Tile Configuration" group.byte 0x10F++0x00 line.byte 0x00 "HC15,UDB Channel HC Tile Configuration" group.byte 0x110++0x00 line.byte 0x00 "HC16,UDB Channel HC Tile Configuration" group.byte 0x111++0x00 line.byte 0x00 "HC17,UDB Channel HC Tile Configuration" group.byte 0x112++0x00 line.byte 0x00 "HC18,UDB Channel HC Tile Configuration" group.byte 0x113++0x00 line.byte 0x00 "HC19,UDB Channel HC Tile Configuration" group.byte 0x114++0x00 line.byte 0x00 "HC20,UDB Channel HC Tile Configuration" group.byte 0x115++0x00 line.byte 0x00 "HC21,UDB Channel HC Tile Configuration" group.byte 0x116++0x00 line.byte 0x00 "HC22,UDB Channel HC Tile Configuration" group.byte 0x117++0x00 line.byte 0x00 "HC23,UDB Channel HC Tile Configuration" group.byte 0x118++0x00 line.byte 0x00 "HC24,UDB Channel HC Tile Configuration" group.byte 0x119++0x00 line.byte 0x00 "HC25,UDB Channel HC Tile Configuration" group.byte 0x11A++0x00 line.byte 0x00 "HC26,UDB Channel HC Tile Configuration" group.byte 0x11B++0x00 line.byte 0x00 "HC27,UDB Channel HC Tile Configuration" group.byte 0x11C++0x00 line.byte 0x00 "HC28,UDB Channel HC Tile Configuration" group.byte 0x11D++0x00 line.byte 0x00 "HC29,UDB Channel HC Tile Configuration" group.byte 0x11E++0x00 line.byte 0x00 "HC30,UDB Channel HC Tile Configuration" group.byte 0x11F++0x00 line.byte 0x00 "HC31,UDB Channel HC Tile Configuration" group.byte 0x120++0x00 line.byte 0x00 "HC32,UDB Channel HC Tile Configuration" group.byte 0x121++0x00 line.byte 0x00 "HC33,UDB Channel HC Tile Configuration" group.byte 0x122++0x00 line.byte 0x00 "HC34,UDB Channel HC Tile Configuration" group.byte 0x123++0x00 line.byte 0x00 "HC35,UDB Channel HC Tile Configuration" group.byte 0x124++0x00 line.byte 0x00 "HC36,UDB Channel HC Tile Configuration" group.byte 0x125++0x00 line.byte 0x00 "HC37,UDB Channel HC Tile Configuration" group.byte 0x126++0x00 line.byte 0x00 "HC38,UDB Channel HC Tile Configuration" group.byte 0x127++0x00 line.byte 0x00 "HC39,UDB Channel HC Tile Configuration" group.byte 0x128++0x00 line.byte 0x00 "HC40,UDB Channel HC Tile Configuration" group.byte 0x129++0x00 line.byte 0x00 "HC41,UDB Channel HC Tile Configuration" group.byte 0x12A++0x00 line.byte 0x00 "HC42,UDB Channel HC Tile Configuration" group.byte 0x12B++0x00 line.byte 0x00 "HC43,UDB Channel HC Tile Configuration" group.byte 0x12C++0x00 line.byte 0x00 "HC44,UDB Channel HC Tile Configuration" group.byte 0x12D++0x00 line.byte 0x00 "HC45,UDB Channel HC Tile Configuration" group.byte 0x12E++0x00 line.byte 0x00 "HC46,UDB Channel HC Tile Configuration" group.byte 0x12F++0x00 line.byte 0x00 "HC47,UDB Channel HC Tile Configuration" group.byte 0x130++0x00 line.byte 0x00 "HC48,UDB Channel HC Tile Configuration" group.byte 0x131++0x00 line.byte 0x00 "HC49,UDB Channel HC Tile Configuration" group.byte 0x132++0x00 line.byte 0x00 "HC50,UDB Channel HC Tile Configuration" group.byte 0x133++0x00 line.byte 0x00 "HC51,UDB Channel HC Tile Configuration" group.byte 0x134++0x00 line.byte 0x00 "HC52,UDB Channel HC Tile Configuration" group.byte 0x135++0x00 line.byte 0x00 "HC53,UDB Channel HC Tile Configuration" group.byte 0x136++0x00 line.byte 0x00 "HC54,UDB Channel HC Tile Configuration" group.byte 0x137++0x00 line.byte 0x00 "HC55,UDB Channel HC Tile Configuration" group.byte 0x138++0x00 line.byte 0x00 "HC56,UDB Channel HC Tile Configuration" group.byte 0x139++0x00 line.byte 0x00 "HC57,UDB Channel HC Tile Configuration" group.byte 0x13A++0x00 line.byte 0x00 "HC58,UDB Channel HC Tile Configuration" group.byte 0x13B++0x00 line.byte 0x00 "HC59,UDB Channel HC Tile Configuration" group.byte 0x13C++0x00 line.byte 0x00 "HC60,UDB Channel HC Tile Configuration" group.byte 0x13D++0x00 line.byte 0x00 "HC61,UDB Channel HC Tile Configuration" group.byte 0x13E++0x00 line.byte 0x00 "HC62,UDB Channel HC Tile Configuration" group.byte 0x13F++0x00 line.byte 0x00 "HC63,UDB Channel HC Tile Configuration" group.byte 0x140++0x00 line.byte 0x00 "HC64,UDB Channel HC Tile Configuration" group.byte 0x141++0x00 line.byte 0x00 "HC65,UDB Channel HC Tile Configuration" group.byte 0x142++0x00 line.byte 0x00 "HC66,UDB Channel HC Tile Configuration" group.byte 0x143++0x00 line.byte 0x00 "HC67,UDB Channel HC Tile Configuration" group.byte 0x144++0x00 line.byte 0x00 "HC68,UDB Channel HC Tile Configuration" group.byte 0x145++0x00 line.byte 0x00 "HC69,UDB Channel HC Tile Configuration" group.byte 0x146++0x00 line.byte 0x00 "HC70,UDB Channel HC Tile Configuration" group.byte 0x147++0x00 line.byte 0x00 "HC71,UDB Channel HC Tile Configuration" group.byte 0x148++0x00 line.byte 0x00 "HC72,UDB Channel HC Tile Configuration" group.byte 0x149++0x00 line.byte 0x00 "HC73,UDB Channel HC Tile Configuration" group.byte 0x14A++0x00 line.byte 0x00 "HC74,UDB Channel HC Tile Configuration" group.byte 0x14B++0x00 line.byte 0x00 "HC75,UDB Channel HC Tile Configuration" group.byte 0x14C++0x00 line.byte 0x00 "HC76,UDB Channel HC Tile Configuration" group.byte 0x14D++0x00 line.byte 0x00 "HC77,UDB Channel HC Tile Configuration" group.byte 0x14E++0x00 line.byte 0x00 "HC78,UDB Channel HC Tile Configuration" group.byte 0x14F++0x00 line.byte 0x00 "HC79,UDB Channel HC Tile Configuration" group.byte 0x150++0x00 line.byte 0x00 "HC80,UDB Channel HC Tile Configuration" group.byte 0x151++0x00 line.byte 0x00 "HC81,UDB Channel HC Tile Configuration" group.byte 0x152++0x00 line.byte 0x00 "HC82,UDB Channel HC Tile Configuration" group.byte 0x153++0x00 line.byte 0x00 "HC83,UDB Channel HC Tile Configuration" group.byte 0x154++0x00 line.byte 0x00 "HC84,UDB Channel HC Tile Configuration" group.byte 0x155++0x00 line.byte 0x00 "HC85,UDB Channel HC Tile Configuration" group.byte 0x156++0x00 line.byte 0x00 "HC86,UDB Channel HC Tile Configuration" group.byte 0x157++0x00 line.byte 0x00 "HC87,UDB Channel HC Tile Configuration" group.byte 0x158++0x00 line.byte 0x00 "HC88,UDB Channel HC Tile Configuration" group.byte 0x159++0x00 line.byte 0x00 "HC89,UDB Channel HC Tile Configuration" group.byte 0x15A++0x00 line.byte 0x00 "HC90,UDB Channel HC Tile Configuration" group.byte 0x15B++0x00 line.byte 0x00 "HC91,UDB Channel HC Tile Configuration" group.byte 0x15C++0x00 line.byte 0x00 "HC92,UDB Channel HC Tile Configuration" group.byte 0x15D++0x00 line.byte 0x00 "HC93,UDB Channel HC Tile Configuration" group.byte 0x15E++0x00 line.byte 0x00 "HC94,UDB Channel HC Tile Configuration" group.byte 0x15F++0x00 line.byte 0x00 "HC95,UDB Channel HC Tile Configuration" group.byte 0x160++0x00 line.byte 0x00 "HC96,UDB Channel HC Tile Configuration" group.byte 0x161++0x00 line.byte 0x00 "HC97,UDB Channel HC Tile Configuration" group.byte 0x162++0x00 line.byte 0x00 "HC98,UDB Channel HC Tile Configuration" group.byte 0x163++0x00 line.byte 0x00 "HC99,UDB Channel HC Tile Configuration" group.byte 0x164++0x00 line.byte 0x00 "HC100,UDB Channel HC Tile Configuration" group.byte 0x165++0x00 line.byte 0x00 "HC101,UDB Channel HC Tile Configuration" group.byte 0x166++0x00 line.byte 0x00 "HC102,UDB Channel HC Tile Configuration" group.byte 0x167++0x00 line.byte 0x00 "HC103,UDB Channel HC Tile Configuration" group.byte 0x168++0x00 line.byte 0x00 "HC104,UDB Channel HC Tile Configuration" group.byte 0x169++0x00 line.byte 0x00 "HC105,UDB Channel HC Tile Configuration" group.byte 0x16A++0x00 line.byte 0x00 "HC106,UDB Channel HC Tile Configuration" group.byte 0x16B++0x00 line.byte 0x00 "HC107,UDB Channel HC Tile Configuration" group.byte 0x16C++0x00 line.byte 0x00 "HC108,UDB Channel HC Tile Configuration" group.byte 0x16D++0x00 line.byte 0x00 "HC109,UDB Channel HC Tile Configuration" group.byte 0x16E++0x00 line.byte 0x00 "HC110,UDB Channel HC Tile Configuration" group.byte 0x16F++0x00 line.byte 0x00 "HC111,UDB Channel HC Tile Configuration" group.byte 0x170++0x00 line.byte 0x00 "HC112,UDB Channel HC Tile Configuration" group.byte 0x171++0x00 line.byte 0x00 "HC113,UDB Channel HC Tile Configuration" group.byte 0x172++0x00 line.byte 0x00 "HC114,UDB Channel HC Tile Configuration" group.byte 0x173++0x00 line.byte 0x00 "HC115,UDB Channel HC Tile Configuration" group.byte 0x174++0x00 line.byte 0x00 "HC116,UDB Channel HC Tile Configuration" group.byte 0x175++0x00 line.byte 0x00 "HC117,UDB Channel HC Tile Configuration" group.byte 0x176++0x00 line.byte 0x00 "HC118,UDB Channel HC Tile Configuration" group.byte 0x177++0x00 line.byte 0x00 "HC119,UDB Channel HC Tile Configuration" group.byte 0x178++0x00 line.byte 0x00 "HC120,UDB Channel HC Tile Configuration" group.byte 0x179++0x00 line.byte 0x00 "HC121,UDB Channel HC Tile Configuration" group.byte 0x17A++0x00 line.byte 0x00 "HC122,UDB Channel HC Tile Configuration" group.byte 0x17B++0x00 line.byte 0x00 "HC123,UDB Channel HC Tile Configuration" group.byte 0x17C++0x00 line.byte 0x00 "HC124,UDB Channel HC Tile Configuration" group.byte 0x17D++0x00 line.byte 0x00 "HC125,UDB Channel HC Tile Configuration" group.byte 0x17E++0x00 line.byte 0x00 "HC126,UDB Channel HC Tile Configuration" group.byte 0x17F++0x00 line.byte 0x00 "HC127,UDB Channel HC Tile Configuration" group.byte 0x180++0x00 line.byte 0x00 "HV_L0,UDB Channel HV Tile Configuration" group.byte 0x181++0x00 line.byte 0x00 "HV_L1,UDB Channel HV Tile Configuration" group.byte 0x182++0x00 line.byte 0x00 "HV_L2,UDB Channel HV Tile Configuration" group.byte 0x183++0x00 line.byte 0x00 "HV_L3,UDB Channel HV Tile Configuration" group.byte 0x184++0x00 line.byte 0x00 "HV_L4,UDB Channel HV Tile Configuration" group.byte 0x185++0x00 line.byte 0x00 "HV_L5,UDB Channel HV Tile Configuration" group.byte 0x186++0x00 line.byte 0x00 "HV_L6,UDB Channel HV Tile Configuration" group.byte 0x187++0x00 line.byte 0x00 "HV_L7,UDB Channel HV Tile Configuration" group.byte 0x188++0x00 line.byte 0x00 "HV_L8,UDB Channel HV Tile Configuration" group.byte 0x189++0x00 line.byte 0x00 "HV_L9,UDB Channel HV Tile Configuration" group.byte 0x18A++0x00 line.byte 0x00 "HV_L10,UDB Channel HV Tile Configuration" group.byte 0x18B++0x00 line.byte 0x00 "HV_L11,UDB Channel HV Tile Configuration" group.byte 0x18C++0x00 line.byte 0x00 "HV_L12,UDB Channel HV Tile Configuration" group.byte 0x18D++0x00 line.byte 0x00 "HV_L13,UDB Channel HV Tile Configuration" group.byte 0x18E++0x00 line.byte 0x00 "HV_L14,UDB Channel HV Tile Configuration" group.byte 0x18F++0x00 line.byte 0x00 "HV_L15,UDB Channel HV Tile Configuration" group.byte 0x190++0x00 line.byte 0x00 "HS0,UDB Channel HS Tile Configuration" group.byte 0x191++0x00 line.byte 0x00 "HS1,UDB Channel HS Tile Configuration" group.byte 0x192++0x00 line.byte 0x00 "HS2,UDB Channel HS Tile Configuration" group.byte 0x193++0x00 line.byte 0x00 "HS3,UDB Channel HS Tile Configuration" group.byte 0x194++0x00 line.byte 0x00 "HS4,UDB Channel HS Tile Configuration" group.byte 0x195++0x00 line.byte 0x00 "HS5,UDB Channel HS Tile Configuration" group.byte 0x196++0x00 line.byte 0x00 "HS6,UDB Channel HS Tile Configuration" group.byte 0x197++0x00 line.byte 0x00 "HS7,UDB Channel HS Tile Configuration" group.byte 0x198++0x00 line.byte 0x00 "HS8,UDB Channel HS Tile Configuration" group.byte 0x199++0x00 line.byte 0x00 "HS9,UDB Channel HS Tile Configuration" group.byte 0x19A++0x00 line.byte 0x00 "HS10,UDB Channel HS Tile Configuration" group.byte 0x19B++0x00 line.byte 0x00 "HS11,UDB Channel HS Tile Configuration" group.byte 0x19C++0x00 line.byte 0x00 "HS12,UDB Channel HS Tile Configuration" group.byte 0x19D++0x00 line.byte 0x00 "HS13,UDB Channel HS Tile Configuration" group.byte 0x19E++0x00 line.byte 0x00 "HS14,UDB Channel HS Tile Configuration" group.byte 0x19F++0x00 line.byte 0x00 "HS15,UDB Channel HS Tile Configuration" group.byte 0x1A0++0x00 line.byte 0x00 "HS16,UDB Channel HS Tile Configuration" group.byte 0x1A1++0x00 line.byte 0x00 "HS17,UDB Channel HS Tile Configuration" group.byte 0x1A2++0x00 line.byte 0x00 "HS18,UDB Channel HS Tile Configuration" group.byte 0x1A3++0x00 line.byte 0x00 "HS19,UDB Channel HS Tile Configuration" group.byte 0x1A4++0x00 line.byte 0x00 "HS20,UDB Channel HS Tile Configuration" group.byte 0x1A5++0x00 line.byte 0x00 "HS21,UDB Channel HS Tile Configuration" group.byte 0x1A6++0x00 line.byte 0x00 "HS22,UDB Channel HS Tile Configuration" group.byte 0x1A7++0x00 line.byte 0x00 "HS23,UDB Channel HS Tile Configuration" group.byte 0x1A8++0x00 line.byte 0x00 "HV_R0,UDB Channel HV Tile Configuration" group.byte 0x1A9++0x00 line.byte 0x00 "HV_R1,UDB Channel HV Tile Configuration" group.byte 0x1AA++0x00 line.byte 0x00 "HV_R2,UDB Channel HV Tile Configuration" group.byte 0x1AB++0x00 line.byte 0x00 "HV_R3,UDB Channel HV Tile Configuration" group.byte 0x1AC++0x00 line.byte 0x00 "HV_R4,UDB Channel HV Tile Configuration" group.byte 0x1AD++0x00 line.byte 0x00 "HV_R5,UDB Channel HV Tile Configuration" group.byte 0x1AE++0x00 line.byte 0x00 "HV_R6,UDB Channel HV Tile Configuration" group.byte 0x1AF++0x00 line.byte 0x00 "HV_R7,UDB Channel HV Tile Configuration" group.byte 0x1B0++0x00 line.byte 0x00 "HV_R8,UDB Channel HV Tile Configuration" group.byte 0x1B1++0x00 line.byte 0x00 "HV_R9,UDB Channel HV Tile Configuration" group.byte 0x1B2++0x00 line.byte 0x00 "HV_R10,UDB Channel HV Tile Configuration" group.byte 0x1B3++0x00 line.byte 0x00 "HV_R11,UDB Channel HV Tile Configuration" group.byte 0x1B4++0x00 line.byte 0x00 "HV_R12,UDB Channel HV Tile Configuration" group.byte 0x1B5++0x00 line.byte 0x00 "HV_R13,UDB Channel HV Tile Configuration" group.byte 0x1B6++0x00 line.byte 0x00 "HV_R14,UDB Channel HV Tile Configuration" group.byte 0x1B7++0x00 line.byte 0x00 "HV_R15,UDB Channel HV Tile Configuration" group.byte 0x1C0++0x00 line.byte 0x00 "PLD0IN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1C2++0x00 line.byte 0x00 "PLD0IN1,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1C4++0x00 line.byte 0x00 "PLD0IN2,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CA++0x00 line.byte 0x00 "PLD1IN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CC++0x00 line.byte 0x00 "PLD1IN1,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1CE++0x00 line.byte 0x00 "PLD1IN2,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d0++0x00 line.byte 0x00 "DPIN0,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d2++0x00 line.byte 0x00 "DPIN1,UDB Channel PI Tile Configuration (half populated)" hexmask.byte 0x00 4.--5. 1. " PI_BOT ,RAM configuration for BOTTOM UDB port interface configuration" hexmask.byte 0x00 2.--3. 1. " PI_TOP ,RAM configuration for TOP UDB port interface configuration" group.byte 0x1d6++0x00 line.byte 0x00 "SCIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1d8++0x00 line.byte 0x00 "SCIOIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1de++0x00 line.byte 0x00 "RCIN,UDB Channel PI Tile Configuration" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration nibble for BOTTOM UDB port interface configuration" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration nibble for TOP UDB port interface configuration" group.byte 0x1E0++0x00 line.byte 0x00 "VS0,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E2++0x00 line.byte 0x00 "VS1,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E4++0x00 line.byte 0x00 "VS2,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E6++0x00 line.byte 0x00 "VS3,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1E8++0x00 line.byte 0x00 "VS4,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EA++0x00 line.byte 0x00 "VS5,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EC++0x00 line.byte 0x00 "VS6,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" group.byte 0x1EE++0x00 line.byte 0x00 "VS7,UDB Channel VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration nibble for BOTTOM UDB vertical segmentation configuration" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration nibble for TOP UDB vertical segmentation configuration" width 0x0B tree.end tree.end width 0x0B tree.end tree.end tree "PHUB (PHUB configuration)" base ad:0x40007000 width 9. group.long 0x00++0x07 line.long 0x00 "CFG,PHUB Configuration" bitfld.long 0x00 27.--30. " PRUNE_CLOCK_DLY ,Specifies the amount of delay of prune_clock with respect to clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--26. " BUS_TIMEOUT ,Specifies the number of wait states PHUB will allow before timing out the AHB transaction" "Disabled,1 state,2 states,4 states,8 states,16 states,32 states,64 states" textline " " bitfld.long 0x00 23. " SIMPLE_PRI ,Simple Priority Utilized" "Fairness algorithm,Simple priority" bitfld.long 0x00 22. " PRI_INT_EN[6] ,Priority Interrupt Enable bit 6" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " PRI_INT_EN[5] ,Priority Interrupt Enable bit 5" "Disabled,Enabled" bitfld.long 0x00 20. " PRI_INT_EN[4] ,Priority Interrupt Enable bit 4" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " PRI_INT_EN[3] ,Priority Interrupt Enable bit 3" "Disabled,Enabled" bitfld.long 0x00 18. " PRI_INT_EN[2] ,Priority Interrupt Enable bit 2" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " PRI_INT_EN[1] ,Priority Interrupt Enable bit 1" "Disabled,Enabled" bitfld.long 0x00 16. " PRI_INT_EN[0] ,Priority Interrupt Enable bit 0" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " SPK_CPU_PRI[14] ,Spoke DMA/CPU Priority bit 14" "DMA,CPU" bitfld.long 0x00 14. " SPK_CPU_PRI[13] ,Spoke DMA/CPU Priority bit 13" "DMA,CPU" textline " " bitfld.long 0x00 13. " SPK_CPU_PRI[12] ,Spoke DMA/CPU Priority bit 12" "DMA,CPU" bitfld.long 0x00 12. " SPK_CPU_PRI[11] ,Spoke DMA/CPU Priority bit 11" "DMA,CPU" textline " " bitfld.long 0x00 11. " SPK_CPU_PRI[10] ,Spoke DMA/CPU Priority bit 10" "DMA,CPU" bitfld.long 0x00 10. " SPK_CPU_PRI[9] ,Spoke DMA/CPU Priority bit 9" "DMA,CPU" textline " " bitfld.long 0x00 9. " SPK_CPU_PRI[8] ,Spoke DMA/CPU Priority bit 8" "DMA,CPU" bitfld.long 0x00 8. " SPK_CPU_PRI[7] ,Spoke DMA/CPU Priority bit 7" "DMA,CPU" textline " " bitfld.long 0x00 7. " SPK_CPU_PRI[6] ,Spoke DMA/CPU Priority bit 6" "DMA,CPU" bitfld.long 0x00 6. " SPK_CPU_PRI[5] ,Spoke DMA/CPU Priority bit 5" "DMA,CPU" textline " " bitfld.long 0x00 5. " SPK_CPU_PRI[4] ,Spoke DMA/CPU Priority bit 4" "DMA,CPU" bitfld.long 0x00 4. " SPK_CPU_PRI[3] ,Spoke DMA/CPU Priority bit 3" "DMA,CPU" textline " " bitfld.long 0x00 3. " SPK_CPU_PRI[2] ,Spoke DMA/CPU Priority bit 2" "DMA,CPU" bitfld.long 0x00 2. " SPK_CPU_PRI[1] ,Spoke DMA/CPU Priority bit 1" "DMA,CPU" textline " " bitfld.long 0x00 1. " SPK_CPU_PRI[0] ,Spoke DMA/CPU Priority bit 0" "DMA,CPU" bitfld.long 0x00 0. " CPU_CLKDIF ,CPU CLKDIF" "Performance mode,Mixed frequency mode" line.long 0x04 "ERR,PHUB Error Detection" eventfld.long 0x04 3. " PERIPH_ERR ,Peripheral Error" "No error,Error" eventfld.long 0x04 2. " UNPOP_ACC ,Unpop Access" "No access,Access" textline " " eventfld.long 0x04 1. " BUS_TIMEOUT ,Bus Timeout Occurred" "Not occurred,Occurred" eventfld.long 0x04 0. " BOOT_DMA_FAIL ,Boot DMA Fails" "Not failed,Failed" rgroup.long 0x08++0x03 line.long 0x00 "ERR_ADR,PHUB Error Address" width 16. tree "CFGMEM Registers" group.long 0x10++0x07 "Channel 0" line.long 0x00 "BASIC_CFG0,Channel 0 Basic Configuration Register" bitfld.long 0x00 5. " WORK_SEP ,Work Separately" "Not separately,Separately" bitfld.long 0x00 4. " RR_EN ,Round-Robin enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " PRI ,Channel priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Channel Enable" "Disabled,Enabled" line.long 0x04 "ACTION0,Channel 0 Action" bitfld.long 0x04 2. " CPU_TERM_CHAIN ,CPU Termination TD Chain" "Not terminated,Terminated" bitfld.long 0x04 1. " CPU_TERM_TD ,CPU Termination Current TD" "Not terminated,Terminated" textline " " bitfld.long 0x04 0. " CPU_REQ ,CPU Request" "Not requested,Requested" rgroup.long (0x10+0x08)++0x03 line.long 0x00 "BASIC_STATUS0,Channel 0 Basic Status Register" hexmask.long.byte 0x00 8.--14. 1. " TD_PTR ,Address pointer to the current CH0_ORIG_TD0/1 in the chain" bitfld.long 0x00 4.--7. " RR_CNT ,Round-Robin counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " TD_ACTIVE ,Channel Serviced by DMAC" "Not serviced,Serviced" bitfld.long 0x00 0. " CHAIN_ACTIVE ,TD Chain Active" "Not active,Active" group.long 0x20++0x07 "Channel 1" line.long 0x00 "BASIC_CFG1,Channel 1 Basic Configuration Register" bitfld.long 0x00 5. " WORK_SEP ,Work Separately" "Not separately,Separately" bitfld.long 0x00 4. " RR_EN ,Round-Robin enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " PRI ,Channel priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Channel Enable" "Disabled,Enabled" line.long 0x04 "ACTION1,Channel 1 Action" bitfld.long 0x04 2. " CPU_TERM_CHAIN ,CPU Termination TD Chain" "Not terminated,Terminated" bitfld.long 0x04 1. " CPU_TERM_TD ,CPU Termination Current TD" "Not terminated,Terminated" textline " " bitfld.long 0x04 0. " CPU_REQ ,CPU Request" "Not requested,Requested" rgroup.long (0x20+0x08)++0x03 line.long 0x00 "BASIC_STATUS1,Channel 1 Basic Status Register" hexmask.long.byte 0x00 8.--14. 1. " TD_PTR ,Address pointer to the current CH1_ORIG_TD0/1 in the chain" bitfld.long 0x00 4.--7. " RR_CNT ,Round-Robin counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " TD_ACTIVE ,Channel Serviced by DMAC" "Not serviced,Serviced" bitfld.long 0x00 0. " CHAIN_ACTIVE ,TD Chain Active" "Not active,Active" group.long 0x30++0x07 "Channel 2" line.long 0x00 "BASIC_CFG2,Channel 2 Basic Configuration Register" bitfld.long 0x00 5. " WORK_SEP ,Work Separately" "Not separately,Separately" bitfld.long 0x00 4. " RR_EN ,Round-Robin enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " PRI ,Channel priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Channel Enable" "Disabled,Enabled" line.long 0x04 "ACTION2,Channel 2 Action" bitfld.long 0x04 2. " CPU_TERM_CHAIN ,CPU Termination TD Chain" "Not terminated,Terminated" bitfld.long 0x04 1. " CPU_TERM_TD ,CPU Termination Current TD" "Not terminated,Terminated" textline " " bitfld.long 0x04 0. " CPU_REQ ,CPU Request" "Not requested,Requested" rgroup.long (0x30+0x08)++0x03 line.long 0x00 "BASIC_STATUS2,Channel 2 Basic Status Register" hexmask.long.byte 0x00 8.--14. 1. " TD_PTR ,Address pointer to the current CH2_ORIG_TD0/1 in the chain" bitfld.long 0x00 4.--7. " RR_CNT ,Round-Robin counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " TD_ACTIVE ,Channel Serviced by DMAC" "Not serviced,Serviced" bitfld.long 0x00 0. " CHAIN_ACTIVE ,TD Chain Active" "Not active,Active" group.long 0x40++0x07 "Channel 3" line.long 0x00 "BASIC_CFG3,Channel 3 Basic Configuration Register" bitfld.long 0x00 5. " WORK_SEP ,Work Separately" "Not separately,Separately" bitfld.long 0x00 4. " RR_EN ,Round-Robin enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " PRI ,Channel priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Channel Enable" "Disabled,Enabled" line.long 0x04 "ACTION3,Channel 3 Action" bitfld.long 0x04 2. " CPU_TERM_CHAIN ,CPU Termination TD Chain" "Not terminated,Terminated" bitfld.long 0x04 1. " CPU_TERM_TD ,CPU Termination Current TD" "Not terminated,Terminated" textline " " bitfld.long 0x04 0. " CPU_REQ ,CPU Request" "Not requested,Requested" rgroup.long (0x40+0x08)++0x03 line.long 0x00 "BASIC_STATUS3,Channel 3 Basic Status Register" hexmask.long.byte 0x00 8.--14. 1. " TD_PTR ,Address pointer to the current CH3_ORIG_TD0/1 in the chain" bitfld.long 0x00 4.--7. " RR_CNT ,Round-Robin counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " TD_ACTIVE ,Channel Serviced by DMAC" "Not serviced,Serviced" bitfld.long 0x00 0. " CHAIN_ACTIVE ,TD Chain Active" "Not active,Active" group.long 0x50++0x07 "Channel 4" line.long 0x00 "BASIC_CFG4,Channel 4 Basic Configuration Register" bitfld.long 0x00 5. " WORK_SEP ,Work Separately" "Not separately,Separately" bitfld.long 0x00 4. " RR_EN ,Round-Robin enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " PRI ,Channel priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Channel Enable" "Disabled,Enabled" line.long 0x04 "ACTION4,Channel 4 Action" bitfld.long 0x04 2. " CPU_TERM_CHAIN ,CPU Termination TD Chain" "Not terminated,Terminated" bitfld.long 0x04 1. " CPU_TERM_TD ,CPU Termination Current TD" "Not terminated,Terminated" textline " " bitfld.long 0x04 0. " CPU_REQ ,CPU Request" "Not requested,Requested" rgroup.long (0x50+0x08)++0x03 line.long 0x00 "BASIC_STATUS4,Channel 4 Basic Status Register" hexmask.long.byte 0x00 8.--14. 1. " TD_PTR ,Address pointer to the current CH4_ORIG_TD0/1 in the chain" bitfld.long 0x00 4.--7. " RR_CNT ,Round-Robin counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " TD_ACTIVE ,Channel Serviced by DMAC" "Not serviced,Serviced" bitfld.long 0x00 0. " CHAIN_ACTIVE ,TD Chain Active" "Not active,Active" group.long 0x60++0x07 "Channel 5" line.long 0x00 "BASIC_CFG5,Channel 5 Basic Configuration Register" bitfld.long 0x00 5. " WORK_SEP ,Work Separately" "Not separately,Separately" bitfld.long 0x00 4. " RR_EN ,Round-Robin enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " PRI ,Channel priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Channel Enable" "Disabled,Enabled" line.long 0x04 "ACTION5,Channel 5 Action" bitfld.long 0x04 2. " CPU_TERM_CHAIN ,CPU Termination TD Chain" "Not terminated,Terminated" bitfld.long 0x04 1. " CPU_TERM_TD ,CPU Termination Current TD" "Not terminated,Terminated" textline " " bitfld.long 0x04 0. " CPU_REQ ,CPU Request" "Not requested,Requested" rgroup.long (0x60+0x08)++0x03 line.long 0x00 "BASIC_STATUS5,Channel 5 Basic Status Register" hexmask.long.byte 0x00 8.--14. 1. " TD_PTR ,Address pointer to the current CH5_ORIG_TD0/1 in the chain" bitfld.long 0x00 4.--7. " RR_CNT ,Round-Robin counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " TD_ACTIVE ,Channel Serviced by DMAC" "Not serviced,Serviced" bitfld.long 0x00 0. " CHAIN_ACTIVE ,TD Chain Active" "Not active,Active" group.long 0x70++0x07 "Channel 6" line.long 0x00 "BASIC_CFG6,Channel 6 Basic Configuration Register" bitfld.long 0x00 5. " WORK_SEP ,Work Separately" "Not separately,Separately" bitfld.long 0x00 4. " RR_EN ,Round-Robin enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " PRI ,Channel priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Channel Enable" "Disabled,Enabled" line.long 0x04 "ACTION6,Channel 6 Action" bitfld.long 0x04 2. " CPU_TERM_CHAIN ,CPU Termination TD Chain" "Not terminated,Terminated" bitfld.long 0x04 1. " CPU_TERM_TD ,CPU Termination Current TD" "Not terminated,Terminated" textline " " bitfld.long 0x04 0. " CPU_REQ ,CPU Request" "Not requested,Requested" rgroup.long (0x70+0x08)++0x03 line.long 0x00 "BASIC_STATUS6,Channel 6 Basic Status Register" hexmask.long.byte 0x00 8.--14. 1. " TD_PTR ,Address pointer to the current CH6_ORIG_TD0/1 in the chain" bitfld.long 0x00 4.--7. " RR_CNT ,Round-Robin counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " TD_ACTIVE ,Channel Serviced by DMAC" "Not serviced,Serviced" bitfld.long 0x00 0. " CHAIN_ACTIVE ,TD Chain Active" "Not active,Active" group.long 0x80++0x07 "Channel 7" line.long 0x00 "BASIC_CFG7,Channel 7 Basic Configuration Register" bitfld.long 0x00 5. " WORK_SEP ,Work Separately" "Not separately,Separately" bitfld.long 0x00 4. " RR_EN ,Round-Robin enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " PRI ,Channel priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Channel Enable" "Disabled,Enabled" line.long 0x04 "ACTION7,Channel 7 Action" bitfld.long 0x04 2. " CPU_TERM_CHAIN ,CPU Termination TD Chain" "Not terminated,Terminated" bitfld.long 0x04 1. " CPU_TERM_TD ,CPU Termination Current TD" "Not terminated,Terminated" textline " " bitfld.long 0x04 0. " CPU_REQ ,CPU Request" "Not requested,Requested" rgroup.long (0x80+0x08)++0x03 line.long 0x00 "BASIC_STATUS7,Channel 7 Basic Status Register" hexmask.long.byte 0x00 8.--14. 1. " TD_PTR ,Address pointer to the current CH7_ORIG_TD0/1 in the chain" bitfld.long 0x00 4.--7. " RR_CNT ,Round-Robin counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " TD_ACTIVE ,Channel Serviced by DMAC" "Not serviced,Serviced" bitfld.long 0x00 0. " CHAIN_ACTIVE ,TD Chain Active" "Not active,Active" group.long 0x90++0x07 "Channel 8" line.long 0x00 "BASIC_CFG8,Channel 8 Basic Configuration Register" bitfld.long 0x00 5. " WORK_SEP ,Work Separately" "Not separately,Separately" bitfld.long 0x00 4. " RR_EN ,Round-Robin enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " PRI ,Channel priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Channel Enable" "Disabled,Enabled" line.long 0x04 "ACTION8,Channel 8 Action" bitfld.long 0x04 2. " CPU_TERM_CHAIN ,CPU Termination TD Chain" "Not terminated,Terminated" bitfld.long 0x04 1. " CPU_TERM_TD ,CPU Termination Current TD" "Not terminated,Terminated" textline " " bitfld.long 0x04 0. " CPU_REQ ,CPU Request" "Not requested,Requested" rgroup.long (0x90+0x08)++0x03 line.long 0x00 "BASIC_STATUS8,Channel 8 Basic Status Register" hexmask.long.byte 0x00 8.--14. 1. " TD_PTR ,Address pointer to the current CH8_ORIG_TD0/1 in the chain" bitfld.long 0x00 4.--7. " RR_CNT ,Round-Robin counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " TD_ACTIVE ,Channel Serviced by DMAC" "Not serviced,Serviced" bitfld.long 0x00 0. " CHAIN_ACTIVE ,TD Chain Active" "Not active,Active" group.long 0xA0++0x07 "Channel 9" line.long 0x00 "BASIC_CFG9,Channel 9 Basic Configuration Register" bitfld.long 0x00 5. " WORK_SEP ,Work Separately" "Not separately,Separately" bitfld.long 0x00 4. " RR_EN ,Round-Robin enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " PRI ,Channel priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Channel Enable" "Disabled,Enabled" line.long 0x04 "ACTION9,Channel 9 Action" bitfld.long 0x04 2. " CPU_TERM_CHAIN ,CPU Termination TD Chain" "Not terminated,Terminated" bitfld.long 0x04 1. " CPU_TERM_TD ,CPU Termination Current TD" "Not terminated,Terminated" textline " " bitfld.long 0x04 0. " CPU_REQ ,CPU Request" "Not requested,Requested" rgroup.long (0xA0+0x08)++0x03 line.long 0x00 "BASIC_STATUS9,Channel 9 Basic Status Register" hexmask.long.byte 0x00 8.--14. 1. " TD_PTR ,Address pointer to the current CH9_ORIG_TD0/1 in the chain" bitfld.long 0x00 4.--7. " RR_CNT ,Round-Robin counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " TD_ACTIVE ,Channel Serviced by DMAC" "Not serviced,Serviced" bitfld.long 0x00 0. " CHAIN_ACTIVE ,TD Chain Active" "Not active,Active" group.long 0xB0++0x07 "Channel 10" line.long 0x00 "BASIC_CFG10,Channel 10 Basic Configuration Register" bitfld.long 0x00 5. " WORK_SEP ,Work Separately" "Not separately,Separately" bitfld.long 0x00 4. " RR_EN ,Round-Robin enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " PRI ,Channel priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Channel Enable" "Disabled,Enabled" line.long 0x04 "ACTION10,Channel 10 Action" bitfld.long 0x04 2. " CPU_TERM_CHAIN ,CPU Termination TD Chain" "Not terminated,Terminated" bitfld.long 0x04 1. " CPU_TERM_TD ,CPU Termination Current TD" "Not terminated,Terminated" textline " " bitfld.long 0x04 0. " CPU_REQ ,CPU Request" "Not requested,Requested" rgroup.long (0xB0+0x08)++0x03 line.long 0x00 "BASIC_STATUS10,Channel 10 Basic Status Register" hexmask.long.byte 0x00 8.--14. 1. " TD_PTR ,Address pointer to the current CH10_ORIG_TD0/1 in the chain" bitfld.long 0x00 4.--7. " RR_CNT ,Round-Robin counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " TD_ACTIVE ,Channel Serviced by DMAC" "Not serviced,Serviced" bitfld.long 0x00 0. " CHAIN_ACTIVE ,TD Chain Active" "Not active,Active" group.long 0xC0++0x07 "Channel 11" line.long 0x00 "BASIC_CFG11,Channel 11 Basic Configuration Register" bitfld.long 0x00 5. " WORK_SEP ,Work Separately" "Not separately,Separately" bitfld.long 0x00 4. " RR_EN ,Round-Robin enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " PRI ,Channel priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Channel Enable" "Disabled,Enabled" line.long 0x04 "ACTION11,Channel 11 Action" bitfld.long 0x04 2. " CPU_TERM_CHAIN ,CPU Termination TD Chain" "Not terminated,Terminated" bitfld.long 0x04 1. " CPU_TERM_TD ,CPU Termination Current TD" "Not terminated,Terminated" textline " " bitfld.long 0x04 0. " CPU_REQ ,CPU Request" "Not requested,Requested" rgroup.long (0xC0+0x08)++0x03 line.long 0x00 "BASIC_STATUS11,Channel 11 Basic Status Register" hexmask.long.byte 0x00 8.--14. 1. " TD_PTR ,Address pointer to the current CH11_ORIG_TD0/1 in the chain" bitfld.long 0x00 4.--7. " RR_CNT ,Round-Robin counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " TD_ACTIVE ,Channel Serviced by DMAC" "Not serviced,Serviced" bitfld.long 0x00 0. " CHAIN_ACTIVE ,TD Chain Active" "Not active,Active" group.long 0xD0++0x07 "Channel 12" line.long 0x00 "BASIC_CFG12,Channel 12 Basic Configuration Register" bitfld.long 0x00 5. " WORK_SEP ,Work Separately" "Not separately,Separately" bitfld.long 0x00 4. " RR_EN ,Round-Robin enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " PRI ,Channel priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Channel Enable" "Disabled,Enabled" line.long 0x04 "ACTION12,Channel 12 Action" bitfld.long 0x04 2. " CPU_TERM_CHAIN ,CPU Termination TD Chain" "Not terminated,Terminated" bitfld.long 0x04 1. " CPU_TERM_TD ,CPU Termination Current TD" "Not terminated,Terminated" textline " " bitfld.long 0x04 0. " CPU_REQ ,CPU Request" "Not requested,Requested" rgroup.long (0xD0+0x08)++0x03 line.long 0x00 "BASIC_STATUS12,Channel 12 Basic Status Register" hexmask.long.byte 0x00 8.--14. 1. " TD_PTR ,Address pointer to the current CH12_ORIG_TD0/1 in the chain" bitfld.long 0x00 4.--7. " RR_CNT ,Round-Robin counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " TD_ACTIVE ,Channel Serviced by DMAC" "Not serviced,Serviced" bitfld.long 0x00 0. " CHAIN_ACTIVE ,TD Chain Active" "Not active,Active" group.long 0xE0++0x07 "Channel 13" line.long 0x00 "BASIC_CFG13,Channel 13 Basic Configuration Register" bitfld.long 0x00 5. " WORK_SEP ,Work Separately" "Not separately,Separately" bitfld.long 0x00 4. " RR_EN ,Round-Robin enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " PRI ,Channel priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Channel Enable" "Disabled,Enabled" line.long 0x04 "ACTION13,Channel 13 Action" bitfld.long 0x04 2. " CPU_TERM_CHAIN ,CPU Termination TD Chain" "Not terminated,Terminated" bitfld.long 0x04 1. " CPU_TERM_TD ,CPU Termination Current TD" "Not terminated,Terminated" textline " " bitfld.long 0x04 0. " CPU_REQ ,CPU Request" "Not requested,Requested" rgroup.long (0xE0+0x08)++0x03 line.long 0x00 "BASIC_STATUS13,Channel 13 Basic Status Register" hexmask.long.byte 0x00 8.--14. 1. " TD_PTR ,Address pointer to the current CH13_ORIG_TD0/1 in the chain" bitfld.long 0x00 4.--7. " RR_CNT ,Round-Robin counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " TD_ACTIVE ,Channel Serviced by DMAC" "Not serviced,Serviced" bitfld.long 0x00 0. " CHAIN_ACTIVE ,TD Chain Active" "Not active,Active" group.long 0xF0++0x07 "Channel 14" line.long 0x00 "BASIC_CFG14,Channel 14 Basic Configuration Register" bitfld.long 0x00 5. " WORK_SEP ,Work Separately" "Not separately,Separately" bitfld.long 0x00 4. " RR_EN ,Round-Robin enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " PRI ,Channel priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Channel Enable" "Disabled,Enabled" line.long 0x04 "ACTION14,Channel 14 Action" bitfld.long 0x04 2. " CPU_TERM_CHAIN ,CPU Termination TD Chain" "Not terminated,Terminated" bitfld.long 0x04 1. " CPU_TERM_TD ,CPU Termination Current TD" "Not terminated,Terminated" textline " " bitfld.long 0x04 0. " CPU_REQ ,CPU Request" "Not requested,Requested" rgroup.long (0xF0+0x08)++0x03 line.long 0x00 "BASIC_STATUS14,Channel 14 Basic Status Register" hexmask.long.byte 0x00 8.--14. 1. " TD_PTR ,Address pointer to the current CH14_ORIG_TD0/1 in the chain" bitfld.long 0x00 4.--7. " RR_CNT ,Round-Robin counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " TD_ACTIVE ,Channel Serviced by DMAC" "Not serviced,Serviced" bitfld.long 0x00 0. " CHAIN_ACTIVE ,TD Chain Active" "Not active,Active" group.long 0x100++0x07 "Channel 15" line.long 0x00 "BASIC_CFG15,Channel 15 Basic Configuration Register" bitfld.long 0x00 5. " WORK_SEP ,Work Separately" "Not separately,Separately" bitfld.long 0x00 4. " RR_EN ,Round-Robin enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " PRI ,Channel priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Channel Enable" "Disabled,Enabled" line.long 0x04 "ACTION15,Channel 15 Action" bitfld.long 0x04 2. " CPU_TERM_CHAIN ,CPU Termination TD Chain" "Not terminated,Terminated" bitfld.long 0x04 1. " CPU_TERM_TD ,CPU Termination Current TD" "Not terminated,Terminated" textline " " bitfld.long 0x04 0. " CPU_REQ ,CPU Request" "Not requested,Requested" rgroup.long (0x100+0x08)++0x03 line.long 0x00 "BASIC_STATUS15,Channel 15 Basic Status Register" hexmask.long.byte 0x00 8.--14. 1. " TD_PTR ,Address pointer to the current CH15_ORIG_TD0/1 in the chain" bitfld.long 0x00 4.--7. " RR_CNT ,Round-Robin counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " TD_ACTIVE ,Channel Serviced by DMAC" "Not serviced,Serviced" bitfld.long 0x00 0. " CHAIN_ACTIVE ,TD Chain Active" "Not active,Active" group.long 0x110++0x07 "Channel 16" line.long 0x00 "BASIC_CFG16,Channel 16 Basic Configuration Register" bitfld.long 0x00 5. " WORK_SEP ,Work Separately" "Not separately,Separately" bitfld.long 0x00 4. " RR_EN ,Round-Robin enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " PRI ,Channel priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Channel Enable" "Disabled,Enabled" line.long 0x04 "ACTION16,Channel 16 Action" bitfld.long 0x04 2. " CPU_TERM_CHAIN ,CPU Termination TD Chain" "Not terminated,Terminated" bitfld.long 0x04 1. " CPU_TERM_TD ,CPU Termination Current TD" "Not terminated,Terminated" textline " " bitfld.long 0x04 0. " CPU_REQ ,CPU Request" "Not requested,Requested" rgroup.long (0x110+0x08)++0x03 line.long 0x00 "BASIC_STATUS16,Channel 16 Basic Status Register" hexmask.long.byte 0x00 8.--14. 1. " TD_PTR ,Address pointer to the current CH16_ORIG_TD0/1 in the chain" bitfld.long 0x00 4.--7. " RR_CNT ,Round-Robin counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " TD_ACTIVE ,Channel Serviced by DMAC" "Not serviced,Serviced" bitfld.long 0x00 0. " CHAIN_ACTIVE ,TD Chain Active" "Not active,Active" group.long 0x120++0x07 "Channel 17" line.long 0x00 "BASIC_CFG17,Channel 17 Basic Configuration Register" bitfld.long 0x00 5. " WORK_SEP ,Work Separately" "Not separately,Separately" bitfld.long 0x00 4. " RR_EN ,Round-Robin enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " PRI ,Channel priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Channel Enable" "Disabled,Enabled" line.long 0x04 "ACTION17,Channel 17 Action" bitfld.long 0x04 2. " CPU_TERM_CHAIN ,CPU Termination TD Chain" "Not terminated,Terminated" bitfld.long 0x04 1. " CPU_TERM_TD ,CPU Termination Current TD" "Not terminated,Terminated" textline " " bitfld.long 0x04 0. " CPU_REQ ,CPU Request" "Not requested,Requested" rgroup.long (0x120+0x08)++0x03 line.long 0x00 "BASIC_STATUS17,Channel 17 Basic Status Register" hexmask.long.byte 0x00 8.--14. 1. " TD_PTR ,Address pointer to the current CH17_ORIG_TD0/1 in the chain" bitfld.long 0x00 4.--7. " RR_CNT ,Round-Robin counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " TD_ACTIVE ,Channel Serviced by DMAC" "Not serviced,Serviced" bitfld.long 0x00 0. " CHAIN_ACTIVE ,TD Chain Active" "Not active,Active" group.long 0x130++0x07 "Channel 18" line.long 0x00 "BASIC_CFG18,Channel 18 Basic Configuration Register" bitfld.long 0x00 5. " WORK_SEP ,Work Separately" "Not separately,Separately" bitfld.long 0x00 4. " RR_EN ,Round-Robin enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " PRI ,Channel priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Channel Enable" "Disabled,Enabled" line.long 0x04 "ACTION18,Channel 18 Action" bitfld.long 0x04 2. " CPU_TERM_CHAIN ,CPU Termination TD Chain" "Not terminated,Terminated" bitfld.long 0x04 1. " CPU_TERM_TD ,CPU Termination Current TD" "Not terminated,Terminated" textline " " bitfld.long 0x04 0. " CPU_REQ ,CPU Request" "Not requested,Requested" rgroup.long (0x130+0x08)++0x03 line.long 0x00 "BASIC_STATUS18,Channel 18 Basic Status Register" hexmask.long.byte 0x00 8.--14. 1. " TD_PTR ,Address pointer to the current CH18_ORIG_TD0/1 in the chain" bitfld.long 0x00 4.--7. " RR_CNT ,Round-Robin counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " TD_ACTIVE ,Channel Serviced by DMAC" "Not serviced,Serviced" bitfld.long 0x00 0. " CHAIN_ACTIVE ,TD Chain Active" "Not active,Active" group.long 0x140++0x07 "Channel 19" line.long 0x00 "BASIC_CFG19,Channel 19 Basic Configuration Register" bitfld.long 0x00 5. " WORK_SEP ,Work Separately" "Not separately,Separately" bitfld.long 0x00 4. " RR_EN ,Round-Robin enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " PRI ,Channel priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Channel Enable" "Disabled,Enabled" line.long 0x04 "ACTION19,Channel 19 Action" bitfld.long 0x04 2. " CPU_TERM_CHAIN ,CPU Termination TD Chain" "Not terminated,Terminated" bitfld.long 0x04 1. " CPU_TERM_TD ,CPU Termination Current TD" "Not terminated,Terminated" textline " " bitfld.long 0x04 0. " CPU_REQ ,CPU Request" "Not requested,Requested" rgroup.long (0x140+0x08)++0x03 line.long 0x00 "BASIC_STATUS19,Channel 19 Basic Status Register" hexmask.long.byte 0x00 8.--14. 1. " TD_PTR ,Address pointer to the current CH19_ORIG_TD0/1 in the chain" bitfld.long 0x00 4.--7. " RR_CNT ,Round-Robin counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " TD_ACTIVE ,Channel Serviced by DMAC" "Not serviced,Serviced" bitfld.long 0x00 0. " CHAIN_ACTIVE ,TD Chain Active" "Not active,Active" group.long 0x150++0x07 "Channel 20" line.long 0x00 "BASIC_CFG20,Channel 20 Basic Configuration Register" bitfld.long 0x00 5. " WORK_SEP ,Work Separately" "Not separately,Separately" bitfld.long 0x00 4. " RR_EN ,Round-Robin enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " PRI ,Channel priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Channel Enable" "Disabled,Enabled" line.long 0x04 "ACTION20,Channel 20 Action" bitfld.long 0x04 2. " CPU_TERM_CHAIN ,CPU Termination TD Chain" "Not terminated,Terminated" bitfld.long 0x04 1. " CPU_TERM_TD ,CPU Termination Current TD" "Not terminated,Terminated" textline " " bitfld.long 0x04 0. " CPU_REQ ,CPU Request" "Not requested,Requested" rgroup.long (0x150+0x08)++0x03 line.long 0x00 "BASIC_STATUS20,Channel 20 Basic Status Register" hexmask.long.byte 0x00 8.--14. 1. " TD_PTR ,Address pointer to the current CH20_ORIG_TD0/1 in the chain" bitfld.long 0x00 4.--7. " RR_CNT ,Round-Robin counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " TD_ACTIVE ,Channel Serviced by DMAC" "Not serviced,Serviced" bitfld.long 0x00 0. " CHAIN_ACTIVE ,TD Chain Active" "Not active,Active" group.long 0x160++0x07 "Channel 21" line.long 0x00 "BASIC_CFG21,Channel 21 Basic Configuration Register" bitfld.long 0x00 5. " WORK_SEP ,Work Separately" "Not separately,Separately" bitfld.long 0x00 4. " RR_EN ,Round-Robin enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " PRI ,Channel priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Channel Enable" "Disabled,Enabled" line.long 0x04 "ACTION21,Channel 21 Action" bitfld.long 0x04 2. " CPU_TERM_CHAIN ,CPU Termination TD Chain" "Not terminated,Terminated" bitfld.long 0x04 1. " CPU_TERM_TD ,CPU Termination Current TD" "Not terminated,Terminated" textline " " bitfld.long 0x04 0. " CPU_REQ ,CPU Request" "Not requested,Requested" rgroup.long (0x160+0x08)++0x03 line.long 0x00 "BASIC_STATUS21,Channel 21 Basic Status Register" hexmask.long.byte 0x00 8.--14. 1. " TD_PTR ,Address pointer to the current CH21_ORIG_TD0/1 in the chain" bitfld.long 0x00 4.--7. " RR_CNT ,Round-Robin counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " TD_ACTIVE ,Channel Serviced by DMAC" "Not serviced,Serviced" bitfld.long 0x00 0. " CHAIN_ACTIVE ,TD Chain Active" "Not active,Active" group.long 0x170++0x07 "Channel 22" line.long 0x00 "BASIC_CFG22,Channel 22 Basic Configuration Register" bitfld.long 0x00 5. " WORK_SEP ,Work Separately" "Not separately,Separately" bitfld.long 0x00 4. " RR_EN ,Round-Robin enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " PRI ,Channel priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Channel Enable" "Disabled,Enabled" line.long 0x04 "ACTION22,Channel 22 Action" bitfld.long 0x04 2. " CPU_TERM_CHAIN ,CPU Termination TD Chain" "Not terminated,Terminated" bitfld.long 0x04 1. " CPU_TERM_TD ,CPU Termination Current TD" "Not terminated,Terminated" textline " " bitfld.long 0x04 0. " CPU_REQ ,CPU Request" "Not requested,Requested" rgroup.long (0x170+0x08)++0x03 line.long 0x00 "BASIC_STATUS22,Channel 22 Basic Status Register" hexmask.long.byte 0x00 8.--14. 1. " TD_PTR ,Address pointer to the current CH22_ORIG_TD0/1 in the chain" bitfld.long 0x00 4.--7. " RR_CNT ,Round-Robin counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " TD_ACTIVE ,Channel Serviced by DMAC" "Not serviced,Serviced" bitfld.long 0x00 0. " CHAIN_ACTIVE ,TD Chain Active" "Not active,Active" group.long 0x180++0x07 "Channel 23" line.long 0x00 "BASIC_CFG23,Channel 23 Basic Configuration Register" bitfld.long 0x00 5. " WORK_SEP ,Work Separately" "Not separately,Separately" bitfld.long 0x00 4. " RR_EN ,Round-Robin enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1.--3. " PRI ,Channel priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Channel Enable" "Disabled,Enabled" line.long 0x04 "ACTION23,Channel 23 Action" bitfld.long 0x04 2. " CPU_TERM_CHAIN ,CPU Termination TD Chain" "Not terminated,Terminated" bitfld.long 0x04 1. " CPU_TERM_TD ,CPU Termination Current TD" "Not terminated,Terminated" textline " " bitfld.long 0x04 0. " CPU_REQ ,CPU Request" "Not requested,Requested" rgroup.long (0x180+0x08)++0x03 line.long 0x00 "BASIC_STATUS23,Channel 23 Basic Status Register" hexmask.long.byte 0x00 8.--14. 1. " TD_PTR ,Address pointer to the current CH23_ORIG_TD0/1 in the chain" bitfld.long 0x00 4.--7. " RR_CNT ,Round-Robin counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " TD_ACTIVE ,Channel Serviced by DMAC" "Not serviced,Serviced" bitfld.long 0x00 0. " CHAIN_ACTIVE ,TD Chain Active" "Not active,Active" tree.end width 8. tree "CFGMEM Registers" group.long 0x600++0x07 "CFGMEM 0" line.long 0x00 "CFG00,PHUB Channel Configuration Register 0" hexmask.long.byte 0x00 25.--31. 1. " BURSTCOUNT_REMAIN ,Burst Count" bitfld.long 0x00 16.--19. " TERMIN_SEL ,Select Inputs to PHUB for use in terminating a TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " TERMOUT1_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TERMOUT0_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. " REQ_PER_BURST ,Automatically/Individually requested" "Auto,Manual" hexmask.long.byte 0x00 0.--6. 1. " BURSTCNT[6:0] ,Length of the small burst from 1 to 127 bytes" line.long 0x04 "CFG10,PHUB Channel Configuration Register 1" hexmask.long.word 0x04 16.--31. 1. " DST_BASE_ADR ,Base address used for the destination address" hexmask.long.word 0x04 0.--15. 1. " SRC_BASE_ADR ,Base address used for the source address" group.long 0x608++0x07 "CFGMEM 1" line.long 0x00 "CFG01,PHUB Channel Configuration Register 0" hexmask.long.byte 0x00 25.--31. 1. " BURSTCOUNT_REMAIN ,Burst Count" bitfld.long 0x00 16.--19. " TERMIN_SEL ,Select Inputs to PHUB for use in terminating a TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " TERMOUT1_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TERMOUT0_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. " REQ_PER_BURST ,Automatically/Individually requested" "Auto,Manual" hexmask.long.byte 0x00 0.--6. 1. " BURSTCNT[6:0] ,Length of the small burst from 1 to 127 bytes" line.long 0x04 "CFG11,PHUB Channel Configuration Register 1" hexmask.long.word 0x04 16.--31. 1. " DST_BASE_ADR ,Base address used for the destination address" hexmask.long.word 0x04 0.--15. 1. " SRC_BASE_ADR ,Base address used for the source address" group.long 0x610++0x07 "CFGMEM 2" line.long 0x00 "CFG02,PHUB Channel Configuration Register 0" hexmask.long.byte 0x00 25.--31. 1. " BURSTCOUNT_REMAIN ,Burst Count" bitfld.long 0x00 16.--19. " TERMIN_SEL ,Select Inputs to PHUB for use in terminating a TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " TERMOUT1_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TERMOUT0_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. " REQ_PER_BURST ,Automatically/Individually requested" "Auto,Manual" hexmask.long.byte 0x00 0.--6. 1. " BURSTCNT[6:0] ,Length of the small burst from 1 to 127 bytes" line.long 0x04 "CFG12,PHUB Channel Configuration Register 1" hexmask.long.word 0x04 16.--31. 1. " DST_BASE_ADR ,Base address used for the destination address" hexmask.long.word 0x04 0.--15. 1. " SRC_BASE_ADR ,Base address used for the source address" group.long 0x618++0x07 "CFGMEM 3" line.long 0x00 "CFG03,PHUB Channel Configuration Register 0" hexmask.long.byte 0x00 25.--31. 1. " BURSTCOUNT_REMAIN ,Burst Count" bitfld.long 0x00 16.--19. " TERMIN_SEL ,Select Inputs to PHUB for use in terminating a TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " TERMOUT1_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TERMOUT0_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. " REQ_PER_BURST ,Automatically/Individually requested" "Auto,Manual" hexmask.long.byte 0x00 0.--6. 1. " BURSTCNT[6:0] ,Length of the small burst from 1 to 127 bytes" line.long 0x04 "CFG13,PHUB Channel Configuration Register 1" hexmask.long.word 0x04 16.--31. 1. " DST_BASE_ADR ,Base address used for the destination address" hexmask.long.word 0x04 0.--15. 1. " SRC_BASE_ADR ,Base address used for the source address" group.long 0x620++0x07 "CFGMEM 4" line.long 0x00 "CFG04,PHUB Channel Configuration Register 0" hexmask.long.byte 0x00 25.--31. 1. " BURSTCOUNT_REMAIN ,Burst Count" bitfld.long 0x00 16.--19. " TERMIN_SEL ,Select Inputs to PHUB for use in terminating a TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " TERMOUT1_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TERMOUT0_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. " REQ_PER_BURST ,Automatically/Individually requested" "Auto,Manual" hexmask.long.byte 0x00 0.--6. 1. " BURSTCNT[6:0] ,Length of the small burst from 1 to 127 bytes" line.long 0x04 "CFG14,PHUB Channel Configuration Register 1" hexmask.long.word 0x04 16.--31. 1. " DST_BASE_ADR ,Base address used for the destination address" hexmask.long.word 0x04 0.--15. 1. " SRC_BASE_ADR ,Base address used for the source address" group.long 0x628++0x07 "CFGMEM 5" line.long 0x00 "CFG05,PHUB Channel Configuration Register 0" hexmask.long.byte 0x00 25.--31. 1. " BURSTCOUNT_REMAIN ,Burst Count" bitfld.long 0x00 16.--19. " TERMIN_SEL ,Select Inputs to PHUB for use in terminating a TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " TERMOUT1_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TERMOUT0_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. " REQ_PER_BURST ,Automatically/Individually requested" "Auto,Manual" hexmask.long.byte 0x00 0.--6. 1. " BURSTCNT[6:0] ,Length of the small burst from 1 to 127 bytes" line.long 0x04 "CFG15,PHUB Channel Configuration Register 1" hexmask.long.word 0x04 16.--31. 1. " DST_BASE_ADR ,Base address used for the destination address" hexmask.long.word 0x04 0.--15. 1. " SRC_BASE_ADR ,Base address used for the source address" group.long 0x630++0x07 "CFGMEM 6" line.long 0x00 "CFG06,PHUB Channel Configuration Register 0" hexmask.long.byte 0x00 25.--31. 1. " BURSTCOUNT_REMAIN ,Burst Count" bitfld.long 0x00 16.--19. " TERMIN_SEL ,Select Inputs to PHUB for use in terminating a TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " TERMOUT1_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TERMOUT0_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. " REQ_PER_BURST ,Automatically/Individually requested" "Auto,Manual" hexmask.long.byte 0x00 0.--6. 1. " BURSTCNT[6:0] ,Length of the small burst from 1 to 127 bytes" line.long 0x04 "CFG16,PHUB Channel Configuration Register 1" hexmask.long.word 0x04 16.--31. 1. " DST_BASE_ADR ,Base address used for the destination address" hexmask.long.word 0x04 0.--15. 1. " SRC_BASE_ADR ,Base address used for the source address" group.long 0x638++0x07 "CFGMEM 7" line.long 0x00 "CFG07,PHUB Channel Configuration Register 0" hexmask.long.byte 0x00 25.--31. 1. " BURSTCOUNT_REMAIN ,Burst Count" bitfld.long 0x00 16.--19. " TERMIN_SEL ,Select Inputs to PHUB for use in terminating a TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " TERMOUT1_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TERMOUT0_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. " REQ_PER_BURST ,Automatically/Individually requested" "Auto,Manual" hexmask.long.byte 0x00 0.--6. 1. " BURSTCNT[6:0] ,Length of the small burst from 1 to 127 bytes" line.long 0x04 "CFG17,PHUB Channel Configuration Register 1" hexmask.long.word 0x04 16.--31. 1. " DST_BASE_ADR ,Base address used for the destination address" hexmask.long.word 0x04 0.--15. 1. " SRC_BASE_ADR ,Base address used for the source address" group.long 0x640++0x07 "CFGMEM 8" line.long 0x00 "CFG08,PHUB Channel Configuration Register 0" hexmask.long.byte 0x00 25.--31. 1. " BURSTCOUNT_REMAIN ,Burst Count" bitfld.long 0x00 16.--19. " TERMIN_SEL ,Select Inputs to PHUB for use in terminating a TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " TERMOUT1_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TERMOUT0_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. " REQ_PER_BURST ,Automatically/Individually requested" "Auto,Manual" hexmask.long.byte 0x00 0.--6. 1. " BURSTCNT[6:0] ,Length of the small burst from 1 to 127 bytes" line.long 0x04 "CFG18,PHUB Channel Configuration Register 1" hexmask.long.word 0x04 16.--31. 1. " DST_BASE_ADR ,Base address used for the destination address" hexmask.long.word 0x04 0.--15. 1. " SRC_BASE_ADR ,Base address used for the source address" group.long 0x648++0x07 "CFGMEM 9" line.long 0x00 "CFG09,PHUB Channel Configuration Register 0" hexmask.long.byte 0x00 25.--31. 1. " BURSTCOUNT_REMAIN ,Burst Count" bitfld.long 0x00 16.--19. " TERMIN_SEL ,Select Inputs to PHUB for use in terminating a TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " TERMOUT1_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TERMOUT0_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. " REQ_PER_BURST ,Automatically/Individually requested" "Auto,Manual" hexmask.long.byte 0x00 0.--6. 1. " BURSTCNT[6:0] ,Length of the small burst from 1 to 127 bytes" line.long 0x04 "CFG19,PHUB Channel Configuration Register 1" hexmask.long.word 0x04 16.--31. 1. " DST_BASE_ADR ,Base address used for the destination address" hexmask.long.word 0x04 0.--15. 1. " SRC_BASE_ADR ,Base address used for the source address" group.long 0x650++0x07 "CFGMEM 10" line.long 0x00 "CFG010,PHUB Channel Configuration Register 0" hexmask.long.byte 0x00 25.--31. 1. " BURSTCOUNT_REMAIN ,Burst Count" bitfld.long 0x00 16.--19. " TERMIN_SEL ,Select Inputs to PHUB for use in terminating a TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " TERMOUT1_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TERMOUT0_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. " REQ_PER_BURST ,Automatically/Individually requested" "Auto,Manual" hexmask.long.byte 0x00 0.--6. 1. " BURSTCNT[6:0] ,Length of the small burst from 1 to 127 bytes" line.long 0x04 "CFG110,PHUB Channel Configuration Register 1" hexmask.long.word 0x04 16.--31. 1. " DST_BASE_ADR ,Base address used for the destination address" hexmask.long.word 0x04 0.--15. 1. " SRC_BASE_ADR ,Base address used for the source address" group.long 0x658++0x07 "CFGMEM 11" line.long 0x00 "CFG011,PHUB Channel Configuration Register 0" hexmask.long.byte 0x00 25.--31. 1. " BURSTCOUNT_REMAIN ,Burst Count" bitfld.long 0x00 16.--19. " TERMIN_SEL ,Select Inputs to PHUB for use in terminating a TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " TERMOUT1_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TERMOUT0_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. " REQ_PER_BURST ,Automatically/Individually requested" "Auto,Manual" hexmask.long.byte 0x00 0.--6. 1. " BURSTCNT[6:0] ,Length of the small burst from 1 to 127 bytes" line.long 0x04 "CFG111,PHUB Channel Configuration Register 1" hexmask.long.word 0x04 16.--31. 1. " DST_BASE_ADR ,Base address used for the destination address" hexmask.long.word 0x04 0.--15. 1. " SRC_BASE_ADR ,Base address used for the source address" group.long 0x660++0x07 "CFGMEM 12" line.long 0x00 "CFG012,PHUB Channel Configuration Register 0" hexmask.long.byte 0x00 25.--31. 1. " BURSTCOUNT_REMAIN ,Burst Count" bitfld.long 0x00 16.--19. " TERMIN_SEL ,Select Inputs to PHUB for use in terminating a TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " TERMOUT1_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TERMOUT0_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. " REQ_PER_BURST ,Automatically/Individually requested" "Auto,Manual" hexmask.long.byte 0x00 0.--6. 1. " BURSTCNT[6:0] ,Length of the small burst from 1 to 127 bytes" line.long 0x04 "CFG112,PHUB Channel Configuration Register 1" hexmask.long.word 0x04 16.--31. 1. " DST_BASE_ADR ,Base address used for the destination address" hexmask.long.word 0x04 0.--15. 1. " SRC_BASE_ADR ,Base address used for the source address" group.long 0x668++0x07 "CFGMEM 13" line.long 0x00 "CFG013,PHUB Channel Configuration Register 0" hexmask.long.byte 0x00 25.--31. 1. " BURSTCOUNT_REMAIN ,Burst Count" bitfld.long 0x00 16.--19. " TERMIN_SEL ,Select Inputs to PHUB for use in terminating a TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " TERMOUT1_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TERMOUT0_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. " REQ_PER_BURST ,Automatically/Individually requested" "Auto,Manual" hexmask.long.byte 0x00 0.--6. 1. " BURSTCNT[6:0] ,Length of the small burst from 1 to 127 bytes" line.long 0x04 "CFG113,PHUB Channel Configuration Register 1" hexmask.long.word 0x04 16.--31. 1. " DST_BASE_ADR ,Base address used for the destination address" hexmask.long.word 0x04 0.--15. 1. " SRC_BASE_ADR ,Base address used for the source address" group.long 0x670++0x07 "CFGMEM 14" line.long 0x00 "CFG014,PHUB Channel Configuration Register 0" hexmask.long.byte 0x00 25.--31. 1. " BURSTCOUNT_REMAIN ,Burst Count" bitfld.long 0x00 16.--19. " TERMIN_SEL ,Select Inputs to PHUB for use in terminating a TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " TERMOUT1_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TERMOUT0_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. " REQ_PER_BURST ,Automatically/Individually requested" "Auto,Manual" hexmask.long.byte 0x00 0.--6. 1. " BURSTCNT[6:0] ,Length of the small burst from 1 to 127 bytes" line.long 0x04 "CFG114,PHUB Channel Configuration Register 1" hexmask.long.word 0x04 16.--31. 1. " DST_BASE_ADR ,Base address used for the destination address" hexmask.long.word 0x04 0.--15. 1. " SRC_BASE_ADR ,Base address used for the source address" group.long 0x678++0x07 "CFGMEM 15" line.long 0x00 "CFG015,PHUB Channel Configuration Register 0" hexmask.long.byte 0x00 25.--31. 1. " BURSTCOUNT_REMAIN ,Burst Count" bitfld.long 0x00 16.--19. " TERMIN_SEL ,Select Inputs to PHUB for use in terminating a TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " TERMOUT1_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TERMOUT0_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. " REQ_PER_BURST ,Automatically/Individually requested" "Auto,Manual" hexmask.long.byte 0x00 0.--6. 1. " BURSTCNT[6:0] ,Length of the small burst from 1 to 127 bytes" line.long 0x04 "CFG115,PHUB Channel Configuration Register 1" hexmask.long.word 0x04 16.--31. 1. " DST_BASE_ADR ,Base address used for the destination address" hexmask.long.word 0x04 0.--15. 1. " SRC_BASE_ADR ,Base address used for the source address" group.long 0x680++0x07 "CFGMEM 16" line.long 0x00 "CFG016,PHUB Channel Configuration Register 0" hexmask.long.byte 0x00 25.--31. 1. " BURSTCOUNT_REMAIN ,Burst Count" bitfld.long 0x00 16.--19. " TERMIN_SEL ,Select Inputs to PHUB for use in terminating a TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " TERMOUT1_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TERMOUT0_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. " REQ_PER_BURST ,Automatically/Individually requested" "Auto,Manual" hexmask.long.byte 0x00 0.--6. 1. " BURSTCNT[6:0] ,Length of the small burst from 1 to 127 bytes" line.long 0x04 "CFG116,PHUB Channel Configuration Register 1" hexmask.long.word 0x04 16.--31. 1. " DST_BASE_ADR ,Base address used for the destination address" hexmask.long.word 0x04 0.--15. 1. " SRC_BASE_ADR ,Base address used for the source address" group.long 0x688++0x07 "CFGMEM 17" line.long 0x00 "CFG017,PHUB Channel Configuration Register 0" hexmask.long.byte 0x00 25.--31. 1. " BURSTCOUNT_REMAIN ,Burst Count" bitfld.long 0x00 16.--19. " TERMIN_SEL ,Select Inputs to PHUB for use in terminating a TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " TERMOUT1_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TERMOUT0_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. " REQ_PER_BURST ,Automatically/Individually requested" "Auto,Manual" hexmask.long.byte 0x00 0.--6. 1. " BURSTCNT[6:0] ,Length of the small burst from 1 to 127 bytes" line.long 0x04 "CFG117,PHUB Channel Configuration Register 1" hexmask.long.word 0x04 16.--31. 1. " DST_BASE_ADR ,Base address used for the destination address" hexmask.long.word 0x04 0.--15. 1. " SRC_BASE_ADR ,Base address used for the source address" group.long 0x690++0x07 "CFGMEM 18" line.long 0x00 "CFG018,PHUB Channel Configuration Register 0" hexmask.long.byte 0x00 25.--31. 1. " BURSTCOUNT_REMAIN ,Burst Count" bitfld.long 0x00 16.--19. " TERMIN_SEL ,Select Inputs to PHUB for use in terminating a TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " TERMOUT1_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TERMOUT0_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. " REQ_PER_BURST ,Automatically/Individually requested" "Auto,Manual" hexmask.long.byte 0x00 0.--6. 1. " BURSTCNT[6:0] ,Length of the small burst from 1 to 127 bytes" line.long 0x04 "CFG118,PHUB Channel Configuration Register 1" hexmask.long.word 0x04 16.--31. 1. " DST_BASE_ADR ,Base address used for the destination address" hexmask.long.word 0x04 0.--15. 1. " SRC_BASE_ADR ,Base address used for the source address" group.long 0x698++0x07 "CFGMEM 19" line.long 0x00 "CFG019,PHUB Channel Configuration Register 0" hexmask.long.byte 0x00 25.--31. 1. " BURSTCOUNT_REMAIN ,Burst Count" bitfld.long 0x00 16.--19. " TERMIN_SEL ,Select Inputs to PHUB for use in terminating a TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " TERMOUT1_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TERMOUT0_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. " REQ_PER_BURST ,Automatically/Individually requested" "Auto,Manual" hexmask.long.byte 0x00 0.--6. 1. " BURSTCNT[6:0] ,Length of the small burst from 1 to 127 bytes" line.long 0x04 "CFG119,PHUB Channel Configuration Register 1" hexmask.long.word 0x04 16.--31. 1. " DST_BASE_ADR ,Base address used for the destination address" hexmask.long.word 0x04 0.--15. 1. " SRC_BASE_ADR ,Base address used for the source address" group.long 0x6A0++0x07 "CFGMEM 20" line.long 0x00 "CFG020,PHUB Channel Configuration Register 0" hexmask.long.byte 0x00 25.--31. 1. " BURSTCOUNT_REMAIN ,Burst Count" bitfld.long 0x00 16.--19. " TERMIN_SEL ,Select Inputs to PHUB for use in terminating a TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " TERMOUT1_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TERMOUT0_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. " REQ_PER_BURST ,Automatically/Individually requested" "Auto,Manual" hexmask.long.byte 0x00 0.--6. 1. " BURSTCNT[6:0] ,Length of the small burst from 1 to 127 bytes" line.long 0x04 "CFG120,PHUB Channel Configuration Register 1" hexmask.long.word 0x04 16.--31. 1. " DST_BASE_ADR ,Base address used for the destination address" hexmask.long.word 0x04 0.--15. 1. " SRC_BASE_ADR ,Base address used for the source address" group.long 0x6A8++0x07 "CFGMEM 21" line.long 0x00 "CFG021,PHUB Channel Configuration Register 0" hexmask.long.byte 0x00 25.--31. 1. " BURSTCOUNT_REMAIN ,Burst Count" bitfld.long 0x00 16.--19. " TERMIN_SEL ,Select Inputs to PHUB for use in terminating a TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " TERMOUT1_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TERMOUT0_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. " REQ_PER_BURST ,Automatically/Individually requested" "Auto,Manual" hexmask.long.byte 0x00 0.--6. 1. " BURSTCNT[6:0] ,Length of the small burst from 1 to 127 bytes" line.long 0x04 "CFG121,PHUB Channel Configuration Register 1" hexmask.long.word 0x04 16.--31. 1. " DST_BASE_ADR ,Base address used for the destination address" hexmask.long.word 0x04 0.--15. 1. " SRC_BASE_ADR ,Base address used for the source address" group.long 0x6B0++0x07 "CFGMEM 22" line.long 0x00 "CFG022,PHUB Channel Configuration Register 0" hexmask.long.byte 0x00 25.--31. 1. " BURSTCOUNT_REMAIN ,Burst Count" bitfld.long 0x00 16.--19. " TERMIN_SEL ,Select Inputs to PHUB for use in terminating a TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " TERMOUT1_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TERMOUT0_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. " REQ_PER_BURST ,Automatically/Individually requested" "Auto,Manual" hexmask.long.byte 0x00 0.--6. 1. " BURSTCNT[6:0] ,Length of the small burst from 1 to 127 bytes" line.long 0x04 "CFG122,PHUB Channel Configuration Register 1" hexmask.long.word 0x04 16.--31. 1. " DST_BASE_ADR ,Base address used for the destination address" hexmask.long.word 0x04 0.--15. 1. " SRC_BASE_ADR ,Base address used for the source address" group.long 0x6B8++0x07 "CFGMEM 23" line.long 0x00 "CFG023,PHUB Channel Configuration Register 0" hexmask.long.byte 0x00 25.--31. 1. " BURSTCOUNT_REMAIN ,Burst Count" bitfld.long 0x00 16.--19. " TERMIN_SEL ,Select Inputs to PHUB for use in terminating a TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " TERMOUT1_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TERMOUT0_SEL ,Select Outputs from PHUB to be toggled upon completion of the current TD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. " REQ_PER_BURST ,Automatically/Individually requested" "Auto,Manual" hexmask.long.byte 0x00 0.--6. 1. " BURSTCNT[6:0] ,Length of the small burst from 1 to 127 bytes" line.long 0x04 "CFG123,PHUB Channel Configuration Register 1" hexmask.long.word 0x04 16.--31. 1. " DST_BASE_ADR ,Base address used for the destination address" hexmask.long.word 0x04 0.--15. 1. " SRC_BASE_ADR ,Base address used for the source address" tree.end width 13. tree "TDMEM Registers" if (((per.l(ad:0x40007000+0x800))&0x80000000)==0x00) group.long 0x800++0x03 "TDMEM 0" line.long 0x00 "ORIG_TD00,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x800++0x03 line.long 0x00 "ORIG_TD00,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x800+0x04)++0x03 line.long 0x00 "ORIG_TD10,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x808))&0x80000000)==0x00) group.long 0x808++0x03 "TDMEM 1" line.long 0x00 "ORIG_TD01,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x808++0x03 line.long 0x00 "ORIG_TD01,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x808+0x04)++0x03 line.long 0x00 "ORIG_TD11,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x810))&0x80000000)==0x00) group.long 0x810++0x03 "TDMEM 2" line.long 0x00 "ORIG_TD02,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x810++0x03 line.long 0x00 "ORIG_TD02,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x810+0x04)++0x03 line.long 0x00 "ORIG_TD12,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x818))&0x80000000)==0x00) group.long 0x818++0x03 "TDMEM 3" line.long 0x00 "ORIG_TD03,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x818++0x03 line.long 0x00 "ORIG_TD03,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x818+0x04)++0x03 line.long 0x00 "ORIG_TD13,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x820))&0x80000000)==0x00) group.long 0x820++0x03 "TDMEM 4" line.long 0x00 "ORIG_TD04,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x820++0x03 line.long 0x00 "ORIG_TD04,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x820+0x04)++0x03 line.long 0x00 "ORIG_TD14,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x828))&0x80000000)==0x00) group.long 0x828++0x03 "TDMEM 5" line.long 0x00 "ORIG_TD05,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x828++0x03 line.long 0x00 "ORIG_TD05,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x828+0x04)++0x03 line.long 0x00 "ORIG_TD15,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x830))&0x80000000)==0x00) group.long 0x830++0x03 "TDMEM 6" line.long 0x00 "ORIG_TD06,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x830++0x03 line.long 0x00 "ORIG_TD06,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x830+0x04)++0x03 line.long 0x00 "ORIG_TD16,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x838))&0x80000000)==0x00) group.long 0x838++0x03 "TDMEM 7" line.long 0x00 "ORIG_TD07,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x838++0x03 line.long 0x00 "ORIG_TD07,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x838+0x04)++0x03 line.long 0x00 "ORIG_TD17,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x840))&0x80000000)==0x00) group.long 0x840++0x03 "TDMEM 8" line.long 0x00 "ORIG_TD08,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x840++0x03 line.long 0x00 "ORIG_TD08,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x840+0x04)++0x03 line.long 0x00 "ORIG_TD18,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x848))&0x80000000)==0x00) group.long 0x848++0x03 "TDMEM 9" line.long 0x00 "ORIG_TD09,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x848++0x03 line.long 0x00 "ORIG_TD09,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x848+0x04)++0x03 line.long 0x00 "ORIG_TD19,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x850))&0x80000000)==0x00) group.long 0x850++0x03 "TDMEM 10" line.long 0x00 "ORIG_TD010,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x850++0x03 line.long 0x00 "ORIG_TD010,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x850+0x04)++0x03 line.long 0x00 "ORIG_TD110,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x858))&0x80000000)==0x00) group.long 0x858++0x03 "TDMEM 11" line.long 0x00 "ORIG_TD011,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x858++0x03 line.long 0x00 "ORIG_TD011,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x858+0x04)++0x03 line.long 0x00 "ORIG_TD111,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x860))&0x80000000)==0x00) group.long 0x860++0x03 "TDMEM 12" line.long 0x00 "ORIG_TD012,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x860++0x03 line.long 0x00 "ORIG_TD012,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x860+0x04)++0x03 line.long 0x00 "ORIG_TD112,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x868))&0x80000000)==0x00) group.long 0x868++0x03 "TDMEM 13" line.long 0x00 "ORIG_TD013,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x868++0x03 line.long 0x00 "ORIG_TD013,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x868+0x04)++0x03 line.long 0x00 "ORIG_TD113,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x870))&0x80000000)==0x00) group.long 0x870++0x03 "TDMEM 14" line.long 0x00 "ORIG_TD014,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x870++0x03 line.long 0x00 "ORIG_TD014,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x870+0x04)++0x03 line.long 0x00 "ORIG_TD114,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x878))&0x80000000)==0x00) group.long 0x878++0x03 "TDMEM 15" line.long 0x00 "ORIG_TD015,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x878++0x03 line.long 0x00 "ORIG_TD015,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x878+0x04)++0x03 line.long 0x00 "ORIG_TD115,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x880))&0x80000000)==0x00) group.long 0x880++0x03 "TDMEM 16" line.long 0x00 "ORIG_TD016,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x880++0x03 line.long 0x00 "ORIG_TD016,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x880+0x04)++0x03 line.long 0x00 "ORIG_TD116,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x888))&0x80000000)==0x00) group.long 0x888++0x03 "TDMEM 17" line.long 0x00 "ORIG_TD017,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x888++0x03 line.long 0x00 "ORIG_TD017,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x888+0x04)++0x03 line.long 0x00 "ORIG_TD117,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x890))&0x80000000)==0x00) group.long 0x890++0x03 "TDMEM 18" line.long 0x00 "ORIG_TD018,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x890++0x03 line.long 0x00 "ORIG_TD018,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x890+0x04)++0x03 line.long 0x00 "ORIG_TD118,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x898))&0x80000000)==0x00) group.long 0x898++0x03 "TDMEM 19" line.long 0x00 "ORIG_TD019,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x898++0x03 line.long 0x00 "ORIG_TD019,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x898+0x04)++0x03 line.long 0x00 "ORIG_TD119,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x8A0))&0x80000000)==0x00) group.long 0x8A0++0x03 "TDMEM 20" line.long 0x00 "ORIG_TD020,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x8A0++0x03 line.long 0x00 "ORIG_TD020,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x8A0+0x04)++0x03 line.long 0x00 "ORIG_TD120,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x8A8))&0x80000000)==0x00) group.long 0x8A8++0x03 "TDMEM 21" line.long 0x00 "ORIG_TD021,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x8A8++0x03 line.long 0x00 "ORIG_TD021,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x8A8+0x04)++0x03 line.long 0x00 "ORIG_TD121,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x8B0))&0x80000000)==0x00) group.long 0x8B0++0x03 "TDMEM 22" line.long 0x00 "ORIG_TD022,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x8B0++0x03 line.long 0x00 "ORIG_TD022,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x8B0+0x04)++0x03 line.long 0x00 "ORIG_TD122,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x8B8))&0x80000000)==0x00) group.long 0x8B8++0x03 "TDMEM 23" line.long 0x00 "ORIG_TD023,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x8B8++0x03 line.long 0x00 "ORIG_TD023,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x8B8+0x04)++0x03 line.long 0x00 "ORIG_TD123,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x8C0))&0x80000000)==0x00) group.long 0x8C0++0x03 "TDMEM 24" line.long 0x00 "ORIG_TD024,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x8C0++0x03 line.long 0x00 "ORIG_TD024,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x8C0+0x04)++0x03 line.long 0x00 "ORIG_TD124,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x8C8))&0x80000000)==0x00) group.long 0x8C8++0x03 "TDMEM 25" line.long 0x00 "ORIG_TD025,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x8C8++0x03 line.long 0x00 "ORIG_TD025,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x8C8+0x04)++0x03 line.long 0x00 "ORIG_TD125,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x8D0))&0x80000000)==0x00) group.long 0x8D0++0x03 "TDMEM 26" line.long 0x00 "ORIG_TD026,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x8D0++0x03 line.long 0x00 "ORIG_TD026,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x8D0+0x04)++0x03 line.long 0x00 "ORIG_TD126,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x8D8))&0x80000000)==0x00) group.long 0x8D8++0x03 "TDMEM 27" line.long 0x00 "ORIG_TD027,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x8D8++0x03 line.long 0x00 "ORIG_TD027,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x8D8+0x04)++0x03 line.long 0x00 "ORIG_TD127,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x8E0))&0x80000000)==0x00) group.long 0x8E0++0x03 "TDMEM 28" line.long 0x00 "ORIG_TD028,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x8E0++0x03 line.long 0x00 "ORIG_TD028,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x8E0+0x04)++0x03 line.long 0x00 "ORIG_TD128,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x8E8))&0x80000000)==0x00) group.long 0x8E8++0x03 "TDMEM 29" line.long 0x00 "ORIG_TD029,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x8E8++0x03 line.long 0x00 "ORIG_TD029,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x8E8+0x04)++0x03 line.long 0x00 "ORIG_TD129,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x8F0))&0x80000000)==0x00) group.long 0x8F0++0x03 "TDMEM 30" line.long 0x00 "ORIG_TD030,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x8F0++0x03 line.long 0x00 "ORIG_TD030,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x8F0+0x04)++0x03 line.long 0x00 "ORIG_TD130,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x8F8))&0x80000000)==0x00) group.long 0x8F8++0x03 "TDMEM 31" line.long 0x00 "ORIG_TD031,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x8F8++0x03 line.long 0x00 "ORIG_TD031,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x8F8+0x04)++0x03 line.long 0x00 "ORIG_TD131,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x900))&0x80000000)==0x00) group.long 0x900++0x03 "TDMEM 32" line.long 0x00 "ORIG_TD032,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x900++0x03 line.long 0x00 "ORIG_TD032,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x900+0x04)++0x03 line.long 0x00 "ORIG_TD132,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x908))&0x80000000)==0x00) group.long 0x908++0x03 "TDMEM 33" line.long 0x00 "ORIG_TD033,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x908++0x03 line.long 0x00 "ORIG_TD033,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x908+0x04)++0x03 line.long 0x00 "ORIG_TD133,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x910))&0x80000000)==0x00) group.long 0x910++0x03 "TDMEM 34" line.long 0x00 "ORIG_TD034,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x910++0x03 line.long 0x00 "ORIG_TD034,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x910+0x04)++0x03 line.long 0x00 "ORIG_TD134,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x918))&0x80000000)==0x00) group.long 0x918++0x03 "TDMEM 35" line.long 0x00 "ORIG_TD035,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x918++0x03 line.long 0x00 "ORIG_TD035,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x918+0x04)++0x03 line.long 0x00 "ORIG_TD135,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x920))&0x80000000)==0x00) group.long 0x920++0x03 "TDMEM 36" line.long 0x00 "ORIG_TD036,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x920++0x03 line.long 0x00 "ORIG_TD036,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x920+0x04)++0x03 line.long 0x00 "ORIG_TD136,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x928))&0x80000000)==0x00) group.long 0x928++0x03 "TDMEM 37" line.long 0x00 "ORIG_TD037,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x928++0x03 line.long 0x00 "ORIG_TD037,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x928+0x04)++0x03 line.long 0x00 "ORIG_TD137,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x930))&0x80000000)==0x00) group.long 0x930++0x03 "TDMEM 38" line.long 0x00 "ORIG_TD038,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x930++0x03 line.long 0x00 "ORIG_TD038,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x930+0x04)++0x03 line.long 0x00 "ORIG_TD138,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x938))&0x80000000)==0x00) group.long 0x938++0x03 "TDMEM 39" line.long 0x00 "ORIG_TD039,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x938++0x03 line.long 0x00 "ORIG_TD039,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x938+0x04)++0x03 line.long 0x00 "ORIG_TD139,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x940))&0x80000000)==0x00) group.long 0x940++0x03 "TDMEM 40" line.long 0x00 "ORIG_TD040,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x940++0x03 line.long 0x00 "ORIG_TD040,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x940+0x04)++0x03 line.long 0x00 "ORIG_TD140,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x948))&0x80000000)==0x00) group.long 0x948++0x03 "TDMEM 41" line.long 0x00 "ORIG_TD041,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x948++0x03 line.long 0x00 "ORIG_TD041,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x948+0x04)++0x03 line.long 0x00 "ORIG_TD141,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x950))&0x80000000)==0x00) group.long 0x950++0x03 "TDMEM 42" line.long 0x00 "ORIG_TD042,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x950++0x03 line.long 0x00 "ORIG_TD042,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x950+0x04)++0x03 line.long 0x00 "ORIG_TD142,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x958))&0x80000000)==0x00) group.long 0x958++0x03 "TDMEM 43" line.long 0x00 "ORIG_TD043,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x958++0x03 line.long 0x00 "ORIG_TD043,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x958+0x04)++0x03 line.long 0x00 "ORIG_TD143,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x960))&0x80000000)==0x00) group.long 0x960++0x03 "TDMEM 44" line.long 0x00 "ORIG_TD044,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x960++0x03 line.long 0x00 "ORIG_TD044,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x960+0x04)++0x03 line.long 0x00 "ORIG_TD144,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x968))&0x80000000)==0x00) group.long 0x968++0x03 "TDMEM 45" line.long 0x00 "ORIG_TD045,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x968++0x03 line.long 0x00 "ORIG_TD045,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x968+0x04)++0x03 line.long 0x00 "ORIG_TD145,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x970))&0x80000000)==0x00) group.long 0x970++0x03 "TDMEM 46" line.long 0x00 "ORIG_TD046,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x970++0x03 line.long 0x00 "ORIG_TD046,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x970+0x04)++0x03 line.long 0x00 "ORIG_TD146,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x978))&0x80000000)==0x00) group.long 0x978++0x03 "TDMEM 47" line.long 0x00 "ORIG_TD047,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x978++0x03 line.long 0x00 "ORIG_TD047,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x978+0x04)++0x03 line.long 0x00 "ORIG_TD147,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x980))&0x80000000)==0x00) group.long 0x980++0x03 "TDMEM 48" line.long 0x00 "ORIG_TD048,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x980++0x03 line.long 0x00 "ORIG_TD048,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x980+0x04)++0x03 line.long 0x00 "ORIG_TD148,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x988))&0x80000000)==0x00) group.long 0x988++0x03 "TDMEM 49" line.long 0x00 "ORIG_TD049,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x988++0x03 line.long 0x00 "ORIG_TD049,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x988+0x04)++0x03 line.long 0x00 "ORIG_TD149,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x990))&0x80000000)==0x00) group.long 0x990++0x03 "TDMEM 50" line.long 0x00 "ORIG_TD050,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x990++0x03 line.long 0x00 "ORIG_TD050,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x990+0x04)++0x03 line.long 0x00 "ORIG_TD150,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x998))&0x80000000)==0x00) group.long 0x998++0x03 "TDMEM 51" line.long 0x00 "ORIG_TD051,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x998++0x03 line.long 0x00 "ORIG_TD051,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x998+0x04)++0x03 line.long 0x00 "ORIG_TD151,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x9A0))&0x80000000)==0x00) group.long 0x9A0++0x03 "TDMEM 52" line.long 0x00 "ORIG_TD052,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x9A0++0x03 line.long 0x00 "ORIG_TD052,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x9A0+0x04)++0x03 line.long 0x00 "ORIG_TD152,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x9A8))&0x80000000)==0x00) group.long 0x9A8++0x03 "TDMEM 53" line.long 0x00 "ORIG_TD053,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x9A8++0x03 line.long 0x00 "ORIG_TD053,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x9A8+0x04)++0x03 line.long 0x00 "ORIG_TD153,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x9B0))&0x80000000)==0x00) group.long 0x9B0++0x03 "TDMEM 54" line.long 0x00 "ORIG_TD054,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x9B0++0x03 line.long 0x00 "ORIG_TD054,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x9B0+0x04)++0x03 line.long 0x00 "ORIG_TD154,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x9B8))&0x80000000)==0x00) group.long 0x9B8++0x03 "TDMEM 55" line.long 0x00 "ORIG_TD055,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x9B8++0x03 line.long 0x00 "ORIG_TD055,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x9B8+0x04)++0x03 line.long 0x00 "ORIG_TD155,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x9C0))&0x80000000)==0x00) group.long 0x9C0++0x03 "TDMEM 56" line.long 0x00 "ORIG_TD056,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x9C0++0x03 line.long 0x00 "ORIG_TD056,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x9C0+0x04)++0x03 line.long 0x00 "ORIG_TD156,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x9C8))&0x80000000)==0x00) group.long 0x9C8++0x03 "TDMEM 57" line.long 0x00 "ORIG_TD057,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x9C8++0x03 line.long 0x00 "ORIG_TD057,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x9C8+0x04)++0x03 line.long 0x00 "ORIG_TD157,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x9D0))&0x80000000)==0x00) group.long 0x9D0++0x03 "TDMEM 58" line.long 0x00 "ORIG_TD058,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x9D0++0x03 line.long 0x00 "ORIG_TD058,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x9D0+0x04)++0x03 line.long 0x00 "ORIG_TD158,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x9D8))&0x80000000)==0x00) group.long 0x9D8++0x03 "TDMEM 59" line.long 0x00 "ORIG_TD059,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x9D8++0x03 line.long 0x00 "ORIG_TD059,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x9D8+0x04)++0x03 line.long 0x00 "ORIG_TD159,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x9E0))&0x80000000)==0x00) group.long 0x9E0++0x03 "TDMEM 60" line.long 0x00 "ORIG_TD060,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x9E0++0x03 line.long 0x00 "ORIG_TD060,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x9E0+0x04)++0x03 line.long 0x00 "ORIG_TD160,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x9E8))&0x80000000)==0x00) group.long 0x9E8++0x03 "TDMEM 61" line.long 0x00 "ORIG_TD061,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x9E8++0x03 line.long 0x00 "ORIG_TD061,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x9E8+0x04)++0x03 line.long 0x00 "ORIG_TD161,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x9F0))&0x80000000)==0x00) group.long 0x9F0++0x03 "TDMEM 62" line.long 0x00 "ORIG_TD062,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x9F0++0x03 line.long 0x00 "ORIG_TD062,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x9F0+0x04)++0x03 line.long 0x00 "ORIG_TD162,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0x9F8))&0x80000000)==0x00) group.long 0x9F8++0x03 "TDMEM 63" line.long 0x00 "ORIG_TD063,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0x9F8++0x03 line.long 0x00 "ORIG_TD063,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0x9F8+0x04)++0x03 line.long 0x00 "ORIG_TD163,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xA00))&0x80000000)==0x00) group.long 0xA00++0x03 "TDMEM 64" line.long 0x00 "ORIG_TD064,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xA00++0x03 line.long 0x00 "ORIG_TD064,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xA00+0x04)++0x03 line.long 0x00 "ORIG_TD164,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xA08))&0x80000000)==0x00) group.long 0xA08++0x03 "TDMEM 65" line.long 0x00 "ORIG_TD065,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xA08++0x03 line.long 0x00 "ORIG_TD065,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xA08+0x04)++0x03 line.long 0x00 "ORIG_TD165,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xA10))&0x80000000)==0x00) group.long 0xA10++0x03 "TDMEM 66" line.long 0x00 "ORIG_TD066,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xA10++0x03 line.long 0x00 "ORIG_TD066,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xA10+0x04)++0x03 line.long 0x00 "ORIG_TD166,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xA18))&0x80000000)==0x00) group.long 0xA18++0x03 "TDMEM 67" line.long 0x00 "ORIG_TD067,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xA18++0x03 line.long 0x00 "ORIG_TD067,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xA18+0x04)++0x03 line.long 0x00 "ORIG_TD167,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xA20))&0x80000000)==0x00) group.long 0xA20++0x03 "TDMEM 68" line.long 0x00 "ORIG_TD068,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xA20++0x03 line.long 0x00 "ORIG_TD068,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xA20+0x04)++0x03 line.long 0x00 "ORIG_TD168,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xA28))&0x80000000)==0x00) group.long 0xA28++0x03 "TDMEM 69" line.long 0x00 "ORIG_TD069,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xA28++0x03 line.long 0x00 "ORIG_TD069,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xA28+0x04)++0x03 line.long 0x00 "ORIG_TD169,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xA30))&0x80000000)==0x00) group.long 0xA30++0x03 "TDMEM 70" line.long 0x00 "ORIG_TD070,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xA30++0x03 line.long 0x00 "ORIG_TD070,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xA30+0x04)++0x03 line.long 0x00 "ORIG_TD170,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xA38))&0x80000000)==0x00) group.long 0xA38++0x03 "TDMEM 71" line.long 0x00 "ORIG_TD071,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xA38++0x03 line.long 0x00 "ORIG_TD071,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xA38+0x04)++0x03 line.long 0x00 "ORIG_TD171,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xA40))&0x80000000)==0x00) group.long 0xA40++0x03 "TDMEM 72" line.long 0x00 "ORIG_TD072,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xA40++0x03 line.long 0x00 "ORIG_TD072,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xA40+0x04)++0x03 line.long 0x00 "ORIG_TD172,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xA48))&0x80000000)==0x00) group.long 0xA48++0x03 "TDMEM 73" line.long 0x00 "ORIG_TD073,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xA48++0x03 line.long 0x00 "ORIG_TD073,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xA48+0x04)++0x03 line.long 0x00 "ORIG_TD173,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xA50))&0x80000000)==0x00) group.long 0xA50++0x03 "TDMEM 74" line.long 0x00 "ORIG_TD074,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xA50++0x03 line.long 0x00 "ORIG_TD074,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xA50+0x04)++0x03 line.long 0x00 "ORIG_TD174,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xA58))&0x80000000)==0x00) group.long 0xA58++0x03 "TDMEM 75" line.long 0x00 "ORIG_TD075,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xA58++0x03 line.long 0x00 "ORIG_TD075,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xA58+0x04)++0x03 line.long 0x00 "ORIG_TD175,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xA60))&0x80000000)==0x00) group.long 0xA60++0x03 "TDMEM 76" line.long 0x00 "ORIG_TD076,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xA60++0x03 line.long 0x00 "ORIG_TD076,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xA60+0x04)++0x03 line.long 0x00 "ORIG_TD176,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xA68))&0x80000000)==0x00) group.long 0xA68++0x03 "TDMEM 77" line.long 0x00 "ORIG_TD077,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xA68++0x03 line.long 0x00 "ORIG_TD077,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xA68+0x04)++0x03 line.long 0x00 "ORIG_TD177,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xA70))&0x80000000)==0x00) group.long 0xA70++0x03 "TDMEM 78" line.long 0x00 "ORIG_TD078,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xA70++0x03 line.long 0x00 "ORIG_TD078,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xA70+0x04)++0x03 line.long 0x00 "ORIG_TD178,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xA78))&0x80000000)==0x00) group.long 0xA78++0x03 "TDMEM 79" line.long 0x00 "ORIG_TD079,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xA78++0x03 line.long 0x00 "ORIG_TD079,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xA78+0x04)++0x03 line.long 0x00 "ORIG_TD179,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xA80))&0x80000000)==0x00) group.long 0xA80++0x03 "TDMEM 80" line.long 0x00 "ORIG_TD080,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xA80++0x03 line.long 0x00 "ORIG_TD080,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xA80+0x04)++0x03 line.long 0x00 "ORIG_TD180,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xA88))&0x80000000)==0x00) group.long 0xA88++0x03 "TDMEM 81" line.long 0x00 "ORIG_TD081,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xA88++0x03 line.long 0x00 "ORIG_TD081,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xA88+0x04)++0x03 line.long 0x00 "ORIG_TD181,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xA90))&0x80000000)==0x00) group.long 0xA90++0x03 "TDMEM 82" line.long 0x00 "ORIG_TD082,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xA90++0x03 line.long 0x00 "ORIG_TD082,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xA90+0x04)++0x03 line.long 0x00 "ORIG_TD182,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xA98))&0x80000000)==0x00) group.long 0xA98++0x03 "TDMEM 83" line.long 0x00 "ORIG_TD083,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xA98++0x03 line.long 0x00 "ORIG_TD083,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xA98+0x04)++0x03 line.long 0x00 "ORIG_TD183,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xAA0))&0x80000000)==0x00) group.long 0xAA0++0x03 "TDMEM 84" line.long 0x00 "ORIG_TD084,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xAA0++0x03 line.long 0x00 "ORIG_TD084,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xAA0+0x04)++0x03 line.long 0x00 "ORIG_TD184,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xAA8))&0x80000000)==0x00) group.long 0xAA8++0x03 "TDMEM 85" line.long 0x00 "ORIG_TD085,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xAA8++0x03 line.long 0x00 "ORIG_TD085,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xAA8+0x04)++0x03 line.long 0x00 "ORIG_TD185,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xAB0))&0x80000000)==0x00) group.long 0xAB0++0x03 "TDMEM 86" line.long 0x00 "ORIG_TD086,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xAB0++0x03 line.long 0x00 "ORIG_TD086,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xAB0+0x04)++0x03 line.long 0x00 "ORIG_TD186,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xAB8))&0x80000000)==0x00) group.long 0xAB8++0x03 "TDMEM 87" line.long 0x00 "ORIG_TD087,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xAB8++0x03 line.long 0x00 "ORIG_TD087,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xAB8+0x04)++0x03 line.long 0x00 "ORIG_TD187,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xAC0))&0x80000000)==0x00) group.long 0xAC0++0x03 "TDMEM 88" line.long 0x00 "ORIG_TD088,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xAC0++0x03 line.long 0x00 "ORIG_TD088,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xAC0+0x04)++0x03 line.long 0x00 "ORIG_TD188,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xAC8))&0x80000000)==0x00) group.long 0xAC8++0x03 "TDMEM 89" line.long 0x00 "ORIG_TD089,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xAC8++0x03 line.long 0x00 "ORIG_TD089,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xAC8+0x04)++0x03 line.long 0x00 "ORIG_TD189,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xAD0))&0x80000000)==0x00) group.long 0xAD0++0x03 "TDMEM 90" line.long 0x00 "ORIG_TD090,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xAD0++0x03 line.long 0x00 "ORIG_TD090,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xAD0+0x04)++0x03 line.long 0x00 "ORIG_TD190,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xAD8))&0x80000000)==0x00) group.long 0xAD8++0x03 "TDMEM 91" line.long 0x00 "ORIG_TD091,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xAD8++0x03 line.long 0x00 "ORIG_TD091,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xAD8+0x04)++0x03 line.long 0x00 "ORIG_TD191,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xAE0))&0x80000000)==0x00) group.long 0xAE0++0x03 "TDMEM 92" line.long 0x00 "ORIG_TD092,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xAE0++0x03 line.long 0x00 "ORIG_TD092,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xAE0+0x04)++0x03 line.long 0x00 "ORIG_TD192,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xAE8))&0x80000000)==0x00) group.long 0xAE8++0x03 "TDMEM 93" line.long 0x00 "ORIG_TD093,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xAE8++0x03 line.long 0x00 "ORIG_TD093,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xAE8+0x04)++0x03 line.long 0x00 "ORIG_TD193,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xAF0))&0x80000000)==0x00) group.long 0xAF0++0x03 "TDMEM 94" line.long 0x00 "ORIG_TD094,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xAF0++0x03 line.long 0x00 "ORIG_TD094,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xAF0+0x04)++0x03 line.long 0x00 "ORIG_TD194,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xAF8))&0x80000000)==0x00) group.long 0xAF8++0x03 "TDMEM 95" line.long 0x00 "ORIG_TD095,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xAF8++0x03 line.long 0x00 "ORIG_TD095,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xAF8+0x04)++0x03 line.long 0x00 "ORIG_TD195,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xB00))&0x80000000)==0x00) group.long 0xB00++0x03 "TDMEM 96" line.long 0x00 "ORIG_TD096,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xB00++0x03 line.long 0x00 "ORIG_TD096,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xB00+0x04)++0x03 line.long 0x00 "ORIG_TD196,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xB08))&0x80000000)==0x00) group.long 0xB08++0x03 "TDMEM 97" line.long 0x00 "ORIG_TD097,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xB08++0x03 line.long 0x00 "ORIG_TD097,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xB08+0x04)++0x03 line.long 0x00 "ORIG_TD197,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xB10))&0x80000000)==0x00) group.long 0xB10++0x03 "TDMEM 98" line.long 0x00 "ORIG_TD098,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xB10++0x03 line.long 0x00 "ORIG_TD098,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xB10+0x04)++0x03 line.long 0x00 "ORIG_TD198,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xB18))&0x80000000)==0x00) group.long 0xB18++0x03 "TDMEM 99" line.long 0x00 "ORIG_TD099,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xB18++0x03 line.long 0x00 "ORIG_TD099,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xB18+0x04)++0x03 line.long 0x00 "ORIG_TD199,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xB20))&0x80000000)==0x00) group.long 0xB20++0x03 "TDMEM 100" line.long 0x00 "ORIG_TD0100,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xB20++0x03 line.long 0x00 "ORIG_TD0100,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xB20+0x04)++0x03 line.long 0x00 "ORIG_TD1100,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xB28))&0x80000000)==0x00) group.long 0xB28++0x03 "TDMEM 101" line.long 0x00 "ORIG_TD0101,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xB28++0x03 line.long 0x00 "ORIG_TD0101,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xB28+0x04)++0x03 line.long 0x00 "ORIG_TD1101,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xB30))&0x80000000)==0x00) group.long 0xB30++0x03 "TDMEM 102" line.long 0x00 "ORIG_TD0102,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xB30++0x03 line.long 0x00 "ORIG_TD0102,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xB30+0x04)++0x03 line.long 0x00 "ORIG_TD1102,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xB38))&0x80000000)==0x00) group.long 0xB38++0x03 "TDMEM 103" line.long 0x00 "ORIG_TD0103,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xB38++0x03 line.long 0x00 "ORIG_TD0103,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xB38+0x04)++0x03 line.long 0x00 "ORIG_TD1103,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xB40))&0x80000000)==0x00) group.long 0xB40++0x03 "TDMEM 104" line.long 0x00 "ORIG_TD0104,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xB40++0x03 line.long 0x00 "ORIG_TD0104,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xB40+0x04)++0x03 line.long 0x00 "ORIG_TD1104,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xB48))&0x80000000)==0x00) group.long 0xB48++0x03 "TDMEM 105" line.long 0x00 "ORIG_TD0105,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xB48++0x03 line.long 0x00 "ORIG_TD0105,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xB48+0x04)++0x03 line.long 0x00 "ORIG_TD1105,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xB50))&0x80000000)==0x00) group.long 0xB50++0x03 "TDMEM 106" line.long 0x00 "ORIG_TD0106,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xB50++0x03 line.long 0x00 "ORIG_TD0106,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xB50+0x04)++0x03 line.long 0x00 "ORIG_TD1106,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xB58))&0x80000000)==0x00) group.long 0xB58++0x03 "TDMEM 107" line.long 0x00 "ORIG_TD0107,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xB58++0x03 line.long 0x00 "ORIG_TD0107,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xB58+0x04)++0x03 line.long 0x00 "ORIG_TD1107,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xB60))&0x80000000)==0x00) group.long 0xB60++0x03 "TDMEM 108" line.long 0x00 "ORIG_TD0108,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xB60++0x03 line.long 0x00 "ORIG_TD0108,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xB60+0x04)++0x03 line.long 0x00 "ORIG_TD1108,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xB68))&0x80000000)==0x00) group.long 0xB68++0x03 "TDMEM 109" line.long 0x00 "ORIG_TD0109,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xB68++0x03 line.long 0x00 "ORIG_TD0109,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xB68+0x04)++0x03 line.long 0x00 "ORIG_TD1109,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xB70))&0x80000000)==0x00) group.long 0xB70++0x03 "TDMEM 110" line.long 0x00 "ORIG_TD0110,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xB70++0x03 line.long 0x00 "ORIG_TD0110,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xB70+0x04)++0x03 line.long 0x00 "ORIG_TD1110,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xB78))&0x80000000)==0x00) group.long 0xB78++0x03 "TDMEM 111" line.long 0x00 "ORIG_TD0111,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xB78++0x03 line.long 0x00 "ORIG_TD0111,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xB78+0x04)++0x03 line.long 0x00 "ORIG_TD1111,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xB80))&0x80000000)==0x00) group.long 0xB80++0x03 "TDMEM 112" line.long 0x00 "ORIG_TD0112,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xB80++0x03 line.long 0x00 "ORIG_TD0112,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xB80+0x04)++0x03 line.long 0x00 "ORIG_TD1112,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xB88))&0x80000000)==0x00) group.long 0xB88++0x03 "TDMEM 113" line.long 0x00 "ORIG_TD0113,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xB88++0x03 line.long 0x00 "ORIG_TD0113,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xB88+0x04)++0x03 line.long 0x00 "ORIG_TD1113,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xB90))&0x80000000)==0x00) group.long 0xB90++0x03 "TDMEM 114" line.long 0x00 "ORIG_TD0114,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xB90++0x03 line.long 0x00 "ORIG_TD0114,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xB90+0x04)++0x03 line.long 0x00 "ORIG_TD1114,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xB98))&0x80000000)==0x00) group.long 0xB98++0x03 "TDMEM 115" line.long 0x00 "ORIG_TD0115,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xB98++0x03 line.long 0x00 "ORIG_TD0115,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xB98+0x04)++0x03 line.long 0x00 "ORIG_TD1115,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xBA0))&0x80000000)==0x00) group.long 0xBA0++0x03 "TDMEM 116" line.long 0x00 "ORIG_TD0116,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xBA0++0x03 line.long 0x00 "ORIG_TD0116,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xBA0+0x04)++0x03 line.long 0x00 "ORIG_TD1116,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xBA8))&0x80000000)==0x00) group.long 0xBA8++0x03 "TDMEM 117" line.long 0x00 "ORIG_TD0117,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xBA8++0x03 line.long 0x00 "ORIG_TD0117,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xBA8+0x04)++0x03 line.long 0x00 "ORIG_TD1117,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xBB0))&0x80000000)==0x00) group.long 0xBB0++0x03 "TDMEM 118" line.long 0x00 "ORIG_TD0118,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xBB0++0x03 line.long 0x00 "ORIG_TD0118,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xBB0+0x04)++0x03 line.long 0x00 "ORIG_TD1118,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xBB8))&0x80000000)==0x00) group.long 0xBB8++0x03 "TDMEM 119" line.long 0x00 "ORIG_TD0119,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xBB8++0x03 line.long 0x00 "ORIG_TD0119,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xBB8+0x04)++0x03 line.long 0x00 "ORIG_TD1119,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xBC0))&0x80000000)==0x00) group.long 0xBC0++0x03 "TDMEM 120" line.long 0x00 "ORIG_TD0120,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xBC0++0x03 line.long 0x00 "ORIG_TD0120,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xBC0+0x04)++0x03 line.long 0x00 "ORIG_TD1120,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xBC8))&0x80000000)==0x00) group.long 0xBC8++0x03 "TDMEM 121" line.long 0x00 "ORIG_TD0121,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xBC8++0x03 line.long 0x00 "ORIG_TD0121,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xBC8+0x04)++0x03 line.long 0x00 "ORIG_TD1121,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xBD0))&0x80000000)==0x00) group.long 0xBD0++0x03 "TDMEM 122" line.long 0x00 "ORIG_TD0122,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xBD0++0x03 line.long 0x00 "ORIG_TD0122,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xBD0+0x04)++0x03 line.long 0x00 "ORIG_TD1122,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xBD8))&0x80000000)==0x00) group.long 0xBD8++0x03 "TDMEM 123" line.long 0x00 "ORIG_TD0123,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xBD8++0x03 line.long 0x00 "ORIG_TD0123,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xBD8+0x04)++0x03 line.long 0x00 "ORIG_TD1123,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xBE0))&0x80000000)==0x00) group.long 0xBE0++0x03 "TDMEM 124" line.long 0x00 "ORIG_TD0124,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xBE0++0x03 line.long 0x00 "ORIG_TD0124,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xBE0+0x04)++0x03 line.long 0x00 "ORIG_TD1124,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xBE8))&0x80000000)==0x00) group.long 0xBE8++0x03 "TDMEM 125" line.long 0x00 "ORIG_TD0125,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xBE8++0x03 line.long 0x00 "ORIG_TD0125,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xBE8+0x04)++0x03 line.long 0x00 "ORIG_TD1125,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xBF0))&0x80000000)==0x00) group.long 0xBF0++0x03 "TDMEM 126" line.long 0x00 "ORIG_TD0126,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xBF0++0x03 line.long 0x00 "ORIG_TD0126,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xBF0+0x04)++0x03 line.long 0x00 "ORIG_TD1126,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" if (((per.l(ad:0x40007000+0xBF8))&0x80000000)==0x00) group.long 0xBF8++0x03 "TDMEM 127" line.long 0x00 "ORIG_TD0127,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" else group.long 0xBF8++0x03 line.long 0x00 "ORIG_TD0127,PHUB Original Transaction Descriptor 0" bitfld.long 0x00 31. " SWAP_EN ,Swap Enable" "Disabled,Enabled" bitfld.long 0x00 30. " SWAP_SIZE ,Swap Size" "2 bytes,4 bytes" textline " " bitfld.long 0x00 29. " AUTO_EXEC_NEXT ,Auto Execution Next" "Not requested,Requested" bitfld.long 0x00 28. " TERMIN_EN ,Termination Input Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TERMOUT1_EN ,Termination Output Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TERMOUT0_EN ,Termination Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " INC_DST_ADR ,Increment Destination Address" "Not incremented,Incremented" bitfld.long 0x00 24. " INC_SRC_ADR ,Increment Source Address" "Not incremented,Incremented" textline " " hexmask.long.byte 0x00 16.--23. 1. " NEXT_TD_PTR ,Next TD Pointer" hexmask.long.word 0x00 0.--11. 1. " XFRCNT ,Transfer count" endif group.long (0xBF8+0x04)++0x03 line.long 0x00 "ORIG_TD1127,PHUB Original Transaction Descriptor 1" hexmask.long.word 0x00 16.--31. 1. " DST_ADR ,Destination Address" hexmask.long.word 0x00 0.--15. 1. " SRC_ADR ,Source Address" tree.end width 0x0B tree.end sif (cpu()!="CY8C5245") tree "CAN" base ad:0x4000a000 width 18. tree "CSR" group.long 0x00++0x07 line.long 0x00 "INT_SR,Interrupt Status Register" sif (cpuis("CY8C424?BZI-L489")||cpuis("CY8C424??ZI-L485")||cpuis("CY8C424?LTI-L485")) eventfld.long 0x00 15. " SST_FAILURE ,Single shot transmission failure Interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 14. " STUCK_AT_0 ,Stuck at dominant error Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 13. " RTR_MSG ,RTR auto-reply Msg sent Interrupt" "No interrupt,Interrupt" textline " " endif eventfld.long 0x00 12. " RX_MSG ,Msg received" "No interrupt,Interrupt" eventfld.long 0x00 11. " TX_MSG ,Tx Msg Sent" "No interrupt,Interrupt" textline " " eventfld.long 0x00 10. " RX_MSG_LOSS ,Rx Msg loss Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 9. " BUS_OFF ,Bus Off State" "No interrupt,Interrupt" textline " " eventfld.long 0x00 8. " CRC_ERR ,CRC Error Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 7. " FORM_ERR ,Form Error Interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 6. " ACK_ERR ,Ack Error Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 5. " STUFF_ERR ,Stuff Error Interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 4. " BIT_ERR ,Bit Error Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 3. " OVR_LOAD ,Overload Interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 2. " ARB_LOSS ,Arbitration Loss" "No interrupt,Interrupt" line.long 0x04 "INT_EN,Interrupt Enable Register" sif (cpuis("CY8C424?BZI-L489")||cpuis("CY8C424??ZI-L485")||cpuis("CY8C424?LTI-L485")) bitfld.long 0x04 15. " SST_FAILURE ,Single shot transmission failure Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 14. " STUCK_AT_0 ,Stuck at dominant error Interrupt" "Disabled,Enabled" bitfld.long 0x04 13. " RTR_MSG ,RTR auto-reply Msg sent Interrupt" "Disabled,Enabled" textline " " endif bitfld.long 0x04 12. " RX_MSG ,Msg received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 11. " TX_MSG ,Tx Msg Sent Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " RX_MSG_LOSS ,Rx Msg Loss Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 9. " BUS_OFF ,Busoff State Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 8. " CRC_ERR ,CRC Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 7. " FORM_ERR ,Form Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " ACK_ERR ,Ack Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 5. " STUFF_ERR ,Stuff Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " BIT_ERR ,Bit Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 3. " OVR_LOAD ,Overload Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " ARB_LOSS ,Arbitration Loss Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 0. " INT_EBL ,Global Interrupt Enable Flag" "Disabled,Enabled" hgroup.long 0x08++0x03 hide.long 0x00 "BUF_SR,Buffer Status Register" in rgroup.long 0x0c++0x03 line.long 0x00 "ERR_SR,Error Status Register" bitfld.long 0x00 19. " RXGTE96 ,Rx Error Count is greater or equal to 96 Decimal" "Equal,Greater" bitfld.long 0x00 18. " TXGTE96 ,Tx Error Count is greater or equal to 96 Decimal" "Equal,Greater" textline " " bitfld.long 0x00 16.--17. " ERR_STATE ,Error State of CAN node" "Active,Passive,Buss off,Buss off" hexmask.long.byte 0x00 8.--15. 1. " RX_ERR_CNT ,Rx error Count" textline " " hexmask.long.byte 0x00 0.--7. 1. " TX_ERR_CNT ,Tx error Count" group.long 0x10++0x07 line.long 0x00 "CMD,Command Register" sif (cpuis("CY8C424?BZI-L489")||cpuis("CY8C424??ZI-L485")||cpuis("CY8C424?LTI-L485")) bitfld.long 0x00 28.--31. " IP_MAJOR_VERSION ,IP Major Version Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " IP_MINOR_VERSION ,IP Minor Version Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x00 16.--23. 1. " IP_REV_NUMBER ,IP Revision Number" bitfld.long 0x00 3. " SRAM_TEST ,SRAM test Mode" "Normal,Enabled" textline " " bitfld.long 0x00 1.--2. " TEST_MODE ,Loopback[2]/Listen[1] Test mode" "Normal,Listen-only,External loopback,Internal loopback" bitfld.long 0x00 0. " RUN_STOP ,Run/Stop mode" "Stop,Run" else bitfld.long 0x00 3. " SRAM_TEST ,SRAM test Mode" "Normal,Enabled" bitfld.long 0x00 1. " LISTEN ,Listen only mode" "Active,CAN listen only" textline " " bitfld.long 0x00 0. " RUN_STOP ,Run/Stop mode" "Stop,Run" endif line.long 0x04 "CFG,Configuration Register" hexmask.long.word 0x04 16.--30. 1. " CFG_BITRATE ,CAN configuration Bit rate" sif (cpuis("CY8C424?BZI-L489")||cpuis("CY8C424??ZI-L485")||cpuis("CY8C424?LTI-L485")) bitfld.long 0x04 14. " ECR_MODE ,Error Capture mode" "Free running,Capture mode" textline " " bitfld.long 0x04 13. " SWAP_ENDIAN ,Swap Endian" "Big endian,Little endian" endif bitfld.long 0x04 12. " CFG_ARBITER ,Tx buffer Arbiter" "Round robin,Fixed priority" textline " " bitfld.long 0x04 8.--11. " CFG_TSEG1 ,Length of time segment1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 5.--7. " CFG_TSEG2 ,Length of time segment2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 4. " AUTO_RST ,Auto Restart" "Disabled,Enabled" bitfld.long 0x04 2.--3. " CFG_SJW ,Synchronization Jump Width" "0,1,2,3" textline " " bitfld.long 0x04 1. " SAMPLING_MODE ,CAN bus Bit sampling" "1 point,3 points" bitfld.long 0x04 0. " EDGE_MODE ,CAN bus synchronization logic" "Edge from 'R' to 'D',Both" sif (cpuis("CY8C424?BZI-L489")||cpuis("CY8C424??ZI-L485")||cpuis("CY8C424?LTI-L485")) rgroup.long 0x18++0x03 line.long 0x00 "ECR,Error Capture Register" bitfld.long 0x00 12.--16. " FIELD ,Error capture field" "Stopped,Synchronize,,,,Interframe,Bus Idle,Start of Frame,Arbitration,Control,Data,CRC,ACK,End of frame,,,Error flag,Error echo,Error delimiter,,,,,,Overload flag,Overload echo,Overload delimiter,?..." bitfld.long 0x00 6.--11. " BIT ,Bit number inside of Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 5. " TX_MODE ,Tx Mode" "No status,Transmitter" bitfld.long 0x00 4. " RX_MODE ,Rx Mode" "No status,Receiver" textline " " bitfld.long 0x00 1.--3. " ERROR_TYPE ,Error type" "Arbitration loss,Bit Error,Bit Stuffing Error,Acknowledge Error,Form Error,CRC Error,?..." bitfld.long 0x00 0. " ECR_STATUS ,ECR Status" "Error/Free running,No error" group.long 0x400++0x17 line.long 0x00 "CNTL,Control Register" bitfld.long 0x00 31. " IP_ENABLE ,Can enable" "Disabled/Reset,Enabled/Running" bitfld.long 0x00 0. " TT_ENABLE ,TTCAN enable" "Disabled,Enabled" line.long 0x04 "TTCAN_COUNTER,TTCAN Level1 16-Bit Local Time Counter Register" hexmask.long.word 0x04 16.--31. 1. " LOCAL_TIME ,Bit time counter in TTCAN level 1" line.long 0x08 "TTCAN_COMPARE, Level1 Compare Configuration Register" hexmask.long.word 0x08 16.--31. 1. " TIME_MARK ,Compare target" line.long 0x0C "TTCAN_CAPTURE,TTCAN Level1 Capture Configuration Register" hexmask.long.word 0x0C 16.--31. 1. " SYNC_MARK ,Copy TTCAN_COUNTER.LOCAL_TIME, when SOF detected" line.long 0x10 "TTCAN_TIMING,TTCAN Level1 Timing Configuration Register" hexmask.long.word 0x10 16.--30. 1. " CFG_BITRATE ,Prescaler for generating the time quantum" bitfld.long 0x10 8.--11. " CFG_TSEG1 ,Time segment 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 5.--7. " CFG_TSEG2 ,Time segment 2" "0,1,2,3,4,5,6,7" bitfld.long 0x10 1. " SAMPLING_MODE ,CAN bus bit sampling" "One point,3 points" line.long 0x14 "INTR_CAN_set/clr,CAN Interrupt Cause Register" setclrfld.long 0x14 2. 0x18 2. 0x14 2. " TT_CAPTURE , TT Capture Interrupt" "No interrupt,Interrupt" setclrfld.long 0x14 1. 0x18 1. 0x14 1. " TT_COMPARE , TT Compare Interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x14 0. 0x18 0. 0x14 0. " INT_STATUS , INT_Status Interrupt" "No interrupt,Interrupt" group.long 0x41C++0x03 line.long 0x00 "INTR_CAN_MASK,Can Interrupt Mask Register" bitfld.long 0x00 2. " TT_CAPTURE ,TT_CAPTURE Interrupt mask" "Not masked,Masked" bitfld.long 0x00 1. " TT_COMPARE ,TT_COMPARE Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 0. " INT_STATUS ,INT_STATUS Interrupt mask" "Not masked,Masked" rgroup.long 0x420++0x03 line.long 0x00 "INTR_CAN_MASKED,Can Interrupt Masked Register" bitfld.long 0x00 2. " TT_CAPTURE ,Logical and of corresponding request and mask bits" "No interrupt,Interrupt" bitfld.long 0x00 1. " TT_COMPARE ,Logical and of corresponding request and mask bits" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " INT_STATUS ,Logical and of corresponding request and mask bits" "No interrupt,Interrupt" endif tree.end width 9. tree "TX Registers" group.long 0x20++0x03 "TX0" line.long 0x00 "TX0_CMD,CAN Tx Command Register" bitfld.long 0x00 23. " WPN2 ,Write protect bit" "Not protected,Protected" bitfld.long 0x00 21. " RTR ,RTR remote bit" "Standard,RTR" textline " " bitfld.long 0x00 20. " IDE ,Extended identifier" "Standard,Extended" bitfld.long 0x00 16.--19. " DLC ,Data length of the Tx Msg" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8" textline " " bitfld.long 0x00 3. " WPN1 ,Write protect not flag bit 2" "Unchanged,Modified" bitfld.long 0x00 2. " TXINT_EBL ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " TXABORT ,Transmit abort request" "Idle,Requested" bitfld.long 0x00 0. " TXREQ ,Transmit request" "Idle,Requested" if (((per.l(ad:0x4000a000+0x20))&0x100000)==0x00) group.long (0x20+0x04)++0x03 line.long 0x00 "TX0_ID,CAN Tx Msg Identifier" bitfld.long 0x00 13. " ID ,Tx0 Msg Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Tx0 Msg Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Tx0 Msg Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Tx0 Msg Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Tx0 Msg Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Tx0 Msg Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Tx0 Msg Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Tx0 Msg Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Tx0 Msg Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Tx0 Msg Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Tx0 Msg Identifier bit 0" "0,1" else group.long (0x20+0x04)++0x03 line.long 0x00 "TX0_ID,CAN Tx Msg Identifier" bitfld.long 0x00 31. " ID ,Tx0 Msg Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Tx0 Msg Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Tx0 Msg Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Tx0 Msg Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Tx0 Msg Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Tx0 Msg Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Tx0 Msg Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Tx0 Msg Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Tx0 Msg Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Tx0 Msg Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Tx0 Msg Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Tx0 Msg Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Tx0 Msg Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Tx0 Msg Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Tx0 Msg Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Tx0 Msg Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Tx0 Msg Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Tx0 Msg Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Tx0 Msg Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Tx0 Msg Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Tx0 Msg Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Tx0 Msg Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Tx0 Msg Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Tx0 Msg Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Tx0 Msg Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Tx0 Msg Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Tx0 Msg Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Tx0 Msg Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Tx0 Msg Identifier bit 0" "0,1" endif group.long (0x20+0x08)++0x07 line.long 0x00 "TX0_DH,CAN Tx Msg Upper Data Bytes" line.long 0x04 "TX0_DL,CAN Tx Msg Lower Data Bytes" group.long 0x30++0x03 "TX1" line.long 0x00 "TX1_CMD,CAN Tx Command Register" bitfld.long 0x00 23. " WPN2 ,Write protect bit" "Not protected,Protected" bitfld.long 0x00 21. " RTR ,RTR remote bit" "Standard,RTR" textline " " bitfld.long 0x00 20. " IDE ,Extended identifier" "Standard,Extended" bitfld.long 0x00 16.--19. " DLC ,Data length of the Tx Msg" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8" textline " " bitfld.long 0x00 3. " WPN1 ,Write protect not flag bit 2" "Unchanged,Modified" bitfld.long 0x00 2. " TXINT_EBL ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " TXABORT ,Transmit abort request" "Idle,Requested" bitfld.long 0x00 0. " TXREQ ,Transmit request" "Idle,Requested" if (((per.l(ad:0x4000a000+0x30))&0x100000)==0x00) group.long (0x30+0x04)++0x03 line.long 0x00 "TX1_ID,CAN Tx Msg Identifier" bitfld.long 0x00 13. " ID ,Tx1 Msg Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Tx1 Msg Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Tx1 Msg Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Tx1 Msg Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Tx1 Msg Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Tx1 Msg Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Tx1 Msg Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Tx1 Msg Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Tx1 Msg Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Tx1 Msg Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Tx1 Msg Identifier bit 0" "0,1" else group.long (0x30+0x04)++0x03 line.long 0x00 "TX1_ID,CAN Tx Msg Identifier" bitfld.long 0x00 31. " ID ,Tx1 Msg Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Tx1 Msg Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Tx1 Msg Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Tx1 Msg Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Tx1 Msg Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Tx1 Msg Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Tx1 Msg Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Tx1 Msg Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Tx1 Msg Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Tx1 Msg Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Tx1 Msg Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Tx1 Msg Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Tx1 Msg Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Tx1 Msg Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Tx1 Msg Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Tx1 Msg Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Tx1 Msg Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Tx1 Msg Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Tx1 Msg Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Tx1 Msg Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Tx1 Msg Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Tx1 Msg Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Tx1 Msg Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Tx1 Msg Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Tx1 Msg Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Tx1 Msg Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Tx1 Msg Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Tx1 Msg Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Tx1 Msg Identifier bit 0" "0,1" endif group.long (0x30+0x08)++0x07 line.long 0x00 "TX1_DH,CAN Tx Msg Upper Data Bytes" line.long 0x04 "TX1_DL,CAN Tx Msg Lower Data Bytes" group.long 0x40++0x03 "TX2" line.long 0x00 "TX2_CMD,CAN Tx Command Register" bitfld.long 0x00 23. " WPN2 ,Write protect bit" "Not protected,Protected" bitfld.long 0x00 21. " RTR ,RTR remote bit" "Standard,RTR" textline " " bitfld.long 0x00 20. " IDE ,Extended identifier" "Standard,Extended" bitfld.long 0x00 16.--19. " DLC ,Data length of the Tx Msg" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8" textline " " bitfld.long 0x00 3. " WPN1 ,Write protect not flag bit 2" "Unchanged,Modified" bitfld.long 0x00 2. " TXINT_EBL ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " TXABORT ,Transmit abort request" "Idle,Requested" bitfld.long 0x00 0. " TXREQ ,Transmit request" "Idle,Requested" if (((per.l(ad:0x4000a000+0x40))&0x100000)==0x00) group.long (0x40+0x04)++0x03 line.long 0x00 "TX2_ID,CAN Tx Msg Identifier" bitfld.long 0x00 13. " ID ,Tx2 Msg Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Tx2 Msg Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Tx2 Msg Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Tx2 Msg Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Tx2 Msg Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Tx2 Msg Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Tx2 Msg Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Tx2 Msg Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Tx2 Msg Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Tx2 Msg Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Tx2 Msg Identifier bit 0" "0,1" else group.long (0x40+0x04)++0x03 line.long 0x00 "TX2_ID,CAN Tx Msg Identifier" bitfld.long 0x00 31. " ID ,Tx2 Msg Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Tx2 Msg Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Tx2 Msg Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Tx2 Msg Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Tx2 Msg Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Tx2 Msg Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Tx2 Msg Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Tx2 Msg Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Tx2 Msg Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Tx2 Msg Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Tx2 Msg Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Tx2 Msg Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Tx2 Msg Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Tx2 Msg Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Tx2 Msg Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Tx2 Msg Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Tx2 Msg Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Tx2 Msg Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Tx2 Msg Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Tx2 Msg Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Tx2 Msg Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Tx2 Msg Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Tx2 Msg Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Tx2 Msg Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Tx2 Msg Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Tx2 Msg Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Tx2 Msg Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Tx2 Msg Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Tx2 Msg Identifier bit 0" "0,1" endif group.long (0x40+0x08)++0x07 line.long 0x00 "TX2_DH,CAN Tx Msg Upper Data Bytes" line.long 0x04 "TX2_DL,CAN Tx Msg Lower Data Bytes" group.long 0x50++0x03 "TX3" line.long 0x00 "TX3_CMD,CAN Tx Command Register" bitfld.long 0x00 23. " WPN2 ,Write protect bit" "Not protected,Protected" bitfld.long 0x00 21. " RTR ,RTR remote bit" "Standard,RTR" textline " " bitfld.long 0x00 20. " IDE ,Extended identifier" "Standard,Extended" bitfld.long 0x00 16.--19. " DLC ,Data length of the Tx Msg" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8" textline " " bitfld.long 0x00 3. " WPN1 ,Write protect not flag bit 2" "Unchanged,Modified" bitfld.long 0x00 2. " TXINT_EBL ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " TXABORT ,Transmit abort request" "Idle,Requested" bitfld.long 0x00 0. " TXREQ ,Transmit request" "Idle,Requested" if (((per.l(ad:0x4000a000+0x50))&0x100000)==0x00) group.long (0x50+0x04)++0x03 line.long 0x00 "TX3_ID,CAN Tx Msg Identifier" bitfld.long 0x00 13. " ID ,Tx3 Msg Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Tx3 Msg Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Tx3 Msg Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Tx3 Msg Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Tx3 Msg Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Tx3 Msg Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Tx3 Msg Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Tx3 Msg Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Tx3 Msg Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Tx3 Msg Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Tx3 Msg Identifier bit 0" "0,1" else group.long (0x50+0x04)++0x03 line.long 0x00 "TX3_ID,CAN Tx Msg Identifier" bitfld.long 0x00 31. " ID ,Tx3 Msg Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Tx3 Msg Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Tx3 Msg Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Tx3 Msg Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Tx3 Msg Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Tx3 Msg Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Tx3 Msg Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Tx3 Msg Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Tx3 Msg Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Tx3 Msg Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Tx3 Msg Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Tx3 Msg Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Tx3 Msg Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Tx3 Msg Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Tx3 Msg Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Tx3 Msg Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Tx3 Msg Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Tx3 Msg Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Tx3 Msg Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Tx3 Msg Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Tx3 Msg Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Tx3 Msg Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Tx3 Msg Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Tx3 Msg Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Tx3 Msg Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Tx3 Msg Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Tx3 Msg Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Tx3 Msg Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Tx3 Msg Identifier bit 0" "0,1" endif group.long (0x50+0x08)++0x07 line.long 0x00 "TX3_DH,CAN Tx Msg Upper Data Bytes" line.long 0x04 "TX3_DL,CAN Tx Msg Lower Data Bytes" group.long 0x60++0x03 "TX4" line.long 0x00 "TX4_CMD,CAN Tx Command Register" bitfld.long 0x00 23. " WPN2 ,Write protect bit" "Not protected,Protected" bitfld.long 0x00 21. " RTR ,RTR remote bit" "Standard,RTR" textline " " bitfld.long 0x00 20. " IDE ,Extended identifier" "Standard,Extended" bitfld.long 0x00 16.--19. " DLC ,Data length of the Tx Msg" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8" textline " " bitfld.long 0x00 3. " WPN1 ,Write protect not flag bit 2" "Unchanged,Modified" bitfld.long 0x00 2. " TXINT_EBL ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " TXABORT ,Transmit abort request" "Idle,Requested" bitfld.long 0x00 0. " TXREQ ,Transmit request" "Idle,Requested" if (((per.l(ad:0x4000a000+0x60))&0x100000)==0x00) group.long (0x60+0x04)++0x03 line.long 0x00 "TX4_ID,CAN Tx Msg Identifier" bitfld.long 0x00 13. " ID ,Tx4 Msg Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Tx4 Msg Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Tx4 Msg Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Tx4 Msg Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Tx4 Msg Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Tx4 Msg Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Tx4 Msg Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Tx4 Msg Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Tx4 Msg Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Tx4 Msg Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Tx4 Msg Identifier bit 0" "0,1" else group.long (0x60+0x04)++0x03 line.long 0x00 "TX4_ID,CAN Tx Msg Identifier" bitfld.long 0x00 31. " ID ,Tx4 Msg Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Tx4 Msg Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Tx4 Msg Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Tx4 Msg Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Tx4 Msg Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Tx4 Msg Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Tx4 Msg Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Tx4 Msg Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Tx4 Msg Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Tx4 Msg Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Tx4 Msg Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Tx4 Msg Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Tx4 Msg Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Tx4 Msg Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Tx4 Msg Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Tx4 Msg Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Tx4 Msg Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Tx4 Msg Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Tx4 Msg Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Tx4 Msg Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Tx4 Msg Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Tx4 Msg Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Tx4 Msg Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Tx4 Msg Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Tx4 Msg Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Tx4 Msg Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Tx4 Msg Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Tx4 Msg Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Tx4 Msg Identifier bit 0" "0,1" endif group.long (0x60+0x08)++0x07 line.long 0x00 "TX4_DH,CAN Tx Msg Upper Data Bytes" line.long 0x04 "TX4_DL,CAN Tx Msg Lower Data Bytes" group.long 0x70++0x03 "TX5" line.long 0x00 "TX5_CMD,CAN Tx Command Register" bitfld.long 0x00 23. " WPN2 ,Write protect bit" "Not protected,Protected" bitfld.long 0x00 21. " RTR ,RTR remote bit" "Standard,RTR" textline " " bitfld.long 0x00 20. " IDE ,Extended identifier" "Standard,Extended" bitfld.long 0x00 16.--19. " DLC ,Data length of the Tx Msg" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8" textline " " bitfld.long 0x00 3. " WPN1 ,Write protect not flag bit 2" "Unchanged,Modified" bitfld.long 0x00 2. " TXINT_EBL ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " TXABORT ,Transmit abort request" "Idle,Requested" bitfld.long 0x00 0. " TXREQ ,Transmit request" "Idle,Requested" if (((per.l(ad:0x4000a000+0x70))&0x100000)==0x00) group.long (0x70+0x04)++0x03 line.long 0x00 "TX5_ID,CAN Tx Msg Identifier" bitfld.long 0x00 13. " ID ,Tx5 Msg Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Tx5 Msg Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Tx5 Msg Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Tx5 Msg Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Tx5 Msg Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Tx5 Msg Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Tx5 Msg Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Tx5 Msg Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Tx5 Msg Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Tx5 Msg Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Tx5 Msg Identifier bit 0" "0,1" else group.long (0x70+0x04)++0x03 line.long 0x00 "TX5_ID,CAN Tx Msg Identifier" bitfld.long 0x00 31. " ID ,Tx5 Msg Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Tx5 Msg Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Tx5 Msg Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Tx5 Msg Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Tx5 Msg Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Tx5 Msg Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Tx5 Msg Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Tx5 Msg Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Tx5 Msg Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Tx5 Msg Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Tx5 Msg Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Tx5 Msg Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Tx5 Msg Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Tx5 Msg Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Tx5 Msg Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Tx5 Msg Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Tx5 Msg Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Tx5 Msg Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Tx5 Msg Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Tx5 Msg Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Tx5 Msg Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Tx5 Msg Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Tx5 Msg Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Tx5 Msg Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Tx5 Msg Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Tx5 Msg Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Tx5 Msg Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Tx5 Msg Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Tx5 Msg Identifier bit 0" "0,1" endif group.long (0x70+0x08)++0x07 line.long 0x00 "TX5_DH,CAN Tx Msg Upper Data Bytes" line.long 0x04 "TX5_DL,CAN Tx Msg Lower Data Bytes" group.long 0x80++0x03 "TX6" line.long 0x00 "TX6_CMD,CAN Tx Command Register" bitfld.long 0x00 23. " WPN2 ,Write protect bit" "Not protected,Protected" bitfld.long 0x00 21. " RTR ,RTR remote bit" "Standard,RTR" textline " " bitfld.long 0x00 20. " IDE ,Extended identifier" "Standard,Extended" bitfld.long 0x00 16.--19. " DLC ,Data length of the Tx Msg" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8" textline " " bitfld.long 0x00 3. " WPN1 ,Write protect not flag bit 2" "Unchanged,Modified" bitfld.long 0x00 2. " TXINT_EBL ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " TXABORT ,Transmit abort request" "Idle,Requested" bitfld.long 0x00 0. " TXREQ ,Transmit request" "Idle,Requested" if (((per.l(ad:0x4000a000+0x80))&0x100000)==0x00) group.long (0x80+0x04)++0x03 line.long 0x00 "TX6_ID,CAN Tx Msg Identifier" bitfld.long 0x00 13. " ID ,Tx6 Msg Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Tx6 Msg Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Tx6 Msg Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Tx6 Msg Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Tx6 Msg Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Tx6 Msg Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Tx6 Msg Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Tx6 Msg Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Tx6 Msg Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Tx6 Msg Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Tx6 Msg Identifier bit 0" "0,1" else group.long (0x80+0x04)++0x03 line.long 0x00 "TX6_ID,CAN Tx Msg Identifier" bitfld.long 0x00 31. " ID ,Tx6 Msg Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Tx6 Msg Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Tx6 Msg Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Tx6 Msg Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Tx6 Msg Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Tx6 Msg Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Tx6 Msg Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Tx6 Msg Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Tx6 Msg Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Tx6 Msg Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Tx6 Msg Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Tx6 Msg Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Tx6 Msg Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Tx6 Msg Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Tx6 Msg Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Tx6 Msg Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Tx6 Msg Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Tx6 Msg Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Tx6 Msg Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Tx6 Msg Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Tx6 Msg Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Tx6 Msg Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Tx6 Msg Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Tx6 Msg Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Tx6 Msg Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Tx6 Msg Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Tx6 Msg Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Tx6 Msg Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Tx6 Msg Identifier bit 0" "0,1" endif group.long (0x80+0x08)++0x07 line.long 0x00 "TX6_DH,CAN Tx Msg Upper Data Bytes" line.long 0x04 "TX6_DL,CAN Tx Msg Lower Data Bytes" group.long 0x90++0x03 "TX7" line.long 0x00 "TX7_CMD,CAN Tx Command Register" bitfld.long 0x00 23. " WPN2 ,Write protect bit" "Not protected,Protected" bitfld.long 0x00 21. " RTR ,RTR remote bit" "Standard,RTR" textline " " bitfld.long 0x00 20. " IDE ,Extended identifier" "Standard,Extended" bitfld.long 0x00 16.--19. " DLC ,Data length of the Tx Msg" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8" textline " " bitfld.long 0x00 3. " WPN1 ,Write protect not flag bit 2" "Unchanged,Modified" bitfld.long 0x00 2. " TXINT_EBL ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " TXABORT ,Transmit abort request" "Idle,Requested" bitfld.long 0x00 0. " TXREQ ,Transmit request" "Idle,Requested" if (((per.l(ad:0x4000a000+0x90))&0x100000)==0x00) group.long (0x90+0x04)++0x03 line.long 0x00 "TX7_ID,CAN Tx Msg Identifier" bitfld.long 0x00 13. " ID ,Tx7 Msg Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Tx7 Msg Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Tx7 Msg Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Tx7 Msg Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Tx7 Msg Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Tx7 Msg Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Tx7 Msg Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Tx7 Msg Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Tx7 Msg Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Tx7 Msg Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Tx7 Msg Identifier bit 0" "0,1" else group.long (0x90+0x04)++0x03 line.long 0x00 "TX7_ID,CAN Tx Msg Identifier" bitfld.long 0x00 31. " ID ,Tx7 Msg Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Tx7 Msg Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Tx7 Msg Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Tx7 Msg Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Tx7 Msg Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Tx7 Msg Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Tx7 Msg Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Tx7 Msg Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Tx7 Msg Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Tx7 Msg Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Tx7 Msg Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Tx7 Msg Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Tx7 Msg Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Tx7 Msg Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Tx7 Msg Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Tx7 Msg Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Tx7 Msg Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Tx7 Msg Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Tx7 Msg Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Tx7 Msg Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Tx7 Msg Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Tx7 Msg Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Tx7 Msg Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Tx7 Msg Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Tx7 Msg Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Tx7 Msg Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Tx7 Msg Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Tx7 Msg Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Tx7 Msg Identifier bit 0" "0,1" endif group.long (0x90+0x08)++0x07 line.long 0x00 "TX7_DH,CAN Tx Msg Upper Data Bytes" line.long 0x04 "TX7_DL,CAN Tx Msg Lower Data Bytes" tree.end width 11. tree "RX Registers" group.long 0xA0++0x03 "RX0" line.long 0x00 "RX0_CMD,CAN Rx Command Register" bitfld.long 0x00 23. " WPNH ,Write Protect Bit" "Not protected,Protected" bitfld.long 0x00 21. " RTR ,RTR Remote bit" "Standard,RTR" textline " " bitfld.long 0x00 20. " IDE ,Extended identifier" "Standard,Extended" bitfld.long 0x00 16.--19. " DLC ,Data Length of the Tx Msg" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8" textline " " bitfld.long 0x00 7. " WPNL ,Write protect not Flag Bits 6:3" "Unchanged,Modified" bitfld.long 0x00 6. " LK_FLG ,Link Flag used to link the Rx Buffer" "Not linked,Linked" textline " " bitfld.long 0x00 5. " RX_INT_EBL ,Receive Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " RTR_RPLY ,Automatic RTR Message Handling" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BUF_EBL ,Buffer Enable" "Disabled,Enabled" bitfld.long 0x00 2. " RTR_ABORT ,RTR Abort Request" "Idle,Requested" textline " " bitfld.long 0x00 1. " RTR_RPY_PND ,RTR Reply request Pending" "Not pending,Pending" bitfld.long 0x00 0. " MSG_AV ,Message Available" "Not available,Available" if (((per.l(ad:0x4000a000+0xA0))&0x100000)==0x00) group.long (0xA0+0x04)++0x03 line.long 0x00 "RX0_ID,CAN Rx Msg Identifier" bitfld.long 0x00 13. " ID ,Rx Msg Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" else group.long (0xA0+0x04)++0x03 line.long 0x00 "RX0_ID,CAN Rx Msg Identifier" bitfld.long 0x00 31. " ID ,RX Msg Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" endif group.long (0xA0+0x08)++0x07 line.long 0x00 "RX0_DH,CAN Rx Msg Upper Data Bytes" line.long 0x04 "RX0_DL,CAN Rx Msg Lower Data Bytes" if (((per.l(ad:0x4000a000+0xA0+0x10))&0x4)==0x00) group.long (0xA0+0x10)++0x03 line.long 0x00 "RX0_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0xA0+0x10)++0x03 line.long 0x00 "RX0_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif if (((per.l(ad:0x4000a000+0xA0+0x14))&0x4)==0x00) group.long (0xA0+0x14)++0x03 line.long 0x00 "RX0_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0xA0+0x14)++0x03 line.long 0x00 "RX0_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif group.long (0xA0+0x18)++0x07 line.long 0x00 "RX0_AMRD,CAN Rx Acceptance mask data" hexmask.long.word 0x00 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" line.long 0x04 "RX0_ACRD,CAN Rx Acceptance code data" hexmask.long.word 0x04 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" group.long 0xC0++0x03 "RX1" line.long 0x00 "RX1_CMD,CAN Rx Command Register" bitfld.long 0x00 23. " WPNH ,Write Protect Bit" "Not protected,Protected" bitfld.long 0x00 21. " RTR ,RTR Remote bit" "Standard,RTR" textline " " bitfld.long 0x00 20. " IDE ,Extended identifier" "Standard,Extended" bitfld.long 0x00 16.--19. " DLC ,Data Length of the Tx Msg" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8" textline " " bitfld.long 0x00 7. " WPNL ,Write protect not Flag Bits 6:3" "Unchanged,Modified" bitfld.long 0x00 6. " LK_FLG ,Link Flag used to link the Rx Buffer" "Not linked,Linked" textline " " bitfld.long 0x00 5. " RX_INT_EBL ,Receive Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " RTR_RPLY ,Automatic RTR Message Handling" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BUF_EBL ,Buffer Enable" "Disabled,Enabled" bitfld.long 0x00 2. " RTR_ABORT ,RTR Abort Request" "Idle,Requested" textline " " bitfld.long 0x00 1. " RTR_RPY_PND ,RTR Reply request Pending" "Not pending,Pending" bitfld.long 0x00 0. " MSG_AV ,Message Available" "Not available,Available" if (((per.l(ad:0x4000a000+0xC0))&0x100000)==0x00) group.long (0xC0+0x04)++0x03 line.long 0x00 "RX1_ID,CAN Rx Msg Identifier" bitfld.long 0x00 13. " ID ,Rx Msg Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" else group.long (0xC0+0x04)++0x03 line.long 0x00 "RX1_ID,CAN Rx Msg Identifier" bitfld.long 0x00 31. " ID ,RX Msg Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" endif group.long (0xC0+0x08)++0x07 line.long 0x00 "RX1_DH,CAN Rx Msg Upper Data Bytes" line.long 0x04 "RX1_DL,CAN Rx Msg Lower Data Bytes" if (((per.l(ad:0x4000a000+0xC0+0x10))&0x4)==0x00) group.long (0xC0+0x10)++0x03 line.long 0x00 "RX1_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0xC0+0x10)++0x03 line.long 0x00 "RX1_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif if (((per.l(ad:0x4000a000+0xC0+0x14))&0x4)==0x00) group.long (0xC0+0x14)++0x03 line.long 0x00 "RX1_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0xC0+0x14)++0x03 line.long 0x00 "RX1_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif group.long (0xC0+0x18)++0x07 line.long 0x00 "RX1_AMRD,CAN Rx Acceptance mask data" hexmask.long.word 0x00 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" line.long 0x04 "RX1_ACRD,CAN Rx Acceptance code data" hexmask.long.word 0x04 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" group.long 0xE0++0x03 "RX2" line.long 0x00 "RX2_CMD,CAN Rx Command Register" bitfld.long 0x00 23. " WPNH ,Write Protect Bit" "Not protected,Protected" bitfld.long 0x00 21. " RTR ,RTR Remote bit" "Standard,RTR" textline " " bitfld.long 0x00 20. " IDE ,Extended identifier" "Standard,Extended" bitfld.long 0x00 16.--19. " DLC ,Data Length of the Tx Msg" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8" textline " " bitfld.long 0x00 7. " WPNL ,Write protect not Flag Bits 6:3" "Unchanged,Modified" bitfld.long 0x00 6. " LK_FLG ,Link Flag used to link the Rx Buffer" "Not linked,Linked" textline " " bitfld.long 0x00 5. " RX_INT_EBL ,Receive Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " RTR_RPLY ,Automatic RTR Message Handling" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BUF_EBL ,Buffer Enable" "Disabled,Enabled" bitfld.long 0x00 2. " RTR_ABORT ,RTR Abort Request" "Idle,Requested" textline " " bitfld.long 0x00 1. " RTR_RPY_PND ,RTR Reply request Pending" "Not pending,Pending" bitfld.long 0x00 0. " MSG_AV ,Message Available" "Not available,Available" if (((per.l(ad:0x4000a000+0xE0))&0x100000)==0x00) group.long (0xE0+0x04)++0x03 line.long 0x00 "RX2_ID,CAN Rx Msg Identifier" bitfld.long 0x00 13. " ID ,Rx Msg Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" else group.long (0xE0+0x04)++0x03 line.long 0x00 "RX2_ID,CAN Rx Msg Identifier" bitfld.long 0x00 31. " ID ,RX Msg Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" endif group.long (0xE0+0x08)++0x07 line.long 0x00 "RX2_DH,CAN Rx Msg Upper Data Bytes" line.long 0x04 "RX2_DL,CAN Rx Msg Lower Data Bytes" if (((per.l(ad:0x4000a000+0xE0+0x10))&0x4)==0x00) group.long (0xE0+0x10)++0x03 line.long 0x00 "RX2_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0xE0+0x10)++0x03 line.long 0x00 "RX2_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif if (((per.l(ad:0x4000a000+0xE0+0x14))&0x4)==0x00) group.long (0xE0+0x14)++0x03 line.long 0x00 "RX2_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0xE0+0x14)++0x03 line.long 0x00 "RX2_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif group.long (0xE0+0x18)++0x07 line.long 0x00 "RX2_AMRD,CAN Rx Acceptance mask data" hexmask.long.word 0x00 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" line.long 0x04 "RX2_ACRD,CAN Rx Acceptance code data" hexmask.long.word 0x04 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" group.long 0x100++0x03 "RX3" line.long 0x00 "RX3_CMD,CAN Rx Command Register" bitfld.long 0x00 23. " WPNH ,Write Protect Bit" "Not protected,Protected" bitfld.long 0x00 21. " RTR ,RTR Remote bit" "Standard,RTR" textline " " bitfld.long 0x00 20. " IDE ,Extended identifier" "Standard,Extended" bitfld.long 0x00 16.--19. " DLC ,Data Length of the Tx Msg" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8" textline " " bitfld.long 0x00 7. " WPNL ,Write protect not Flag Bits 6:3" "Unchanged,Modified" bitfld.long 0x00 6. " LK_FLG ,Link Flag used to link the Rx Buffer" "Not linked,Linked" textline " " bitfld.long 0x00 5. " RX_INT_EBL ,Receive Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " RTR_RPLY ,Automatic RTR Message Handling" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BUF_EBL ,Buffer Enable" "Disabled,Enabled" bitfld.long 0x00 2. " RTR_ABORT ,RTR Abort Request" "Idle,Requested" textline " " bitfld.long 0x00 1. " RTR_RPY_PND ,RTR Reply request Pending" "Not pending,Pending" bitfld.long 0x00 0. " MSG_AV ,Message Available" "Not available,Available" if (((per.l(ad:0x4000a000+0x100))&0x100000)==0x00) group.long (0x100+0x04)++0x03 line.long 0x00 "RX3_ID,CAN Rx Msg Identifier" bitfld.long 0x00 13. " ID ,Rx Msg Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" else group.long (0x100+0x04)++0x03 line.long 0x00 "RX3_ID,CAN Rx Msg Identifier" bitfld.long 0x00 31. " ID ,RX Msg Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" endif group.long (0x100+0x08)++0x07 line.long 0x00 "RX3_DH,CAN Rx Msg Upper Data Bytes" line.long 0x04 "RX3_DL,CAN Rx Msg Lower Data Bytes" if (((per.l(ad:0x4000a000+0x100+0x10))&0x4)==0x00) group.long (0x100+0x10)++0x03 line.long 0x00 "RX3_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0x100+0x10)++0x03 line.long 0x00 "RX3_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif if (((per.l(ad:0x4000a000+0x100+0x14))&0x4)==0x00) group.long (0x100+0x14)++0x03 line.long 0x00 "RX3_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0x100+0x14)++0x03 line.long 0x00 "RX3_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif group.long (0x100+0x18)++0x07 line.long 0x00 "RX3_AMRD,CAN Rx Acceptance mask data" hexmask.long.word 0x00 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" line.long 0x04 "RX3_ACRD,CAN Rx Acceptance code data" hexmask.long.word 0x04 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" group.long 0x120++0x03 "RX4" line.long 0x00 "RX4_CMD,CAN Rx Command Register" bitfld.long 0x00 23. " WPNH ,Write Protect Bit" "Not protected,Protected" bitfld.long 0x00 21. " RTR ,RTR Remote bit" "Standard,RTR" textline " " bitfld.long 0x00 20. " IDE ,Extended identifier" "Standard,Extended" bitfld.long 0x00 16.--19. " DLC ,Data Length of the Tx Msg" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8" textline " " bitfld.long 0x00 7. " WPNL ,Write protect not Flag Bits 6:3" "Unchanged,Modified" bitfld.long 0x00 6. " LK_FLG ,Link Flag used to link the Rx Buffer" "Not linked,Linked" textline " " bitfld.long 0x00 5. " RX_INT_EBL ,Receive Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " RTR_RPLY ,Automatic RTR Message Handling" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BUF_EBL ,Buffer Enable" "Disabled,Enabled" bitfld.long 0x00 2. " RTR_ABORT ,RTR Abort Request" "Idle,Requested" textline " " bitfld.long 0x00 1. " RTR_RPY_PND ,RTR Reply request Pending" "Not pending,Pending" bitfld.long 0x00 0. " MSG_AV ,Message Available" "Not available,Available" if (((per.l(ad:0x4000a000+0x120))&0x100000)==0x00) group.long (0x120+0x04)++0x03 line.long 0x00 "RX4_ID,CAN Rx Msg Identifier" bitfld.long 0x00 13. " ID ,Rx Msg Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" else group.long (0x120+0x04)++0x03 line.long 0x00 "RX4_ID,CAN Rx Msg Identifier" bitfld.long 0x00 31. " ID ,RX Msg Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" endif group.long (0x120+0x08)++0x07 line.long 0x00 "RX4_DH,CAN Rx Msg Upper Data Bytes" line.long 0x04 "RX4_DL,CAN Rx Msg Lower Data Bytes" if (((per.l(ad:0x4000a000+0x120+0x10))&0x4)==0x00) group.long (0x120+0x10)++0x03 line.long 0x00 "RX4_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0x120+0x10)++0x03 line.long 0x00 "RX4_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif if (((per.l(ad:0x4000a000+0x120+0x14))&0x4)==0x00) group.long (0x120+0x14)++0x03 line.long 0x00 "RX4_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0x120+0x14)++0x03 line.long 0x00 "RX4_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif group.long (0x120+0x18)++0x07 line.long 0x00 "RX4_AMRD,CAN Rx Acceptance mask data" hexmask.long.word 0x00 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" line.long 0x04 "RX4_ACRD,CAN Rx Acceptance code data" hexmask.long.word 0x04 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" group.long 0x140++0x03 "RX5" line.long 0x00 "RX5_CMD,CAN Rx Command Register" bitfld.long 0x00 23. " WPNH ,Write Protect Bit" "Not protected,Protected" bitfld.long 0x00 21. " RTR ,RTR Remote bit" "Standard,RTR" textline " " bitfld.long 0x00 20. " IDE ,Extended identifier" "Standard,Extended" bitfld.long 0x00 16.--19. " DLC ,Data Length of the Tx Msg" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8" textline " " bitfld.long 0x00 7. " WPNL ,Write protect not Flag Bits 6:3" "Unchanged,Modified" bitfld.long 0x00 6. " LK_FLG ,Link Flag used to link the Rx Buffer" "Not linked,Linked" textline " " bitfld.long 0x00 5. " RX_INT_EBL ,Receive Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " RTR_RPLY ,Automatic RTR Message Handling" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BUF_EBL ,Buffer Enable" "Disabled,Enabled" bitfld.long 0x00 2. " RTR_ABORT ,RTR Abort Request" "Idle,Requested" textline " " bitfld.long 0x00 1. " RTR_RPY_PND ,RTR Reply request Pending" "Not pending,Pending" bitfld.long 0x00 0. " MSG_AV ,Message Available" "Not available,Available" if (((per.l(ad:0x4000a000+0x140))&0x100000)==0x00) group.long (0x140+0x04)++0x03 line.long 0x00 "RX5_ID,CAN Rx Msg Identifier" bitfld.long 0x00 13. " ID ,Rx Msg Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" else group.long (0x140+0x04)++0x03 line.long 0x00 "RX5_ID,CAN Rx Msg Identifier" bitfld.long 0x00 31. " ID ,RX Msg Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" endif group.long (0x140+0x08)++0x07 line.long 0x00 "RX5_DH,CAN Rx Msg Upper Data Bytes" line.long 0x04 "RX5_DL,CAN Rx Msg Lower Data Bytes" if (((per.l(ad:0x4000a000+0x140+0x10))&0x4)==0x00) group.long (0x140+0x10)++0x03 line.long 0x00 "RX5_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0x140+0x10)++0x03 line.long 0x00 "RX5_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif if (((per.l(ad:0x4000a000+0x140+0x14))&0x4)==0x00) group.long (0x140+0x14)++0x03 line.long 0x00 "RX5_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0x140+0x14)++0x03 line.long 0x00 "RX5_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif group.long (0x140+0x18)++0x07 line.long 0x00 "RX5_AMRD,CAN Rx Acceptance mask data" hexmask.long.word 0x00 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" line.long 0x04 "RX5_ACRD,CAN Rx Acceptance code data" hexmask.long.word 0x04 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" group.long 0x160++0x03 "RX6" line.long 0x00 "RX6_CMD,CAN Rx Command Register" bitfld.long 0x00 23. " WPNH ,Write Protect Bit" "Not protected,Protected" bitfld.long 0x00 21. " RTR ,RTR Remote bit" "Standard,RTR" textline " " bitfld.long 0x00 20. " IDE ,Extended identifier" "Standard,Extended" bitfld.long 0x00 16.--19. " DLC ,Data Length of the Tx Msg" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8" textline " " bitfld.long 0x00 7. " WPNL ,Write protect not Flag Bits 6:3" "Unchanged,Modified" bitfld.long 0x00 6. " LK_FLG ,Link Flag used to link the Rx Buffer" "Not linked,Linked" textline " " bitfld.long 0x00 5. " RX_INT_EBL ,Receive Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " RTR_RPLY ,Automatic RTR Message Handling" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BUF_EBL ,Buffer Enable" "Disabled,Enabled" bitfld.long 0x00 2. " RTR_ABORT ,RTR Abort Request" "Idle,Requested" textline " " bitfld.long 0x00 1. " RTR_RPY_PND ,RTR Reply request Pending" "Not pending,Pending" bitfld.long 0x00 0. " MSG_AV ,Message Available" "Not available,Available" if (((per.l(ad:0x4000a000+0x160))&0x100000)==0x00) group.long (0x160+0x04)++0x03 line.long 0x00 "RX6_ID,CAN Rx Msg Identifier" bitfld.long 0x00 13. " ID ,Rx Msg Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" else group.long (0x160+0x04)++0x03 line.long 0x00 "RX6_ID,CAN Rx Msg Identifier" bitfld.long 0x00 31. " ID ,RX Msg Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" endif group.long (0x160+0x08)++0x07 line.long 0x00 "RX6_DH,CAN Rx Msg Upper Data Bytes" line.long 0x04 "RX6_DL,CAN Rx Msg Lower Data Bytes" if (((per.l(ad:0x4000a000+0x160+0x10))&0x4)==0x00) group.long (0x160+0x10)++0x03 line.long 0x00 "RX6_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0x160+0x10)++0x03 line.long 0x00 "RX6_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif if (((per.l(ad:0x4000a000+0x160+0x14))&0x4)==0x00) group.long (0x160+0x14)++0x03 line.long 0x00 "RX6_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0x160+0x14)++0x03 line.long 0x00 "RX6_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif group.long (0x160+0x18)++0x07 line.long 0x00 "RX6_AMRD,CAN Rx Acceptance mask data" hexmask.long.word 0x00 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" line.long 0x04 "RX6_ACRD,CAN Rx Acceptance code data" hexmask.long.word 0x04 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" group.long 0x180++0x03 "RX7" line.long 0x00 "RX7_CMD,CAN Rx Command Register" bitfld.long 0x00 23. " WPNH ,Write Protect Bit" "Not protected,Protected" bitfld.long 0x00 21. " RTR ,RTR Remote bit" "Standard,RTR" textline " " bitfld.long 0x00 20. " IDE ,Extended identifier" "Standard,Extended" bitfld.long 0x00 16.--19. " DLC ,Data Length of the Tx Msg" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8" textline " " bitfld.long 0x00 7. " WPNL ,Write protect not Flag Bits 6:3" "Unchanged,Modified" bitfld.long 0x00 6. " LK_FLG ,Link Flag used to link the Rx Buffer" "Not linked,Linked" textline " " bitfld.long 0x00 5. " RX_INT_EBL ,Receive Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " RTR_RPLY ,Automatic RTR Message Handling" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BUF_EBL ,Buffer Enable" "Disabled,Enabled" bitfld.long 0x00 2. " RTR_ABORT ,RTR Abort Request" "Idle,Requested" textline " " bitfld.long 0x00 1. " RTR_RPY_PND ,RTR Reply request Pending" "Not pending,Pending" bitfld.long 0x00 0. " MSG_AV ,Message Available" "Not available,Available" if (((per.l(ad:0x4000a000+0x180))&0x100000)==0x00) group.long (0x180+0x04)++0x03 line.long 0x00 "RX7_ID,CAN Rx Msg Identifier" bitfld.long 0x00 13. " ID ,Rx Msg Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" else group.long (0x180+0x04)++0x03 line.long 0x00 "RX7_ID,CAN Rx Msg Identifier" bitfld.long 0x00 31. " ID ,RX Msg Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" endif group.long (0x180+0x08)++0x07 line.long 0x00 "RX7_DH,CAN Rx Msg Upper Data Bytes" line.long 0x04 "RX7_DL,CAN Rx Msg Lower Data Bytes" if (((per.l(ad:0x4000a000+0x180+0x10))&0x4)==0x00) group.long (0x180+0x10)++0x03 line.long 0x00 "RX7_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0x180+0x10)++0x03 line.long 0x00 "RX7_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif if (((per.l(ad:0x4000a000+0x180+0x14))&0x4)==0x00) group.long (0x180+0x14)++0x03 line.long 0x00 "RX7_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0x180+0x14)++0x03 line.long 0x00 "RX7_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif group.long (0x180+0x18)++0x07 line.long 0x00 "RX7_AMRD,CAN Rx Acceptance mask data" hexmask.long.word 0x00 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" line.long 0x04 "RX7_ACRD,CAN Rx Acceptance code data" hexmask.long.word 0x04 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" group.long 0x1A0++0x03 "RX8" line.long 0x00 "RX8_CMD,CAN Rx Command Register" bitfld.long 0x00 23. " WPNH ,Write Protect Bit" "Not protected,Protected" bitfld.long 0x00 21. " RTR ,RTR Remote bit" "Standard,RTR" textline " " bitfld.long 0x00 20. " IDE ,Extended identifier" "Standard,Extended" bitfld.long 0x00 16.--19. " DLC ,Data Length of the Tx Msg" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8" textline " " bitfld.long 0x00 7. " WPNL ,Write protect not Flag Bits 6:3" "Unchanged,Modified" bitfld.long 0x00 6. " LK_FLG ,Link Flag used to link the Rx Buffer" "Not linked,Linked" textline " " bitfld.long 0x00 5. " RX_INT_EBL ,Receive Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " RTR_RPLY ,Automatic RTR Message Handling" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BUF_EBL ,Buffer Enable" "Disabled,Enabled" bitfld.long 0x00 2. " RTR_ABORT ,RTR Abort Request" "Idle,Requested" textline " " bitfld.long 0x00 1. " RTR_RPY_PND ,RTR Reply request Pending" "Not pending,Pending" bitfld.long 0x00 0. " MSG_AV ,Message Available" "Not available,Available" if (((per.l(ad:0x4000a000+0x1A0))&0x100000)==0x00) group.long (0x1A0+0x04)++0x03 line.long 0x00 "RX8_ID,CAN Rx Msg Identifier" bitfld.long 0x00 13. " ID ,Rx Msg Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" else group.long (0x1A0+0x04)++0x03 line.long 0x00 "RX8_ID,CAN Rx Msg Identifier" bitfld.long 0x00 31. " ID ,RX Msg Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" endif group.long (0x1A0+0x08)++0x07 line.long 0x00 "RX8_DH,CAN Rx Msg Upper Data Bytes" line.long 0x04 "RX8_DL,CAN Rx Msg Lower Data Bytes" if (((per.l(ad:0x4000a000+0x1A0+0x10))&0x4)==0x00) group.long (0x1A0+0x10)++0x03 line.long 0x00 "RX8_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0x1A0+0x10)++0x03 line.long 0x00 "RX8_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif if (((per.l(ad:0x4000a000+0x1A0+0x14))&0x4)==0x00) group.long (0x1A0+0x14)++0x03 line.long 0x00 "RX8_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0x1A0+0x14)++0x03 line.long 0x00 "RX8_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif group.long (0x1A0+0x18)++0x07 line.long 0x00 "RX8_AMRD,CAN Rx Acceptance mask data" hexmask.long.word 0x00 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" line.long 0x04 "RX8_ACRD,CAN Rx Acceptance code data" hexmask.long.word 0x04 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" group.long 0x1C0++0x03 "RX9" line.long 0x00 "RX9_CMD,CAN Rx Command Register" bitfld.long 0x00 23. " WPNH ,Write Protect Bit" "Not protected,Protected" bitfld.long 0x00 21. " RTR ,RTR Remote bit" "Standard,RTR" textline " " bitfld.long 0x00 20. " IDE ,Extended identifier" "Standard,Extended" bitfld.long 0x00 16.--19. " DLC ,Data Length of the Tx Msg" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8" textline " " bitfld.long 0x00 7. " WPNL ,Write protect not Flag Bits 6:3" "Unchanged,Modified" bitfld.long 0x00 6. " LK_FLG ,Link Flag used to link the Rx Buffer" "Not linked,Linked" textline " " bitfld.long 0x00 5. " RX_INT_EBL ,Receive Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " RTR_RPLY ,Automatic RTR Message Handling" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BUF_EBL ,Buffer Enable" "Disabled,Enabled" bitfld.long 0x00 2. " RTR_ABORT ,RTR Abort Request" "Idle,Requested" textline " " bitfld.long 0x00 1. " RTR_RPY_PND ,RTR Reply request Pending" "Not pending,Pending" bitfld.long 0x00 0. " MSG_AV ,Message Available" "Not available,Available" if (((per.l(ad:0x4000a000+0x1C0))&0x100000)==0x00) group.long (0x1C0+0x04)++0x03 line.long 0x00 "RX9_ID,CAN Rx Msg Identifier" bitfld.long 0x00 13. " ID ,Rx Msg Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" else group.long (0x1C0+0x04)++0x03 line.long 0x00 "RX9_ID,CAN Rx Msg Identifier" bitfld.long 0x00 31. " ID ,RX Msg Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" endif group.long (0x1C0+0x08)++0x07 line.long 0x00 "RX9_DH,CAN Rx Msg Upper Data Bytes" line.long 0x04 "RX9_DL,CAN Rx Msg Lower Data Bytes" if (((per.l(ad:0x4000a000+0x1C0+0x10))&0x4)==0x00) group.long (0x1C0+0x10)++0x03 line.long 0x00 "RX9_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0x1C0+0x10)++0x03 line.long 0x00 "RX9_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif if (((per.l(ad:0x4000a000+0x1C0+0x14))&0x4)==0x00) group.long (0x1C0+0x14)++0x03 line.long 0x00 "RX9_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0x1C0+0x14)++0x03 line.long 0x00 "RX9_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif group.long (0x1C0+0x18)++0x07 line.long 0x00 "RX9_AMRD,CAN Rx Acceptance mask data" hexmask.long.word 0x00 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" line.long 0x04 "RX9_ACRD,CAN Rx Acceptance code data" hexmask.long.word 0x04 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" group.long 0x1E0++0x03 "RX10" line.long 0x00 "RX10_CMD,CAN Rx Command Register" bitfld.long 0x00 23. " WPNH ,Write Protect Bit" "Not protected,Protected" bitfld.long 0x00 21. " RTR ,RTR Remote bit" "Standard,RTR" textline " " bitfld.long 0x00 20. " IDE ,Extended identifier" "Standard,Extended" bitfld.long 0x00 16.--19. " DLC ,Data Length of the Tx Msg" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8" textline " " bitfld.long 0x00 7. " WPNL ,Write protect not Flag Bits 6:3" "Unchanged,Modified" bitfld.long 0x00 6. " LK_FLG ,Link Flag used to link the Rx Buffer" "Not linked,Linked" textline " " bitfld.long 0x00 5. " RX_INT_EBL ,Receive Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " RTR_RPLY ,Automatic RTR Message Handling" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BUF_EBL ,Buffer Enable" "Disabled,Enabled" bitfld.long 0x00 2. " RTR_ABORT ,RTR Abort Request" "Idle,Requested" textline " " bitfld.long 0x00 1. " RTR_RPY_PND ,RTR Reply request Pending" "Not pending,Pending" bitfld.long 0x00 0. " MSG_AV ,Message Available" "Not available,Available" if (((per.l(ad:0x4000a000+0x1E0))&0x100000)==0x00) group.long (0x1E0+0x04)++0x03 line.long 0x00 "RX10_ID,CAN Rx Msg Identifier" bitfld.long 0x00 13. " ID ,Rx Msg Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" else group.long (0x1E0+0x04)++0x03 line.long 0x00 "RX10_ID,CAN Rx Msg Identifier" bitfld.long 0x00 31. " ID ,RX Msg Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" endif group.long (0x1E0+0x08)++0x07 line.long 0x00 "RX10_DH,CAN Rx Msg Upper Data Bytes" line.long 0x04 "RX10_DL,CAN Rx Msg Lower Data Bytes" if (((per.l(ad:0x4000a000+0x1E0+0x10))&0x4)==0x00) group.long (0x1E0+0x10)++0x03 line.long 0x00 "RX10_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0x1E0+0x10)++0x03 line.long 0x00 "RX10_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif if (((per.l(ad:0x4000a000+0x1E0+0x14))&0x4)==0x00) group.long (0x1E0+0x14)++0x03 line.long 0x00 "RX10_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0x1E0+0x14)++0x03 line.long 0x00 "RX10_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif group.long (0x1E0+0x18)++0x07 line.long 0x00 "RX10_AMRD,CAN Rx Acceptance mask data" hexmask.long.word 0x00 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" line.long 0x04 "RX10_ACRD,CAN Rx Acceptance code data" hexmask.long.word 0x04 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" group.long 0x200++0x03 "RX11" line.long 0x00 "RX11_CMD,CAN Rx Command Register" bitfld.long 0x00 23. " WPNH ,Write Protect Bit" "Not protected,Protected" bitfld.long 0x00 21. " RTR ,RTR Remote bit" "Standard,RTR" textline " " bitfld.long 0x00 20. " IDE ,Extended identifier" "Standard,Extended" bitfld.long 0x00 16.--19. " DLC ,Data Length of the Tx Msg" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8" textline " " bitfld.long 0x00 7. " WPNL ,Write protect not Flag Bits 6:3" "Unchanged,Modified" bitfld.long 0x00 6. " LK_FLG ,Link Flag used to link the Rx Buffer" "Not linked,Linked" textline " " bitfld.long 0x00 5. " RX_INT_EBL ,Receive Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " RTR_RPLY ,Automatic RTR Message Handling" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BUF_EBL ,Buffer Enable" "Disabled,Enabled" bitfld.long 0x00 2. " RTR_ABORT ,RTR Abort Request" "Idle,Requested" textline " " bitfld.long 0x00 1. " RTR_RPY_PND ,RTR Reply request Pending" "Not pending,Pending" bitfld.long 0x00 0. " MSG_AV ,Message Available" "Not available,Available" if (((per.l(ad:0x4000a000+0x200))&0x100000)==0x00) group.long (0x200+0x04)++0x03 line.long 0x00 "RX11_ID,CAN Rx Msg Identifier" bitfld.long 0x00 13. " ID ,Rx Msg Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" else group.long (0x200+0x04)++0x03 line.long 0x00 "RX11_ID,CAN Rx Msg Identifier" bitfld.long 0x00 31. " ID ,RX Msg Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" endif group.long (0x200+0x08)++0x07 line.long 0x00 "RX11_DH,CAN Rx Msg Upper Data Bytes" line.long 0x04 "RX11_DL,CAN Rx Msg Lower Data Bytes" if (((per.l(ad:0x4000a000+0x200+0x10))&0x4)==0x00) group.long (0x200+0x10)++0x03 line.long 0x00 "RX11_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0x200+0x10)++0x03 line.long 0x00 "RX11_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif if (((per.l(ad:0x4000a000+0x200+0x14))&0x4)==0x00) group.long (0x200+0x14)++0x03 line.long 0x00 "RX11_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0x200+0x14)++0x03 line.long 0x00 "RX11_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif group.long (0x200+0x18)++0x07 line.long 0x00 "RX11_AMRD,CAN Rx Acceptance mask data" hexmask.long.word 0x00 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" line.long 0x04 "RX11_ACRD,CAN Rx Acceptance code data" hexmask.long.word 0x04 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" group.long 0x220++0x03 "RX12" line.long 0x00 "RX12_CMD,CAN Rx Command Register" bitfld.long 0x00 23. " WPNH ,Write Protect Bit" "Not protected,Protected" bitfld.long 0x00 21. " RTR ,RTR Remote bit" "Standard,RTR" textline " " bitfld.long 0x00 20. " IDE ,Extended identifier" "Standard,Extended" bitfld.long 0x00 16.--19. " DLC ,Data Length of the Tx Msg" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8" textline " " bitfld.long 0x00 7. " WPNL ,Write protect not Flag Bits 6:3" "Unchanged,Modified" bitfld.long 0x00 6. " LK_FLG ,Link Flag used to link the Rx Buffer" "Not linked,Linked" textline " " bitfld.long 0x00 5. " RX_INT_EBL ,Receive Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " RTR_RPLY ,Automatic RTR Message Handling" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BUF_EBL ,Buffer Enable" "Disabled,Enabled" bitfld.long 0x00 2. " RTR_ABORT ,RTR Abort Request" "Idle,Requested" textline " " bitfld.long 0x00 1. " RTR_RPY_PND ,RTR Reply request Pending" "Not pending,Pending" bitfld.long 0x00 0. " MSG_AV ,Message Available" "Not available,Available" if (((per.l(ad:0x4000a000+0x220))&0x100000)==0x00) group.long (0x220+0x04)++0x03 line.long 0x00 "RX12_ID,CAN Rx Msg Identifier" bitfld.long 0x00 13. " ID ,Rx Msg Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" else group.long (0x220+0x04)++0x03 line.long 0x00 "RX12_ID,CAN Rx Msg Identifier" bitfld.long 0x00 31. " ID ,RX Msg Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" endif group.long (0x220+0x08)++0x07 line.long 0x00 "RX12_DH,CAN Rx Msg Upper Data Bytes" line.long 0x04 "RX12_DL,CAN Rx Msg Lower Data Bytes" if (((per.l(ad:0x4000a000+0x220+0x10))&0x4)==0x00) group.long (0x220+0x10)++0x03 line.long 0x00 "RX12_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0x220+0x10)++0x03 line.long 0x00 "RX12_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif if (((per.l(ad:0x4000a000+0x220+0x14))&0x4)==0x00) group.long (0x220+0x14)++0x03 line.long 0x00 "RX12_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0x220+0x14)++0x03 line.long 0x00 "RX12_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif group.long (0x220+0x18)++0x07 line.long 0x00 "RX12_AMRD,CAN Rx Acceptance mask data" hexmask.long.word 0x00 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" line.long 0x04 "RX12_ACRD,CAN Rx Acceptance code data" hexmask.long.word 0x04 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" group.long 0x240++0x03 "RX13" line.long 0x00 "RX13_CMD,CAN Rx Command Register" bitfld.long 0x00 23. " WPNH ,Write Protect Bit" "Not protected,Protected" bitfld.long 0x00 21. " RTR ,RTR Remote bit" "Standard,RTR" textline " " bitfld.long 0x00 20. " IDE ,Extended identifier" "Standard,Extended" bitfld.long 0x00 16.--19. " DLC ,Data Length of the Tx Msg" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8" textline " " bitfld.long 0x00 7. " WPNL ,Write protect not Flag Bits 6:3" "Unchanged,Modified" bitfld.long 0x00 6. " LK_FLG ,Link Flag used to link the Rx Buffer" "Not linked,Linked" textline " " bitfld.long 0x00 5. " RX_INT_EBL ,Receive Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " RTR_RPLY ,Automatic RTR Message Handling" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BUF_EBL ,Buffer Enable" "Disabled,Enabled" bitfld.long 0x00 2. " RTR_ABORT ,RTR Abort Request" "Idle,Requested" textline " " bitfld.long 0x00 1. " RTR_RPY_PND ,RTR Reply request Pending" "Not pending,Pending" bitfld.long 0x00 0. " MSG_AV ,Message Available" "Not available,Available" if (((per.l(ad:0x4000a000+0x240))&0x100000)==0x00) group.long (0x240+0x04)++0x03 line.long 0x00 "RX13_ID,CAN Rx Msg Identifier" bitfld.long 0x00 13. " ID ,Rx Msg Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" else group.long (0x240+0x04)++0x03 line.long 0x00 "RX13_ID,CAN Rx Msg Identifier" bitfld.long 0x00 31. " ID ,RX Msg Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" endif group.long (0x240+0x08)++0x07 line.long 0x00 "RX13_DH,CAN Rx Msg Upper Data Bytes" line.long 0x04 "RX13_DL,CAN Rx Msg Lower Data Bytes" if (((per.l(ad:0x4000a000+0x240+0x10))&0x4)==0x00) group.long (0x240+0x10)++0x03 line.long 0x00 "RX13_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0x240+0x10)++0x03 line.long 0x00 "RX13_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif if (((per.l(ad:0x4000a000+0x240+0x14))&0x4)==0x00) group.long (0x240+0x14)++0x03 line.long 0x00 "RX13_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0x240+0x14)++0x03 line.long 0x00 "RX13_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif group.long (0x240+0x18)++0x07 line.long 0x00 "RX13_AMRD,CAN Rx Acceptance mask data" hexmask.long.word 0x00 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" line.long 0x04 "RX13_ACRD,CAN Rx Acceptance code data" hexmask.long.word 0x04 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" group.long 0x260++0x03 "RX14" line.long 0x00 "RX14_CMD,CAN Rx Command Register" bitfld.long 0x00 23. " WPNH ,Write Protect Bit" "Not protected,Protected" bitfld.long 0x00 21. " RTR ,RTR Remote bit" "Standard,RTR" textline " " bitfld.long 0x00 20. " IDE ,Extended identifier" "Standard,Extended" bitfld.long 0x00 16.--19. " DLC ,Data Length of the Tx Msg" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8" textline " " bitfld.long 0x00 7. " WPNL ,Write protect not Flag Bits 6:3" "Unchanged,Modified" bitfld.long 0x00 6. " LK_FLG ,Link Flag used to link the Rx Buffer" "Not linked,Linked" textline " " bitfld.long 0x00 5. " RX_INT_EBL ,Receive Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " RTR_RPLY ,Automatic RTR Message Handling" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BUF_EBL ,Buffer Enable" "Disabled,Enabled" bitfld.long 0x00 2. " RTR_ABORT ,RTR Abort Request" "Idle,Requested" textline " " bitfld.long 0x00 1. " RTR_RPY_PND ,RTR Reply request Pending" "Not pending,Pending" bitfld.long 0x00 0. " MSG_AV ,Message Available" "Not available,Available" if (((per.l(ad:0x4000a000+0x260))&0x100000)==0x00) group.long (0x260+0x04)++0x03 line.long 0x00 "RX14_ID,CAN Rx Msg Identifier" bitfld.long 0x00 13. " ID ,Rx Msg Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" else group.long (0x260+0x04)++0x03 line.long 0x00 "RX14_ID,CAN Rx Msg Identifier" bitfld.long 0x00 31. " ID ,RX Msg Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" endif group.long (0x260+0x08)++0x07 line.long 0x00 "RX14_DH,CAN Rx Msg Upper Data Bytes" line.long 0x04 "RX14_DL,CAN Rx Msg Lower Data Bytes" if (((per.l(ad:0x4000a000+0x260+0x10))&0x4)==0x00) group.long (0x260+0x10)++0x03 line.long 0x00 "RX14_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0x260+0x10)++0x03 line.long 0x00 "RX14_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif if (((per.l(ad:0x4000a000+0x260+0x14))&0x4)==0x00) group.long (0x260+0x14)++0x03 line.long 0x00 "RX14_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0x260+0x14)++0x03 line.long 0x00 "RX14_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif group.long (0x260+0x18)++0x07 line.long 0x00 "RX14_AMRD,CAN Rx Acceptance mask data" hexmask.long.word 0x00 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" line.long 0x04 "RX14_ACRD,CAN Rx Acceptance code data" hexmask.long.word 0x04 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" group.long 0x280++0x03 "RX15" line.long 0x00 "RX15_CMD,CAN Rx Command Register" bitfld.long 0x00 23. " WPNH ,Write Protect Bit" "Not protected,Protected" bitfld.long 0x00 21. " RTR ,RTR Remote bit" "Standard,RTR" textline " " bitfld.long 0x00 20. " IDE ,Extended identifier" "Standard,Extended" bitfld.long 0x00 16.--19. " DLC ,Data Length of the Tx Msg" "0,1,2,3,4,5,6,7,8,8,8,8,8,8,8,8" textline " " bitfld.long 0x00 7. " WPNL ,Write protect not Flag Bits 6:3" "Unchanged,Modified" bitfld.long 0x00 6. " LK_FLG ,Link Flag used to link the Rx Buffer" "Not linked,Linked" textline " " bitfld.long 0x00 5. " RX_INT_EBL ,Receive Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " RTR_RPLY ,Automatic RTR Message Handling" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BUF_EBL ,Buffer Enable" "Disabled,Enabled" bitfld.long 0x00 2. " RTR_ABORT ,RTR Abort Request" "Idle,Requested" textline " " bitfld.long 0x00 1. " RTR_RPY_PND ,RTR Reply request Pending" "Not pending,Pending" bitfld.long 0x00 0. " MSG_AV ,Message Available" "Not available,Available" if (((per.l(ad:0x4000a000+0x280))&0x100000)==0x00) group.long (0x280+0x04)++0x03 line.long 0x00 "RX15_ID,CAN Rx Msg Identifier" bitfld.long 0x00 13. " ID ,Rx Msg Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" else group.long (0x280+0x04)++0x03 line.long 0x00 "RX15_ID,CAN Rx Msg Identifier" bitfld.long 0x00 31. " ID ,RX Msg Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 0.--2. " ZEROES ,Zeros" "0,1,2,3,4,5,6,7" endif group.long (0x280+0x08)++0x07 line.long 0x00 "RX15_DH,CAN Rx Msg Upper Data Bytes" line.long 0x04 "RX15_DL,CAN Rx Msg Lower Data Bytes" if (((per.l(ad:0x4000a000+0x280+0x10))&0x4)==0x00) group.long (0x280+0x10)++0x03 line.long 0x00 "RX15_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0x280+0x10)++0x03 line.long 0x00 "RX15_AMR,CAN Rx Acceptance mask value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif if (((per.l(ad:0x4000a000+0x280+0x14))&0x4)==0x00) group.long (0x280+0x14)++0x03 line.long 0x00 "RX15_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 13. " ID ,Identifier bit 10 (Standard)" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" else group.long (0x280+0x14)++0x03 line.long 0x00 "RX15_ACR,CAN Rx Acceptance Code value" bitfld.long 0x00 31. " ID ,Identifier bit 28 (Extended)" "0,1" bitfld.long 0x00 30. ",Identifier bit 27" "0,1" bitfld.long 0x00 29. ",Identifier bit 26" "0,1" bitfld.long 0x00 28. ",Identifier bit 25" "0,1" bitfld.long 0x00 27. ",Identifier bit 24" "0,1" bitfld.long 0x00 26. ",Identifier bit 23" "0,1" bitfld.long 0x00 25. ",Identifier bit 22" "0,1" bitfld.long 0x00 24. ",Identifier bit 21" "0,1" bitfld.long 0x00 23. ",Identifier bit 20" "0,1" bitfld.long 0x00 22. ",Identifier bit 19" "0,1" bitfld.long 0x00 21. ",Identifier bit 18" "0,1" bitfld.long 0x00 20. ",Identifier bit 17" "0,1" bitfld.long 0x00 19. ",Identifier bit 16" "0,1" bitfld.long 0x00 18. ",Identifier bit 15" "0,1" bitfld.long 0x00 17. ",Identifier bit 14" "0,1" bitfld.long 0x00 16. ",Identifier bit 13" "0,1" bitfld.long 0x00 15. ",Identifier bit 12" "0,1" bitfld.long 0x00 14. ",Identifier bit 11" "0,1" bitfld.long 0x00 13. ",Identifier bit 10" "0,1" bitfld.long 0x00 12. ",Identifier bit 9" "0,1" bitfld.long 0x00 11. ",Identifier bit 8" "0,1" bitfld.long 0x00 10. ",Identifier bit 7" "0,1" bitfld.long 0x00 9. ",Identifier bit 6" "0,1" bitfld.long 0x00 8. ",Identifier bit 5" "0,1" bitfld.long 0x00 7. ",Identifier bit 4" "0,1" bitfld.long 0x00 6. ",Identifier bit 3" "0,1" bitfld.long 0x00 5. ",Identifier bit 2" "0,1" bitfld.long 0x00 4. ",Identifier bit 1" "0,1" bitfld.long 0x00 3. ",Identifier bit 0" "0,1" textline " " bitfld.long 0x00 2. " IDE ,Extended Identifier" "Standard,Extended" bitfld.long 0x00 1. " RTR ,RTR bit" "Standard,RTR" endif group.long (0x280+0x18)++0x07 line.long 0x00 "RX15_AMRD,CAN Rx Acceptance mask data" hexmask.long.word 0x00 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" line.long 0x04 "RX15_ACRD,CAN Rx Acceptance code data" hexmask.long.word 0x04 0.--15. 1. " DATA_LSB ,Upper 2 Bytes of Data" tree.end width 0x0B tree.end endif sif (cpuis("CY8C55*")||cpuis("CY8C54*")) tree "DFB (Digital filter block)" base ad:0x4000c000 width 13. tree "DPA_SRAM" group.long 0x0++0x03 line.long 0x00 "DATA_DPA0,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x4++0x03 line.long 0x00 "DATA_DPA1,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x8++0x03 line.long 0x00 "DATA_DPA2,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0xC++0x03 line.long 0x00 "DATA_DPA3,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x10++0x03 line.long 0x00 "DATA_DPA4,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x14++0x03 line.long 0x00 "DATA_DPA5,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x18++0x03 line.long 0x00 "DATA_DPA6,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x1C++0x03 line.long 0x00 "DATA_DPA7,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x20++0x03 line.long 0x00 "DATA_DPA8,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x24++0x03 line.long 0x00 "DATA_DPA9,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x28++0x03 line.long 0x00 "DATA_DPA10,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x2C++0x03 line.long 0x00 "DATA_DPA11,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x30++0x03 line.long 0x00 "DATA_DPA12,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x34++0x03 line.long 0x00 "DATA_DPA13,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x38++0x03 line.long 0x00 "DATA_DPA14,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x3C++0x03 line.long 0x00 "DATA_DPA15,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x40++0x03 line.long 0x00 "DATA_DPA16,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x44++0x03 line.long 0x00 "DATA_DPA17,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x48++0x03 line.long 0x00 "DATA_DPA18,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x4C++0x03 line.long 0x00 "DATA_DPA19,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x50++0x03 line.long 0x00 "DATA_DPA20,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x54++0x03 line.long 0x00 "DATA_DPA21,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x58++0x03 line.long 0x00 "DATA_DPA22,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x5C++0x03 line.long 0x00 "DATA_DPA23,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x60++0x03 line.long 0x00 "DATA_DPA24,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x64++0x03 line.long 0x00 "DATA_DPA25,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x68++0x03 line.long 0x00 "DATA_DPA26,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x6C++0x03 line.long 0x00 "DATA_DPA27,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x70++0x03 line.long 0x00 "DATA_DPA28,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x74++0x03 line.long 0x00 "DATA_DPA29,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x78++0x03 line.long 0x00 "DATA_DPA30,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x7C++0x03 line.long 0x00 "DATA_DPA31,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x80++0x03 line.long 0x00 "DATA_DPA32,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x84++0x03 line.long 0x00 "DATA_DPA33,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x88++0x03 line.long 0x00 "DATA_DPA34,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x8C++0x03 line.long 0x00 "DATA_DPA35,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x90++0x03 line.long 0x00 "DATA_DPA36,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x94++0x03 line.long 0x00 "DATA_DPA37,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x98++0x03 line.long 0x00 "DATA_DPA38,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x9C++0x03 line.long 0x00 "DATA_DPA39,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0xA0++0x03 line.long 0x00 "DATA_DPA40,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0xA4++0x03 line.long 0x00 "DATA_DPA41,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0xA8++0x03 line.long 0x00 "DATA_DPA42,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0xAC++0x03 line.long 0x00 "DATA_DPA43,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0xB0++0x03 line.long 0x00 "DATA_DPA44,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0xB4++0x03 line.long 0x00 "DATA_DPA45,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0xB8++0x03 line.long 0x00 "DATA_DPA46,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0xBC++0x03 line.long 0x00 "DATA_DPA47,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0xC0++0x03 line.long 0x00 "DATA_DPA48,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0xC4++0x03 line.long 0x00 "DATA_DPA49,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0xC8++0x03 line.long 0x00 "DATA_DPA50,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0xCC++0x03 line.long 0x00 "DATA_DPA51,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0xD0++0x03 line.long 0x00 "DATA_DPA52,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0xD4++0x03 line.long 0x00 "DATA_DPA53,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0xD8++0x03 line.long 0x00 "DATA_DPA54,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0xDC++0x03 line.long 0x00 "DATA_DPA55,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0xE0++0x03 line.long 0x00 "DATA_DPA56,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0xE4++0x03 line.long 0x00 "DATA_DPA57,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0xE8++0x03 line.long 0x00 "DATA_DPA58,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0xEC++0x03 line.long 0x00 "DATA_DPA59,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0xF0++0x03 line.long 0x00 "DATA_DPA60,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0xF4++0x03 line.long 0x00 "DATA_DPA61,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0xF8++0x03 line.long 0x00 "DATA_DPA62,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0xFC++0x03 line.long 0x00 "DATA_DPA63,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x100++0x03 line.long 0x00 "DATA_DPA64,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x104++0x03 line.long 0x00 "DATA_DPA65,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x108++0x03 line.long 0x00 "DATA_DPA66,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x10C++0x03 line.long 0x00 "DATA_DPA67,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x110++0x03 line.long 0x00 "DATA_DPA68,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x114++0x03 line.long 0x00 "DATA_DPA69,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x118++0x03 line.long 0x00 "DATA_DPA70,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x11C++0x03 line.long 0x00 "DATA_DPA71,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x120++0x03 line.long 0x00 "DATA_DPA72,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x124++0x03 line.long 0x00 "DATA_DPA73,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x128++0x03 line.long 0x00 "DATA_DPA74,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x12C++0x03 line.long 0x00 "DATA_DPA75,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x130++0x03 line.long 0x00 "DATA_DPA76,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x134++0x03 line.long 0x00 "DATA_DPA77,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x138++0x03 line.long 0x00 "DATA_DPA78,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x13C++0x03 line.long 0x00 "DATA_DPA79,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x140++0x03 line.long 0x00 "DATA_DPA80,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x144++0x03 line.long 0x00 "DATA_DPA81,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x148++0x03 line.long 0x00 "DATA_DPA82,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x14C++0x03 line.long 0x00 "DATA_DPA83,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x150++0x03 line.long 0x00 "DATA_DPA84,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x154++0x03 line.long 0x00 "DATA_DPA85,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x158++0x03 line.long 0x00 "DATA_DPA86,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x15C++0x03 line.long 0x00 "DATA_DPA87,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x160++0x03 line.long 0x00 "DATA_DPA88,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x164++0x03 line.long 0x00 "DATA_DPA89,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x168++0x03 line.long 0x00 "DATA_DPA90,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x16C++0x03 line.long 0x00 "DATA_DPA91,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x170++0x03 line.long 0x00 "DATA_DPA92,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x174++0x03 line.long 0x00 "DATA_DPA93,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x178++0x03 line.long 0x00 "DATA_DPA94,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x17C++0x03 line.long 0x00 "DATA_DPA95,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x180++0x03 line.long 0x00 "DATA_DPA96,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x184++0x03 line.long 0x00 "DATA_DPA97,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x188++0x03 line.long 0x00 "DATA_DPA98,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x18C++0x03 line.long 0x00 "DATA_DPA99,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x190++0x03 line.long 0x00 "DATA_DPA100,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x194++0x03 line.long 0x00 "DATA_DPA101,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x198++0x03 line.long 0x00 "DATA_DPA102,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x19C++0x03 line.long 0x00 "DATA_DPA103,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x1A0++0x03 line.long 0x00 "DATA_DPA104,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x1A4++0x03 line.long 0x00 "DATA_DPA105,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x1A8++0x03 line.long 0x00 "DATA_DPA106,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x1AC++0x03 line.long 0x00 "DATA_DPA107,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x1B0++0x03 line.long 0x00 "DATA_DPA108,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x1B4++0x03 line.long 0x00 "DATA_DPA109,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x1B8++0x03 line.long 0x00 "DATA_DPA110,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x1BC++0x03 line.long 0x00 "DATA_DPA111,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x1C0++0x03 line.long 0x00 "DATA_DPA112,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x1C4++0x03 line.long 0x00 "DATA_DPA113,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x1C8++0x03 line.long 0x00 "DATA_DPA114,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x1CC++0x03 line.long 0x00 "DATA_DPA115,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x1D0++0x03 line.long 0x00 "DATA_DPA116,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x1D4++0x03 line.long 0x00 "DATA_DPA117,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x1D8++0x03 line.long 0x00 "DATA_DPA118,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x1DC++0x03 line.long 0x00 "DATA_DPA119,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x1E0++0x03 line.long 0x00 "DATA_DPA120,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x1E4++0x03 line.long 0x00 "DATA_DPA121,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x1E8++0x03 line.long 0x00 "DATA_DPA122,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x1EC++0x03 line.long 0x00 "DATA_DPA123,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x1F0++0x03 line.long 0x00 "DATA_DPA124,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x1F4++0x03 line.long 0x00 "DATA_DPA125,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x1F8++0x03 line.long 0x00 "DATA_DPA126,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x1FC++0x03 line.long 0x00 "DATA_DPA127,Data RAM A" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" tree.end tree "DPB_SRAM" group.long 0x200++0x03 line.long 0x00 "DATA_DPB0,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x204++0x03 line.long 0x00 "DATA_DPB1,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x208++0x03 line.long 0x00 "DATA_DPB2,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x20C++0x03 line.long 0x00 "DATA_DPB3,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x210++0x03 line.long 0x00 "DATA_DPB4,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x214++0x03 line.long 0x00 "DATA_DPB5,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x218++0x03 line.long 0x00 "DATA_DPB6,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x21C++0x03 line.long 0x00 "DATA_DPB7,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x220++0x03 line.long 0x00 "DATA_DPB8,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x224++0x03 line.long 0x00 "DATA_DPB9,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x228++0x03 line.long 0x00 "DATA_DPB10,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x22C++0x03 line.long 0x00 "DATA_DPB11,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x230++0x03 line.long 0x00 "DATA_DPB12,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x234++0x03 line.long 0x00 "DATA_DPB13,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x238++0x03 line.long 0x00 "DATA_DPB14,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x23C++0x03 line.long 0x00 "DATA_DPB15,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x240++0x03 line.long 0x00 "DATA_DPB16,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x244++0x03 line.long 0x00 "DATA_DPB17,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x248++0x03 line.long 0x00 "DATA_DPB18,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x24C++0x03 line.long 0x00 "DATA_DPB19,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x250++0x03 line.long 0x00 "DATA_DPB20,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x254++0x03 line.long 0x00 "DATA_DPB21,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x258++0x03 line.long 0x00 "DATA_DPB22,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x25C++0x03 line.long 0x00 "DATA_DPB23,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x260++0x03 line.long 0x00 "DATA_DPB24,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x264++0x03 line.long 0x00 "DATA_DPB25,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x268++0x03 line.long 0x00 "DATA_DPB26,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x26C++0x03 line.long 0x00 "DATA_DPB27,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x270++0x03 line.long 0x00 "DATA_DPB28,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x274++0x03 line.long 0x00 "DATA_DPB29,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x278++0x03 line.long 0x00 "DATA_DPB30,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x27C++0x03 line.long 0x00 "DATA_DPB31,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x280++0x03 line.long 0x00 "DATA_DPB32,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x284++0x03 line.long 0x00 "DATA_DPB33,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x288++0x03 line.long 0x00 "DATA_DPB34,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x28C++0x03 line.long 0x00 "DATA_DPB35,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x290++0x03 line.long 0x00 "DATA_DPB36,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x294++0x03 line.long 0x00 "DATA_DPB37,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x298++0x03 line.long 0x00 "DATA_DPB38,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x29C++0x03 line.long 0x00 "DATA_DPB39,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x2A0++0x03 line.long 0x00 "DATA_DPB40,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x2A4++0x03 line.long 0x00 "DATA_DPB41,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x2A8++0x03 line.long 0x00 "DATA_DPB42,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x2AC++0x03 line.long 0x00 "DATA_DPB43,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x2B0++0x03 line.long 0x00 "DATA_DPB44,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x2B4++0x03 line.long 0x00 "DATA_DPB45,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x2B8++0x03 line.long 0x00 "DATA_DPB46,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x2BC++0x03 line.long 0x00 "DATA_DPB47,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x2C0++0x03 line.long 0x00 "DATA_DPB48,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x2C4++0x03 line.long 0x00 "DATA_DPB49,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x2C8++0x03 line.long 0x00 "DATA_DPB50,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x2CC++0x03 line.long 0x00 "DATA_DPB51,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x2D0++0x03 line.long 0x00 "DATA_DPB52,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x2D4++0x03 line.long 0x00 "DATA_DPB53,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x2D8++0x03 line.long 0x00 "DATA_DPB54,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x2DC++0x03 line.long 0x00 "DATA_DPB55,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x2E0++0x03 line.long 0x00 "DATA_DPB56,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x2E4++0x03 line.long 0x00 "DATA_DPB57,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x2E8++0x03 line.long 0x00 "DATA_DPB58,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x2EC++0x03 line.long 0x00 "DATA_DPB59,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x2F0++0x03 line.long 0x00 "DATA_DPB60,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x2F4++0x03 line.long 0x00 "DATA_DPB61,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x2F8++0x03 line.long 0x00 "DATA_DPB62,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x2FC++0x03 line.long 0x00 "DATA_DPB63,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x300++0x03 line.long 0x00 "DATA_DPB64,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x304++0x03 line.long 0x00 "DATA_DPB65,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x308++0x03 line.long 0x00 "DATA_DPB66,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x30C++0x03 line.long 0x00 "DATA_DPB67,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x310++0x03 line.long 0x00 "DATA_DPB68,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x314++0x03 line.long 0x00 "DATA_DPB69,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x318++0x03 line.long 0x00 "DATA_DPB70,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x31C++0x03 line.long 0x00 "DATA_DPB71,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x320++0x03 line.long 0x00 "DATA_DPB72,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x324++0x03 line.long 0x00 "DATA_DPB73,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x328++0x03 line.long 0x00 "DATA_DPB74,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x32C++0x03 line.long 0x00 "DATA_DPB75,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x330++0x03 line.long 0x00 "DATA_DPB76,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x334++0x03 line.long 0x00 "DATA_DPB77,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x338++0x03 line.long 0x00 "DATA_DPB78,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x33C++0x03 line.long 0x00 "DATA_DPB79,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x340++0x03 line.long 0x00 "DATA_DPB80,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x344++0x03 line.long 0x00 "DATA_DPB81,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x348++0x03 line.long 0x00 "DATA_DPB82,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x34C++0x03 line.long 0x00 "DATA_DPB83,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x350++0x03 line.long 0x00 "DATA_DPB84,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x354++0x03 line.long 0x00 "DATA_DPB85,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x358++0x03 line.long 0x00 "DATA_DPB86,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x35C++0x03 line.long 0x00 "DATA_DPB87,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x360++0x03 line.long 0x00 "DATA_DPB88,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x364++0x03 line.long 0x00 "DATA_DPB89,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x368++0x03 line.long 0x00 "DATA_DPB90,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x36C++0x03 line.long 0x00 "DATA_DPB91,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x370++0x03 line.long 0x00 "DATA_DPB92,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x374++0x03 line.long 0x00 "DATA_DPB93,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x378++0x03 line.long 0x00 "DATA_DPB94,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x37C++0x03 line.long 0x00 "DATA_DPB95,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x380++0x03 line.long 0x00 "DATA_DPB96,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x384++0x03 line.long 0x00 "DATA_DPB97,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x388++0x03 line.long 0x00 "DATA_DPB98,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x38C++0x03 line.long 0x00 "DATA_DPB99,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x390++0x03 line.long 0x00 "DATA_DPB100,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x394++0x03 line.long 0x00 "DATA_DPB101,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x398++0x03 line.long 0x00 "DATA_DPB102,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x39C++0x03 line.long 0x00 "DATA_DPB103,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x3A0++0x03 line.long 0x00 "DATA_DPB104,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x3A4++0x03 line.long 0x00 "DATA_DPB105,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x3A8++0x03 line.long 0x00 "DATA_DPB106,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x3AC++0x03 line.long 0x00 "DATA_DPB107,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x3B0++0x03 line.long 0x00 "DATA_DPB108,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x3B4++0x03 line.long 0x00 "DATA_DPB109,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x3B8++0x03 line.long 0x00 "DATA_DPB110,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x3BC++0x03 line.long 0x00 "DATA_DPB111,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x3C0++0x03 line.long 0x00 "DATA_DPB112,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x3C4++0x03 line.long 0x00 "DATA_DPB113,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x3C8++0x03 line.long 0x00 "DATA_DPB114,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x3CC++0x03 line.long 0x00 "DATA_DPB115,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x3D0++0x03 line.long 0x00 "DATA_DPB116,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x3D4++0x03 line.long 0x00 "DATA_DPB117,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x3D8++0x03 line.long 0x00 "DATA_DPB118,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x3DC++0x03 line.long 0x00 "DATA_DPB119,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x3E0++0x03 line.long 0x00 "DATA_DPB120,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x3E4++0x03 line.long 0x00 "DATA_DPB121,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x3E8++0x03 line.long 0x00 "DATA_DPB122,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x3EC++0x03 line.long 0x00 "DATA_DPB123,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x3F0++0x03 line.long 0x00 "DATA_DPB124,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x3F4++0x03 line.long 0x00 "DATA_DPB125,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x3F8++0x03 line.long 0x00 "DATA_DPB126,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" group.long 0x3FC++0x03 line.long 0x00 "DATA_DPB127,DFB Data RAM B" hexmask.long.tbyte 0x00 0.--23. 1. " SRAMDATA ,Data Storage SRAM" tree.end tree "CSA_SRAM" group.long 0x400++0x03 line.long 0x00 "DATA_CSA0,DFB Control Store A" group.long 0x404++0x03 line.long 0x00 "DATA_CSA1,DFB Control Store A" group.long 0x408++0x03 line.long 0x00 "DATA_CSA2,DFB Control Store A" group.long 0x40C++0x03 line.long 0x00 "DATA_CSA3,DFB Control Store A" group.long 0x410++0x03 line.long 0x00 "DATA_CSA4,DFB Control Store A" group.long 0x414++0x03 line.long 0x00 "DATA_CSA5,DFB Control Store A" group.long 0x418++0x03 line.long 0x00 "DATA_CSA6,DFB Control Store A" group.long 0x41C++0x03 line.long 0x00 "DATA_CSA7,DFB Control Store A" group.long 0x420++0x03 line.long 0x00 "DATA_CSA8,DFB Control Store A" group.long 0x424++0x03 line.long 0x00 "DATA_CSA9,DFB Control Store A" group.long 0x428++0x03 line.long 0x00 "DATA_CSA10,DFB Control Store A" group.long 0x42C++0x03 line.long 0x00 "DATA_CSA11,DFB Control Store A" group.long 0x430++0x03 line.long 0x00 "DATA_CSA12,DFB Control Store A" group.long 0x434++0x03 line.long 0x00 "DATA_CSA13,DFB Control Store A" group.long 0x438++0x03 line.long 0x00 "DATA_CSA14,DFB Control Store A" group.long 0x43C++0x03 line.long 0x00 "DATA_CSA15,DFB Control Store A" group.long 0x440++0x03 line.long 0x00 "DATA_CSA16,DFB Control Store A" group.long 0x444++0x03 line.long 0x00 "DATA_CSA17,DFB Control Store A" group.long 0x448++0x03 line.long 0x00 "DATA_CSA18,DFB Control Store A" group.long 0x44C++0x03 line.long 0x00 "DATA_CSA19,DFB Control Store A" group.long 0x450++0x03 line.long 0x00 "DATA_CSA20,DFB Control Store A" group.long 0x454++0x03 line.long 0x00 "DATA_CSA21,DFB Control Store A" group.long 0x458++0x03 line.long 0x00 "DATA_CSA22,DFB Control Store A" group.long 0x45C++0x03 line.long 0x00 "DATA_CSA23,DFB Control Store A" group.long 0x460++0x03 line.long 0x00 "DATA_CSA24,DFB Control Store A" group.long 0x464++0x03 line.long 0x00 "DATA_CSA25,DFB Control Store A" group.long 0x468++0x03 line.long 0x00 "DATA_CSA26,DFB Control Store A" group.long 0x46C++0x03 line.long 0x00 "DATA_CSA27,DFB Control Store A" group.long 0x470++0x03 line.long 0x00 "DATA_CSA28,DFB Control Store A" group.long 0x474++0x03 line.long 0x00 "DATA_CSA29,DFB Control Store A" group.long 0x478++0x03 line.long 0x00 "DATA_CSA30,DFB Control Store A" group.long 0x47C++0x03 line.long 0x00 "DATA_CSA31,DFB Control Store A" group.long 0x480++0x03 line.long 0x00 "DATA_CSA32,DFB Control Store A" group.long 0x484++0x03 line.long 0x00 "DATA_CSA33,DFB Control Store A" group.long 0x488++0x03 line.long 0x00 "DATA_CSA34,DFB Control Store A" group.long 0x48C++0x03 line.long 0x00 "DATA_CSA35,DFB Control Store A" group.long 0x490++0x03 line.long 0x00 "DATA_CSA36,DFB Control Store A" group.long 0x494++0x03 line.long 0x00 "DATA_CSA37,DFB Control Store A" group.long 0x498++0x03 line.long 0x00 "DATA_CSA38,DFB Control Store A" group.long 0x49C++0x03 line.long 0x00 "DATA_CSA39,DFB Control Store A" group.long 0x4A0++0x03 line.long 0x00 "DATA_CSA40,DFB Control Store A" group.long 0x4A4++0x03 line.long 0x00 "DATA_CSA41,DFB Control Store A" group.long 0x4A8++0x03 line.long 0x00 "DATA_CSA42,DFB Control Store A" group.long 0x4AC++0x03 line.long 0x00 "DATA_CSA43,DFB Control Store A" group.long 0x4B0++0x03 line.long 0x00 "DATA_CSA44,DFB Control Store A" group.long 0x4B4++0x03 line.long 0x00 "DATA_CSA45,DFB Control Store A" group.long 0x4B8++0x03 line.long 0x00 "DATA_CSA46,DFB Control Store A" group.long 0x4BC++0x03 line.long 0x00 "DATA_CSA47,DFB Control Store A" group.long 0x4C0++0x03 line.long 0x00 "DATA_CSA48,DFB Control Store A" group.long 0x4C4++0x03 line.long 0x00 "DATA_CSA49,DFB Control Store A" group.long 0x4C8++0x03 line.long 0x00 "DATA_CSA50,DFB Control Store A" group.long 0x4CC++0x03 line.long 0x00 "DATA_CSA51,DFB Control Store A" group.long 0x4D0++0x03 line.long 0x00 "DATA_CSA52,DFB Control Store A" group.long 0x4D4++0x03 line.long 0x00 "DATA_CSA53,DFB Control Store A" group.long 0x4D8++0x03 line.long 0x00 "DATA_CSA54,DFB Control Store A" group.long 0x4DC++0x03 line.long 0x00 "DATA_CSA55,DFB Control Store A" group.long 0x4E0++0x03 line.long 0x00 "DATA_CSA56,DFB Control Store A" group.long 0x4E4++0x03 line.long 0x00 "DATA_CSA57,DFB Control Store A" group.long 0x4E8++0x03 line.long 0x00 "DATA_CSA58,DFB Control Store A" group.long 0x4EC++0x03 line.long 0x00 "DATA_CSA59,DFB Control Store A" group.long 0x4F0++0x03 line.long 0x00 "DATA_CSA60,DFB Control Store A" group.long 0x4F4++0x03 line.long 0x00 "DATA_CSA61,DFB Control Store A" group.long 0x4F8++0x03 line.long 0x00 "DATA_CSA62,DFB Control Store A" group.long 0x4FC++0x03 line.long 0x00 "DATA_CSA63,DFB Control Store A" tree.end tree "CSB_SRAM" group.long 0x500++0x03 line.long 0x00 "DATA_CSB0,DFB Control Store B" group.long 0x504++0x03 line.long 0x00 "DATA_CSB1,DFB Control Store B" group.long 0x508++0x03 line.long 0x00 "DATA_CSB2,DFB Control Store B" group.long 0x50C++0x03 line.long 0x00 "DATA_CSB3,DFB Control Store B" group.long 0x510++0x03 line.long 0x00 "DATA_CSB4,DFB Control Store B" group.long 0x514++0x03 line.long 0x00 "DATA_CSB5,DFB Control Store B" group.long 0x518++0x03 line.long 0x00 "DATA_CSB6,DFB Control Store B" group.long 0x51C++0x03 line.long 0x00 "DATA_CSB7,DFB Control Store B" group.long 0x520++0x03 line.long 0x00 "DATA_CSB8,DFB Control Store B" group.long 0x524++0x03 line.long 0x00 "DATA_CSB9,DFB Control Store B" group.long 0x528++0x03 line.long 0x00 "DATA_CSB10,DFB Control Store B" group.long 0x52C++0x03 line.long 0x00 "DATA_CSB11,DFB Control Store B" group.long 0x530++0x03 line.long 0x00 "DATA_CSB12,DFB Control Store B" group.long 0x534++0x03 line.long 0x00 "DATA_CSB13,DFB Control Store B" group.long 0x538++0x03 line.long 0x00 "DATA_CSB14,DFB Control Store B" group.long 0x53C++0x03 line.long 0x00 "DATA_CSB15,DFB Control Store B" group.long 0x540++0x03 line.long 0x00 "DATA_CSB16,DFB Control Store B" group.long 0x544++0x03 line.long 0x00 "DATA_CSB17,DFB Control Store B" group.long 0x548++0x03 line.long 0x00 "DATA_CSB18,DFB Control Store B" group.long 0x54C++0x03 line.long 0x00 "DATA_CSB19,DFB Control Store B" group.long 0x550++0x03 line.long 0x00 "DATA_CSB20,DFB Control Store B" group.long 0x554++0x03 line.long 0x00 "DATA_CSB21,DFB Control Store B" group.long 0x558++0x03 line.long 0x00 "DATA_CSB22,DFB Control Store B" group.long 0x55C++0x03 line.long 0x00 "DATA_CSB23,DFB Control Store B" group.long 0x560++0x03 line.long 0x00 "DATA_CSB24,DFB Control Store B" group.long 0x564++0x03 line.long 0x00 "DATA_CSB25,DFB Control Store B" group.long 0x568++0x03 line.long 0x00 "DATA_CSB26,DFB Control Store B" group.long 0x56C++0x03 line.long 0x00 "DATA_CSB27,DFB Control Store B" group.long 0x570++0x03 line.long 0x00 "DATA_CSB28,DFB Control Store B" group.long 0x574++0x03 line.long 0x00 "DATA_CSB29,DFB Control Store B" group.long 0x578++0x03 line.long 0x00 "DATA_CSB30,DFB Control Store B" group.long 0x57C++0x03 line.long 0x00 "DATA_CSB31,DFB Control Store B" group.long 0x580++0x03 line.long 0x00 "DATA_CSB32,DFB Control Store B" group.long 0x584++0x03 line.long 0x00 "DATA_CSB33,DFB Control Store B" group.long 0x588++0x03 line.long 0x00 "DATA_CSB34,DFB Control Store B" group.long 0x58C++0x03 line.long 0x00 "DATA_CSB35,DFB Control Store B" group.long 0x590++0x03 line.long 0x00 "DATA_CSB36,DFB Control Store B" group.long 0x594++0x03 line.long 0x00 "DATA_CSB37,DFB Control Store B" group.long 0x598++0x03 line.long 0x00 "DATA_CSB38,DFB Control Store B" group.long 0x59C++0x03 line.long 0x00 "DATA_CSB39,DFB Control Store B" group.long 0x5A0++0x03 line.long 0x00 "DATA_CSB40,DFB Control Store B" group.long 0x5A4++0x03 line.long 0x00 "DATA_CSB41,DFB Control Store B" group.long 0x5A8++0x03 line.long 0x00 "DATA_CSB42,DFB Control Store B" group.long 0x5AC++0x03 line.long 0x00 "DATA_CSB43,DFB Control Store B" group.long 0x5B0++0x03 line.long 0x00 "DATA_CSB44,DFB Control Store B" group.long 0x5B4++0x03 line.long 0x00 "DATA_CSB45,DFB Control Store B" group.long 0x5B8++0x03 line.long 0x00 "DATA_CSB46,DFB Control Store B" group.long 0x5BC++0x03 line.long 0x00 "DATA_CSB47,DFB Control Store B" group.long 0x5C0++0x03 line.long 0x00 "DATA_CSB48,DFB Control Store B" group.long 0x5C4++0x03 line.long 0x00 "DATA_CSB49,DFB Control Store B" group.long 0x5C8++0x03 line.long 0x00 "DATA_CSB50,DFB Control Store B" group.long 0x5CC++0x03 line.long 0x00 "DATA_CSB51,DFB Control Store B" group.long 0x5D0++0x03 line.long 0x00 "DATA_CSB52,DFB Control Store B" group.long 0x5D4++0x03 line.long 0x00 "DATA_CSB53,DFB Control Store B" group.long 0x5D8++0x03 line.long 0x00 "DATA_CSB54,DFB Control Store B" group.long 0x5DC++0x03 line.long 0x00 "DATA_CSB55,DFB Control Store B" group.long 0x5E0++0x03 line.long 0x00 "DATA_CSB56,DFB Control Store B" group.long 0x5E4++0x03 line.long 0x00 "DATA_CSB57,DFB Control Store B" group.long 0x5E8++0x03 line.long 0x00 "DATA_CSB58,DFB Control Store B" group.long 0x5EC++0x03 line.long 0x00 "DATA_CSB59,DFB Control Store B" group.long 0x5F0++0x03 line.long 0x00 "DATA_CSB60,DFB Control Store B" group.long 0x5F4++0x03 line.long 0x00 "DATA_CSB61,DFB Control Store B" group.long 0x5F8++0x03 line.long 0x00 "DATA_CSB62,DFB Control Store B" group.long 0x5FC++0x03 line.long 0x00 "DATA_CSB63,DFB Control Store B" tree.end tree "FSM_SRAM" group.long 0x600++0x03 line.long 0x00 "DATA_FSM0,DFB Code Store B" group.long 0x604++0x03 line.long 0x00 "DATA_FSM1,DFB Code Store B" group.long 0x608++0x03 line.long 0x00 "DATA_FSM2,DFB Code Store B" group.long 0x60C++0x03 line.long 0x00 "DATA_FSM3,DFB Code Store B" group.long 0x610++0x03 line.long 0x00 "DATA_FSM4,DFB Code Store B" group.long 0x614++0x03 line.long 0x00 "DATA_FSM5,DFB Code Store B" group.long 0x618++0x03 line.long 0x00 "DATA_FSM6,DFB Code Store B" group.long 0x61C++0x03 line.long 0x00 "DATA_FSM7,DFB Code Store B" group.long 0x620++0x03 line.long 0x00 "DATA_FSM8,DFB Code Store B" group.long 0x624++0x03 line.long 0x00 "DATA_FSM9,DFB Code Store B" group.long 0x628++0x03 line.long 0x00 "DATA_FSM10,DFB Code Store B" group.long 0x62C++0x03 line.long 0x00 "DATA_FSM11,DFB Code Store B" group.long 0x630++0x03 line.long 0x00 "DATA_FSM12,DFB Code Store B" group.long 0x634++0x03 line.long 0x00 "DATA_FSM13,DFB Code Store B" group.long 0x638++0x03 line.long 0x00 "DATA_FSM14,DFB Code Store B" group.long 0x63C++0x03 line.long 0x00 "DATA_FSM15,DFB Code Store B" group.long 0x640++0x03 line.long 0x00 "DATA_FSM16,DFB Code Store B" group.long 0x644++0x03 line.long 0x00 "DATA_FSM17,DFB Code Store B" group.long 0x648++0x03 line.long 0x00 "DATA_FSM18,DFB Code Store B" group.long 0x64C++0x03 line.long 0x00 "DATA_FSM19,DFB Code Store B" group.long 0x650++0x03 line.long 0x00 "DATA_FSM20,DFB Code Store B" group.long 0x654++0x03 line.long 0x00 "DATA_FSM21,DFB Code Store B" group.long 0x658++0x03 line.long 0x00 "DATA_FSM22,DFB Code Store B" group.long 0x65C++0x03 line.long 0x00 "DATA_FSM23,DFB Code Store B" group.long 0x660++0x03 line.long 0x00 "DATA_FSM24,DFB Code Store B" group.long 0x664++0x03 line.long 0x00 "DATA_FSM25,DFB Code Store B" group.long 0x668++0x03 line.long 0x00 "DATA_FSM26,DFB Code Store B" group.long 0x66C++0x03 line.long 0x00 "DATA_FSM27,DFB Code Store B" group.long 0x670++0x03 line.long 0x00 "DATA_FSM28,DFB Code Store B" group.long 0x674++0x03 line.long 0x00 "DATA_FSM29,DFB Code Store B" group.long 0x678++0x03 line.long 0x00 "DATA_FSM30,DFB Code Store B" group.long 0x67C++0x03 line.long 0x00 "DATA_FSM31,DFB Code Store B" group.long 0x680++0x03 line.long 0x00 "DATA_FSM32,DFB Code Store B" group.long 0x684++0x03 line.long 0x00 "DATA_FSM33,DFB Code Store B" group.long 0x688++0x03 line.long 0x00 "DATA_FSM34,DFB Code Store B" group.long 0x68C++0x03 line.long 0x00 "DATA_FSM35,DFB Code Store B" group.long 0x690++0x03 line.long 0x00 "DATA_FSM36,DFB Code Store B" group.long 0x694++0x03 line.long 0x00 "DATA_FSM37,DFB Code Store B" group.long 0x698++0x03 line.long 0x00 "DATA_FSM38,DFB Code Store B" group.long 0x69C++0x03 line.long 0x00 "DATA_FSM39,DFB Code Store B" group.long 0x6A0++0x03 line.long 0x00 "DATA_FSM40,DFB Code Store B" group.long 0x6A4++0x03 line.long 0x00 "DATA_FSM41,DFB Code Store B" group.long 0x6A8++0x03 line.long 0x00 "DATA_FSM42,DFB Code Store B" group.long 0x6AC++0x03 line.long 0x00 "DATA_FSM43,DFB Code Store B" group.long 0x6B0++0x03 line.long 0x00 "DATA_FSM44,DFB Code Store B" group.long 0x6B4++0x03 line.long 0x00 "DATA_FSM45,DFB Code Store B" group.long 0x6B8++0x03 line.long 0x00 "DATA_FSM46,DFB Code Store B" group.long 0x6BC++0x03 line.long 0x00 "DATA_FSM47,DFB Code Store B" group.long 0x6C0++0x03 line.long 0x00 "DATA_FSM48,DFB Code Store B" group.long 0x6C4++0x03 line.long 0x00 "DATA_FSM49,DFB Code Store B" group.long 0x6C8++0x03 line.long 0x00 "DATA_FSM50,DFB Code Store B" group.long 0x6CC++0x03 line.long 0x00 "DATA_FSM51,DFB Code Store B" group.long 0x6D0++0x03 line.long 0x00 "DATA_FSM52,DFB Code Store B" group.long 0x6D4++0x03 line.long 0x00 "DATA_FSM53,DFB Code Store B" group.long 0x6D8++0x03 line.long 0x00 "DATA_FSM54,DFB Code Store B" group.long 0x6DC++0x03 line.long 0x00 "DATA_FSM55,DFB Code Store B" group.long 0x6E0++0x03 line.long 0x00 "DATA_FSM56,DFB Code Store B" group.long 0x6E4++0x03 line.long 0x00 "DATA_FSM57,DFB Code Store B" group.long 0x6E8++0x03 line.long 0x00 "DATA_FSM58,DFB Code Store B" group.long 0x6EC++0x03 line.long 0x00 "DATA_FSM59,DFB Code Store B" group.long 0x6F0++0x03 line.long 0x00 "DATA_FSM60,DFB Code Store B" group.long 0x6F4++0x03 line.long 0x00 "DATA_FSM61,DFB Code Store B" group.long 0x6F8++0x03 line.long 0x00 "DATA_FSM62,DFB Code Store B" group.long 0x6FC++0x03 line.long 0x00 "DATA_FSM63,DFB Code Store B" tree.end tree "ACU_SRAM" group.long 0x700++0x03 line.long 0x00 "DATA_ACU0,DFB Address Store" hexmask.long.word 0x00 0.--13. 1. " SRAMDATA ,Address Storage SRAM" group.long 0x704++0x03 line.long 0x00 "DATA_ACU1,DFB Address Store" hexmask.long.word 0x00 0.--13. 1. " SRAMDATA ,Address Storage SRAM" group.long 0x708++0x03 line.long 0x00 "DATA_ACU2,DFB Address Store" hexmask.long.word 0x00 0.--13. 1. " SRAMDATA ,Address Storage SRAM" group.long 0x70C++0x03 line.long 0x00 "DATA_ACU3,DFB Address Store" hexmask.long.word 0x00 0.--13. 1. " SRAMDATA ,Address Storage SRAM" group.long 0x710++0x03 line.long 0x00 "DATA_ACU4,DFB Address Store" hexmask.long.word 0x00 0.--13. 1. " SRAMDATA ,Address Storage SRAM" group.long 0x714++0x03 line.long 0x00 "DATA_ACU5,DFB Address Store" hexmask.long.word 0x00 0.--13. 1. " SRAMDATA ,Address Storage SRAM" group.long 0x718++0x03 line.long 0x00 "DATA_ACU6,DFB Address Store" hexmask.long.word 0x00 0.--13. 1. " SRAMDATA ,Address Storage SRAM" group.long 0x71C++0x03 line.long 0x00 "DATA_ACU7,DFB Address Store" hexmask.long.word 0x00 0.--13. 1. " SRAMDATA ,Address Storage SRAM" group.long 0x720++0x03 line.long 0x00 "DATA_ACU8,DFB Address Store" hexmask.long.word 0x00 0.--13. 1. " SRAMDATA ,Address Storage SRAM" group.long 0x724++0x03 line.long 0x00 "DATA_ACU9,DFB Address Store" hexmask.long.word 0x00 0.--13. 1. " SRAMDATA ,Address Storage SRAM" group.long 0x728++0x03 line.long 0x00 "DATA_ACU10,DFB Address Store" hexmask.long.word 0x00 0.--13. 1. " SRAMDATA ,Address Storage SRAM" group.long 0x72C++0x03 line.long 0x00 "DATA_ACU11,DFB Address Store" hexmask.long.word 0x00 0.--13. 1. " SRAMDATA ,Address Storage SRAM" group.long 0x730++0x03 line.long 0x00 "DATA_ACU12,DFB Address Store" hexmask.long.word 0x00 0.--13. 1. " SRAMDATA ,Address Storage SRAM" group.long 0x734++0x03 line.long 0x00 "DATA_ACU13,DFB Address Store" hexmask.long.word 0x00 0.--13. 1. " SRAMDATA ,Address Storage SRAM" group.long 0x738++0x03 line.long 0x00 "DATA_ACU14,DFB Address Store" hexmask.long.word 0x00 0.--13. 1. " SRAMDATA ,Address Storage SRAM" group.long 0x73C++0x03 line.long 0x00 "DATA_ACU15,DFB Address Store" hexmask.long.word 0x00 0.--13. 1. " SRAMDATA ,Address Storage SRAM" tree.end textline " " width 13. group.byte 0x780++0x00 line.byte 0x00 "CR,DFB Command Register" bitfld.byte 0x00 2. " CORECLK_DISABLE ,CORECLK Disable" "No,Yes" bitfld.byte 0x00 1. " ADDR6 ,Address bit 6 FSM RAM" "Low,High" textline " " bitfld.byte 0x00 0. " RUN ,DFB operation enable/disable" "Disabled,Enabled" group.byte 0x784++0x00 line.byte 0x00 "SR,DFB Status Register" bitfld.byte 0x00 7. " INTR_SEM2 ,Indicates a pending Semaphore 2 interrupt" "Not pending,Pending" bitfld.byte 0x00 6. " INTR_SEM1 ,Indicates a pending Semaphore 1 interrupt" "Not pending,Pending" textline " " bitfld.byte 0x00 5. " INTR_SEM0 ,Indicates a pending Semaphore 0 interrupt" "Not pending,Pending" bitfld.byte 0x00 4. " INTR_HOLDB ,Indicates a pending Hold B interrupt" "Not pending,Pending" textline " " bitfld.byte 0x00 3. " INTR_HOLDA ,Indicates a pending Hold A interrupt" "Not pending,Pending" bitfld.byte 0x00 2. " RND_MODE ,Round Mode" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " SAT_MODE ,Saturation Mode" "Disabled,Enabled" bitfld.byte 0x00 0. " RAM_SEL ,Control Store Memory" "RAM A,RAM B" group.byte 0x788++0x00 line.byte 0x00 "RAM_EN,DFB RAM Enable Register" bitfld.byte 0x00 6.--7. " RAMWR_ADDRING ,RAM Write Addressing" "NO_OVERLAY,OVERLAY_CS_A_CS_B,OVERLAY_DATA_A_DATA_B,OVERLAY_CS_AB_DATA_AB" bitfld.byte 0x00 5. " DPB_EN ,Datapath RAM B RAM Enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " DPA_EN ,Datapath RAM A RAM Enable" "Disabled,Enabled" bitfld.byte 0x00 3. " ACU_EN ,ACU RAM RAM Enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 2. " CSB_EN ,Control Store RAM B RAM Enable" "Disabled,Enabled" bitfld.byte 0x00 1. " CSA_EN ,Control Store RAM A RAM Enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 0. " FSM_EN ,FSM RAM RAM Enable" "Disabled,Enabled" group.byte 0x78c++0x00 line.byte 0x00 "RAM_DIR,DFB RAM Direction Register" bitfld.byte 0x00 6. " SNP_DABLE ,RAM Read Address Snoop Disable" "No,Yes" bitfld.byte 0x00 5. " DPB_DIR ,Datapath RAM B RAM Direction" "RAM_DFB,RAM_AHB" textline " " bitfld.byte 0x00 4. " DPA_DIR ,Datapath RAM A RAM Direction" "RAM_DFB,RAM_AHB" bitfld.byte 0x00 3. " ACU_DIR ,ACU RAM RAM Direction" "RAM_DFB,RAM_AHB" textline " " bitfld.byte 0x00 2. " CSB_DIR ,Control Store RAM B RAM Direction" "RAM_DFB,RAM_AHB" bitfld.byte 0x00 1. " CSA_DIR ,Control Store RAM A RAM Direction" "RAM_DFB,RAM_AHB" textline " " bitfld.byte 0x00 0. " FSM_DIR ,FSM RAM RAM Direction" "RAM_DFB,RAM_AHB" group.byte 0x790++0x00 line.byte 0x00 "SEMA,DFB Semaphore Register" bitfld.byte 0x00 6. " SEMA_MASK[2] ,Semaphore Mask bit 2" "0,1" bitfld.byte 0x00 5. "[1],Semaphore Mask bit 1" "0,1" bitfld.byte 0x00 4. "[0],Semaphore Mask bit 0" "0,1" bitfld.byte 0x00 2. " SEMA2 ,Semaphore Bit2 for use by System and DFB Controller SW" "0,1" textline " " bitfld.byte 0x00 1. " SEMA1 ,Semaphore Bit1 for use by System and DFB Controller SW" "0,1" bitfld.byte 0x00 0. " SEMA0 ,Semaphore Bit0 for use by System and DFB Controller SW" "0,1" group.byte 0x794++0x00 line.byte 0x00 "DSI_CTRL,DFB Global Control Register" bitfld.byte 0x00 2.--3. " GBL2_OUT ,Global2 Output Signal" "SEM2,DPSIGN,DPTHREASH,DPEQ" bitfld.byte 0x00 0.--1. " GBL1_OUT ,Global1 Output Signal" "DFB_RUN,SEM0,SEM1,DFB_INTR" group.byte 0x798++0x00 line.byte 0x00 "INT_CTRL,DFB Interrupt Control Register" bitfld.byte 0x00 4. " SEMA2_EN ,Interrupt mask to Semaphore register 2" "Masked,Not masked" bitfld.byte 0x00 3. " SEMA1_EN ,Interrupt mask to Semaphore register 1" "Masked,Not masked" textline " " bitfld.byte 0x00 2. " SEMA0_EN ,Interrupt mask to Semaphore register 0" "Masked,Not masked" bitfld.byte 0x00 1. " HOLDB_EN ,Interrupt mask to enable holding register B" "Masked,Not masked" textline " " bitfld.byte 0x00 0. " HOLDA_EN ,Interrupt mask to enable holding register A" "Masked,Not masked" group.byte 0x79c++0x00 line.byte 0x00 "DMA_CTRL,DFB DMAREQ Control Register" bitfld.byte 0x00 2.--3. " DMAREQ2 ,DMAREQ2 Source" "Disabled,Holding REG_B,Semaphore 0,Semaphore 1" bitfld.byte 0x00 0.--1. " DMAREQ1 ,DMAERQ1 Source" "Disabled,Holding REG_A,Semaphore 0,Semaphore 1" group.byte 0x7a0++0x02 line.byte 0x00 "STAGEA,DFB Low Byte Staging Register A" line.byte 0x01 "STAGEAM,DFB Middle Byte Staging Register A" line.byte 0x02 "STAGEAH,DFB High Byte Staging Register A" group.byte 0x7a4++0x02 line.byte 0x00 "STAGEB,DFB Low Byte Staging Register B" line.byte 0x01 "STAGEBM,DFB Middle Byte Staging Register B" line.byte 0x02 "STAGEBH,DFB High Byte Staging Register B" width 13. rgroup.byte 0x7a8++0x07 line.byte 0x00 "HOLDA,DFB Low Byte Holding Register A" line.byte 0x01 "HOLDAM,DFB Middle Byte Holding Register A" line.byte 0x02 "HOLDAH,DFB High Byte Holding Register A" line.byte 0x03 "HOLDAS,DFB Holding Register A Sign Extension" line.byte 0x04 "HOLDB,DFB Low Byte Holding Register B" line.byte 0x05 "HOLDBM,DFB Middle Byte Holding Register B" line.byte 0x06 "HOLDBH,DFB High Byte Holding Register B" line.byte 0x07 "HOLDBS,DFB Holding Register B Sign Extension" group.byte 0x7b0++0x00 line.byte 0x00 "COHER,DFB Coherency Register" bitfld.byte 0x00 6.--7. " HOLDB_KEY ,Sets the Key Coherency Byte of the Holding B register" "Low,Mid,High,?..." bitfld.byte 0x00 4.--5. " HOLDA_KEY ,Sets the Key Coherency Byte of the Holding A register" "Low,Mid,High,?..." textline " " bitfld.byte 0x00 2.--3. " STGB_KEY ,Sets the Key Coherency Byte of the Staging B register" "Low,Mid,High,?..." bitfld.byte 0x00 0.--1. " STGA_KEY ,Sets the Key Coherency Byte of the Staging A register" "Low,Mid,High,?..." group.byte 0x7b4++0x00 line.byte 0x00 "DALIGN,DFB Data Alignment Register" bitfld.byte 0x00 3. " HOLDB_DALIGN ,Shifts the read right by a byte" "Normal,8 bits" bitfld.byte 0x00 2. " HOLDA_DALIGN ,Shifts the read right by a byte" "Normal,8 bits" textline " " bitfld.byte 0x00 1. " STGB_DALIGN ,Shifts the write left by a byte" "Normal,8 bits" bitfld.byte 0x00 0. " STGA_DALIGN ,Shifts the write left by a byte" "Normal,8 bits" width 0x0B tree.end endif tree.open "DSI" tree "DSI 0" base ad:0x40014000 width 10. group.byte 0x0++0x00 line.byte 0x00 "HC0,DSI0 HC0 Tile Configuration" group.byte 0x1++0x00 line.byte 0x00 "HC1,DSI0 HC1 Tile Configuration" group.byte 0x2++0x00 line.byte 0x00 "HC2,DSI0 HC2 Tile Configuration" group.byte 0x3++0x00 line.byte 0x00 "HC3,DSI0 HC3 Tile Configuration" group.byte 0x4++0x00 line.byte 0x00 "HC4,DSI0 HC4 Tile Configuration" group.byte 0x5++0x00 line.byte 0x00 "HC5,DSI0 HC5 Tile Configuration" group.byte 0x6++0x00 line.byte 0x00 "HC6,DSI0 HC6 Tile Configuration" group.byte 0x7++0x00 line.byte 0x00 "HC7,DSI0 HC7 Tile Configuration" group.byte 0x8++0x00 line.byte 0x00 "HC8,DSI0 HC8 Tile Configuration" group.byte 0x9++0x00 line.byte 0x00 "HC9,DSI0 HC9 Tile Configuration" group.byte 0xA++0x00 line.byte 0x00 "HC10,DSI0 HC10 Tile Configuration" group.byte 0xB++0x00 line.byte 0x00 "HC11,DSI0 HC11 Tile Configuration" group.byte 0xC++0x00 line.byte 0x00 "HC12,DSI0 HC12 Tile Configuration" group.byte 0xD++0x00 line.byte 0x00 "HC13,DSI0 HC13 Tile Configuration" group.byte 0xE++0x00 line.byte 0x00 "HC14,DSI0 HC14 Tile Configuration" group.byte 0xF++0x00 line.byte 0x00 "HC15,DSI0 HC15 Tile Configuration" group.byte 0x10++0x00 line.byte 0x00 "HC16,DSI0 HC16 Tile Configuration" group.byte 0x11++0x00 line.byte 0x00 "HC17,DSI0 HC17 Tile Configuration" group.byte 0x12++0x00 line.byte 0x00 "HC18,DSI0 HC18 Tile Configuration" group.byte 0x13++0x00 line.byte 0x00 "HC19,DSI0 HC19 Tile Configuration" group.byte 0x14++0x00 line.byte 0x00 "HC20,DSI0 HC20 Tile Configuration" group.byte 0x15++0x00 line.byte 0x00 "HC21,DSI0 HC21 Tile Configuration" group.byte 0x16++0x00 line.byte 0x00 "HC22,DSI0 HC22 Tile Configuration" group.byte 0x17++0x00 line.byte 0x00 "HC23,DSI0 HC23 Tile Configuration" group.byte 0x18++0x00 line.byte 0x00 "HC24,DSI0 HC24 Tile Configuration" group.byte 0x19++0x00 line.byte 0x00 "HC25,DSI0 HC25 Tile Configuration" group.byte 0x1A++0x00 line.byte 0x00 "HC26,DSI0 HC26 Tile Configuration" group.byte 0x1B++0x00 line.byte 0x00 "HC27,DSI0 HC27 Tile Configuration" group.byte 0x1C++0x00 line.byte 0x00 "HC28,DSI0 HC28 Tile Configuration" group.byte 0x1D++0x00 line.byte 0x00 "HC29,DSI0 HC29 Tile Configuration" group.byte 0x1E++0x00 line.byte 0x00 "HC30,DSI0 HC30 Tile Configuration" group.byte 0x1F++0x00 line.byte 0x00 "HC31,DSI0 HC31 Tile Configuration" group.byte 0x20++0x00 line.byte 0x00 "HC32,DSI0 HC32 Tile Configuration" group.byte 0x21++0x00 line.byte 0x00 "HC33,DSI0 HC33 Tile Configuration" group.byte 0x22++0x00 line.byte 0x00 "HC34,DSI0 HC34 Tile Configuration" group.byte 0x23++0x00 line.byte 0x00 "HC35,DSI0 HC35 Tile Configuration" group.byte 0x24++0x00 line.byte 0x00 "HC36,DSI0 HC36 Tile Configuration" group.byte 0x25++0x00 line.byte 0x00 "HC37,DSI0 HC37 Tile Configuration" group.byte 0x26++0x00 line.byte 0x00 "HC38,DSI0 HC38 Tile Configuration" group.byte 0x27++0x00 line.byte 0x00 "HC39,DSI0 HC39 Tile Configuration" group.byte 0x28++0x00 line.byte 0x00 "HC40,DSI0 HC40 Tile Configuration" group.byte 0x29++0x00 line.byte 0x00 "HC41,DSI0 HC41 Tile Configuration" group.byte 0x2A++0x00 line.byte 0x00 "HC42,DSI0 HC42 Tile Configuration" group.byte 0x2B++0x00 line.byte 0x00 "HC43,DSI0 HC43 Tile Configuration" group.byte 0x2C++0x00 line.byte 0x00 "HC44,DSI0 HC44 Tile Configuration" group.byte 0x2D++0x00 line.byte 0x00 "HC45,DSI0 HC45 Tile Configuration" group.byte 0x2E++0x00 line.byte 0x00 "HC46,DSI0 HC46 Tile Configuration" group.byte 0x2F++0x00 line.byte 0x00 "HC47,DSI0 HC47 Tile Configuration" group.byte 0x30++0x00 line.byte 0x00 "HC48,DSI0 HC48 Tile Configuration" group.byte 0x31++0x00 line.byte 0x00 "HC49,DSI0 HC49 Tile Configuration" group.byte 0x32++0x00 line.byte 0x00 "HC50,DSI0 HC50 Tile Configuration" group.byte 0x33++0x00 line.byte 0x00 "HC51,DSI0 HC51 Tile Configuration" group.byte 0x34++0x00 line.byte 0x00 "HC52,DSI0 HC52 Tile Configuration" group.byte 0x35++0x00 line.byte 0x00 "HC53,DSI0 HC53 Tile Configuration" group.byte 0x36++0x00 line.byte 0x00 "HC54,DSI0 HC54 Tile Configuration" group.byte 0x37++0x00 line.byte 0x00 "HC55,DSI0 HC55 Tile Configuration" group.byte 0x38++0x00 line.byte 0x00 "HC56,DSI0 HC56 Tile Configuration" group.byte 0x39++0x00 line.byte 0x00 "HC57,DSI0 HC57 Tile Configuration" group.byte 0x3A++0x00 line.byte 0x00 "HC58,DSI0 HC58 Tile Configuration" group.byte 0x3B++0x00 line.byte 0x00 "HC59,DSI0 HC59 Tile Configuration" group.byte 0x3C++0x00 line.byte 0x00 "HC60,DSI0 HC60 Tile Configuration" group.byte 0x3D++0x00 line.byte 0x00 "HC61,DSI0 HC61 Tile Configuration" group.byte 0x3E++0x00 line.byte 0x00 "HC62,DSI0 HC62 Tile Configuration" group.byte 0x3F++0x00 line.byte 0x00 "HC63,DSI0 HC63 Tile Configuration" group.byte 0x40++0x00 line.byte 0x00 "HC64,DSI0 HC64 Tile Configuration" group.byte 0x41++0x00 line.byte 0x00 "HC65,DSI0 HC65 Tile Configuration" group.byte 0x42++0x00 line.byte 0x00 "HC66,DSI0 HC66 Tile Configuration" group.byte 0x43++0x00 line.byte 0x00 "HC67,DSI0 HC67 Tile Configuration" group.byte 0x44++0x00 line.byte 0x00 "HC68,DSI0 HC68 Tile Configuration" group.byte 0x45++0x00 line.byte 0x00 "HC69,DSI0 HC69 Tile Configuration" group.byte 0x46++0x00 line.byte 0x00 "HC70,DSI0 HC70 Tile Configuration" group.byte 0x47++0x00 line.byte 0x00 "HC71,DSI0 HC71 Tile Configuration" group.byte 0x48++0x00 line.byte 0x00 "HC72,DSI0 HC72 Tile Configuration" group.byte 0x49++0x00 line.byte 0x00 "HC73,DSI0 HC73 Tile Configuration" group.byte 0x4A++0x00 line.byte 0x00 "HC74,DSI0 HC74 Tile Configuration" group.byte 0x4B++0x00 line.byte 0x00 "HC75,DSI0 HC75 Tile Configuration" group.byte 0x4C++0x00 line.byte 0x00 "HC76,DSI0 HC76 Tile Configuration" group.byte 0x4D++0x00 line.byte 0x00 "HC77,DSI0 HC77 Tile Configuration" group.byte 0x4E++0x00 line.byte 0x00 "HC78,DSI0 HC78 Tile Configuration" group.byte 0x4F++0x00 line.byte 0x00 "HC79,DSI0 HC79 Tile Configuration" group.byte 0x50++0x00 line.byte 0x00 "HC80,DSI0 HC80 Tile Configuration" group.byte 0x51++0x00 line.byte 0x00 "HC81,DSI0 HC81 Tile Configuration" group.byte 0x52++0x00 line.byte 0x00 "HC82,DSI0 HC82 Tile Configuration" group.byte 0x53++0x00 line.byte 0x00 "HC83,DSI0 HC83 Tile Configuration" group.byte 0x54++0x00 line.byte 0x00 "HC84,DSI0 HC84 Tile Configuration" group.byte 0x55++0x00 line.byte 0x00 "HC85,DSI0 HC85 Tile Configuration" group.byte 0x56++0x00 line.byte 0x00 "HC86,DSI0 HC86 Tile Configuration" group.byte 0x57++0x00 line.byte 0x00 "HC87,DSI0 HC87 Tile Configuration" group.byte 0x58++0x00 line.byte 0x00 "HC88,DSI0 HC88 Tile Configuration" group.byte 0x59++0x00 line.byte 0x00 "HC89,DSI0 HC89 Tile Configuration" group.byte 0x5A++0x00 line.byte 0x00 "HC90,DSI0 HC90 Tile Configuration" group.byte 0x5B++0x00 line.byte 0x00 "HC91,DSI0 HC91 Tile Configuration" group.byte 0x5C++0x00 line.byte 0x00 "HC92,DSI0 HC92 Tile Configuration" group.byte 0x5D++0x00 line.byte 0x00 "HC93,DSI0 HC93 Tile Configuration" group.byte 0x5E++0x00 line.byte 0x00 "HC94,DSI0 HC94 Tile Configuration" group.byte 0x5F++0x00 line.byte 0x00 "HC95,DSI0 HC95 Tile Configuration" group.byte 0x60++0x00 line.byte 0x00 "HC96,DSI0 HC96 Tile Configuration" group.byte 0x61++0x00 line.byte 0x00 "HC97,DSI0 HC97 Tile Configuration" group.byte 0x62++0x00 line.byte 0x00 "HC98,DSI0 HC98 Tile Configuration" group.byte 0x63++0x00 line.byte 0x00 "HC99,DSI0 HC99 Tile Configuration" group.byte 0x64++0x00 line.byte 0x00 "HC100,DSI0 HC100 Tile Configuration" group.byte 0x65++0x00 line.byte 0x00 "HC101,DSI0 HC101 Tile Configuration" group.byte 0x66++0x00 line.byte 0x00 "HC102,DSI0 HC102 Tile Configuration" group.byte 0x67++0x00 line.byte 0x00 "HC103,DSI0 HC103 Tile Configuration" group.byte 0x68++0x00 line.byte 0x00 "HC104,DSI0 HC104 Tile Configuration" group.byte 0x69++0x00 line.byte 0x00 "HC105,DSI0 HC105 Tile Configuration" group.byte 0x6A++0x00 line.byte 0x00 "HC106,DSI0 HC106 Tile Configuration" group.byte 0x6B++0x00 line.byte 0x00 "HC107,DSI0 HC107 Tile Configuration" group.byte 0x6C++0x00 line.byte 0x00 "HC108,DSI0 HC108 Tile Configuration" group.byte 0x6D++0x00 line.byte 0x00 "HC109,DSI0 HC109 Tile Configuration" group.byte 0x6E++0x00 line.byte 0x00 "HC110,DSI0 HC110 Tile Configuration" group.byte 0x6F++0x00 line.byte 0x00 "HC111,DSI0 HC111 Tile Configuration" group.byte 0x70++0x00 line.byte 0x00 "HC112,DSI0 HC112 Tile Configuration" group.byte 0x71++0x00 line.byte 0x00 "HC113,DSI0 HC113 Tile Configuration" group.byte 0x72++0x00 line.byte 0x00 "HC114,DSI0 HC114 Tile Configuration" group.byte 0x73++0x00 line.byte 0x00 "HC115,DSI0 HC115 Tile Configuration" group.byte 0x74++0x00 line.byte 0x00 "HC116,DSI0 HC116 Tile Configuration" group.byte 0x75++0x00 line.byte 0x00 "HC117,DSI0 HC117 Tile Configuration" group.byte 0x76++0x00 line.byte 0x00 "HC118,DSI0 HC118 Tile Configuration" group.byte 0x77++0x00 line.byte 0x00 "HC119,DSI0 HC119 Tile Configuration" group.byte 0x78++0x00 line.byte 0x00 "HC120,DSI0 HC120 Tile Configuration" group.byte 0x79++0x00 line.byte 0x00 "HC121,DSI0 HC121 Tile Configuration" group.byte 0x7A++0x00 line.byte 0x00 "HC122,DSI0 HC122 Tile Configuration" group.byte 0x7B++0x00 line.byte 0x00 "HC123,DSI0 HC123 Tile Configuration" group.byte 0x7C++0x00 line.byte 0x00 "HC124,DSI0 HC124 Tile Configuration" group.byte 0x7D++0x00 line.byte 0x00 "HC125,DSI0 HC125 Tile Configuration" group.byte 0x7E++0x00 line.byte 0x00 "HC126,DSI0 HC126 Tile Configuration" group.byte 0x7F++0x00 line.byte 0x00 "HC127,DSI0 HC127 Tile Configuration" group.byte 0x80++0x00 line.byte 0x00 "HV_L0,DSI0 HV0 Tile Configuration" group.byte 0x81++0x00 line.byte 0x00 "HV_L1,DSI0 HV1 Tile Configuration" group.byte 0x82++0x00 line.byte 0x00 "HV_L2,DSI0 HV2 Tile Configuration" group.byte 0x83++0x00 line.byte 0x00 "HV_L3,DSI0 HV3 Tile Configuration" group.byte 0x84++0x00 line.byte 0x00 "HV_L4,DSI0 HV4 Tile Configuration" group.byte 0x85++0x00 line.byte 0x00 "HV_L5,DSI0 HV5 Tile Configuration" group.byte 0x86++0x00 line.byte 0x00 "HV_L6,DSI0 HV6 Tile Configuration" group.byte 0x87++0x00 line.byte 0x00 "HV_L7,DSI0 HV7 Tile Configuration" group.byte 0x88++0x00 line.byte 0x00 "HV_L8,DSI0 HV8 Tile Configuration" group.byte 0x89++0x00 line.byte 0x00 "HV_L9,DSI0 HV9 Tile Configuration" group.byte 0x8A++0x00 line.byte 0x00 "HV_L10,DSI0 HV10 Tile Configuration" group.byte 0x8B++0x00 line.byte 0x00 "HV_L11,DSI0 HV11 Tile Configuration" group.byte 0x8C++0x00 line.byte 0x00 "HV_L12,DSI0 HV12 Tile Configuration" group.byte 0x8D++0x00 line.byte 0x00 "HV_L13,DSI0 HV13 Tile Configuration" group.byte 0x8E++0x00 line.byte 0x00 "HV_L14,DSI0 HV14 Tile Configuration" group.byte 0x8F++0x00 line.byte 0x00 "HV_L15,DSI0 HV15 Tile Configuration" group.byte 0x90++0x00 line.byte 0x00 "HS0,DSI0 HS0 Tile Configuration" group.byte 0x91++0x00 line.byte 0x00 "HS1,DSI0 HS1 Tile Configuration" group.byte 0x92++0x00 line.byte 0x00 "HS2,DSI0 HS2 Tile Configuration" group.byte 0x93++0x00 line.byte 0x00 "HS3,DSI0 HS3 Tile Configuration" group.byte 0x94++0x00 line.byte 0x00 "HS4,DSI0 HS4 Tile Configuration" group.byte 0x95++0x00 line.byte 0x00 "HS5,DSI0 HS5 Tile Configuration" group.byte 0x96++0x00 line.byte 0x00 "HS6,DSI0 HS6 Tile Configuration" group.byte 0x97++0x00 line.byte 0x00 "HS7,DSI0 HS7 Tile Configuration" group.byte 0x98++0x00 line.byte 0x00 "HS8,DSI0 HS8 Tile Configuration" group.byte 0x99++0x00 line.byte 0x00 "HS9,DSI0 HS9 Tile Configuration" group.byte 0x9A++0x00 line.byte 0x00 "HS10,DSI0 HS10 Tile Configuration" group.byte 0x9B++0x00 line.byte 0x00 "HS11,DSI0 HS11 Tile Configuration" group.byte 0x9C++0x00 line.byte 0x00 "HS12,DSI0 HS12 Tile Configuration" group.byte 0x9D++0x00 line.byte 0x00 "HS13,DSI0 HS13 Tile Configuration" group.byte 0x9E++0x00 line.byte 0x00 "HS14,DSI0 HS14 Tile Configuration" group.byte 0x9F++0x00 line.byte 0x00 "HS15,DSI0 HS15 Tile Configuration" group.byte 0xA0++0x00 line.byte 0x00 "HS16,DSI0 HS16 Tile Configuration" group.byte 0xA1++0x00 line.byte 0x00 "HS17,DSI0 HS17 Tile Configuration" group.byte 0xA2++0x00 line.byte 0x00 "HS18,DSI0 HS18 Tile Configuration" group.byte 0xA3++0x00 line.byte 0x00 "HS19,DSI0 HS19 Tile Configuration" group.byte 0xA4++0x00 line.byte 0x00 "HS20,DSI0 HS20 Tile Configuration" group.byte 0xA5++0x00 line.byte 0x00 "HS21,DSI0 HS21 Tile Configuration" group.byte 0xA6++0x00 line.byte 0x00 "HS22,DSI0 HS22 Tile Configuration" group.byte 0xA7++0x00 line.byte 0x00 "HS23,DSI0 HS23 Tile Configuration" group.byte 0xA8++0x00 line.byte 0x00 "HV_R0,DSI0 HV0 Tile Configuration" group.byte 0xA9++0x00 line.byte 0x00 "HV_R1,DSI0 HV1 Tile Configuration" group.byte 0xAA++0x00 line.byte 0x00 "HV_R2,DSI0 HV2 Tile Configuration" group.byte 0xAB++0x00 line.byte 0x00 "HV_R3,DSI0 HV3 Tile Configuration" group.byte 0xAC++0x00 line.byte 0x00 "HV_R4,DSI0 HV4 Tile Configuration" group.byte 0xAD++0x00 line.byte 0x00 "HV_R5,DSI0 HV5 Tile Configuration" group.byte 0xAE++0x00 line.byte 0x00 "HV_R6,DSI0 HV6 Tile Configuration" group.byte 0xAF++0x00 line.byte 0x00 "HV_R7,DSI0 HV7 Tile Configuration" group.byte 0xB0++0x00 line.byte 0x00 "HV_R8,DSI0 HV8 Tile Configuration" group.byte 0xB1++0x00 line.byte 0x00 "HV_R9,DSI0 HV9 Tile Configuration" group.byte 0xB2++0x00 line.byte 0x00 "HV_R10,DSI0 HV10 Tile Configuration" group.byte 0xB3++0x00 line.byte 0x00 "HV_R11,DSI0 HV11 Tile Configuration" group.byte 0xB4++0x00 line.byte 0x00 "HV_R12,DSI0 HV12 Tile Configuration" group.byte 0xB5++0x00 line.byte 0x00 "HV_R13,DSI0 HV13 Tile Configuration" group.byte 0xB6++0x00 line.byte 0x00 "HV_R14,DSI0 HV14 Tile Configuration" group.byte 0xB7++0x00 line.byte 0x00 "HV_R15,DSI0 HV15 Tile Configuration" group.byte 0xC0++0x00 line.byte 0x00 "DSIINP0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC2++0x00 line.byte 0x00 "DSIINP1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC4++0x00 line.byte 0x00 "DSIINP2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC6++0x00 line.byte 0x00 "DSIINP3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC8++0x00 line.byte 0x00 "DSIINP4,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCA++0x00 line.byte 0x00 "DSIINP5,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCC++0x00 line.byte 0x00 "DSIOUTP0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCE++0x00 line.byte 0x00 "DSIOUTP1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD0++0x00 line.byte 0x00 "DSIOUTP2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD2++0x00 line.byte 0x00 "DSIOUTP3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD4++0x00 line.byte 0x00 "DSIOUTT0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD6++0x00 line.byte 0x00 "DSIOUTT1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD8++0x00 line.byte 0x00 "DSIOUTT2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDA++0x00 line.byte 0x00 "DSIOUTT3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDC++0x00 line.byte 0x00 "DSIOUTT4,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDE++0x00 line.byte 0x00 "DSIOUTT5,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xE0++0x00 line.byte 0x00 "VS0,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE2++0x00 line.byte 0x00 "VS1,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE4++0x00 line.byte 0x00 "VS2,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE6++0x00 line.byte 0x00 "VS3,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE8++0x00 line.byte 0x00 "VS4,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEA++0x00 line.byte 0x00 "VS5,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEC++0x00 line.byte 0x00 "VS6,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEE++0x00 line.byte 0x00 "VS7,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" width 0x0B tree.end tree "DSI 1" base ad:0x40014100 width 10. group.byte 0x0++0x00 line.byte 0x00 "HC0,DSI1 HC0 Tile Configuration" group.byte 0x1++0x00 line.byte 0x00 "HC1,DSI1 HC1 Tile Configuration" group.byte 0x2++0x00 line.byte 0x00 "HC2,DSI1 HC2 Tile Configuration" group.byte 0x3++0x00 line.byte 0x00 "HC3,DSI1 HC3 Tile Configuration" group.byte 0x4++0x00 line.byte 0x00 "HC4,DSI1 HC4 Tile Configuration" group.byte 0x5++0x00 line.byte 0x00 "HC5,DSI1 HC5 Tile Configuration" group.byte 0x6++0x00 line.byte 0x00 "HC6,DSI1 HC6 Tile Configuration" group.byte 0x7++0x00 line.byte 0x00 "HC7,DSI1 HC7 Tile Configuration" group.byte 0x8++0x00 line.byte 0x00 "HC8,DSI1 HC8 Tile Configuration" group.byte 0x9++0x00 line.byte 0x00 "HC9,DSI1 HC9 Tile Configuration" group.byte 0xA++0x00 line.byte 0x00 "HC10,DSI1 HC10 Tile Configuration" group.byte 0xB++0x00 line.byte 0x00 "HC11,DSI1 HC11 Tile Configuration" group.byte 0xC++0x00 line.byte 0x00 "HC12,DSI1 HC12 Tile Configuration" group.byte 0xD++0x00 line.byte 0x00 "HC13,DSI1 HC13 Tile Configuration" group.byte 0xE++0x00 line.byte 0x00 "HC14,DSI1 HC14 Tile Configuration" group.byte 0xF++0x00 line.byte 0x00 "HC15,DSI1 HC15 Tile Configuration" group.byte 0x10++0x00 line.byte 0x00 "HC16,DSI1 HC16 Tile Configuration" group.byte 0x11++0x00 line.byte 0x00 "HC17,DSI1 HC17 Tile Configuration" group.byte 0x12++0x00 line.byte 0x00 "HC18,DSI1 HC18 Tile Configuration" group.byte 0x13++0x00 line.byte 0x00 "HC19,DSI1 HC19 Tile Configuration" group.byte 0x14++0x00 line.byte 0x00 "HC20,DSI1 HC20 Tile Configuration" group.byte 0x15++0x00 line.byte 0x00 "HC21,DSI1 HC21 Tile Configuration" group.byte 0x16++0x00 line.byte 0x00 "HC22,DSI1 HC22 Tile Configuration" group.byte 0x17++0x00 line.byte 0x00 "HC23,DSI1 HC23 Tile Configuration" group.byte 0x18++0x00 line.byte 0x00 "HC24,DSI1 HC24 Tile Configuration" group.byte 0x19++0x00 line.byte 0x00 "HC25,DSI1 HC25 Tile Configuration" group.byte 0x1A++0x00 line.byte 0x00 "HC26,DSI1 HC26 Tile Configuration" group.byte 0x1B++0x00 line.byte 0x00 "HC27,DSI1 HC27 Tile Configuration" group.byte 0x1C++0x00 line.byte 0x00 "HC28,DSI1 HC28 Tile Configuration" group.byte 0x1D++0x00 line.byte 0x00 "HC29,DSI1 HC29 Tile Configuration" group.byte 0x1E++0x00 line.byte 0x00 "HC30,DSI1 HC30 Tile Configuration" group.byte 0x1F++0x00 line.byte 0x00 "HC31,DSI1 HC31 Tile Configuration" group.byte 0x20++0x00 line.byte 0x00 "HC32,DSI1 HC32 Tile Configuration" group.byte 0x21++0x00 line.byte 0x00 "HC33,DSI1 HC33 Tile Configuration" group.byte 0x22++0x00 line.byte 0x00 "HC34,DSI1 HC34 Tile Configuration" group.byte 0x23++0x00 line.byte 0x00 "HC35,DSI1 HC35 Tile Configuration" group.byte 0x24++0x00 line.byte 0x00 "HC36,DSI1 HC36 Tile Configuration" group.byte 0x25++0x00 line.byte 0x00 "HC37,DSI1 HC37 Tile Configuration" group.byte 0x26++0x00 line.byte 0x00 "HC38,DSI1 HC38 Tile Configuration" group.byte 0x27++0x00 line.byte 0x00 "HC39,DSI1 HC39 Tile Configuration" group.byte 0x28++0x00 line.byte 0x00 "HC40,DSI1 HC40 Tile Configuration" group.byte 0x29++0x00 line.byte 0x00 "HC41,DSI1 HC41 Tile Configuration" group.byte 0x2A++0x00 line.byte 0x00 "HC42,DSI1 HC42 Tile Configuration" group.byte 0x2B++0x00 line.byte 0x00 "HC43,DSI1 HC43 Tile Configuration" group.byte 0x2C++0x00 line.byte 0x00 "HC44,DSI1 HC44 Tile Configuration" group.byte 0x2D++0x00 line.byte 0x00 "HC45,DSI1 HC45 Tile Configuration" group.byte 0x2E++0x00 line.byte 0x00 "HC46,DSI1 HC46 Tile Configuration" group.byte 0x2F++0x00 line.byte 0x00 "HC47,DSI1 HC47 Tile Configuration" group.byte 0x30++0x00 line.byte 0x00 "HC48,DSI1 HC48 Tile Configuration" group.byte 0x31++0x00 line.byte 0x00 "HC49,DSI1 HC49 Tile Configuration" group.byte 0x32++0x00 line.byte 0x00 "HC50,DSI1 HC50 Tile Configuration" group.byte 0x33++0x00 line.byte 0x00 "HC51,DSI1 HC51 Tile Configuration" group.byte 0x34++0x00 line.byte 0x00 "HC52,DSI1 HC52 Tile Configuration" group.byte 0x35++0x00 line.byte 0x00 "HC53,DSI1 HC53 Tile Configuration" group.byte 0x36++0x00 line.byte 0x00 "HC54,DSI1 HC54 Tile Configuration" group.byte 0x37++0x00 line.byte 0x00 "HC55,DSI1 HC55 Tile Configuration" group.byte 0x38++0x00 line.byte 0x00 "HC56,DSI1 HC56 Tile Configuration" group.byte 0x39++0x00 line.byte 0x00 "HC57,DSI1 HC57 Tile Configuration" group.byte 0x3A++0x00 line.byte 0x00 "HC58,DSI1 HC58 Tile Configuration" group.byte 0x3B++0x00 line.byte 0x00 "HC59,DSI1 HC59 Tile Configuration" group.byte 0x3C++0x00 line.byte 0x00 "HC60,DSI1 HC60 Tile Configuration" group.byte 0x3D++0x00 line.byte 0x00 "HC61,DSI1 HC61 Tile Configuration" group.byte 0x3E++0x00 line.byte 0x00 "HC62,DSI1 HC62 Tile Configuration" group.byte 0x3F++0x00 line.byte 0x00 "HC63,DSI1 HC63 Tile Configuration" group.byte 0x40++0x00 line.byte 0x00 "HC64,DSI1 HC64 Tile Configuration" group.byte 0x41++0x00 line.byte 0x00 "HC65,DSI1 HC65 Tile Configuration" group.byte 0x42++0x00 line.byte 0x00 "HC66,DSI1 HC66 Tile Configuration" group.byte 0x43++0x00 line.byte 0x00 "HC67,DSI1 HC67 Tile Configuration" group.byte 0x44++0x00 line.byte 0x00 "HC68,DSI1 HC68 Tile Configuration" group.byte 0x45++0x00 line.byte 0x00 "HC69,DSI1 HC69 Tile Configuration" group.byte 0x46++0x00 line.byte 0x00 "HC70,DSI1 HC70 Tile Configuration" group.byte 0x47++0x00 line.byte 0x00 "HC71,DSI1 HC71 Tile Configuration" group.byte 0x48++0x00 line.byte 0x00 "HC72,DSI1 HC72 Tile Configuration" group.byte 0x49++0x00 line.byte 0x00 "HC73,DSI1 HC73 Tile Configuration" group.byte 0x4A++0x00 line.byte 0x00 "HC74,DSI1 HC74 Tile Configuration" group.byte 0x4B++0x00 line.byte 0x00 "HC75,DSI1 HC75 Tile Configuration" group.byte 0x4C++0x00 line.byte 0x00 "HC76,DSI1 HC76 Tile Configuration" group.byte 0x4D++0x00 line.byte 0x00 "HC77,DSI1 HC77 Tile Configuration" group.byte 0x4E++0x00 line.byte 0x00 "HC78,DSI1 HC78 Tile Configuration" group.byte 0x4F++0x00 line.byte 0x00 "HC79,DSI1 HC79 Tile Configuration" group.byte 0x50++0x00 line.byte 0x00 "HC80,DSI1 HC80 Tile Configuration" group.byte 0x51++0x00 line.byte 0x00 "HC81,DSI1 HC81 Tile Configuration" group.byte 0x52++0x00 line.byte 0x00 "HC82,DSI1 HC82 Tile Configuration" group.byte 0x53++0x00 line.byte 0x00 "HC83,DSI1 HC83 Tile Configuration" group.byte 0x54++0x00 line.byte 0x00 "HC84,DSI1 HC84 Tile Configuration" group.byte 0x55++0x00 line.byte 0x00 "HC85,DSI1 HC85 Tile Configuration" group.byte 0x56++0x00 line.byte 0x00 "HC86,DSI1 HC86 Tile Configuration" group.byte 0x57++0x00 line.byte 0x00 "HC87,DSI1 HC87 Tile Configuration" group.byte 0x58++0x00 line.byte 0x00 "HC88,DSI1 HC88 Tile Configuration" group.byte 0x59++0x00 line.byte 0x00 "HC89,DSI1 HC89 Tile Configuration" group.byte 0x5A++0x00 line.byte 0x00 "HC90,DSI1 HC90 Tile Configuration" group.byte 0x5B++0x00 line.byte 0x00 "HC91,DSI1 HC91 Tile Configuration" group.byte 0x5C++0x00 line.byte 0x00 "HC92,DSI1 HC92 Tile Configuration" group.byte 0x5D++0x00 line.byte 0x00 "HC93,DSI1 HC93 Tile Configuration" group.byte 0x5E++0x00 line.byte 0x00 "HC94,DSI1 HC94 Tile Configuration" group.byte 0x5F++0x00 line.byte 0x00 "HC95,DSI1 HC95 Tile Configuration" group.byte 0x60++0x00 line.byte 0x00 "HC96,DSI1 HC96 Tile Configuration" group.byte 0x61++0x00 line.byte 0x00 "HC97,DSI1 HC97 Tile Configuration" group.byte 0x62++0x00 line.byte 0x00 "HC98,DSI1 HC98 Tile Configuration" group.byte 0x63++0x00 line.byte 0x00 "HC99,DSI1 HC99 Tile Configuration" group.byte 0x64++0x00 line.byte 0x00 "HC100,DSI1 HC100 Tile Configuration" group.byte 0x65++0x00 line.byte 0x00 "HC101,DSI1 HC101 Tile Configuration" group.byte 0x66++0x00 line.byte 0x00 "HC102,DSI1 HC102 Tile Configuration" group.byte 0x67++0x00 line.byte 0x00 "HC103,DSI1 HC103 Tile Configuration" group.byte 0x68++0x00 line.byte 0x00 "HC104,DSI1 HC104 Tile Configuration" group.byte 0x69++0x00 line.byte 0x00 "HC105,DSI1 HC105 Tile Configuration" group.byte 0x6A++0x00 line.byte 0x00 "HC106,DSI1 HC106 Tile Configuration" group.byte 0x6B++0x00 line.byte 0x00 "HC107,DSI1 HC107 Tile Configuration" group.byte 0x6C++0x00 line.byte 0x00 "HC108,DSI1 HC108 Tile Configuration" group.byte 0x6D++0x00 line.byte 0x00 "HC109,DSI1 HC109 Tile Configuration" group.byte 0x6E++0x00 line.byte 0x00 "HC110,DSI1 HC110 Tile Configuration" group.byte 0x6F++0x00 line.byte 0x00 "HC111,DSI1 HC111 Tile Configuration" group.byte 0x70++0x00 line.byte 0x00 "HC112,DSI1 HC112 Tile Configuration" group.byte 0x71++0x00 line.byte 0x00 "HC113,DSI1 HC113 Tile Configuration" group.byte 0x72++0x00 line.byte 0x00 "HC114,DSI1 HC114 Tile Configuration" group.byte 0x73++0x00 line.byte 0x00 "HC115,DSI1 HC115 Tile Configuration" group.byte 0x74++0x00 line.byte 0x00 "HC116,DSI1 HC116 Tile Configuration" group.byte 0x75++0x00 line.byte 0x00 "HC117,DSI1 HC117 Tile Configuration" group.byte 0x76++0x00 line.byte 0x00 "HC118,DSI1 HC118 Tile Configuration" group.byte 0x77++0x00 line.byte 0x00 "HC119,DSI1 HC119 Tile Configuration" group.byte 0x78++0x00 line.byte 0x00 "HC120,DSI1 HC120 Tile Configuration" group.byte 0x79++0x00 line.byte 0x00 "HC121,DSI1 HC121 Tile Configuration" group.byte 0x7A++0x00 line.byte 0x00 "HC122,DSI1 HC122 Tile Configuration" group.byte 0x7B++0x00 line.byte 0x00 "HC123,DSI1 HC123 Tile Configuration" group.byte 0x7C++0x00 line.byte 0x00 "HC124,DSI1 HC124 Tile Configuration" group.byte 0x7D++0x00 line.byte 0x00 "HC125,DSI1 HC125 Tile Configuration" group.byte 0x7E++0x00 line.byte 0x00 "HC126,DSI1 HC126 Tile Configuration" group.byte 0x7F++0x00 line.byte 0x00 "HC127,DSI1 HC127 Tile Configuration" group.byte 0x80++0x00 line.byte 0x00 "HV_L0,DSI1 HV0 Tile Configuration" group.byte 0x81++0x00 line.byte 0x00 "HV_L1,DSI1 HV1 Tile Configuration" group.byte 0x82++0x00 line.byte 0x00 "HV_L2,DSI1 HV2 Tile Configuration" group.byte 0x83++0x00 line.byte 0x00 "HV_L3,DSI1 HV3 Tile Configuration" group.byte 0x84++0x00 line.byte 0x00 "HV_L4,DSI1 HV4 Tile Configuration" group.byte 0x85++0x00 line.byte 0x00 "HV_L5,DSI1 HV5 Tile Configuration" group.byte 0x86++0x00 line.byte 0x00 "HV_L6,DSI1 HV6 Tile Configuration" group.byte 0x87++0x00 line.byte 0x00 "HV_L7,DSI1 HV7 Tile Configuration" group.byte 0x88++0x00 line.byte 0x00 "HV_L8,DSI1 HV8 Tile Configuration" group.byte 0x89++0x00 line.byte 0x00 "HV_L9,DSI1 HV9 Tile Configuration" group.byte 0x8A++0x00 line.byte 0x00 "HV_L10,DSI1 HV10 Tile Configuration" group.byte 0x8B++0x00 line.byte 0x00 "HV_L11,DSI1 HV11 Tile Configuration" group.byte 0x8C++0x00 line.byte 0x00 "HV_L12,DSI1 HV12 Tile Configuration" group.byte 0x8D++0x00 line.byte 0x00 "HV_L13,DSI1 HV13 Tile Configuration" group.byte 0x8E++0x00 line.byte 0x00 "HV_L14,DSI1 HV14 Tile Configuration" group.byte 0x8F++0x00 line.byte 0x00 "HV_L15,DSI1 HV15 Tile Configuration" group.byte 0x90++0x00 line.byte 0x00 "HS0,DSI1 HS0 Tile Configuration" group.byte 0x91++0x00 line.byte 0x00 "HS1,DSI1 HS1 Tile Configuration" group.byte 0x92++0x00 line.byte 0x00 "HS2,DSI1 HS2 Tile Configuration" group.byte 0x93++0x00 line.byte 0x00 "HS3,DSI1 HS3 Tile Configuration" group.byte 0x94++0x00 line.byte 0x00 "HS4,DSI1 HS4 Tile Configuration" group.byte 0x95++0x00 line.byte 0x00 "HS5,DSI1 HS5 Tile Configuration" group.byte 0x96++0x00 line.byte 0x00 "HS6,DSI1 HS6 Tile Configuration" group.byte 0x97++0x00 line.byte 0x00 "HS7,DSI1 HS7 Tile Configuration" group.byte 0x98++0x00 line.byte 0x00 "HS8,DSI1 HS8 Tile Configuration" group.byte 0x99++0x00 line.byte 0x00 "HS9,DSI1 HS9 Tile Configuration" group.byte 0x9A++0x00 line.byte 0x00 "HS10,DSI1 HS10 Tile Configuration" group.byte 0x9B++0x00 line.byte 0x00 "HS11,DSI1 HS11 Tile Configuration" group.byte 0x9C++0x00 line.byte 0x00 "HS12,DSI1 HS12 Tile Configuration" group.byte 0x9D++0x00 line.byte 0x00 "HS13,DSI1 HS13 Tile Configuration" group.byte 0x9E++0x00 line.byte 0x00 "HS14,DSI1 HS14 Tile Configuration" group.byte 0x9F++0x00 line.byte 0x00 "HS15,DSI1 HS15 Tile Configuration" group.byte 0xA0++0x00 line.byte 0x00 "HS16,DSI1 HS16 Tile Configuration" group.byte 0xA1++0x00 line.byte 0x00 "HS17,DSI1 HS17 Tile Configuration" group.byte 0xA2++0x00 line.byte 0x00 "HS18,DSI1 HS18 Tile Configuration" group.byte 0xA3++0x00 line.byte 0x00 "HS19,DSI1 HS19 Tile Configuration" group.byte 0xA4++0x00 line.byte 0x00 "HS20,DSI1 HS20 Tile Configuration" group.byte 0xA5++0x00 line.byte 0x00 "HS21,DSI1 HS21 Tile Configuration" group.byte 0xA6++0x00 line.byte 0x00 "HS22,DSI1 HS22 Tile Configuration" group.byte 0xA7++0x00 line.byte 0x00 "HS23,DSI1 HS23 Tile Configuration" group.byte 0xA8++0x00 line.byte 0x00 "HV_R0,DSI1 HV0 Tile Configuration" group.byte 0xA9++0x00 line.byte 0x00 "HV_R1,DSI1 HV1 Tile Configuration" group.byte 0xAA++0x00 line.byte 0x00 "HV_R2,DSI1 HV2 Tile Configuration" group.byte 0xAB++0x00 line.byte 0x00 "HV_R3,DSI1 HV3 Tile Configuration" group.byte 0xAC++0x00 line.byte 0x00 "HV_R4,DSI1 HV4 Tile Configuration" group.byte 0xAD++0x00 line.byte 0x00 "HV_R5,DSI1 HV5 Tile Configuration" group.byte 0xAE++0x00 line.byte 0x00 "HV_R6,DSI1 HV6 Tile Configuration" group.byte 0xAF++0x00 line.byte 0x00 "HV_R7,DSI1 HV7 Tile Configuration" group.byte 0xB0++0x00 line.byte 0x00 "HV_R8,DSI1 HV8 Tile Configuration" group.byte 0xB1++0x00 line.byte 0x00 "HV_R9,DSI1 HV9 Tile Configuration" group.byte 0xB2++0x00 line.byte 0x00 "HV_R10,DSI1 HV10 Tile Configuration" group.byte 0xB3++0x00 line.byte 0x00 "HV_R11,DSI1 HV11 Tile Configuration" group.byte 0xB4++0x00 line.byte 0x00 "HV_R12,DSI1 HV12 Tile Configuration" group.byte 0xB5++0x00 line.byte 0x00 "HV_R13,DSI1 HV13 Tile Configuration" group.byte 0xB6++0x00 line.byte 0x00 "HV_R14,DSI1 HV14 Tile Configuration" group.byte 0xB7++0x00 line.byte 0x00 "HV_R15,DSI1 HV15 Tile Configuration" group.byte 0xC0++0x00 line.byte 0x00 "DSIINP0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC2++0x00 line.byte 0x00 "DSIINP1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC4++0x00 line.byte 0x00 "DSIINP2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC6++0x00 line.byte 0x00 "DSIINP3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC8++0x00 line.byte 0x00 "DSIINP4,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCA++0x00 line.byte 0x00 "DSIINP5,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCC++0x00 line.byte 0x00 "DSIOUTP0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCE++0x00 line.byte 0x00 "DSIOUTP1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD0++0x00 line.byte 0x00 "DSIOUTP2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD2++0x00 line.byte 0x00 "DSIOUTP3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD4++0x00 line.byte 0x00 "DSIOUTT0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD6++0x00 line.byte 0x00 "DSIOUTT1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD8++0x00 line.byte 0x00 "DSIOUTT2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDA++0x00 line.byte 0x00 "DSIOUTT3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDC++0x00 line.byte 0x00 "DSIOUTT4,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDE++0x00 line.byte 0x00 "DSIOUTT5,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xE0++0x00 line.byte 0x00 "VS0,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE2++0x00 line.byte 0x00 "VS1,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE4++0x00 line.byte 0x00 "VS2,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE6++0x00 line.byte 0x00 "VS3,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE8++0x00 line.byte 0x00 "VS4,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEA++0x00 line.byte 0x00 "VS5,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEC++0x00 line.byte 0x00 "VS6,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEE++0x00 line.byte 0x00 "VS7,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" width 0x0B tree.end tree "DSI 2" base ad:0x40014200 width 10. group.byte 0x0++0x00 line.byte 0x00 "HC0,DSI2 HC0 Tile Configuration" group.byte 0x1++0x00 line.byte 0x00 "HC1,DSI2 HC1 Tile Configuration" group.byte 0x2++0x00 line.byte 0x00 "HC2,DSI2 HC2 Tile Configuration" group.byte 0x3++0x00 line.byte 0x00 "HC3,DSI2 HC3 Tile Configuration" group.byte 0x4++0x00 line.byte 0x00 "HC4,DSI2 HC4 Tile Configuration" group.byte 0x5++0x00 line.byte 0x00 "HC5,DSI2 HC5 Tile Configuration" group.byte 0x6++0x00 line.byte 0x00 "HC6,DSI2 HC6 Tile Configuration" group.byte 0x7++0x00 line.byte 0x00 "HC7,DSI2 HC7 Tile Configuration" group.byte 0x8++0x00 line.byte 0x00 "HC8,DSI2 HC8 Tile Configuration" group.byte 0x9++0x00 line.byte 0x00 "HC9,DSI2 HC9 Tile Configuration" group.byte 0xA++0x00 line.byte 0x00 "HC10,DSI2 HC10 Tile Configuration" group.byte 0xB++0x00 line.byte 0x00 "HC11,DSI2 HC11 Tile Configuration" group.byte 0xC++0x00 line.byte 0x00 "HC12,DSI2 HC12 Tile Configuration" group.byte 0xD++0x00 line.byte 0x00 "HC13,DSI2 HC13 Tile Configuration" group.byte 0xE++0x00 line.byte 0x00 "HC14,DSI2 HC14 Tile Configuration" group.byte 0xF++0x00 line.byte 0x00 "HC15,DSI2 HC15 Tile Configuration" group.byte 0x10++0x00 line.byte 0x00 "HC16,DSI2 HC16 Tile Configuration" group.byte 0x11++0x00 line.byte 0x00 "HC17,DSI2 HC17 Tile Configuration" group.byte 0x12++0x00 line.byte 0x00 "HC18,DSI2 HC18 Tile Configuration" group.byte 0x13++0x00 line.byte 0x00 "HC19,DSI2 HC19 Tile Configuration" group.byte 0x14++0x00 line.byte 0x00 "HC20,DSI2 HC20 Tile Configuration" group.byte 0x15++0x00 line.byte 0x00 "HC21,DSI2 HC21 Tile Configuration" group.byte 0x16++0x00 line.byte 0x00 "HC22,DSI2 HC22 Tile Configuration" group.byte 0x17++0x00 line.byte 0x00 "HC23,DSI2 HC23 Tile Configuration" group.byte 0x18++0x00 line.byte 0x00 "HC24,DSI2 HC24 Tile Configuration" group.byte 0x19++0x00 line.byte 0x00 "HC25,DSI2 HC25 Tile Configuration" group.byte 0x1A++0x00 line.byte 0x00 "HC26,DSI2 HC26 Tile Configuration" group.byte 0x1B++0x00 line.byte 0x00 "HC27,DSI2 HC27 Tile Configuration" group.byte 0x1C++0x00 line.byte 0x00 "HC28,DSI2 HC28 Tile Configuration" group.byte 0x1D++0x00 line.byte 0x00 "HC29,DSI2 HC29 Tile Configuration" group.byte 0x1E++0x00 line.byte 0x00 "HC30,DSI2 HC30 Tile Configuration" group.byte 0x1F++0x00 line.byte 0x00 "HC31,DSI2 HC31 Tile Configuration" group.byte 0x20++0x00 line.byte 0x00 "HC32,DSI2 HC32 Tile Configuration" group.byte 0x21++0x00 line.byte 0x00 "HC33,DSI2 HC33 Tile Configuration" group.byte 0x22++0x00 line.byte 0x00 "HC34,DSI2 HC34 Tile Configuration" group.byte 0x23++0x00 line.byte 0x00 "HC35,DSI2 HC35 Tile Configuration" group.byte 0x24++0x00 line.byte 0x00 "HC36,DSI2 HC36 Tile Configuration" group.byte 0x25++0x00 line.byte 0x00 "HC37,DSI2 HC37 Tile Configuration" group.byte 0x26++0x00 line.byte 0x00 "HC38,DSI2 HC38 Tile Configuration" group.byte 0x27++0x00 line.byte 0x00 "HC39,DSI2 HC39 Tile Configuration" group.byte 0x28++0x00 line.byte 0x00 "HC40,DSI2 HC40 Tile Configuration" group.byte 0x29++0x00 line.byte 0x00 "HC41,DSI2 HC41 Tile Configuration" group.byte 0x2A++0x00 line.byte 0x00 "HC42,DSI2 HC42 Tile Configuration" group.byte 0x2B++0x00 line.byte 0x00 "HC43,DSI2 HC43 Tile Configuration" group.byte 0x2C++0x00 line.byte 0x00 "HC44,DSI2 HC44 Tile Configuration" group.byte 0x2D++0x00 line.byte 0x00 "HC45,DSI2 HC45 Tile Configuration" group.byte 0x2E++0x00 line.byte 0x00 "HC46,DSI2 HC46 Tile Configuration" group.byte 0x2F++0x00 line.byte 0x00 "HC47,DSI2 HC47 Tile Configuration" group.byte 0x30++0x00 line.byte 0x00 "HC48,DSI2 HC48 Tile Configuration" group.byte 0x31++0x00 line.byte 0x00 "HC49,DSI2 HC49 Tile Configuration" group.byte 0x32++0x00 line.byte 0x00 "HC50,DSI2 HC50 Tile Configuration" group.byte 0x33++0x00 line.byte 0x00 "HC51,DSI2 HC51 Tile Configuration" group.byte 0x34++0x00 line.byte 0x00 "HC52,DSI2 HC52 Tile Configuration" group.byte 0x35++0x00 line.byte 0x00 "HC53,DSI2 HC53 Tile Configuration" group.byte 0x36++0x00 line.byte 0x00 "HC54,DSI2 HC54 Tile Configuration" group.byte 0x37++0x00 line.byte 0x00 "HC55,DSI2 HC55 Tile Configuration" group.byte 0x38++0x00 line.byte 0x00 "HC56,DSI2 HC56 Tile Configuration" group.byte 0x39++0x00 line.byte 0x00 "HC57,DSI2 HC57 Tile Configuration" group.byte 0x3A++0x00 line.byte 0x00 "HC58,DSI2 HC58 Tile Configuration" group.byte 0x3B++0x00 line.byte 0x00 "HC59,DSI2 HC59 Tile Configuration" group.byte 0x3C++0x00 line.byte 0x00 "HC60,DSI2 HC60 Tile Configuration" group.byte 0x3D++0x00 line.byte 0x00 "HC61,DSI2 HC61 Tile Configuration" group.byte 0x3E++0x00 line.byte 0x00 "HC62,DSI2 HC62 Tile Configuration" group.byte 0x3F++0x00 line.byte 0x00 "HC63,DSI2 HC63 Tile Configuration" group.byte 0x40++0x00 line.byte 0x00 "HC64,DSI2 HC64 Tile Configuration" group.byte 0x41++0x00 line.byte 0x00 "HC65,DSI2 HC65 Tile Configuration" group.byte 0x42++0x00 line.byte 0x00 "HC66,DSI2 HC66 Tile Configuration" group.byte 0x43++0x00 line.byte 0x00 "HC67,DSI2 HC67 Tile Configuration" group.byte 0x44++0x00 line.byte 0x00 "HC68,DSI2 HC68 Tile Configuration" group.byte 0x45++0x00 line.byte 0x00 "HC69,DSI2 HC69 Tile Configuration" group.byte 0x46++0x00 line.byte 0x00 "HC70,DSI2 HC70 Tile Configuration" group.byte 0x47++0x00 line.byte 0x00 "HC71,DSI2 HC71 Tile Configuration" group.byte 0x48++0x00 line.byte 0x00 "HC72,DSI2 HC72 Tile Configuration" group.byte 0x49++0x00 line.byte 0x00 "HC73,DSI2 HC73 Tile Configuration" group.byte 0x4A++0x00 line.byte 0x00 "HC74,DSI2 HC74 Tile Configuration" group.byte 0x4B++0x00 line.byte 0x00 "HC75,DSI2 HC75 Tile Configuration" group.byte 0x4C++0x00 line.byte 0x00 "HC76,DSI2 HC76 Tile Configuration" group.byte 0x4D++0x00 line.byte 0x00 "HC77,DSI2 HC77 Tile Configuration" group.byte 0x4E++0x00 line.byte 0x00 "HC78,DSI2 HC78 Tile Configuration" group.byte 0x4F++0x00 line.byte 0x00 "HC79,DSI2 HC79 Tile Configuration" group.byte 0x50++0x00 line.byte 0x00 "HC80,DSI2 HC80 Tile Configuration" group.byte 0x51++0x00 line.byte 0x00 "HC81,DSI2 HC81 Tile Configuration" group.byte 0x52++0x00 line.byte 0x00 "HC82,DSI2 HC82 Tile Configuration" group.byte 0x53++0x00 line.byte 0x00 "HC83,DSI2 HC83 Tile Configuration" group.byte 0x54++0x00 line.byte 0x00 "HC84,DSI2 HC84 Tile Configuration" group.byte 0x55++0x00 line.byte 0x00 "HC85,DSI2 HC85 Tile Configuration" group.byte 0x56++0x00 line.byte 0x00 "HC86,DSI2 HC86 Tile Configuration" group.byte 0x57++0x00 line.byte 0x00 "HC87,DSI2 HC87 Tile Configuration" group.byte 0x58++0x00 line.byte 0x00 "HC88,DSI2 HC88 Tile Configuration" group.byte 0x59++0x00 line.byte 0x00 "HC89,DSI2 HC89 Tile Configuration" group.byte 0x5A++0x00 line.byte 0x00 "HC90,DSI2 HC90 Tile Configuration" group.byte 0x5B++0x00 line.byte 0x00 "HC91,DSI2 HC91 Tile Configuration" group.byte 0x5C++0x00 line.byte 0x00 "HC92,DSI2 HC92 Tile Configuration" group.byte 0x5D++0x00 line.byte 0x00 "HC93,DSI2 HC93 Tile Configuration" group.byte 0x5E++0x00 line.byte 0x00 "HC94,DSI2 HC94 Tile Configuration" group.byte 0x5F++0x00 line.byte 0x00 "HC95,DSI2 HC95 Tile Configuration" group.byte 0x60++0x00 line.byte 0x00 "HC96,DSI2 HC96 Tile Configuration" group.byte 0x61++0x00 line.byte 0x00 "HC97,DSI2 HC97 Tile Configuration" group.byte 0x62++0x00 line.byte 0x00 "HC98,DSI2 HC98 Tile Configuration" group.byte 0x63++0x00 line.byte 0x00 "HC99,DSI2 HC99 Tile Configuration" group.byte 0x64++0x00 line.byte 0x00 "HC100,DSI2 HC100 Tile Configuration" group.byte 0x65++0x00 line.byte 0x00 "HC101,DSI2 HC101 Tile Configuration" group.byte 0x66++0x00 line.byte 0x00 "HC102,DSI2 HC102 Tile Configuration" group.byte 0x67++0x00 line.byte 0x00 "HC103,DSI2 HC103 Tile Configuration" group.byte 0x68++0x00 line.byte 0x00 "HC104,DSI2 HC104 Tile Configuration" group.byte 0x69++0x00 line.byte 0x00 "HC105,DSI2 HC105 Tile Configuration" group.byte 0x6A++0x00 line.byte 0x00 "HC106,DSI2 HC106 Tile Configuration" group.byte 0x6B++0x00 line.byte 0x00 "HC107,DSI2 HC107 Tile Configuration" group.byte 0x6C++0x00 line.byte 0x00 "HC108,DSI2 HC108 Tile Configuration" group.byte 0x6D++0x00 line.byte 0x00 "HC109,DSI2 HC109 Tile Configuration" group.byte 0x6E++0x00 line.byte 0x00 "HC110,DSI2 HC110 Tile Configuration" group.byte 0x6F++0x00 line.byte 0x00 "HC111,DSI2 HC111 Tile Configuration" group.byte 0x70++0x00 line.byte 0x00 "HC112,DSI2 HC112 Tile Configuration" group.byte 0x71++0x00 line.byte 0x00 "HC113,DSI2 HC113 Tile Configuration" group.byte 0x72++0x00 line.byte 0x00 "HC114,DSI2 HC114 Tile Configuration" group.byte 0x73++0x00 line.byte 0x00 "HC115,DSI2 HC115 Tile Configuration" group.byte 0x74++0x00 line.byte 0x00 "HC116,DSI2 HC116 Tile Configuration" group.byte 0x75++0x00 line.byte 0x00 "HC117,DSI2 HC117 Tile Configuration" group.byte 0x76++0x00 line.byte 0x00 "HC118,DSI2 HC118 Tile Configuration" group.byte 0x77++0x00 line.byte 0x00 "HC119,DSI2 HC119 Tile Configuration" group.byte 0x78++0x00 line.byte 0x00 "HC120,DSI2 HC120 Tile Configuration" group.byte 0x79++0x00 line.byte 0x00 "HC121,DSI2 HC121 Tile Configuration" group.byte 0x7A++0x00 line.byte 0x00 "HC122,DSI2 HC122 Tile Configuration" group.byte 0x7B++0x00 line.byte 0x00 "HC123,DSI2 HC123 Tile Configuration" group.byte 0x7C++0x00 line.byte 0x00 "HC124,DSI2 HC124 Tile Configuration" group.byte 0x7D++0x00 line.byte 0x00 "HC125,DSI2 HC125 Tile Configuration" group.byte 0x7E++0x00 line.byte 0x00 "HC126,DSI2 HC126 Tile Configuration" group.byte 0x7F++0x00 line.byte 0x00 "HC127,DSI2 HC127 Tile Configuration" group.byte 0x80++0x00 line.byte 0x00 "HV_L0,DSI2 HV0 Tile Configuration" group.byte 0x81++0x00 line.byte 0x00 "HV_L1,DSI2 HV1 Tile Configuration" group.byte 0x82++0x00 line.byte 0x00 "HV_L2,DSI2 HV2 Tile Configuration" group.byte 0x83++0x00 line.byte 0x00 "HV_L3,DSI2 HV3 Tile Configuration" group.byte 0x84++0x00 line.byte 0x00 "HV_L4,DSI2 HV4 Tile Configuration" group.byte 0x85++0x00 line.byte 0x00 "HV_L5,DSI2 HV5 Tile Configuration" group.byte 0x86++0x00 line.byte 0x00 "HV_L6,DSI2 HV6 Tile Configuration" group.byte 0x87++0x00 line.byte 0x00 "HV_L7,DSI2 HV7 Tile Configuration" group.byte 0x88++0x00 line.byte 0x00 "HV_L8,DSI2 HV8 Tile Configuration" group.byte 0x89++0x00 line.byte 0x00 "HV_L9,DSI2 HV9 Tile Configuration" group.byte 0x8A++0x00 line.byte 0x00 "HV_L10,DSI2 HV10 Tile Configuration" group.byte 0x8B++0x00 line.byte 0x00 "HV_L11,DSI2 HV11 Tile Configuration" group.byte 0x8C++0x00 line.byte 0x00 "HV_L12,DSI2 HV12 Tile Configuration" group.byte 0x8D++0x00 line.byte 0x00 "HV_L13,DSI2 HV13 Tile Configuration" group.byte 0x8E++0x00 line.byte 0x00 "HV_L14,DSI2 HV14 Tile Configuration" group.byte 0x8F++0x00 line.byte 0x00 "HV_L15,DSI2 HV15 Tile Configuration" group.byte 0x90++0x00 line.byte 0x00 "HS0,DSI2 HS0 Tile Configuration" group.byte 0x91++0x00 line.byte 0x00 "HS1,DSI2 HS1 Tile Configuration" group.byte 0x92++0x00 line.byte 0x00 "HS2,DSI2 HS2 Tile Configuration" group.byte 0x93++0x00 line.byte 0x00 "HS3,DSI2 HS3 Tile Configuration" group.byte 0x94++0x00 line.byte 0x00 "HS4,DSI2 HS4 Tile Configuration" group.byte 0x95++0x00 line.byte 0x00 "HS5,DSI2 HS5 Tile Configuration" group.byte 0x96++0x00 line.byte 0x00 "HS6,DSI2 HS6 Tile Configuration" group.byte 0x97++0x00 line.byte 0x00 "HS7,DSI2 HS7 Tile Configuration" group.byte 0x98++0x00 line.byte 0x00 "HS8,DSI2 HS8 Tile Configuration" group.byte 0x99++0x00 line.byte 0x00 "HS9,DSI2 HS9 Tile Configuration" group.byte 0x9A++0x00 line.byte 0x00 "HS10,DSI2 HS10 Tile Configuration" group.byte 0x9B++0x00 line.byte 0x00 "HS11,DSI2 HS11 Tile Configuration" group.byte 0x9C++0x00 line.byte 0x00 "HS12,DSI2 HS12 Tile Configuration" group.byte 0x9D++0x00 line.byte 0x00 "HS13,DSI2 HS13 Tile Configuration" group.byte 0x9E++0x00 line.byte 0x00 "HS14,DSI2 HS14 Tile Configuration" group.byte 0x9F++0x00 line.byte 0x00 "HS15,DSI2 HS15 Tile Configuration" group.byte 0xA0++0x00 line.byte 0x00 "HS16,DSI2 HS16 Tile Configuration" group.byte 0xA1++0x00 line.byte 0x00 "HS17,DSI2 HS17 Tile Configuration" group.byte 0xA2++0x00 line.byte 0x00 "HS18,DSI2 HS18 Tile Configuration" group.byte 0xA3++0x00 line.byte 0x00 "HS19,DSI2 HS19 Tile Configuration" group.byte 0xA4++0x00 line.byte 0x00 "HS20,DSI2 HS20 Tile Configuration" group.byte 0xA5++0x00 line.byte 0x00 "HS21,DSI2 HS21 Tile Configuration" group.byte 0xA6++0x00 line.byte 0x00 "HS22,DSI2 HS22 Tile Configuration" group.byte 0xA7++0x00 line.byte 0x00 "HS23,DSI2 HS23 Tile Configuration" group.byte 0xA8++0x00 line.byte 0x00 "HV_R0,DSI2 HV0 Tile Configuration" group.byte 0xA9++0x00 line.byte 0x00 "HV_R1,DSI2 HV1 Tile Configuration" group.byte 0xAA++0x00 line.byte 0x00 "HV_R2,DSI2 HV2 Tile Configuration" group.byte 0xAB++0x00 line.byte 0x00 "HV_R3,DSI2 HV3 Tile Configuration" group.byte 0xAC++0x00 line.byte 0x00 "HV_R4,DSI2 HV4 Tile Configuration" group.byte 0xAD++0x00 line.byte 0x00 "HV_R5,DSI2 HV5 Tile Configuration" group.byte 0xAE++0x00 line.byte 0x00 "HV_R6,DSI2 HV6 Tile Configuration" group.byte 0xAF++0x00 line.byte 0x00 "HV_R7,DSI2 HV7 Tile Configuration" group.byte 0xB0++0x00 line.byte 0x00 "HV_R8,DSI2 HV8 Tile Configuration" group.byte 0xB1++0x00 line.byte 0x00 "HV_R9,DSI2 HV9 Tile Configuration" group.byte 0xB2++0x00 line.byte 0x00 "HV_R10,DSI2 HV10 Tile Configuration" group.byte 0xB3++0x00 line.byte 0x00 "HV_R11,DSI2 HV11 Tile Configuration" group.byte 0xB4++0x00 line.byte 0x00 "HV_R12,DSI2 HV12 Tile Configuration" group.byte 0xB5++0x00 line.byte 0x00 "HV_R13,DSI2 HV13 Tile Configuration" group.byte 0xB6++0x00 line.byte 0x00 "HV_R14,DSI2 HV14 Tile Configuration" group.byte 0xB7++0x00 line.byte 0x00 "HV_R15,DSI2 HV15 Tile Configuration" group.byte 0xC0++0x00 line.byte 0x00 "DSIINP0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC2++0x00 line.byte 0x00 "DSIINP1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC4++0x00 line.byte 0x00 "DSIINP2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC6++0x00 line.byte 0x00 "DSIINP3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC8++0x00 line.byte 0x00 "DSIINP4,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCA++0x00 line.byte 0x00 "DSIINP5,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCC++0x00 line.byte 0x00 "DSIOUTP0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCE++0x00 line.byte 0x00 "DSIOUTP1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD0++0x00 line.byte 0x00 "DSIOUTP2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD2++0x00 line.byte 0x00 "DSIOUTP3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD4++0x00 line.byte 0x00 "DSIOUTT0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD6++0x00 line.byte 0x00 "DSIOUTT1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD8++0x00 line.byte 0x00 "DSIOUTT2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDA++0x00 line.byte 0x00 "DSIOUTT3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDC++0x00 line.byte 0x00 "DSIOUTT4,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDE++0x00 line.byte 0x00 "DSIOUTT5,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xE0++0x00 line.byte 0x00 "VS0,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE2++0x00 line.byte 0x00 "VS1,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE4++0x00 line.byte 0x00 "VS2,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE6++0x00 line.byte 0x00 "VS3,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE8++0x00 line.byte 0x00 "VS4,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEA++0x00 line.byte 0x00 "VS5,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEC++0x00 line.byte 0x00 "VS6,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEE++0x00 line.byte 0x00 "VS7,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" width 0x0B tree.end tree "DSI 3" base ad:0x40014300 width 10. group.byte 0x0++0x00 line.byte 0x00 "HC0,DSI3 HC0 Tile Configuration" group.byte 0x1++0x00 line.byte 0x00 "HC1,DSI3 HC1 Tile Configuration" group.byte 0x2++0x00 line.byte 0x00 "HC2,DSI3 HC2 Tile Configuration" group.byte 0x3++0x00 line.byte 0x00 "HC3,DSI3 HC3 Tile Configuration" group.byte 0x4++0x00 line.byte 0x00 "HC4,DSI3 HC4 Tile Configuration" group.byte 0x5++0x00 line.byte 0x00 "HC5,DSI3 HC5 Tile Configuration" group.byte 0x6++0x00 line.byte 0x00 "HC6,DSI3 HC6 Tile Configuration" group.byte 0x7++0x00 line.byte 0x00 "HC7,DSI3 HC7 Tile Configuration" group.byte 0x8++0x00 line.byte 0x00 "HC8,DSI3 HC8 Tile Configuration" group.byte 0x9++0x00 line.byte 0x00 "HC9,DSI3 HC9 Tile Configuration" group.byte 0xA++0x00 line.byte 0x00 "HC10,DSI3 HC10 Tile Configuration" group.byte 0xB++0x00 line.byte 0x00 "HC11,DSI3 HC11 Tile Configuration" group.byte 0xC++0x00 line.byte 0x00 "HC12,DSI3 HC12 Tile Configuration" group.byte 0xD++0x00 line.byte 0x00 "HC13,DSI3 HC13 Tile Configuration" group.byte 0xE++0x00 line.byte 0x00 "HC14,DSI3 HC14 Tile Configuration" group.byte 0xF++0x00 line.byte 0x00 "HC15,DSI3 HC15 Tile Configuration" group.byte 0x10++0x00 line.byte 0x00 "HC16,DSI3 HC16 Tile Configuration" group.byte 0x11++0x00 line.byte 0x00 "HC17,DSI3 HC17 Tile Configuration" group.byte 0x12++0x00 line.byte 0x00 "HC18,DSI3 HC18 Tile Configuration" group.byte 0x13++0x00 line.byte 0x00 "HC19,DSI3 HC19 Tile Configuration" group.byte 0x14++0x00 line.byte 0x00 "HC20,DSI3 HC20 Tile Configuration" group.byte 0x15++0x00 line.byte 0x00 "HC21,DSI3 HC21 Tile Configuration" group.byte 0x16++0x00 line.byte 0x00 "HC22,DSI3 HC22 Tile Configuration" group.byte 0x17++0x00 line.byte 0x00 "HC23,DSI3 HC23 Tile Configuration" group.byte 0x18++0x00 line.byte 0x00 "HC24,DSI3 HC24 Tile Configuration" group.byte 0x19++0x00 line.byte 0x00 "HC25,DSI3 HC25 Tile Configuration" group.byte 0x1A++0x00 line.byte 0x00 "HC26,DSI3 HC26 Tile Configuration" group.byte 0x1B++0x00 line.byte 0x00 "HC27,DSI3 HC27 Tile Configuration" group.byte 0x1C++0x00 line.byte 0x00 "HC28,DSI3 HC28 Tile Configuration" group.byte 0x1D++0x00 line.byte 0x00 "HC29,DSI3 HC29 Tile Configuration" group.byte 0x1E++0x00 line.byte 0x00 "HC30,DSI3 HC30 Tile Configuration" group.byte 0x1F++0x00 line.byte 0x00 "HC31,DSI3 HC31 Tile Configuration" group.byte 0x20++0x00 line.byte 0x00 "HC32,DSI3 HC32 Tile Configuration" group.byte 0x21++0x00 line.byte 0x00 "HC33,DSI3 HC33 Tile Configuration" group.byte 0x22++0x00 line.byte 0x00 "HC34,DSI3 HC34 Tile Configuration" group.byte 0x23++0x00 line.byte 0x00 "HC35,DSI3 HC35 Tile Configuration" group.byte 0x24++0x00 line.byte 0x00 "HC36,DSI3 HC36 Tile Configuration" group.byte 0x25++0x00 line.byte 0x00 "HC37,DSI3 HC37 Tile Configuration" group.byte 0x26++0x00 line.byte 0x00 "HC38,DSI3 HC38 Tile Configuration" group.byte 0x27++0x00 line.byte 0x00 "HC39,DSI3 HC39 Tile Configuration" group.byte 0x28++0x00 line.byte 0x00 "HC40,DSI3 HC40 Tile Configuration" group.byte 0x29++0x00 line.byte 0x00 "HC41,DSI3 HC41 Tile Configuration" group.byte 0x2A++0x00 line.byte 0x00 "HC42,DSI3 HC42 Tile Configuration" group.byte 0x2B++0x00 line.byte 0x00 "HC43,DSI3 HC43 Tile Configuration" group.byte 0x2C++0x00 line.byte 0x00 "HC44,DSI3 HC44 Tile Configuration" group.byte 0x2D++0x00 line.byte 0x00 "HC45,DSI3 HC45 Tile Configuration" group.byte 0x2E++0x00 line.byte 0x00 "HC46,DSI3 HC46 Tile Configuration" group.byte 0x2F++0x00 line.byte 0x00 "HC47,DSI3 HC47 Tile Configuration" group.byte 0x30++0x00 line.byte 0x00 "HC48,DSI3 HC48 Tile Configuration" group.byte 0x31++0x00 line.byte 0x00 "HC49,DSI3 HC49 Tile Configuration" group.byte 0x32++0x00 line.byte 0x00 "HC50,DSI3 HC50 Tile Configuration" group.byte 0x33++0x00 line.byte 0x00 "HC51,DSI3 HC51 Tile Configuration" group.byte 0x34++0x00 line.byte 0x00 "HC52,DSI3 HC52 Tile Configuration" group.byte 0x35++0x00 line.byte 0x00 "HC53,DSI3 HC53 Tile Configuration" group.byte 0x36++0x00 line.byte 0x00 "HC54,DSI3 HC54 Tile Configuration" group.byte 0x37++0x00 line.byte 0x00 "HC55,DSI3 HC55 Tile Configuration" group.byte 0x38++0x00 line.byte 0x00 "HC56,DSI3 HC56 Tile Configuration" group.byte 0x39++0x00 line.byte 0x00 "HC57,DSI3 HC57 Tile Configuration" group.byte 0x3A++0x00 line.byte 0x00 "HC58,DSI3 HC58 Tile Configuration" group.byte 0x3B++0x00 line.byte 0x00 "HC59,DSI3 HC59 Tile Configuration" group.byte 0x3C++0x00 line.byte 0x00 "HC60,DSI3 HC60 Tile Configuration" group.byte 0x3D++0x00 line.byte 0x00 "HC61,DSI3 HC61 Tile Configuration" group.byte 0x3E++0x00 line.byte 0x00 "HC62,DSI3 HC62 Tile Configuration" group.byte 0x3F++0x00 line.byte 0x00 "HC63,DSI3 HC63 Tile Configuration" group.byte 0x40++0x00 line.byte 0x00 "HC64,DSI3 HC64 Tile Configuration" group.byte 0x41++0x00 line.byte 0x00 "HC65,DSI3 HC65 Tile Configuration" group.byte 0x42++0x00 line.byte 0x00 "HC66,DSI3 HC66 Tile Configuration" group.byte 0x43++0x00 line.byte 0x00 "HC67,DSI3 HC67 Tile Configuration" group.byte 0x44++0x00 line.byte 0x00 "HC68,DSI3 HC68 Tile Configuration" group.byte 0x45++0x00 line.byte 0x00 "HC69,DSI3 HC69 Tile Configuration" group.byte 0x46++0x00 line.byte 0x00 "HC70,DSI3 HC70 Tile Configuration" group.byte 0x47++0x00 line.byte 0x00 "HC71,DSI3 HC71 Tile Configuration" group.byte 0x48++0x00 line.byte 0x00 "HC72,DSI3 HC72 Tile Configuration" group.byte 0x49++0x00 line.byte 0x00 "HC73,DSI3 HC73 Tile Configuration" group.byte 0x4A++0x00 line.byte 0x00 "HC74,DSI3 HC74 Tile Configuration" group.byte 0x4B++0x00 line.byte 0x00 "HC75,DSI3 HC75 Tile Configuration" group.byte 0x4C++0x00 line.byte 0x00 "HC76,DSI3 HC76 Tile Configuration" group.byte 0x4D++0x00 line.byte 0x00 "HC77,DSI3 HC77 Tile Configuration" group.byte 0x4E++0x00 line.byte 0x00 "HC78,DSI3 HC78 Tile Configuration" group.byte 0x4F++0x00 line.byte 0x00 "HC79,DSI3 HC79 Tile Configuration" group.byte 0x50++0x00 line.byte 0x00 "HC80,DSI3 HC80 Tile Configuration" group.byte 0x51++0x00 line.byte 0x00 "HC81,DSI3 HC81 Tile Configuration" group.byte 0x52++0x00 line.byte 0x00 "HC82,DSI3 HC82 Tile Configuration" group.byte 0x53++0x00 line.byte 0x00 "HC83,DSI3 HC83 Tile Configuration" group.byte 0x54++0x00 line.byte 0x00 "HC84,DSI3 HC84 Tile Configuration" group.byte 0x55++0x00 line.byte 0x00 "HC85,DSI3 HC85 Tile Configuration" group.byte 0x56++0x00 line.byte 0x00 "HC86,DSI3 HC86 Tile Configuration" group.byte 0x57++0x00 line.byte 0x00 "HC87,DSI3 HC87 Tile Configuration" group.byte 0x58++0x00 line.byte 0x00 "HC88,DSI3 HC88 Tile Configuration" group.byte 0x59++0x00 line.byte 0x00 "HC89,DSI3 HC89 Tile Configuration" group.byte 0x5A++0x00 line.byte 0x00 "HC90,DSI3 HC90 Tile Configuration" group.byte 0x5B++0x00 line.byte 0x00 "HC91,DSI3 HC91 Tile Configuration" group.byte 0x5C++0x00 line.byte 0x00 "HC92,DSI3 HC92 Tile Configuration" group.byte 0x5D++0x00 line.byte 0x00 "HC93,DSI3 HC93 Tile Configuration" group.byte 0x5E++0x00 line.byte 0x00 "HC94,DSI3 HC94 Tile Configuration" group.byte 0x5F++0x00 line.byte 0x00 "HC95,DSI3 HC95 Tile Configuration" group.byte 0x60++0x00 line.byte 0x00 "HC96,DSI3 HC96 Tile Configuration" group.byte 0x61++0x00 line.byte 0x00 "HC97,DSI3 HC97 Tile Configuration" group.byte 0x62++0x00 line.byte 0x00 "HC98,DSI3 HC98 Tile Configuration" group.byte 0x63++0x00 line.byte 0x00 "HC99,DSI3 HC99 Tile Configuration" group.byte 0x64++0x00 line.byte 0x00 "HC100,DSI3 HC100 Tile Configuration" group.byte 0x65++0x00 line.byte 0x00 "HC101,DSI3 HC101 Tile Configuration" group.byte 0x66++0x00 line.byte 0x00 "HC102,DSI3 HC102 Tile Configuration" group.byte 0x67++0x00 line.byte 0x00 "HC103,DSI3 HC103 Tile Configuration" group.byte 0x68++0x00 line.byte 0x00 "HC104,DSI3 HC104 Tile Configuration" group.byte 0x69++0x00 line.byte 0x00 "HC105,DSI3 HC105 Tile Configuration" group.byte 0x6A++0x00 line.byte 0x00 "HC106,DSI3 HC106 Tile Configuration" group.byte 0x6B++0x00 line.byte 0x00 "HC107,DSI3 HC107 Tile Configuration" group.byte 0x6C++0x00 line.byte 0x00 "HC108,DSI3 HC108 Tile Configuration" group.byte 0x6D++0x00 line.byte 0x00 "HC109,DSI3 HC109 Tile Configuration" group.byte 0x6E++0x00 line.byte 0x00 "HC110,DSI3 HC110 Tile Configuration" group.byte 0x6F++0x00 line.byte 0x00 "HC111,DSI3 HC111 Tile Configuration" group.byte 0x70++0x00 line.byte 0x00 "HC112,DSI3 HC112 Tile Configuration" group.byte 0x71++0x00 line.byte 0x00 "HC113,DSI3 HC113 Tile Configuration" group.byte 0x72++0x00 line.byte 0x00 "HC114,DSI3 HC114 Tile Configuration" group.byte 0x73++0x00 line.byte 0x00 "HC115,DSI3 HC115 Tile Configuration" group.byte 0x74++0x00 line.byte 0x00 "HC116,DSI3 HC116 Tile Configuration" group.byte 0x75++0x00 line.byte 0x00 "HC117,DSI3 HC117 Tile Configuration" group.byte 0x76++0x00 line.byte 0x00 "HC118,DSI3 HC118 Tile Configuration" group.byte 0x77++0x00 line.byte 0x00 "HC119,DSI3 HC119 Tile Configuration" group.byte 0x78++0x00 line.byte 0x00 "HC120,DSI3 HC120 Tile Configuration" group.byte 0x79++0x00 line.byte 0x00 "HC121,DSI3 HC121 Tile Configuration" group.byte 0x7A++0x00 line.byte 0x00 "HC122,DSI3 HC122 Tile Configuration" group.byte 0x7B++0x00 line.byte 0x00 "HC123,DSI3 HC123 Tile Configuration" group.byte 0x7C++0x00 line.byte 0x00 "HC124,DSI3 HC124 Tile Configuration" group.byte 0x7D++0x00 line.byte 0x00 "HC125,DSI3 HC125 Tile Configuration" group.byte 0x7E++0x00 line.byte 0x00 "HC126,DSI3 HC126 Tile Configuration" group.byte 0x7F++0x00 line.byte 0x00 "HC127,DSI3 HC127 Tile Configuration" group.byte 0x80++0x00 line.byte 0x00 "HV_L0,DSI3 HV0 Tile Configuration" group.byte 0x81++0x00 line.byte 0x00 "HV_L1,DSI3 HV1 Tile Configuration" group.byte 0x82++0x00 line.byte 0x00 "HV_L2,DSI3 HV2 Tile Configuration" group.byte 0x83++0x00 line.byte 0x00 "HV_L3,DSI3 HV3 Tile Configuration" group.byte 0x84++0x00 line.byte 0x00 "HV_L4,DSI3 HV4 Tile Configuration" group.byte 0x85++0x00 line.byte 0x00 "HV_L5,DSI3 HV5 Tile Configuration" group.byte 0x86++0x00 line.byte 0x00 "HV_L6,DSI3 HV6 Tile Configuration" group.byte 0x87++0x00 line.byte 0x00 "HV_L7,DSI3 HV7 Tile Configuration" group.byte 0x88++0x00 line.byte 0x00 "HV_L8,DSI3 HV8 Tile Configuration" group.byte 0x89++0x00 line.byte 0x00 "HV_L9,DSI3 HV9 Tile Configuration" group.byte 0x8A++0x00 line.byte 0x00 "HV_L10,DSI3 HV10 Tile Configuration" group.byte 0x8B++0x00 line.byte 0x00 "HV_L11,DSI3 HV11 Tile Configuration" group.byte 0x8C++0x00 line.byte 0x00 "HV_L12,DSI3 HV12 Tile Configuration" group.byte 0x8D++0x00 line.byte 0x00 "HV_L13,DSI3 HV13 Tile Configuration" group.byte 0x8E++0x00 line.byte 0x00 "HV_L14,DSI3 HV14 Tile Configuration" group.byte 0x8F++0x00 line.byte 0x00 "HV_L15,DSI3 HV15 Tile Configuration" group.byte 0x90++0x00 line.byte 0x00 "HS0,DSI3 HS0 Tile Configuration" group.byte 0x91++0x00 line.byte 0x00 "HS1,DSI3 HS1 Tile Configuration" group.byte 0x92++0x00 line.byte 0x00 "HS2,DSI3 HS2 Tile Configuration" group.byte 0x93++0x00 line.byte 0x00 "HS3,DSI3 HS3 Tile Configuration" group.byte 0x94++0x00 line.byte 0x00 "HS4,DSI3 HS4 Tile Configuration" group.byte 0x95++0x00 line.byte 0x00 "HS5,DSI3 HS5 Tile Configuration" group.byte 0x96++0x00 line.byte 0x00 "HS6,DSI3 HS6 Tile Configuration" group.byte 0x97++0x00 line.byte 0x00 "HS7,DSI3 HS7 Tile Configuration" group.byte 0x98++0x00 line.byte 0x00 "HS8,DSI3 HS8 Tile Configuration" group.byte 0x99++0x00 line.byte 0x00 "HS9,DSI3 HS9 Tile Configuration" group.byte 0x9A++0x00 line.byte 0x00 "HS10,DSI3 HS10 Tile Configuration" group.byte 0x9B++0x00 line.byte 0x00 "HS11,DSI3 HS11 Tile Configuration" group.byte 0x9C++0x00 line.byte 0x00 "HS12,DSI3 HS12 Tile Configuration" group.byte 0x9D++0x00 line.byte 0x00 "HS13,DSI3 HS13 Tile Configuration" group.byte 0x9E++0x00 line.byte 0x00 "HS14,DSI3 HS14 Tile Configuration" group.byte 0x9F++0x00 line.byte 0x00 "HS15,DSI3 HS15 Tile Configuration" group.byte 0xA0++0x00 line.byte 0x00 "HS16,DSI3 HS16 Tile Configuration" group.byte 0xA1++0x00 line.byte 0x00 "HS17,DSI3 HS17 Tile Configuration" group.byte 0xA2++0x00 line.byte 0x00 "HS18,DSI3 HS18 Tile Configuration" group.byte 0xA3++0x00 line.byte 0x00 "HS19,DSI3 HS19 Tile Configuration" group.byte 0xA4++0x00 line.byte 0x00 "HS20,DSI3 HS20 Tile Configuration" group.byte 0xA5++0x00 line.byte 0x00 "HS21,DSI3 HS21 Tile Configuration" group.byte 0xA6++0x00 line.byte 0x00 "HS22,DSI3 HS22 Tile Configuration" group.byte 0xA7++0x00 line.byte 0x00 "HS23,DSI3 HS23 Tile Configuration" group.byte 0xA8++0x00 line.byte 0x00 "HV_R0,DSI3 HV0 Tile Configuration" group.byte 0xA9++0x00 line.byte 0x00 "HV_R1,DSI3 HV1 Tile Configuration" group.byte 0xAA++0x00 line.byte 0x00 "HV_R2,DSI3 HV2 Tile Configuration" group.byte 0xAB++0x00 line.byte 0x00 "HV_R3,DSI3 HV3 Tile Configuration" group.byte 0xAC++0x00 line.byte 0x00 "HV_R4,DSI3 HV4 Tile Configuration" group.byte 0xAD++0x00 line.byte 0x00 "HV_R5,DSI3 HV5 Tile Configuration" group.byte 0xAE++0x00 line.byte 0x00 "HV_R6,DSI3 HV6 Tile Configuration" group.byte 0xAF++0x00 line.byte 0x00 "HV_R7,DSI3 HV7 Tile Configuration" group.byte 0xB0++0x00 line.byte 0x00 "HV_R8,DSI3 HV8 Tile Configuration" group.byte 0xB1++0x00 line.byte 0x00 "HV_R9,DSI3 HV9 Tile Configuration" group.byte 0xB2++0x00 line.byte 0x00 "HV_R10,DSI3 HV10 Tile Configuration" group.byte 0xB3++0x00 line.byte 0x00 "HV_R11,DSI3 HV11 Tile Configuration" group.byte 0xB4++0x00 line.byte 0x00 "HV_R12,DSI3 HV12 Tile Configuration" group.byte 0xB5++0x00 line.byte 0x00 "HV_R13,DSI3 HV13 Tile Configuration" group.byte 0xB6++0x00 line.byte 0x00 "HV_R14,DSI3 HV14 Tile Configuration" group.byte 0xB7++0x00 line.byte 0x00 "HV_R15,DSI3 HV15 Tile Configuration" group.byte 0xC0++0x00 line.byte 0x00 "DSIINP0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC2++0x00 line.byte 0x00 "DSIINP1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC4++0x00 line.byte 0x00 "DSIINP2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC6++0x00 line.byte 0x00 "DSIINP3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC8++0x00 line.byte 0x00 "DSIINP4,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCA++0x00 line.byte 0x00 "DSIINP5,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCC++0x00 line.byte 0x00 "DSIOUTP0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCE++0x00 line.byte 0x00 "DSIOUTP1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD0++0x00 line.byte 0x00 "DSIOUTP2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD2++0x00 line.byte 0x00 "DSIOUTP3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD4++0x00 line.byte 0x00 "DSIOUTT0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD6++0x00 line.byte 0x00 "DSIOUTT1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD8++0x00 line.byte 0x00 "DSIOUTT2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDA++0x00 line.byte 0x00 "DSIOUTT3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDC++0x00 line.byte 0x00 "DSIOUTT4,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDE++0x00 line.byte 0x00 "DSIOUTT5,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xE0++0x00 line.byte 0x00 "VS0,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE2++0x00 line.byte 0x00 "VS1,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE4++0x00 line.byte 0x00 "VS2,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE6++0x00 line.byte 0x00 "VS3,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE8++0x00 line.byte 0x00 "VS4,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEA++0x00 line.byte 0x00 "VS5,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEC++0x00 line.byte 0x00 "VS6,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEE++0x00 line.byte 0x00 "VS7,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" width 0x0B tree.end tree "DSI 4" base ad:0x40014400 width 10. group.byte 0x0++0x00 line.byte 0x00 "HC0,DSI4 HC0 Tile Configuration" group.byte 0x1++0x00 line.byte 0x00 "HC1,DSI4 HC1 Tile Configuration" group.byte 0x2++0x00 line.byte 0x00 "HC2,DSI4 HC2 Tile Configuration" group.byte 0x3++0x00 line.byte 0x00 "HC3,DSI4 HC3 Tile Configuration" group.byte 0x4++0x00 line.byte 0x00 "HC4,DSI4 HC4 Tile Configuration" group.byte 0x5++0x00 line.byte 0x00 "HC5,DSI4 HC5 Tile Configuration" group.byte 0x6++0x00 line.byte 0x00 "HC6,DSI4 HC6 Tile Configuration" group.byte 0x7++0x00 line.byte 0x00 "HC7,DSI4 HC7 Tile Configuration" group.byte 0x8++0x00 line.byte 0x00 "HC8,DSI4 HC8 Tile Configuration" group.byte 0x9++0x00 line.byte 0x00 "HC9,DSI4 HC9 Tile Configuration" group.byte 0xA++0x00 line.byte 0x00 "HC10,DSI4 HC10 Tile Configuration" group.byte 0xB++0x00 line.byte 0x00 "HC11,DSI4 HC11 Tile Configuration" group.byte 0xC++0x00 line.byte 0x00 "HC12,DSI4 HC12 Tile Configuration" group.byte 0xD++0x00 line.byte 0x00 "HC13,DSI4 HC13 Tile Configuration" group.byte 0xE++0x00 line.byte 0x00 "HC14,DSI4 HC14 Tile Configuration" group.byte 0xF++0x00 line.byte 0x00 "HC15,DSI4 HC15 Tile Configuration" group.byte 0x10++0x00 line.byte 0x00 "HC16,DSI4 HC16 Tile Configuration" group.byte 0x11++0x00 line.byte 0x00 "HC17,DSI4 HC17 Tile Configuration" group.byte 0x12++0x00 line.byte 0x00 "HC18,DSI4 HC18 Tile Configuration" group.byte 0x13++0x00 line.byte 0x00 "HC19,DSI4 HC19 Tile Configuration" group.byte 0x14++0x00 line.byte 0x00 "HC20,DSI4 HC20 Tile Configuration" group.byte 0x15++0x00 line.byte 0x00 "HC21,DSI4 HC21 Tile Configuration" group.byte 0x16++0x00 line.byte 0x00 "HC22,DSI4 HC22 Tile Configuration" group.byte 0x17++0x00 line.byte 0x00 "HC23,DSI4 HC23 Tile Configuration" group.byte 0x18++0x00 line.byte 0x00 "HC24,DSI4 HC24 Tile Configuration" group.byte 0x19++0x00 line.byte 0x00 "HC25,DSI4 HC25 Tile Configuration" group.byte 0x1A++0x00 line.byte 0x00 "HC26,DSI4 HC26 Tile Configuration" group.byte 0x1B++0x00 line.byte 0x00 "HC27,DSI4 HC27 Tile Configuration" group.byte 0x1C++0x00 line.byte 0x00 "HC28,DSI4 HC28 Tile Configuration" group.byte 0x1D++0x00 line.byte 0x00 "HC29,DSI4 HC29 Tile Configuration" group.byte 0x1E++0x00 line.byte 0x00 "HC30,DSI4 HC30 Tile Configuration" group.byte 0x1F++0x00 line.byte 0x00 "HC31,DSI4 HC31 Tile Configuration" group.byte 0x20++0x00 line.byte 0x00 "HC32,DSI4 HC32 Tile Configuration" group.byte 0x21++0x00 line.byte 0x00 "HC33,DSI4 HC33 Tile Configuration" group.byte 0x22++0x00 line.byte 0x00 "HC34,DSI4 HC34 Tile Configuration" group.byte 0x23++0x00 line.byte 0x00 "HC35,DSI4 HC35 Tile Configuration" group.byte 0x24++0x00 line.byte 0x00 "HC36,DSI4 HC36 Tile Configuration" group.byte 0x25++0x00 line.byte 0x00 "HC37,DSI4 HC37 Tile Configuration" group.byte 0x26++0x00 line.byte 0x00 "HC38,DSI4 HC38 Tile Configuration" group.byte 0x27++0x00 line.byte 0x00 "HC39,DSI4 HC39 Tile Configuration" group.byte 0x28++0x00 line.byte 0x00 "HC40,DSI4 HC40 Tile Configuration" group.byte 0x29++0x00 line.byte 0x00 "HC41,DSI4 HC41 Tile Configuration" group.byte 0x2A++0x00 line.byte 0x00 "HC42,DSI4 HC42 Tile Configuration" group.byte 0x2B++0x00 line.byte 0x00 "HC43,DSI4 HC43 Tile Configuration" group.byte 0x2C++0x00 line.byte 0x00 "HC44,DSI4 HC44 Tile Configuration" group.byte 0x2D++0x00 line.byte 0x00 "HC45,DSI4 HC45 Tile Configuration" group.byte 0x2E++0x00 line.byte 0x00 "HC46,DSI4 HC46 Tile Configuration" group.byte 0x2F++0x00 line.byte 0x00 "HC47,DSI4 HC47 Tile Configuration" group.byte 0x30++0x00 line.byte 0x00 "HC48,DSI4 HC48 Tile Configuration" group.byte 0x31++0x00 line.byte 0x00 "HC49,DSI4 HC49 Tile Configuration" group.byte 0x32++0x00 line.byte 0x00 "HC50,DSI4 HC50 Tile Configuration" group.byte 0x33++0x00 line.byte 0x00 "HC51,DSI4 HC51 Tile Configuration" group.byte 0x34++0x00 line.byte 0x00 "HC52,DSI4 HC52 Tile Configuration" group.byte 0x35++0x00 line.byte 0x00 "HC53,DSI4 HC53 Tile Configuration" group.byte 0x36++0x00 line.byte 0x00 "HC54,DSI4 HC54 Tile Configuration" group.byte 0x37++0x00 line.byte 0x00 "HC55,DSI4 HC55 Tile Configuration" group.byte 0x38++0x00 line.byte 0x00 "HC56,DSI4 HC56 Tile Configuration" group.byte 0x39++0x00 line.byte 0x00 "HC57,DSI4 HC57 Tile Configuration" group.byte 0x3A++0x00 line.byte 0x00 "HC58,DSI4 HC58 Tile Configuration" group.byte 0x3B++0x00 line.byte 0x00 "HC59,DSI4 HC59 Tile Configuration" group.byte 0x3C++0x00 line.byte 0x00 "HC60,DSI4 HC60 Tile Configuration" group.byte 0x3D++0x00 line.byte 0x00 "HC61,DSI4 HC61 Tile Configuration" group.byte 0x3E++0x00 line.byte 0x00 "HC62,DSI4 HC62 Tile Configuration" group.byte 0x3F++0x00 line.byte 0x00 "HC63,DSI4 HC63 Tile Configuration" group.byte 0x40++0x00 line.byte 0x00 "HC64,DSI4 HC64 Tile Configuration" group.byte 0x41++0x00 line.byte 0x00 "HC65,DSI4 HC65 Tile Configuration" group.byte 0x42++0x00 line.byte 0x00 "HC66,DSI4 HC66 Tile Configuration" group.byte 0x43++0x00 line.byte 0x00 "HC67,DSI4 HC67 Tile Configuration" group.byte 0x44++0x00 line.byte 0x00 "HC68,DSI4 HC68 Tile Configuration" group.byte 0x45++0x00 line.byte 0x00 "HC69,DSI4 HC69 Tile Configuration" group.byte 0x46++0x00 line.byte 0x00 "HC70,DSI4 HC70 Tile Configuration" group.byte 0x47++0x00 line.byte 0x00 "HC71,DSI4 HC71 Tile Configuration" group.byte 0x48++0x00 line.byte 0x00 "HC72,DSI4 HC72 Tile Configuration" group.byte 0x49++0x00 line.byte 0x00 "HC73,DSI4 HC73 Tile Configuration" group.byte 0x4A++0x00 line.byte 0x00 "HC74,DSI4 HC74 Tile Configuration" group.byte 0x4B++0x00 line.byte 0x00 "HC75,DSI4 HC75 Tile Configuration" group.byte 0x4C++0x00 line.byte 0x00 "HC76,DSI4 HC76 Tile Configuration" group.byte 0x4D++0x00 line.byte 0x00 "HC77,DSI4 HC77 Tile Configuration" group.byte 0x4E++0x00 line.byte 0x00 "HC78,DSI4 HC78 Tile Configuration" group.byte 0x4F++0x00 line.byte 0x00 "HC79,DSI4 HC79 Tile Configuration" group.byte 0x50++0x00 line.byte 0x00 "HC80,DSI4 HC80 Tile Configuration" group.byte 0x51++0x00 line.byte 0x00 "HC81,DSI4 HC81 Tile Configuration" group.byte 0x52++0x00 line.byte 0x00 "HC82,DSI4 HC82 Tile Configuration" group.byte 0x53++0x00 line.byte 0x00 "HC83,DSI4 HC83 Tile Configuration" group.byte 0x54++0x00 line.byte 0x00 "HC84,DSI4 HC84 Tile Configuration" group.byte 0x55++0x00 line.byte 0x00 "HC85,DSI4 HC85 Tile Configuration" group.byte 0x56++0x00 line.byte 0x00 "HC86,DSI4 HC86 Tile Configuration" group.byte 0x57++0x00 line.byte 0x00 "HC87,DSI4 HC87 Tile Configuration" group.byte 0x58++0x00 line.byte 0x00 "HC88,DSI4 HC88 Tile Configuration" group.byte 0x59++0x00 line.byte 0x00 "HC89,DSI4 HC89 Tile Configuration" group.byte 0x5A++0x00 line.byte 0x00 "HC90,DSI4 HC90 Tile Configuration" group.byte 0x5B++0x00 line.byte 0x00 "HC91,DSI4 HC91 Tile Configuration" group.byte 0x5C++0x00 line.byte 0x00 "HC92,DSI4 HC92 Tile Configuration" group.byte 0x5D++0x00 line.byte 0x00 "HC93,DSI4 HC93 Tile Configuration" group.byte 0x5E++0x00 line.byte 0x00 "HC94,DSI4 HC94 Tile Configuration" group.byte 0x5F++0x00 line.byte 0x00 "HC95,DSI4 HC95 Tile Configuration" group.byte 0x60++0x00 line.byte 0x00 "HC96,DSI4 HC96 Tile Configuration" group.byte 0x61++0x00 line.byte 0x00 "HC97,DSI4 HC97 Tile Configuration" group.byte 0x62++0x00 line.byte 0x00 "HC98,DSI4 HC98 Tile Configuration" group.byte 0x63++0x00 line.byte 0x00 "HC99,DSI4 HC99 Tile Configuration" group.byte 0x64++0x00 line.byte 0x00 "HC100,DSI4 HC100 Tile Configuration" group.byte 0x65++0x00 line.byte 0x00 "HC101,DSI4 HC101 Tile Configuration" group.byte 0x66++0x00 line.byte 0x00 "HC102,DSI4 HC102 Tile Configuration" group.byte 0x67++0x00 line.byte 0x00 "HC103,DSI4 HC103 Tile Configuration" group.byte 0x68++0x00 line.byte 0x00 "HC104,DSI4 HC104 Tile Configuration" group.byte 0x69++0x00 line.byte 0x00 "HC105,DSI4 HC105 Tile Configuration" group.byte 0x6A++0x00 line.byte 0x00 "HC106,DSI4 HC106 Tile Configuration" group.byte 0x6B++0x00 line.byte 0x00 "HC107,DSI4 HC107 Tile Configuration" group.byte 0x6C++0x00 line.byte 0x00 "HC108,DSI4 HC108 Tile Configuration" group.byte 0x6D++0x00 line.byte 0x00 "HC109,DSI4 HC109 Tile Configuration" group.byte 0x6E++0x00 line.byte 0x00 "HC110,DSI4 HC110 Tile Configuration" group.byte 0x6F++0x00 line.byte 0x00 "HC111,DSI4 HC111 Tile Configuration" group.byte 0x70++0x00 line.byte 0x00 "HC112,DSI4 HC112 Tile Configuration" group.byte 0x71++0x00 line.byte 0x00 "HC113,DSI4 HC113 Tile Configuration" group.byte 0x72++0x00 line.byte 0x00 "HC114,DSI4 HC114 Tile Configuration" group.byte 0x73++0x00 line.byte 0x00 "HC115,DSI4 HC115 Tile Configuration" group.byte 0x74++0x00 line.byte 0x00 "HC116,DSI4 HC116 Tile Configuration" group.byte 0x75++0x00 line.byte 0x00 "HC117,DSI4 HC117 Tile Configuration" group.byte 0x76++0x00 line.byte 0x00 "HC118,DSI4 HC118 Tile Configuration" group.byte 0x77++0x00 line.byte 0x00 "HC119,DSI4 HC119 Tile Configuration" group.byte 0x78++0x00 line.byte 0x00 "HC120,DSI4 HC120 Tile Configuration" group.byte 0x79++0x00 line.byte 0x00 "HC121,DSI4 HC121 Tile Configuration" group.byte 0x7A++0x00 line.byte 0x00 "HC122,DSI4 HC122 Tile Configuration" group.byte 0x7B++0x00 line.byte 0x00 "HC123,DSI4 HC123 Tile Configuration" group.byte 0x7C++0x00 line.byte 0x00 "HC124,DSI4 HC124 Tile Configuration" group.byte 0x7D++0x00 line.byte 0x00 "HC125,DSI4 HC125 Tile Configuration" group.byte 0x7E++0x00 line.byte 0x00 "HC126,DSI4 HC126 Tile Configuration" group.byte 0x7F++0x00 line.byte 0x00 "HC127,DSI4 HC127 Tile Configuration" group.byte 0x80++0x00 line.byte 0x00 "HV_L0,DSI4 HV0 Tile Configuration" group.byte 0x81++0x00 line.byte 0x00 "HV_L1,DSI4 HV1 Tile Configuration" group.byte 0x82++0x00 line.byte 0x00 "HV_L2,DSI4 HV2 Tile Configuration" group.byte 0x83++0x00 line.byte 0x00 "HV_L3,DSI4 HV3 Tile Configuration" group.byte 0x84++0x00 line.byte 0x00 "HV_L4,DSI4 HV4 Tile Configuration" group.byte 0x85++0x00 line.byte 0x00 "HV_L5,DSI4 HV5 Tile Configuration" group.byte 0x86++0x00 line.byte 0x00 "HV_L6,DSI4 HV6 Tile Configuration" group.byte 0x87++0x00 line.byte 0x00 "HV_L7,DSI4 HV7 Tile Configuration" group.byte 0x88++0x00 line.byte 0x00 "HV_L8,DSI4 HV8 Tile Configuration" group.byte 0x89++0x00 line.byte 0x00 "HV_L9,DSI4 HV9 Tile Configuration" group.byte 0x8A++0x00 line.byte 0x00 "HV_L10,DSI4 HV10 Tile Configuration" group.byte 0x8B++0x00 line.byte 0x00 "HV_L11,DSI4 HV11 Tile Configuration" group.byte 0x8C++0x00 line.byte 0x00 "HV_L12,DSI4 HV12 Tile Configuration" group.byte 0x8D++0x00 line.byte 0x00 "HV_L13,DSI4 HV13 Tile Configuration" group.byte 0x8E++0x00 line.byte 0x00 "HV_L14,DSI4 HV14 Tile Configuration" group.byte 0x8F++0x00 line.byte 0x00 "HV_L15,DSI4 HV15 Tile Configuration" group.byte 0x90++0x00 line.byte 0x00 "HS0,DSI4 HS0 Tile Configuration" group.byte 0x91++0x00 line.byte 0x00 "HS1,DSI4 HS1 Tile Configuration" group.byte 0x92++0x00 line.byte 0x00 "HS2,DSI4 HS2 Tile Configuration" group.byte 0x93++0x00 line.byte 0x00 "HS3,DSI4 HS3 Tile Configuration" group.byte 0x94++0x00 line.byte 0x00 "HS4,DSI4 HS4 Tile Configuration" group.byte 0x95++0x00 line.byte 0x00 "HS5,DSI4 HS5 Tile Configuration" group.byte 0x96++0x00 line.byte 0x00 "HS6,DSI4 HS6 Tile Configuration" group.byte 0x97++0x00 line.byte 0x00 "HS7,DSI4 HS7 Tile Configuration" group.byte 0x98++0x00 line.byte 0x00 "HS8,DSI4 HS8 Tile Configuration" group.byte 0x99++0x00 line.byte 0x00 "HS9,DSI4 HS9 Tile Configuration" group.byte 0x9A++0x00 line.byte 0x00 "HS10,DSI4 HS10 Tile Configuration" group.byte 0x9B++0x00 line.byte 0x00 "HS11,DSI4 HS11 Tile Configuration" group.byte 0x9C++0x00 line.byte 0x00 "HS12,DSI4 HS12 Tile Configuration" group.byte 0x9D++0x00 line.byte 0x00 "HS13,DSI4 HS13 Tile Configuration" group.byte 0x9E++0x00 line.byte 0x00 "HS14,DSI4 HS14 Tile Configuration" group.byte 0x9F++0x00 line.byte 0x00 "HS15,DSI4 HS15 Tile Configuration" group.byte 0xA0++0x00 line.byte 0x00 "HS16,DSI4 HS16 Tile Configuration" group.byte 0xA1++0x00 line.byte 0x00 "HS17,DSI4 HS17 Tile Configuration" group.byte 0xA2++0x00 line.byte 0x00 "HS18,DSI4 HS18 Tile Configuration" group.byte 0xA3++0x00 line.byte 0x00 "HS19,DSI4 HS19 Tile Configuration" group.byte 0xA4++0x00 line.byte 0x00 "HS20,DSI4 HS20 Tile Configuration" group.byte 0xA5++0x00 line.byte 0x00 "HS21,DSI4 HS21 Tile Configuration" group.byte 0xA6++0x00 line.byte 0x00 "HS22,DSI4 HS22 Tile Configuration" group.byte 0xA7++0x00 line.byte 0x00 "HS23,DSI4 HS23 Tile Configuration" group.byte 0xA8++0x00 line.byte 0x00 "HV_R0,DSI4 HV0 Tile Configuration" group.byte 0xA9++0x00 line.byte 0x00 "HV_R1,DSI4 HV1 Tile Configuration" group.byte 0xAA++0x00 line.byte 0x00 "HV_R2,DSI4 HV2 Tile Configuration" group.byte 0xAB++0x00 line.byte 0x00 "HV_R3,DSI4 HV3 Tile Configuration" group.byte 0xAC++0x00 line.byte 0x00 "HV_R4,DSI4 HV4 Tile Configuration" group.byte 0xAD++0x00 line.byte 0x00 "HV_R5,DSI4 HV5 Tile Configuration" group.byte 0xAE++0x00 line.byte 0x00 "HV_R6,DSI4 HV6 Tile Configuration" group.byte 0xAF++0x00 line.byte 0x00 "HV_R7,DSI4 HV7 Tile Configuration" group.byte 0xB0++0x00 line.byte 0x00 "HV_R8,DSI4 HV8 Tile Configuration" group.byte 0xB1++0x00 line.byte 0x00 "HV_R9,DSI4 HV9 Tile Configuration" group.byte 0xB2++0x00 line.byte 0x00 "HV_R10,DSI4 HV10 Tile Configuration" group.byte 0xB3++0x00 line.byte 0x00 "HV_R11,DSI4 HV11 Tile Configuration" group.byte 0xB4++0x00 line.byte 0x00 "HV_R12,DSI4 HV12 Tile Configuration" group.byte 0xB5++0x00 line.byte 0x00 "HV_R13,DSI4 HV13 Tile Configuration" group.byte 0xB6++0x00 line.byte 0x00 "HV_R14,DSI4 HV14 Tile Configuration" group.byte 0xB7++0x00 line.byte 0x00 "HV_R15,DSI4 HV15 Tile Configuration" group.byte 0xC0++0x00 line.byte 0x00 "DSIINP0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC2++0x00 line.byte 0x00 "DSIINP1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC4++0x00 line.byte 0x00 "DSIINP2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC6++0x00 line.byte 0x00 "DSIINP3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC8++0x00 line.byte 0x00 "DSIINP4,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCA++0x00 line.byte 0x00 "DSIINP5,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCC++0x00 line.byte 0x00 "DSIOUTP0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCE++0x00 line.byte 0x00 "DSIOUTP1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD0++0x00 line.byte 0x00 "DSIOUTP2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD2++0x00 line.byte 0x00 "DSIOUTP3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD4++0x00 line.byte 0x00 "DSIOUTT0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD6++0x00 line.byte 0x00 "DSIOUTT1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD8++0x00 line.byte 0x00 "DSIOUTT2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDA++0x00 line.byte 0x00 "DSIOUTT3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDC++0x00 line.byte 0x00 "DSIOUTT4,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDE++0x00 line.byte 0x00 "DSIOUTT5,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xE0++0x00 line.byte 0x00 "VS0,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE2++0x00 line.byte 0x00 "VS1,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE4++0x00 line.byte 0x00 "VS2,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE6++0x00 line.byte 0x00 "VS3,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE8++0x00 line.byte 0x00 "VS4,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEA++0x00 line.byte 0x00 "VS5,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEC++0x00 line.byte 0x00 "VS6,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEE++0x00 line.byte 0x00 "VS7,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" width 0x0B tree.end tree "DSI 5" base ad:0x40014500 width 10. group.byte 0x0++0x00 line.byte 0x00 "HC0,DSI5 HC0 Tile Configuration" group.byte 0x1++0x00 line.byte 0x00 "HC1,DSI5 HC1 Tile Configuration" group.byte 0x2++0x00 line.byte 0x00 "HC2,DSI5 HC2 Tile Configuration" group.byte 0x3++0x00 line.byte 0x00 "HC3,DSI5 HC3 Tile Configuration" group.byte 0x4++0x00 line.byte 0x00 "HC4,DSI5 HC4 Tile Configuration" group.byte 0x5++0x00 line.byte 0x00 "HC5,DSI5 HC5 Tile Configuration" group.byte 0x6++0x00 line.byte 0x00 "HC6,DSI5 HC6 Tile Configuration" group.byte 0x7++0x00 line.byte 0x00 "HC7,DSI5 HC7 Tile Configuration" group.byte 0x8++0x00 line.byte 0x00 "HC8,DSI5 HC8 Tile Configuration" group.byte 0x9++0x00 line.byte 0x00 "HC9,DSI5 HC9 Tile Configuration" group.byte 0xA++0x00 line.byte 0x00 "HC10,DSI5 HC10 Tile Configuration" group.byte 0xB++0x00 line.byte 0x00 "HC11,DSI5 HC11 Tile Configuration" group.byte 0xC++0x00 line.byte 0x00 "HC12,DSI5 HC12 Tile Configuration" group.byte 0xD++0x00 line.byte 0x00 "HC13,DSI5 HC13 Tile Configuration" group.byte 0xE++0x00 line.byte 0x00 "HC14,DSI5 HC14 Tile Configuration" group.byte 0xF++0x00 line.byte 0x00 "HC15,DSI5 HC15 Tile Configuration" group.byte 0x10++0x00 line.byte 0x00 "HC16,DSI5 HC16 Tile Configuration" group.byte 0x11++0x00 line.byte 0x00 "HC17,DSI5 HC17 Tile Configuration" group.byte 0x12++0x00 line.byte 0x00 "HC18,DSI5 HC18 Tile Configuration" group.byte 0x13++0x00 line.byte 0x00 "HC19,DSI5 HC19 Tile Configuration" group.byte 0x14++0x00 line.byte 0x00 "HC20,DSI5 HC20 Tile Configuration" group.byte 0x15++0x00 line.byte 0x00 "HC21,DSI5 HC21 Tile Configuration" group.byte 0x16++0x00 line.byte 0x00 "HC22,DSI5 HC22 Tile Configuration" group.byte 0x17++0x00 line.byte 0x00 "HC23,DSI5 HC23 Tile Configuration" group.byte 0x18++0x00 line.byte 0x00 "HC24,DSI5 HC24 Tile Configuration" group.byte 0x19++0x00 line.byte 0x00 "HC25,DSI5 HC25 Tile Configuration" group.byte 0x1A++0x00 line.byte 0x00 "HC26,DSI5 HC26 Tile Configuration" group.byte 0x1B++0x00 line.byte 0x00 "HC27,DSI5 HC27 Tile Configuration" group.byte 0x1C++0x00 line.byte 0x00 "HC28,DSI5 HC28 Tile Configuration" group.byte 0x1D++0x00 line.byte 0x00 "HC29,DSI5 HC29 Tile Configuration" group.byte 0x1E++0x00 line.byte 0x00 "HC30,DSI5 HC30 Tile Configuration" group.byte 0x1F++0x00 line.byte 0x00 "HC31,DSI5 HC31 Tile Configuration" group.byte 0x20++0x00 line.byte 0x00 "HC32,DSI5 HC32 Tile Configuration" group.byte 0x21++0x00 line.byte 0x00 "HC33,DSI5 HC33 Tile Configuration" group.byte 0x22++0x00 line.byte 0x00 "HC34,DSI5 HC34 Tile Configuration" group.byte 0x23++0x00 line.byte 0x00 "HC35,DSI5 HC35 Tile Configuration" group.byte 0x24++0x00 line.byte 0x00 "HC36,DSI5 HC36 Tile Configuration" group.byte 0x25++0x00 line.byte 0x00 "HC37,DSI5 HC37 Tile Configuration" group.byte 0x26++0x00 line.byte 0x00 "HC38,DSI5 HC38 Tile Configuration" group.byte 0x27++0x00 line.byte 0x00 "HC39,DSI5 HC39 Tile Configuration" group.byte 0x28++0x00 line.byte 0x00 "HC40,DSI5 HC40 Tile Configuration" group.byte 0x29++0x00 line.byte 0x00 "HC41,DSI5 HC41 Tile Configuration" group.byte 0x2A++0x00 line.byte 0x00 "HC42,DSI5 HC42 Tile Configuration" group.byte 0x2B++0x00 line.byte 0x00 "HC43,DSI5 HC43 Tile Configuration" group.byte 0x2C++0x00 line.byte 0x00 "HC44,DSI5 HC44 Tile Configuration" group.byte 0x2D++0x00 line.byte 0x00 "HC45,DSI5 HC45 Tile Configuration" group.byte 0x2E++0x00 line.byte 0x00 "HC46,DSI5 HC46 Tile Configuration" group.byte 0x2F++0x00 line.byte 0x00 "HC47,DSI5 HC47 Tile Configuration" group.byte 0x30++0x00 line.byte 0x00 "HC48,DSI5 HC48 Tile Configuration" group.byte 0x31++0x00 line.byte 0x00 "HC49,DSI5 HC49 Tile Configuration" group.byte 0x32++0x00 line.byte 0x00 "HC50,DSI5 HC50 Tile Configuration" group.byte 0x33++0x00 line.byte 0x00 "HC51,DSI5 HC51 Tile Configuration" group.byte 0x34++0x00 line.byte 0x00 "HC52,DSI5 HC52 Tile Configuration" group.byte 0x35++0x00 line.byte 0x00 "HC53,DSI5 HC53 Tile Configuration" group.byte 0x36++0x00 line.byte 0x00 "HC54,DSI5 HC54 Tile Configuration" group.byte 0x37++0x00 line.byte 0x00 "HC55,DSI5 HC55 Tile Configuration" group.byte 0x38++0x00 line.byte 0x00 "HC56,DSI5 HC56 Tile Configuration" group.byte 0x39++0x00 line.byte 0x00 "HC57,DSI5 HC57 Tile Configuration" group.byte 0x3A++0x00 line.byte 0x00 "HC58,DSI5 HC58 Tile Configuration" group.byte 0x3B++0x00 line.byte 0x00 "HC59,DSI5 HC59 Tile Configuration" group.byte 0x3C++0x00 line.byte 0x00 "HC60,DSI5 HC60 Tile Configuration" group.byte 0x3D++0x00 line.byte 0x00 "HC61,DSI5 HC61 Tile Configuration" group.byte 0x3E++0x00 line.byte 0x00 "HC62,DSI5 HC62 Tile Configuration" group.byte 0x3F++0x00 line.byte 0x00 "HC63,DSI5 HC63 Tile Configuration" group.byte 0x40++0x00 line.byte 0x00 "HC64,DSI5 HC64 Tile Configuration" group.byte 0x41++0x00 line.byte 0x00 "HC65,DSI5 HC65 Tile Configuration" group.byte 0x42++0x00 line.byte 0x00 "HC66,DSI5 HC66 Tile Configuration" group.byte 0x43++0x00 line.byte 0x00 "HC67,DSI5 HC67 Tile Configuration" group.byte 0x44++0x00 line.byte 0x00 "HC68,DSI5 HC68 Tile Configuration" group.byte 0x45++0x00 line.byte 0x00 "HC69,DSI5 HC69 Tile Configuration" group.byte 0x46++0x00 line.byte 0x00 "HC70,DSI5 HC70 Tile Configuration" group.byte 0x47++0x00 line.byte 0x00 "HC71,DSI5 HC71 Tile Configuration" group.byte 0x48++0x00 line.byte 0x00 "HC72,DSI5 HC72 Tile Configuration" group.byte 0x49++0x00 line.byte 0x00 "HC73,DSI5 HC73 Tile Configuration" group.byte 0x4A++0x00 line.byte 0x00 "HC74,DSI5 HC74 Tile Configuration" group.byte 0x4B++0x00 line.byte 0x00 "HC75,DSI5 HC75 Tile Configuration" group.byte 0x4C++0x00 line.byte 0x00 "HC76,DSI5 HC76 Tile Configuration" group.byte 0x4D++0x00 line.byte 0x00 "HC77,DSI5 HC77 Tile Configuration" group.byte 0x4E++0x00 line.byte 0x00 "HC78,DSI5 HC78 Tile Configuration" group.byte 0x4F++0x00 line.byte 0x00 "HC79,DSI5 HC79 Tile Configuration" group.byte 0x50++0x00 line.byte 0x00 "HC80,DSI5 HC80 Tile Configuration" group.byte 0x51++0x00 line.byte 0x00 "HC81,DSI5 HC81 Tile Configuration" group.byte 0x52++0x00 line.byte 0x00 "HC82,DSI5 HC82 Tile Configuration" group.byte 0x53++0x00 line.byte 0x00 "HC83,DSI5 HC83 Tile Configuration" group.byte 0x54++0x00 line.byte 0x00 "HC84,DSI5 HC84 Tile Configuration" group.byte 0x55++0x00 line.byte 0x00 "HC85,DSI5 HC85 Tile Configuration" group.byte 0x56++0x00 line.byte 0x00 "HC86,DSI5 HC86 Tile Configuration" group.byte 0x57++0x00 line.byte 0x00 "HC87,DSI5 HC87 Tile Configuration" group.byte 0x58++0x00 line.byte 0x00 "HC88,DSI5 HC88 Tile Configuration" group.byte 0x59++0x00 line.byte 0x00 "HC89,DSI5 HC89 Tile Configuration" group.byte 0x5A++0x00 line.byte 0x00 "HC90,DSI5 HC90 Tile Configuration" group.byte 0x5B++0x00 line.byte 0x00 "HC91,DSI5 HC91 Tile Configuration" group.byte 0x5C++0x00 line.byte 0x00 "HC92,DSI5 HC92 Tile Configuration" group.byte 0x5D++0x00 line.byte 0x00 "HC93,DSI5 HC93 Tile Configuration" group.byte 0x5E++0x00 line.byte 0x00 "HC94,DSI5 HC94 Tile Configuration" group.byte 0x5F++0x00 line.byte 0x00 "HC95,DSI5 HC95 Tile Configuration" group.byte 0x60++0x00 line.byte 0x00 "HC96,DSI5 HC96 Tile Configuration" group.byte 0x61++0x00 line.byte 0x00 "HC97,DSI5 HC97 Tile Configuration" group.byte 0x62++0x00 line.byte 0x00 "HC98,DSI5 HC98 Tile Configuration" group.byte 0x63++0x00 line.byte 0x00 "HC99,DSI5 HC99 Tile Configuration" group.byte 0x64++0x00 line.byte 0x00 "HC100,DSI5 HC100 Tile Configuration" group.byte 0x65++0x00 line.byte 0x00 "HC101,DSI5 HC101 Tile Configuration" group.byte 0x66++0x00 line.byte 0x00 "HC102,DSI5 HC102 Tile Configuration" group.byte 0x67++0x00 line.byte 0x00 "HC103,DSI5 HC103 Tile Configuration" group.byte 0x68++0x00 line.byte 0x00 "HC104,DSI5 HC104 Tile Configuration" group.byte 0x69++0x00 line.byte 0x00 "HC105,DSI5 HC105 Tile Configuration" group.byte 0x6A++0x00 line.byte 0x00 "HC106,DSI5 HC106 Tile Configuration" group.byte 0x6B++0x00 line.byte 0x00 "HC107,DSI5 HC107 Tile Configuration" group.byte 0x6C++0x00 line.byte 0x00 "HC108,DSI5 HC108 Tile Configuration" group.byte 0x6D++0x00 line.byte 0x00 "HC109,DSI5 HC109 Tile Configuration" group.byte 0x6E++0x00 line.byte 0x00 "HC110,DSI5 HC110 Tile Configuration" group.byte 0x6F++0x00 line.byte 0x00 "HC111,DSI5 HC111 Tile Configuration" group.byte 0x70++0x00 line.byte 0x00 "HC112,DSI5 HC112 Tile Configuration" group.byte 0x71++0x00 line.byte 0x00 "HC113,DSI5 HC113 Tile Configuration" group.byte 0x72++0x00 line.byte 0x00 "HC114,DSI5 HC114 Tile Configuration" group.byte 0x73++0x00 line.byte 0x00 "HC115,DSI5 HC115 Tile Configuration" group.byte 0x74++0x00 line.byte 0x00 "HC116,DSI5 HC116 Tile Configuration" group.byte 0x75++0x00 line.byte 0x00 "HC117,DSI5 HC117 Tile Configuration" group.byte 0x76++0x00 line.byte 0x00 "HC118,DSI5 HC118 Tile Configuration" group.byte 0x77++0x00 line.byte 0x00 "HC119,DSI5 HC119 Tile Configuration" group.byte 0x78++0x00 line.byte 0x00 "HC120,DSI5 HC120 Tile Configuration" group.byte 0x79++0x00 line.byte 0x00 "HC121,DSI5 HC121 Tile Configuration" group.byte 0x7A++0x00 line.byte 0x00 "HC122,DSI5 HC122 Tile Configuration" group.byte 0x7B++0x00 line.byte 0x00 "HC123,DSI5 HC123 Tile Configuration" group.byte 0x7C++0x00 line.byte 0x00 "HC124,DSI5 HC124 Tile Configuration" group.byte 0x7D++0x00 line.byte 0x00 "HC125,DSI5 HC125 Tile Configuration" group.byte 0x7E++0x00 line.byte 0x00 "HC126,DSI5 HC126 Tile Configuration" group.byte 0x7F++0x00 line.byte 0x00 "HC127,DSI5 HC127 Tile Configuration" group.byte 0x80++0x00 line.byte 0x00 "HV_L0,DSI5 HV0 Tile Configuration" group.byte 0x81++0x00 line.byte 0x00 "HV_L1,DSI5 HV1 Tile Configuration" group.byte 0x82++0x00 line.byte 0x00 "HV_L2,DSI5 HV2 Tile Configuration" group.byte 0x83++0x00 line.byte 0x00 "HV_L3,DSI5 HV3 Tile Configuration" group.byte 0x84++0x00 line.byte 0x00 "HV_L4,DSI5 HV4 Tile Configuration" group.byte 0x85++0x00 line.byte 0x00 "HV_L5,DSI5 HV5 Tile Configuration" group.byte 0x86++0x00 line.byte 0x00 "HV_L6,DSI5 HV6 Tile Configuration" group.byte 0x87++0x00 line.byte 0x00 "HV_L7,DSI5 HV7 Tile Configuration" group.byte 0x88++0x00 line.byte 0x00 "HV_L8,DSI5 HV8 Tile Configuration" group.byte 0x89++0x00 line.byte 0x00 "HV_L9,DSI5 HV9 Tile Configuration" group.byte 0x8A++0x00 line.byte 0x00 "HV_L10,DSI5 HV10 Tile Configuration" group.byte 0x8B++0x00 line.byte 0x00 "HV_L11,DSI5 HV11 Tile Configuration" group.byte 0x8C++0x00 line.byte 0x00 "HV_L12,DSI5 HV12 Tile Configuration" group.byte 0x8D++0x00 line.byte 0x00 "HV_L13,DSI5 HV13 Tile Configuration" group.byte 0x8E++0x00 line.byte 0x00 "HV_L14,DSI5 HV14 Tile Configuration" group.byte 0x8F++0x00 line.byte 0x00 "HV_L15,DSI5 HV15 Tile Configuration" group.byte 0x90++0x00 line.byte 0x00 "HS0,DSI5 HS0 Tile Configuration" group.byte 0x91++0x00 line.byte 0x00 "HS1,DSI5 HS1 Tile Configuration" group.byte 0x92++0x00 line.byte 0x00 "HS2,DSI5 HS2 Tile Configuration" group.byte 0x93++0x00 line.byte 0x00 "HS3,DSI5 HS3 Tile Configuration" group.byte 0x94++0x00 line.byte 0x00 "HS4,DSI5 HS4 Tile Configuration" group.byte 0x95++0x00 line.byte 0x00 "HS5,DSI5 HS5 Tile Configuration" group.byte 0x96++0x00 line.byte 0x00 "HS6,DSI5 HS6 Tile Configuration" group.byte 0x97++0x00 line.byte 0x00 "HS7,DSI5 HS7 Tile Configuration" group.byte 0x98++0x00 line.byte 0x00 "HS8,DSI5 HS8 Tile Configuration" group.byte 0x99++0x00 line.byte 0x00 "HS9,DSI5 HS9 Tile Configuration" group.byte 0x9A++0x00 line.byte 0x00 "HS10,DSI5 HS10 Tile Configuration" group.byte 0x9B++0x00 line.byte 0x00 "HS11,DSI5 HS11 Tile Configuration" group.byte 0x9C++0x00 line.byte 0x00 "HS12,DSI5 HS12 Tile Configuration" group.byte 0x9D++0x00 line.byte 0x00 "HS13,DSI5 HS13 Tile Configuration" group.byte 0x9E++0x00 line.byte 0x00 "HS14,DSI5 HS14 Tile Configuration" group.byte 0x9F++0x00 line.byte 0x00 "HS15,DSI5 HS15 Tile Configuration" group.byte 0xA0++0x00 line.byte 0x00 "HS16,DSI5 HS16 Tile Configuration" group.byte 0xA1++0x00 line.byte 0x00 "HS17,DSI5 HS17 Tile Configuration" group.byte 0xA2++0x00 line.byte 0x00 "HS18,DSI5 HS18 Tile Configuration" group.byte 0xA3++0x00 line.byte 0x00 "HS19,DSI5 HS19 Tile Configuration" group.byte 0xA4++0x00 line.byte 0x00 "HS20,DSI5 HS20 Tile Configuration" group.byte 0xA5++0x00 line.byte 0x00 "HS21,DSI5 HS21 Tile Configuration" group.byte 0xA6++0x00 line.byte 0x00 "HS22,DSI5 HS22 Tile Configuration" group.byte 0xA7++0x00 line.byte 0x00 "HS23,DSI5 HS23 Tile Configuration" group.byte 0xA8++0x00 line.byte 0x00 "HV_R0,DSI5 HV0 Tile Configuration" group.byte 0xA9++0x00 line.byte 0x00 "HV_R1,DSI5 HV1 Tile Configuration" group.byte 0xAA++0x00 line.byte 0x00 "HV_R2,DSI5 HV2 Tile Configuration" group.byte 0xAB++0x00 line.byte 0x00 "HV_R3,DSI5 HV3 Tile Configuration" group.byte 0xAC++0x00 line.byte 0x00 "HV_R4,DSI5 HV4 Tile Configuration" group.byte 0xAD++0x00 line.byte 0x00 "HV_R5,DSI5 HV5 Tile Configuration" group.byte 0xAE++0x00 line.byte 0x00 "HV_R6,DSI5 HV6 Tile Configuration" group.byte 0xAF++0x00 line.byte 0x00 "HV_R7,DSI5 HV7 Tile Configuration" group.byte 0xB0++0x00 line.byte 0x00 "HV_R8,DSI5 HV8 Tile Configuration" group.byte 0xB1++0x00 line.byte 0x00 "HV_R9,DSI5 HV9 Tile Configuration" group.byte 0xB2++0x00 line.byte 0x00 "HV_R10,DSI5 HV10 Tile Configuration" group.byte 0xB3++0x00 line.byte 0x00 "HV_R11,DSI5 HV11 Tile Configuration" group.byte 0xB4++0x00 line.byte 0x00 "HV_R12,DSI5 HV12 Tile Configuration" group.byte 0xB5++0x00 line.byte 0x00 "HV_R13,DSI5 HV13 Tile Configuration" group.byte 0xB6++0x00 line.byte 0x00 "HV_R14,DSI5 HV14 Tile Configuration" group.byte 0xB7++0x00 line.byte 0x00 "HV_R15,DSI5 HV15 Tile Configuration" group.byte 0xC0++0x00 line.byte 0x00 "DSIINP0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC2++0x00 line.byte 0x00 "DSIINP1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC4++0x00 line.byte 0x00 "DSIINP2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC6++0x00 line.byte 0x00 "DSIINP3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC8++0x00 line.byte 0x00 "DSIINP4,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCA++0x00 line.byte 0x00 "DSIINP5,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCC++0x00 line.byte 0x00 "DSIOUTP0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCE++0x00 line.byte 0x00 "DSIOUTP1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD0++0x00 line.byte 0x00 "DSIOUTP2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD2++0x00 line.byte 0x00 "DSIOUTP3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD4++0x00 line.byte 0x00 "DSIOUTT0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD6++0x00 line.byte 0x00 "DSIOUTT1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD8++0x00 line.byte 0x00 "DSIOUTT2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDA++0x00 line.byte 0x00 "DSIOUTT3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDC++0x00 line.byte 0x00 "DSIOUTT4,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDE++0x00 line.byte 0x00 "DSIOUTT5,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xE0++0x00 line.byte 0x00 "VS0,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE2++0x00 line.byte 0x00 "VS1,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE4++0x00 line.byte 0x00 "VS2,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE6++0x00 line.byte 0x00 "VS3,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE8++0x00 line.byte 0x00 "VS4,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEA++0x00 line.byte 0x00 "VS5,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEC++0x00 line.byte 0x00 "VS6,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEE++0x00 line.byte 0x00 "VS7,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" width 0x0B tree.end tree "DSI 6" base ad:0x40014600 width 10. group.byte 0x0++0x00 line.byte 0x00 "HC0,DSI6 HC0 Tile Configuration" group.byte 0x1++0x00 line.byte 0x00 "HC1,DSI6 HC1 Tile Configuration" group.byte 0x2++0x00 line.byte 0x00 "HC2,DSI6 HC2 Tile Configuration" group.byte 0x3++0x00 line.byte 0x00 "HC3,DSI6 HC3 Tile Configuration" group.byte 0x4++0x00 line.byte 0x00 "HC4,DSI6 HC4 Tile Configuration" group.byte 0x5++0x00 line.byte 0x00 "HC5,DSI6 HC5 Tile Configuration" group.byte 0x6++0x00 line.byte 0x00 "HC6,DSI6 HC6 Tile Configuration" group.byte 0x7++0x00 line.byte 0x00 "HC7,DSI6 HC7 Tile Configuration" group.byte 0x8++0x00 line.byte 0x00 "HC8,DSI6 HC8 Tile Configuration" group.byte 0x9++0x00 line.byte 0x00 "HC9,DSI6 HC9 Tile Configuration" group.byte 0xA++0x00 line.byte 0x00 "HC10,DSI6 HC10 Tile Configuration" group.byte 0xB++0x00 line.byte 0x00 "HC11,DSI6 HC11 Tile Configuration" group.byte 0xC++0x00 line.byte 0x00 "HC12,DSI6 HC12 Tile Configuration" group.byte 0xD++0x00 line.byte 0x00 "HC13,DSI6 HC13 Tile Configuration" group.byte 0xE++0x00 line.byte 0x00 "HC14,DSI6 HC14 Tile Configuration" group.byte 0xF++0x00 line.byte 0x00 "HC15,DSI6 HC15 Tile Configuration" group.byte 0x10++0x00 line.byte 0x00 "HC16,DSI6 HC16 Tile Configuration" group.byte 0x11++0x00 line.byte 0x00 "HC17,DSI6 HC17 Tile Configuration" group.byte 0x12++0x00 line.byte 0x00 "HC18,DSI6 HC18 Tile Configuration" group.byte 0x13++0x00 line.byte 0x00 "HC19,DSI6 HC19 Tile Configuration" group.byte 0x14++0x00 line.byte 0x00 "HC20,DSI6 HC20 Tile Configuration" group.byte 0x15++0x00 line.byte 0x00 "HC21,DSI6 HC21 Tile Configuration" group.byte 0x16++0x00 line.byte 0x00 "HC22,DSI6 HC22 Tile Configuration" group.byte 0x17++0x00 line.byte 0x00 "HC23,DSI6 HC23 Tile Configuration" group.byte 0x18++0x00 line.byte 0x00 "HC24,DSI6 HC24 Tile Configuration" group.byte 0x19++0x00 line.byte 0x00 "HC25,DSI6 HC25 Tile Configuration" group.byte 0x1A++0x00 line.byte 0x00 "HC26,DSI6 HC26 Tile Configuration" group.byte 0x1B++0x00 line.byte 0x00 "HC27,DSI6 HC27 Tile Configuration" group.byte 0x1C++0x00 line.byte 0x00 "HC28,DSI6 HC28 Tile Configuration" group.byte 0x1D++0x00 line.byte 0x00 "HC29,DSI6 HC29 Tile Configuration" group.byte 0x1E++0x00 line.byte 0x00 "HC30,DSI6 HC30 Tile Configuration" group.byte 0x1F++0x00 line.byte 0x00 "HC31,DSI6 HC31 Tile Configuration" group.byte 0x20++0x00 line.byte 0x00 "HC32,DSI6 HC32 Tile Configuration" group.byte 0x21++0x00 line.byte 0x00 "HC33,DSI6 HC33 Tile Configuration" group.byte 0x22++0x00 line.byte 0x00 "HC34,DSI6 HC34 Tile Configuration" group.byte 0x23++0x00 line.byte 0x00 "HC35,DSI6 HC35 Tile Configuration" group.byte 0x24++0x00 line.byte 0x00 "HC36,DSI6 HC36 Tile Configuration" group.byte 0x25++0x00 line.byte 0x00 "HC37,DSI6 HC37 Tile Configuration" group.byte 0x26++0x00 line.byte 0x00 "HC38,DSI6 HC38 Tile Configuration" group.byte 0x27++0x00 line.byte 0x00 "HC39,DSI6 HC39 Tile Configuration" group.byte 0x28++0x00 line.byte 0x00 "HC40,DSI6 HC40 Tile Configuration" group.byte 0x29++0x00 line.byte 0x00 "HC41,DSI6 HC41 Tile Configuration" group.byte 0x2A++0x00 line.byte 0x00 "HC42,DSI6 HC42 Tile Configuration" group.byte 0x2B++0x00 line.byte 0x00 "HC43,DSI6 HC43 Tile Configuration" group.byte 0x2C++0x00 line.byte 0x00 "HC44,DSI6 HC44 Tile Configuration" group.byte 0x2D++0x00 line.byte 0x00 "HC45,DSI6 HC45 Tile Configuration" group.byte 0x2E++0x00 line.byte 0x00 "HC46,DSI6 HC46 Tile Configuration" group.byte 0x2F++0x00 line.byte 0x00 "HC47,DSI6 HC47 Tile Configuration" group.byte 0x30++0x00 line.byte 0x00 "HC48,DSI6 HC48 Tile Configuration" group.byte 0x31++0x00 line.byte 0x00 "HC49,DSI6 HC49 Tile Configuration" group.byte 0x32++0x00 line.byte 0x00 "HC50,DSI6 HC50 Tile Configuration" group.byte 0x33++0x00 line.byte 0x00 "HC51,DSI6 HC51 Tile Configuration" group.byte 0x34++0x00 line.byte 0x00 "HC52,DSI6 HC52 Tile Configuration" group.byte 0x35++0x00 line.byte 0x00 "HC53,DSI6 HC53 Tile Configuration" group.byte 0x36++0x00 line.byte 0x00 "HC54,DSI6 HC54 Tile Configuration" group.byte 0x37++0x00 line.byte 0x00 "HC55,DSI6 HC55 Tile Configuration" group.byte 0x38++0x00 line.byte 0x00 "HC56,DSI6 HC56 Tile Configuration" group.byte 0x39++0x00 line.byte 0x00 "HC57,DSI6 HC57 Tile Configuration" group.byte 0x3A++0x00 line.byte 0x00 "HC58,DSI6 HC58 Tile Configuration" group.byte 0x3B++0x00 line.byte 0x00 "HC59,DSI6 HC59 Tile Configuration" group.byte 0x3C++0x00 line.byte 0x00 "HC60,DSI6 HC60 Tile Configuration" group.byte 0x3D++0x00 line.byte 0x00 "HC61,DSI6 HC61 Tile Configuration" group.byte 0x3E++0x00 line.byte 0x00 "HC62,DSI6 HC62 Tile Configuration" group.byte 0x3F++0x00 line.byte 0x00 "HC63,DSI6 HC63 Tile Configuration" group.byte 0x40++0x00 line.byte 0x00 "HC64,DSI6 HC64 Tile Configuration" group.byte 0x41++0x00 line.byte 0x00 "HC65,DSI6 HC65 Tile Configuration" group.byte 0x42++0x00 line.byte 0x00 "HC66,DSI6 HC66 Tile Configuration" group.byte 0x43++0x00 line.byte 0x00 "HC67,DSI6 HC67 Tile Configuration" group.byte 0x44++0x00 line.byte 0x00 "HC68,DSI6 HC68 Tile Configuration" group.byte 0x45++0x00 line.byte 0x00 "HC69,DSI6 HC69 Tile Configuration" group.byte 0x46++0x00 line.byte 0x00 "HC70,DSI6 HC70 Tile Configuration" group.byte 0x47++0x00 line.byte 0x00 "HC71,DSI6 HC71 Tile Configuration" group.byte 0x48++0x00 line.byte 0x00 "HC72,DSI6 HC72 Tile Configuration" group.byte 0x49++0x00 line.byte 0x00 "HC73,DSI6 HC73 Tile Configuration" group.byte 0x4A++0x00 line.byte 0x00 "HC74,DSI6 HC74 Tile Configuration" group.byte 0x4B++0x00 line.byte 0x00 "HC75,DSI6 HC75 Tile Configuration" group.byte 0x4C++0x00 line.byte 0x00 "HC76,DSI6 HC76 Tile Configuration" group.byte 0x4D++0x00 line.byte 0x00 "HC77,DSI6 HC77 Tile Configuration" group.byte 0x4E++0x00 line.byte 0x00 "HC78,DSI6 HC78 Tile Configuration" group.byte 0x4F++0x00 line.byte 0x00 "HC79,DSI6 HC79 Tile Configuration" group.byte 0x50++0x00 line.byte 0x00 "HC80,DSI6 HC80 Tile Configuration" group.byte 0x51++0x00 line.byte 0x00 "HC81,DSI6 HC81 Tile Configuration" group.byte 0x52++0x00 line.byte 0x00 "HC82,DSI6 HC82 Tile Configuration" group.byte 0x53++0x00 line.byte 0x00 "HC83,DSI6 HC83 Tile Configuration" group.byte 0x54++0x00 line.byte 0x00 "HC84,DSI6 HC84 Tile Configuration" group.byte 0x55++0x00 line.byte 0x00 "HC85,DSI6 HC85 Tile Configuration" group.byte 0x56++0x00 line.byte 0x00 "HC86,DSI6 HC86 Tile Configuration" group.byte 0x57++0x00 line.byte 0x00 "HC87,DSI6 HC87 Tile Configuration" group.byte 0x58++0x00 line.byte 0x00 "HC88,DSI6 HC88 Tile Configuration" group.byte 0x59++0x00 line.byte 0x00 "HC89,DSI6 HC89 Tile Configuration" group.byte 0x5A++0x00 line.byte 0x00 "HC90,DSI6 HC90 Tile Configuration" group.byte 0x5B++0x00 line.byte 0x00 "HC91,DSI6 HC91 Tile Configuration" group.byte 0x5C++0x00 line.byte 0x00 "HC92,DSI6 HC92 Tile Configuration" group.byte 0x5D++0x00 line.byte 0x00 "HC93,DSI6 HC93 Tile Configuration" group.byte 0x5E++0x00 line.byte 0x00 "HC94,DSI6 HC94 Tile Configuration" group.byte 0x5F++0x00 line.byte 0x00 "HC95,DSI6 HC95 Tile Configuration" group.byte 0x60++0x00 line.byte 0x00 "HC96,DSI6 HC96 Tile Configuration" group.byte 0x61++0x00 line.byte 0x00 "HC97,DSI6 HC97 Tile Configuration" group.byte 0x62++0x00 line.byte 0x00 "HC98,DSI6 HC98 Tile Configuration" group.byte 0x63++0x00 line.byte 0x00 "HC99,DSI6 HC99 Tile Configuration" group.byte 0x64++0x00 line.byte 0x00 "HC100,DSI6 HC100 Tile Configuration" group.byte 0x65++0x00 line.byte 0x00 "HC101,DSI6 HC101 Tile Configuration" group.byte 0x66++0x00 line.byte 0x00 "HC102,DSI6 HC102 Tile Configuration" group.byte 0x67++0x00 line.byte 0x00 "HC103,DSI6 HC103 Tile Configuration" group.byte 0x68++0x00 line.byte 0x00 "HC104,DSI6 HC104 Tile Configuration" group.byte 0x69++0x00 line.byte 0x00 "HC105,DSI6 HC105 Tile Configuration" group.byte 0x6A++0x00 line.byte 0x00 "HC106,DSI6 HC106 Tile Configuration" group.byte 0x6B++0x00 line.byte 0x00 "HC107,DSI6 HC107 Tile Configuration" group.byte 0x6C++0x00 line.byte 0x00 "HC108,DSI6 HC108 Tile Configuration" group.byte 0x6D++0x00 line.byte 0x00 "HC109,DSI6 HC109 Tile Configuration" group.byte 0x6E++0x00 line.byte 0x00 "HC110,DSI6 HC110 Tile Configuration" group.byte 0x6F++0x00 line.byte 0x00 "HC111,DSI6 HC111 Tile Configuration" group.byte 0x70++0x00 line.byte 0x00 "HC112,DSI6 HC112 Tile Configuration" group.byte 0x71++0x00 line.byte 0x00 "HC113,DSI6 HC113 Tile Configuration" group.byte 0x72++0x00 line.byte 0x00 "HC114,DSI6 HC114 Tile Configuration" group.byte 0x73++0x00 line.byte 0x00 "HC115,DSI6 HC115 Tile Configuration" group.byte 0x74++0x00 line.byte 0x00 "HC116,DSI6 HC116 Tile Configuration" group.byte 0x75++0x00 line.byte 0x00 "HC117,DSI6 HC117 Tile Configuration" group.byte 0x76++0x00 line.byte 0x00 "HC118,DSI6 HC118 Tile Configuration" group.byte 0x77++0x00 line.byte 0x00 "HC119,DSI6 HC119 Tile Configuration" group.byte 0x78++0x00 line.byte 0x00 "HC120,DSI6 HC120 Tile Configuration" group.byte 0x79++0x00 line.byte 0x00 "HC121,DSI6 HC121 Tile Configuration" group.byte 0x7A++0x00 line.byte 0x00 "HC122,DSI6 HC122 Tile Configuration" group.byte 0x7B++0x00 line.byte 0x00 "HC123,DSI6 HC123 Tile Configuration" group.byte 0x7C++0x00 line.byte 0x00 "HC124,DSI6 HC124 Tile Configuration" group.byte 0x7D++0x00 line.byte 0x00 "HC125,DSI6 HC125 Tile Configuration" group.byte 0x7E++0x00 line.byte 0x00 "HC126,DSI6 HC126 Tile Configuration" group.byte 0x7F++0x00 line.byte 0x00 "HC127,DSI6 HC127 Tile Configuration" group.byte 0x80++0x00 line.byte 0x00 "HV_L0,DSI6 HV0 Tile Configuration" group.byte 0x81++0x00 line.byte 0x00 "HV_L1,DSI6 HV1 Tile Configuration" group.byte 0x82++0x00 line.byte 0x00 "HV_L2,DSI6 HV2 Tile Configuration" group.byte 0x83++0x00 line.byte 0x00 "HV_L3,DSI6 HV3 Tile Configuration" group.byte 0x84++0x00 line.byte 0x00 "HV_L4,DSI6 HV4 Tile Configuration" group.byte 0x85++0x00 line.byte 0x00 "HV_L5,DSI6 HV5 Tile Configuration" group.byte 0x86++0x00 line.byte 0x00 "HV_L6,DSI6 HV6 Tile Configuration" group.byte 0x87++0x00 line.byte 0x00 "HV_L7,DSI6 HV7 Tile Configuration" group.byte 0x88++0x00 line.byte 0x00 "HV_L8,DSI6 HV8 Tile Configuration" group.byte 0x89++0x00 line.byte 0x00 "HV_L9,DSI6 HV9 Tile Configuration" group.byte 0x8A++0x00 line.byte 0x00 "HV_L10,DSI6 HV10 Tile Configuration" group.byte 0x8B++0x00 line.byte 0x00 "HV_L11,DSI6 HV11 Tile Configuration" group.byte 0x8C++0x00 line.byte 0x00 "HV_L12,DSI6 HV12 Tile Configuration" group.byte 0x8D++0x00 line.byte 0x00 "HV_L13,DSI6 HV13 Tile Configuration" group.byte 0x8E++0x00 line.byte 0x00 "HV_L14,DSI6 HV14 Tile Configuration" group.byte 0x8F++0x00 line.byte 0x00 "HV_L15,DSI6 HV15 Tile Configuration" group.byte 0x90++0x00 line.byte 0x00 "HS0,DSI6 HS0 Tile Configuration" group.byte 0x91++0x00 line.byte 0x00 "HS1,DSI6 HS1 Tile Configuration" group.byte 0x92++0x00 line.byte 0x00 "HS2,DSI6 HS2 Tile Configuration" group.byte 0x93++0x00 line.byte 0x00 "HS3,DSI6 HS3 Tile Configuration" group.byte 0x94++0x00 line.byte 0x00 "HS4,DSI6 HS4 Tile Configuration" group.byte 0x95++0x00 line.byte 0x00 "HS5,DSI6 HS5 Tile Configuration" group.byte 0x96++0x00 line.byte 0x00 "HS6,DSI6 HS6 Tile Configuration" group.byte 0x97++0x00 line.byte 0x00 "HS7,DSI6 HS7 Tile Configuration" group.byte 0x98++0x00 line.byte 0x00 "HS8,DSI6 HS8 Tile Configuration" group.byte 0x99++0x00 line.byte 0x00 "HS9,DSI6 HS9 Tile Configuration" group.byte 0x9A++0x00 line.byte 0x00 "HS10,DSI6 HS10 Tile Configuration" group.byte 0x9B++0x00 line.byte 0x00 "HS11,DSI6 HS11 Tile Configuration" group.byte 0x9C++0x00 line.byte 0x00 "HS12,DSI6 HS12 Tile Configuration" group.byte 0x9D++0x00 line.byte 0x00 "HS13,DSI6 HS13 Tile Configuration" group.byte 0x9E++0x00 line.byte 0x00 "HS14,DSI6 HS14 Tile Configuration" group.byte 0x9F++0x00 line.byte 0x00 "HS15,DSI6 HS15 Tile Configuration" group.byte 0xA0++0x00 line.byte 0x00 "HS16,DSI6 HS16 Tile Configuration" group.byte 0xA1++0x00 line.byte 0x00 "HS17,DSI6 HS17 Tile Configuration" group.byte 0xA2++0x00 line.byte 0x00 "HS18,DSI6 HS18 Tile Configuration" group.byte 0xA3++0x00 line.byte 0x00 "HS19,DSI6 HS19 Tile Configuration" group.byte 0xA4++0x00 line.byte 0x00 "HS20,DSI6 HS20 Tile Configuration" group.byte 0xA5++0x00 line.byte 0x00 "HS21,DSI6 HS21 Tile Configuration" group.byte 0xA6++0x00 line.byte 0x00 "HS22,DSI6 HS22 Tile Configuration" group.byte 0xA7++0x00 line.byte 0x00 "HS23,DSI6 HS23 Tile Configuration" group.byte 0xA8++0x00 line.byte 0x00 "HV_R0,DSI6 HV0 Tile Configuration" group.byte 0xA9++0x00 line.byte 0x00 "HV_R1,DSI6 HV1 Tile Configuration" group.byte 0xAA++0x00 line.byte 0x00 "HV_R2,DSI6 HV2 Tile Configuration" group.byte 0xAB++0x00 line.byte 0x00 "HV_R3,DSI6 HV3 Tile Configuration" group.byte 0xAC++0x00 line.byte 0x00 "HV_R4,DSI6 HV4 Tile Configuration" group.byte 0xAD++0x00 line.byte 0x00 "HV_R5,DSI6 HV5 Tile Configuration" group.byte 0xAE++0x00 line.byte 0x00 "HV_R6,DSI6 HV6 Tile Configuration" group.byte 0xAF++0x00 line.byte 0x00 "HV_R7,DSI6 HV7 Tile Configuration" group.byte 0xB0++0x00 line.byte 0x00 "HV_R8,DSI6 HV8 Tile Configuration" group.byte 0xB1++0x00 line.byte 0x00 "HV_R9,DSI6 HV9 Tile Configuration" group.byte 0xB2++0x00 line.byte 0x00 "HV_R10,DSI6 HV10 Tile Configuration" group.byte 0xB3++0x00 line.byte 0x00 "HV_R11,DSI6 HV11 Tile Configuration" group.byte 0xB4++0x00 line.byte 0x00 "HV_R12,DSI6 HV12 Tile Configuration" group.byte 0xB5++0x00 line.byte 0x00 "HV_R13,DSI6 HV13 Tile Configuration" group.byte 0xB6++0x00 line.byte 0x00 "HV_R14,DSI6 HV14 Tile Configuration" group.byte 0xB7++0x00 line.byte 0x00 "HV_R15,DSI6 HV15 Tile Configuration" group.byte 0xC0++0x00 line.byte 0x00 "DSIINP0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC2++0x00 line.byte 0x00 "DSIINP1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC4++0x00 line.byte 0x00 "DSIINP2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC6++0x00 line.byte 0x00 "DSIINP3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC8++0x00 line.byte 0x00 "DSIINP4,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCA++0x00 line.byte 0x00 "DSIINP5,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCC++0x00 line.byte 0x00 "DSIOUTP0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCE++0x00 line.byte 0x00 "DSIOUTP1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD0++0x00 line.byte 0x00 "DSIOUTP2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD2++0x00 line.byte 0x00 "DSIOUTP3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD4++0x00 line.byte 0x00 "DSIOUTT0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD6++0x00 line.byte 0x00 "DSIOUTT1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD8++0x00 line.byte 0x00 "DSIOUTT2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDA++0x00 line.byte 0x00 "DSIOUTT3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDC++0x00 line.byte 0x00 "DSIOUTT4,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDE++0x00 line.byte 0x00 "DSIOUTT5,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xE0++0x00 line.byte 0x00 "VS0,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE2++0x00 line.byte 0x00 "VS1,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE4++0x00 line.byte 0x00 "VS2,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE6++0x00 line.byte 0x00 "VS3,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE8++0x00 line.byte 0x00 "VS4,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEA++0x00 line.byte 0x00 "VS5,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEC++0x00 line.byte 0x00 "VS6,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEE++0x00 line.byte 0x00 "VS7,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" width 0x0B tree.end tree "DSI 7" base ad:0x40014700 width 10. group.byte 0x0++0x00 line.byte 0x00 "HC0,DSI7 HC0 Tile Configuration" group.byte 0x1++0x00 line.byte 0x00 "HC1,DSI7 HC1 Tile Configuration" group.byte 0x2++0x00 line.byte 0x00 "HC2,DSI7 HC2 Tile Configuration" group.byte 0x3++0x00 line.byte 0x00 "HC3,DSI7 HC3 Tile Configuration" group.byte 0x4++0x00 line.byte 0x00 "HC4,DSI7 HC4 Tile Configuration" group.byte 0x5++0x00 line.byte 0x00 "HC5,DSI7 HC5 Tile Configuration" group.byte 0x6++0x00 line.byte 0x00 "HC6,DSI7 HC6 Tile Configuration" group.byte 0x7++0x00 line.byte 0x00 "HC7,DSI7 HC7 Tile Configuration" group.byte 0x8++0x00 line.byte 0x00 "HC8,DSI7 HC8 Tile Configuration" group.byte 0x9++0x00 line.byte 0x00 "HC9,DSI7 HC9 Tile Configuration" group.byte 0xA++0x00 line.byte 0x00 "HC10,DSI7 HC10 Tile Configuration" group.byte 0xB++0x00 line.byte 0x00 "HC11,DSI7 HC11 Tile Configuration" group.byte 0xC++0x00 line.byte 0x00 "HC12,DSI7 HC12 Tile Configuration" group.byte 0xD++0x00 line.byte 0x00 "HC13,DSI7 HC13 Tile Configuration" group.byte 0xE++0x00 line.byte 0x00 "HC14,DSI7 HC14 Tile Configuration" group.byte 0xF++0x00 line.byte 0x00 "HC15,DSI7 HC15 Tile Configuration" group.byte 0x10++0x00 line.byte 0x00 "HC16,DSI7 HC16 Tile Configuration" group.byte 0x11++0x00 line.byte 0x00 "HC17,DSI7 HC17 Tile Configuration" group.byte 0x12++0x00 line.byte 0x00 "HC18,DSI7 HC18 Tile Configuration" group.byte 0x13++0x00 line.byte 0x00 "HC19,DSI7 HC19 Tile Configuration" group.byte 0x14++0x00 line.byte 0x00 "HC20,DSI7 HC20 Tile Configuration" group.byte 0x15++0x00 line.byte 0x00 "HC21,DSI7 HC21 Tile Configuration" group.byte 0x16++0x00 line.byte 0x00 "HC22,DSI7 HC22 Tile Configuration" group.byte 0x17++0x00 line.byte 0x00 "HC23,DSI7 HC23 Tile Configuration" group.byte 0x18++0x00 line.byte 0x00 "HC24,DSI7 HC24 Tile Configuration" group.byte 0x19++0x00 line.byte 0x00 "HC25,DSI7 HC25 Tile Configuration" group.byte 0x1A++0x00 line.byte 0x00 "HC26,DSI7 HC26 Tile Configuration" group.byte 0x1B++0x00 line.byte 0x00 "HC27,DSI7 HC27 Tile Configuration" group.byte 0x1C++0x00 line.byte 0x00 "HC28,DSI7 HC28 Tile Configuration" group.byte 0x1D++0x00 line.byte 0x00 "HC29,DSI7 HC29 Tile Configuration" group.byte 0x1E++0x00 line.byte 0x00 "HC30,DSI7 HC30 Tile Configuration" group.byte 0x1F++0x00 line.byte 0x00 "HC31,DSI7 HC31 Tile Configuration" group.byte 0x20++0x00 line.byte 0x00 "HC32,DSI7 HC32 Tile Configuration" group.byte 0x21++0x00 line.byte 0x00 "HC33,DSI7 HC33 Tile Configuration" group.byte 0x22++0x00 line.byte 0x00 "HC34,DSI7 HC34 Tile Configuration" group.byte 0x23++0x00 line.byte 0x00 "HC35,DSI7 HC35 Tile Configuration" group.byte 0x24++0x00 line.byte 0x00 "HC36,DSI7 HC36 Tile Configuration" group.byte 0x25++0x00 line.byte 0x00 "HC37,DSI7 HC37 Tile Configuration" group.byte 0x26++0x00 line.byte 0x00 "HC38,DSI7 HC38 Tile Configuration" group.byte 0x27++0x00 line.byte 0x00 "HC39,DSI7 HC39 Tile Configuration" group.byte 0x28++0x00 line.byte 0x00 "HC40,DSI7 HC40 Tile Configuration" group.byte 0x29++0x00 line.byte 0x00 "HC41,DSI7 HC41 Tile Configuration" group.byte 0x2A++0x00 line.byte 0x00 "HC42,DSI7 HC42 Tile Configuration" group.byte 0x2B++0x00 line.byte 0x00 "HC43,DSI7 HC43 Tile Configuration" group.byte 0x2C++0x00 line.byte 0x00 "HC44,DSI7 HC44 Tile Configuration" group.byte 0x2D++0x00 line.byte 0x00 "HC45,DSI7 HC45 Tile Configuration" group.byte 0x2E++0x00 line.byte 0x00 "HC46,DSI7 HC46 Tile Configuration" group.byte 0x2F++0x00 line.byte 0x00 "HC47,DSI7 HC47 Tile Configuration" group.byte 0x30++0x00 line.byte 0x00 "HC48,DSI7 HC48 Tile Configuration" group.byte 0x31++0x00 line.byte 0x00 "HC49,DSI7 HC49 Tile Configuration" group.byte 0x32++0x00 line.byte 0x00 "HC50,DSI7 HC50 Tile Configuration" group.byte 0x33++0x00 line.byte 0x00 "HC51,DSI7 HC51 Tile Configuration" group.byte 0x34++0x00 line.byte 0x00 "HC52,DSI7 HC52 Tile Configuration" group.byte 0x35++0x00 line.byte 0x00 "HC53,DSI7 HC53 Tile Configuration" group.byte 0x36++0x00 line.byte 0x00 "HC54,DSI7 HC54 Tile Configuration" group.byte 0x37++0x00 line.byte 0x00 "HC55,DSI7 HC55 Tile Configuration" group.byte 0x38++0x00 line.byte 0x00 "HC56,DSI7 HC56 Tile Configuration" group.byte 0x39++0x00 line.byte 0x00 "HC57,DSI7 HC57 Tile Configuration" group.byte 0x3A++0x00 line.byte 0x00 "HC58,DSI7 HC58 Tile Configuration" group.byte 0x3B++0x00 line.byte 0x00 "HC59,DSI7 HC59 Tile Configuration" group.byte 0x3C++0x00 line.byte 0x00 "HC60,DSI7 HC60 Tile Configuration" group.byte 0x3D++0x00 line.byte 0x00 "HC61,DSI7 HC61 Tile Configuration" group.byte 0x3E++0x00 line.byte 0x00 "HC62,DSI7 HC62 Tile Configuration" group.byte 0x3F++0x00 line.byte 0x00 "HC63,DSI7 HC63 Tile Configuration" group.byte 0x40++0x00 line.byte 0x00 "HC64,DSI7 HC64 Tile Configuration" group.byte 0x41++0x00 line.byte 0x00 "HC65,DSI7 HC65 Tile Configuration" group.byte 0x42++0x00 line.byte 0x00 "HC66,DSI7 HC66 Tile Configuration" group.byte 0x43++0x00 line.byte 0x00 "HC67,DSI7 HC67 Tile Configuration" group.byte 0x44++0x00 line.byte 0x00 "HC68,DSI7 HC68 Tile Configuration" group.byte 0x45++0x00 line.byte 0x00 "HC69,DSI7 HC69 Tile Configuration" group.byte 0x46++0x00 line.byte 0x00 "HC70,DSI7 HC70 Tile Configuration" group.byte 0x47++0x00 line.byte 0x00 "HC71,DSI7 HC71 Tile Configuration" group.byte 0x48++0x00 line.byte 0x00 "HC72,DSI7 HC72 Tile Configuration" group.byte 0x49++0x00 line.byte 0x00 "HC73,DSI7 HC73 Tile Configuration" group.byte 0x4A++0x00 line.byte 0x00 "HC74,DSI7 HC74 Tile Configuration" group.byte 0x4B++0x00 line.byte 0x00 "HC75,DSI7 HC75 Tile Configuration" group.byte 0x4C++0x00 line.byte 0x00 "HC76,DSI7 HC76 Tile Configuration" group.byte 0x4D++0x00 line.byte 0x00 "HC77,DSI7 HC77 Tile Configuration" group.byte 0x4E++0x00 line.byte 0x00 "HC78,DSI7 HC78 Tile Configuration" group.byte 0x4F++0x00 line.byte 0x00 "HC79,DSI7 HC79 Tile Configuration" group.byte 0x50++0x00 line.byte 0x00 "HC80,DSI7 HC80 Tile Configuration" group.byte 0x51++0x00 line.byte 0x00 "HC81,DSI7 HC81 Tile Configuration" group.byte 0x52++0x00 line.byte 0x00 "HC82,DSI7 HC82 Tile Configuration" group.byte 0x53++0x00 line.byte 0x00 "HC83,DSI7 HC83 Tile Configuration" group.byte 0x54++0x00 line.byte 0x00 "HC84,DSI7 HC84 Tile Configuration" group.byte 0x55++0x00 line.byte 0x00 "HC85,DSI7 HC85 Tile Configuration" group.byte 0x56++0x00 line.byte 0x00 "HC86,DSI7 HC86 Tile Configuration" group.byte 0x57++0x00 line.byte 0x00 "HC87,DSI7 HC87 Tile Configuration" group.byte 0x58++0x00 line.byte 0x00 "HC88,DSI7 HC88 Tile Configuration" group.byte 0x59++0x00 line.byte 0x00 "HC89,DSI7 HC89 Tile Configuration" group.byte 0x5A++0x00 line.byte 0x00 "HC90,DSI7 HC90 Tile Configuration" group.byte 0x5B++0x00 line.byte 0x00 "HC91,DSI7 HC91 Tile Configuration" group.byte 0x5C++0x00 line.byte 0x00 "HC92,DSI7 HC92 Tile Configuration" group.byte 0x5D++0x00 line.byte 0x00 "HC93,DSI7 HC93 Tile Configuration" group.byte 0x5E++0x00 line.byte 0x00 "HC94,DSI7 HC94 Tile Configuration" group.byte 0x5F++0x00 line.byte 0x00 "HC95,DSI7 HC95 Tile Configuration" group.byte 0x60++0x00 line.byte 0x00 "HC96,DSI7 HC96 Tile Configuration" group.byte 0x61++0x00 line.byte 0x00 "HC97,DSI7 HC97 Tile Configuration" group.byte 0x62++0x00 line.byte 0x00 "HC98,DSI7 HC98 Tile Configuration" group.byte 0x63++0x00 line.byte 0x00 "HC99,DSI7 HC99 Tile Configuration" group.byte 0x64++0x00 line.byte 0x00 "HC100,DSI7 HC100 Tile Configuration" group.byte 0x65++0x00 line.byte 0x00 "HC101,DSI7 HC101 Tile Configuration" group.byte 0x66++0x00 line.byte 0x00 "HC102,DSI7 HC102 Tile Configuration" group.byte 0x67++0x00 line.byte 0x00 "HC103,DSI7 HC103 Tile Configuration" group.byte 0x68++0x00 line.byte 0x00 "HC104,DSI7 HC104 Tile Configuration" group.byte 0x69++0x00 line.byte 0x00 "HC105,DSI7 HC105 Tile Configuration" group.byte 0x6A++0x00 line.byte 0x00 "HC106,DSI7 HC106 Tile Configuration" group.byte 0x6B++0x00 line.byte 0x00 "HC107,DSI7 HC107 Tile Configuration" group.byte 0x6C++0x00 line.byte 0x00 "HC108,DSI7 HC108 Tile Configuration" group.byte 0x6D++0x00 line.byte 0x00 "HC109,DSI7 HC109 Tile Configuration" group.byte 0x6E++0x00 line.byte 0x00 "HC110,DSI7 HC110 Tile Configuration" group.byte 0x6F++0x00 line.byte 0x00 "HC111,DSI7 HC111 Tile Configuration" group.byte 0x70++0x00 line.byte 0x00 "HC112,DSI7 HC112 Tile Configuration" group.byte 0x71++0x00 line.byte 0x00 "HC113,DSI7 HC113 Tile Configuration" group.byte 0x72++0x00 line.byte 0x00 "HC114,DSI7 HC114 Tile Configuration" group.byte 0x73++0x00 line.byte 0x00 "HC115,DSI7 HC115 Tile Configuration" group.byte 0x74++0x00 line.byte 0x00 "HC116,DSI7 HC116 Tile Configuration" group.byte 0x75++0x00 line.byte 0x00 "HC117,DSI7 HC117 Tile Configuration" group.byte 0x76++0x00 line.byte 0x00 "HC118,DSI7 HC118 Tile Configuration" group.byte 0x77++0x00 line.byte 0x00 "HC119,DSI7 HC119 Tile Configuration" group.byte 0x78++0x00 line.byte 0x00 "HC120,DSI7 HC120 Tile Configuration" group.byte 0x79++0x00 line.byte 0x00 "HC121,DSI7 HC121 Tile Configuration" group.byte 0x7A++0x00 line.byte 0x00 "HC122,DSI7 HC122 Tile Configuration" group.byte 0x7B++0x00 line.byte 0x00 "HC123,DSI7 HC123 Tile Configuration" group.byte 0x7C++0x00 line.byte 0x00 "HC124,DSI7 HC124 Tile Configuration" group.byte 0x7D++0x00 line.byte 0x00 "HC125,DSI7 HC125 Tile Configuration" group.byte 0x7E++0x00 line.byte 0x00 "HC126,DSI7 HC126 Tile Configuration" group.byte 0x7F++0x00 line.byte 0x00 "HC127,DSI7 HC127 Tile Configuration" group.byte 0x80++0x00 line.byte 0x00 "HV_L0,DSI7 HV0 Tile Configuration" group.byte 0x81++0x00 line.byte 0x00 "HV_L1,DSI7 HV1 Tile Configuration" group.byte 0x82++0x00 line.byte 0x00 "HV_L2,DSI7 HV2 Tile Configuration" group.byte 0x83++0x00 line.byte 0x00 "HV_L3,DSI7 HV3 Tile Configuration" group.byte 0x84++0x00 line.byte 0x00 "HV_L4,DSI7 HV4 Tile Configuration" group.byte 0x85++0x00 line.byte 0x00 "HV_L5,DSI7 HV5 Tile Configuration" group.byte 0x86++0x00 line.byte 0x00 "HV_L6,DSI7 HV6 Tile Configuration" group.byte 0x87++0x00 line.byte 0x00 "HV_L7,DSI7 HV7 Tile Configuration" group.byte 0x88++0x00 line.byte 0x00 "HV_L8,DSI7 HV8 Tile Configuration" group.byte 0x89++0x00 line.byte 0x00 "HV_L9,DSI7 HV9 Tile Configuration" group.byte 0x8A++0x00 line.byte 0x00 "HV_L10,DSI7 HV10 Tile Configuration" group.byte 0x8B++0x00 line.byte 0x00 "HV_L11,DSI7 HV11 Tile Configuration" group.byte 0x8C++0x00 line.byte 0x00 "HV_L12,DSI7 HV12 Tile Configuration" group.byte 0x8D++0x00 line.byte 0x00 "HV_L13,DSI7 HV13 Tile Configuration" group.byte 0x8E++0x00 line.byte 0x00 "HV_L14,DSI7 HV14 Tile Configuration" group.byte 0x8F++0x00 line.byte 0x00 "HV_L15,DSI7 HV15 Tile Configuration" group.byte 0x90++0x00 line.byte 0x00 "HS0,DSI7 HS0 Tile Configuration" group.byte 0x91++0x00 line.byte 0x00 "HS1,DSI7 HS1 Tile Configuration" group.byte 0x92++0x00 line.byte 0x00 "HS2,DSI7 HS2 Tile Configuration" group.byte 0x93++0x00 line.byte 0x00 "HS3,DSI7 HS3 Tile Configuration" group.byte 0x94++0x00 line.byte 0x00 "HS4,DSI7 HS4 Tile Configuration" group.byte 0x95++0x00 line.byte 0x00 "HS5,DSI7 HS5 Tile Configuration" group.byte 0x96++0x00 line.byte 0x00 "HS6,DSI7 HS6 Tile Configuration" group.byte 0x97++0x00 line.byte 0x00 "HS7,DSI7 HS7 Tile Configuration" group.byte 0x98++0x00 line.byte 0x00 "HS8,DSI7 HS8 Tile Configuration" group.byte 0x99++0x00 line.byte 0x00 "HS9,DSI7 HS9 Tile Configuration" group.byte 0x9A++0x00 line.byte 0x00 "HS10,DSI7 HS10 Tile Configuration" group.byte 0x9B++0x00 line.byte 0x00 "HS11,DSI7 HS11 Tile Configuration" group.byte 0x9C++0x00 line.byte 0x00 "HS12,DSI7 HS12 Tile Configuration" group.byte 0x9D++0x00 line.byte 0x00 "HS13,DSI7 HS13 Tile Configuration" group.byte 0x9E++0x00 line.byte 0x00 "HS14,DSI7 HS14 Tile Configuration" group.byte 0x9F++0x00 line.byte 0x00 "HS15,DSI7 HS15 Tile Configuration" group.byte 0xA0++0x00 line.byte 0x00 "HS16,DSI7 HS16 Tile Configuration" group.byte 0xA1++0x00 line.byte 0x00 "HS17,DSI7 HS17 Tile Configuration" group.byte 0xA2++0x00 line.byte 0x00 "HS18,DSI7 HS18 Tile Configuration" group.byte 0xA3++0x00 line.byte 0x00 "HS19,DSI7 HS19 Tile Configuration" group.byte 0xA4++0x00 line.byte 0x00 "HS20,DSI7 HS20 Tile Configuration" group.byte 0xA5++0x00 line.byte 0x00 "HS21,DSI7 HS21 Tile Configuration" group.byte 0xA6++0x00 line.byte 0x00 "HS22,DSI7 HS22 Tile Configuration" group.byte 0xA7++0x00 line.byte 0x00 "HS23,DSI7 HS23 Tile Configuration" group.byte 0xA8++0x00 line.byte 0x00 "HV_R0,DSI7 HV0 Tile Configuration" group.byte 0xA9++0x00 line.byte 0x00 "HV_R1,DSI7 HV1 Tile Configuration" group.byte 0xAA++0x00 line.byte 0x00 "HV_R2,DSI7 HV2 Tile Configuration" group.byte 0xAB++0x00 line.byte 0x00 "HV_R3,DSI7 HV3 Tile Configuration" group.byte 0xAC++0x00 line.byte 0x00 "HV_R4,DSI7 HV4 Tile Configuration" group.byte 0xAD++0x00 line.byte 0x00 "HV_R5,DSI7 HV5 Tile Configuration" group.byte 0xAE++0x00 line.byte 0x00 "HV_R6,DSI7 HV6 Tile Configuration" group.byte 0xAF++0x00 line.byte 0x00 "HV_R7,DSI7 HV7 Tile Configuration" group.byte 0xB0++0x00 line.byte 0x00 "HV_R8,DSI7 HV8 Tile Configuration" group.byte 0xB1++0x00 line.byte 0x00 "HV_R9,DSI7 HV9 Tile Configuration" group.byte 0xB2++0x00 line.byte 0x00 "HV_R10,DSI7 HV10 Tile Configuration" group.byte 0xB3++0x00 line.byte 0x00 "HV_R11,DSI7 HV11 Tile Configuration" group.byte 0xB4++0x00 line.byte 0x00 "HV_R12,DSI7 HV12 Tile Configuration" group.byte 0xB5++0x00 line.byte 0x00 "HV_R13,DSI7 HV13 Tile Configuration" group.byte 0xB6++0x00 line.byte 0x00 "HV_R14,DSI7 HV14 Tile Configuration" group.byte 0xB7++0x00 line.byte 0x00 "HV_R15,DSI7 HV15 Tile Configuration" group.byte 0xC0++0x00 line.byte 0x00 "DSIINP0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC2++0x00 line.byte 0x00 "DSIINP1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC4++0x00 line.byte 0x00 "DSIINP2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC6++0x00 line.byte 0x00 "DSIINP3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC8++0x00 line.byte 0x00 "DSIINP4,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCA++0x00 line.byte 0x00 "DSIINP5,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCC++0x00 line.byte 0x00 "DSIOUTP0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCE++0x00 line.byte 0x00 "DSIOUTP1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD0++0x00 line.byte 0x00 "DSIOUTP2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD2++0x00 line.byte 0x00 "DSIOUTP3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD4++0x00 line.byte 0x00 "DSIOUTT0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD6++0x00 line.byte 0x00 "DSIOUTT1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD8++0x00 line.byte 0x00 "DSIOUTT2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDA++0x00 line.byte 0x00 "DSIOUTT3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDC++0x00 line.byte 0x00 "DSIOUTT4,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDE++0x00 line.byte 0x00 "DSIOUTT5,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xE0++0x00 line.byte 0x00 "VS0,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE2++0x00 line.byte 0x00 "VS1,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE4++0x00 line.byte 0x00 "VS2,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE6++0x00 line.byte 0x00 "VS3,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE8++0x00 line.byte 0x00 "VS4,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEA++0x00 line.byte 0x00 "VS5,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEC++0x00 line.byte 0x00 "VS6,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEE++0x00 line.byte 0x00 "VS7,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" width 0x0B tree.end tree "DSI 8" base ad:0x40014800 width 10. group.byte 0x0++0x00 line.byte 0x00 "HC0,DSI8 HC0 Tile Configuration" group.byte 0x1++0x00 line.byte 0x00 "HC1,DSI8 HC1 Tile Configuration" group.byte 0x2++0x00 line.byte 0x00 "HC2,DSI8 HC2 Tile Configuration" group.byte 0x3++0x00 line.byte 0x00 "HC3,DSI8 HC3 Tile Configuration" group.byte 0x4++0x00 line.byte 0x00 "HC4,DSI8 HC4 Tile Configuration" group.byte 0x5++0x00 line.byte 0x00 "HC5,DSI8 HC5 Tile Configuration" group.byte 0x6++0x00 line.byte 0x00 "HC6,DSI8 HC6 Tile Configuration" group.byte 0x7++0x00 line.byte 0x00 "HC7,DSI8 HC7 Tile Configuration" group.byte 0x8++0x00 line.byte 0x00 "HC8,DSI8 HC8 Tile Configuration" group.byte 0x9++0x00 line.byte 0x00 "HC9,DSI8 HC9 Tile Configuration" group.byte 0xA++0x00 line.byte 0x00 "HC10,DSI8 HC10 Tile Configuration" group.byte 0xB++0x00 line.byte 0x00 "HC11,DSI8 HC11 Tile Configuration" group.byte 0xC++0x00 line.byte 0x00 "HC12,DSI8 HC12 Tile Configuration" group.byte 0xD++0x00 line.byte 0x00 "HC13,DSI8 HC13 Tile Configuration" group.byte 0xE++0x00 line.byte 0x00 "HC14,DSI8 HC14 Tile Configuration" group.byte 0xF++0x00 line.byte 0x00 "HC15,DSI8 HC15 Tile Configuration" group.byte 0x10++0x00 line.byte 0x00 "HC16,DSI8 HC16 Tile Configuration" group.byte 0x11++0x00 line.byte 0x00 "HC17,DSI8 HC17 Tile Configuration" group.byte 0x12++0x00 line.byte 0x00 "HC18,DSI8 HC18 Tile Configuration" group.byte 0x13++0x00 line.byte 0x00 "HC19,DSI8 HC19 Tile Configuration" group.byte 0x14++0x00 line.byte 0x00 "HC20,DSI8 HC20 Tile Configuration" group.byte 0x15++0x00 line.byte 0x00 "HC21,DSI8 HC21 Tile Configuration" group.byte 0x16++0x00 line.byte 0x00 "HC22,DSI8 HC22 Tile Configuration" group.byte 0x17++0x00 line.byte 0x00 "HC23,DSI8 HC23 Tile Configuration" group.byte 0x18++0x00 line.byte 0x00 "HC24,DSI8 HC24 Tile Configuration" group.byte 0x19++0x00 line.byte 0x00 "HC25,DSI8 HC25 Tile Configuration" group.byte 0x1A++0x00 line.byte 0x00 "HC26,DSI8 HC26 Tile Configuration" group.byte 0x1B++0x00 line.byte 0x00 "HC27,DSI8 HC27 Tile Configuration" group.byte 0x1C++0x00 line.byte 0x00 "HC28,DSI8 HC28 Tile Configuration" group.byte 0x1D++0x00 line.byte 0x00 "HC29,DSI8 HC29 Tile Configuration" group.byte 0x1E++0x00 line.byte 0x00 "HC30,DSI8 HC30 Tile Configuration" group.byte 0x1F++0x00 line.byte 0x00 "HC31,DSI8 HC31 Tile Configuration" group.byte 0x20++0x00 line.byte 0x00 "HC32,DSI8 HC32 Tile Configuration" group.byte 0x21++0x00 line.byte 0x00 "HC33,DSI8 HC33 Tile Configuration" group.byte 0x22++0x00 line.byte 0x00 "HC34,DSI8 HC34 Tile Configuration" group.byte 0x23++0x00 line.byte 0x00 "HC35,DSI8 HC35 Tile Configuration" group.byte 0x24++0x00 line.byte 0x00 "HC36,DSI8 HC36 Tile Configuration" group.byte 0x25++0x00 line.byte 0x00 "HC37,DSI8 HC37 Tile Configuration" group.byte 0x26++0x00 line.byte 0x00 "HC38,DSI8 HC38 Tile Configuration" group.byte 0x27++0x00 line.byte 0x00 "HC39,DSI8 HC39 Tile Configuration" group.byte 0x28++0x00 line.byte 0x00 "HC40,DSI8 HC40 Tile Configuration" group.byte 0x29++0x00 line.byte 0x00 "HC41,DSI8 HC41 Tile Configuration" group.byte 0x2A++0x00 line.byte 0x00 "HC42,DSI8 HC42 Tile Configuration" group.byte 0x2B++0x00 line.byte 0x00 "HC43,DSI8 HC43 Tile Configuration" group.byte 0x2C++0x00 line.byte 0x00 "HC44,DSI8 HC44 Tile Configuration" group.byte 0x2D++0x00 line.byte 0x00 "HC45,DSI8 HC45 Tile Configuration" group.byte 0x2E++0x00 line.byte 0x00 "HC46,DSI8 HC46 Tile Configuration" group.byte 0x2F++0x00 line.byte 0x00 "HC47,DSI8 HC47 Tile Configuration" group.byte 0x30++0x00 line.byte 0x00 "HC48,DSI8 HC48 Tile Configuration" group.byte 0x31++0x00 line.byte 0x00 "HC49,DSI8 HC49 Tile Configuration" group.byte 0x32++0x00 line.byte 0x00 "HC50,DSI8 HC50 Tile Configuration" group.byte 0x33++0x00 line.byte 0x00 "HC51,DSI8 HC51 Tile Configuration" group.byte 0x34++0x00 line.byte 0x00 "HC52,DSI8 HC52 Tile Configuration" group.byte 0x35++0x00 line.byte 0x00 "HC53,DSI8 HC53 Tile Configuration" group.byte 0x36++0x00 line.byte 0x00 "HC54,DSI8 HC54 Tile Configuration" group.byte 0x37++0x00 line.byte 0x00 "HC55,DSI8 HC55 Tile Configuration" group.byte 0x38++0x00 line.byte 0x00 "HC56,DSI8 HC56 Tile Configuration" group.byte 0x39++0x00 line.byte 0x00 "HC57,DSI8 HC57 Tile Configuration" group.byte 0x3A++0x00 line.byte 0x00 "HC58,DSI8 HC58 Tile Configuration" group.byte 0x3B++0x00 line.byte 0x00 "HC59,DSI8 HC59 Tile Configuration" group.byte 0x3C++0x00 line.byte 0x00 "HC60,DSI8 HC60 Tile Configuration" group.byte 0x3D++0x00 line.byte 0x00 "HC61,DSI8 HC61 Tile Configuration" group.byte 0x3E++0x00 line.byte 0x00 "HC62,DSI8 HC62 Tile Configuration" group.byte 0x3F++0x00 line.byte 0x00 "HC63,DSI8 HC63 Tile Configuration" group.byte 0x40++0x00 line.byte 0x00 "HC64,DSI8 HC64 Tile Configuration" group.byte 0x41++0x00 line.byte 0x00 "HC65,DSI8 HC65 Tile Configuration" group.byte 0x42++0x00 line.byte 0x00 "HC66,DSI8 HC66 Tile Configuration" group.byte 0x43++0x00 line.byte 0x00 "HC67,DSI8 HC67 Tile Configuration" group.byte 0x44++0x00 line.byte 0x00 "HC68,DSI8 HC68 Tile Configuration" group.byte 0x45++0x00 line.byte 0x00 "HC69,DSI8 HC69 Tile Configuration" group.byte 0x46++0x00 line.byte 0x00 "HC70,DSI8 HC70 Tile Configuration" group.byte 0x47++0x00 line.byte 0x00 "HC71,DSI8 HC71 Tile Configuration" group.byte 0x48++0x00 line.byte 0x00 "HC72,DSI8 HC72 Tile Configuration" group.byte 0x49++0x00 line.byte 0x00 "HC73,DSI8 HC73 Tile Configuration" group.byte 0x4A++0x00 line.byte 0x00 "HC74,DSI8 HC74 Tile Configuration" group.byte 0x4B++0x00 line.byte 0x00 "HC75,DSI8 HC75 Tile Configuration" group.byte 0x4C++0x00 line.byte 0x00 "HC76,DSI8 HC76 Tile Configuration" group.byte 0x4D++0x00 line.byte 0x00 "HC77,DSI8 HC77 Tile Configuration" group.byte 0x4E++0x00 line.byte 0x00 "HC78,DSI8 HC78 Tile Configuration" group.byte 0x4F++0x00 line.byte 0x00 "HC79,DSI8 HC79 Tile Configuration" group.byte 0x50++0x00 line.byte 0x00 "HC80,DSI8 HC80 Tile Configuration" group.byte 0x51++0x00 line.byte 0x00 "HC81,DSI8 HC81 Tile Configuration" group.byte 0x52++0x00 line.byte 0x00 "HC82,DSI8 HC82 Tile Configuration" group.byte 0x53++0x00 line.byte 0x00 "HC83,DSI8 HC83 Tile Configuration" group.byte 0x54++0x00 line.byte 0x00 "HC84,DSI8 HC84 Tile Configuration" group.byte 0x55++0x00 line.byte 0x00 "HC85,DSI8 HC85 Tile Configuration" group.byte 0x56++0x00 line.byte 0x00 "HC86,DSI8 HC86 Tile Configuration" group.byte 0x57++0x00 line.byte 0x00 "HC87,DSI8 HC87 Tile Configuration" group.byte 0x58++0x00 line.byte 0x00 "HC88,DSI8 HC88 Tile Configuration" group.byte 0x59++0x00 line.byte 0x00 "HC89,DSI8 HC89 Tile Configuration" group.byte 0x5A++0x00 line.byte 0x00 "HC90,DSI8 HC90 Tile Configuration" group.byte 0x5B++0x00 line.byte 0x00 "HC91,DSI8 HC91 Tile Configuration" group.byte 0x5C++0x00 line.byte 0x00 "HC92,DSI8 HC92 Tile Configuration" group.byte 0x5D++0x00 line.byte 0x00 "HC93,DSI8 HC93 Tile Configuration" group.byte 0x5E++0x00 line.byte 0x00 "HC94,DSI8 HC94 Tile Configuration" group.byte 0x5F++0x00 line.byte 0x00 "HC95,DSI8 HC95 Tile Configuration" group.byte 0x60++0x00 line.byte 0x00 "HC96,DSI8 HC96 Tile Configuration" group.byte 0x61++0x00 line.byte 0x00 "HC97,DSI8 HC97 Tile Configuration" group.byte 0x62++0x00 line.byte 0x00 "HC98,DSI8 HC98 Tile Configuration" group.byte 0x63++0x00 line.byte 0x00 "HC99,DSI8 HC99 Tile Configuration" group.byte 0x64++0x00 line.byte 0x00 "HC100,DSI8 HC100 Tile Configuration" group.byte 0x65++0x00 line.byte 0x00 "HC101,DSI8 HC101 Tile Configuration" group.byte 0x66++0x00 line.byte 0x00 "HC102,DSI8 HC102 Tile Configuration" group.byte 0x67++0x00 line.byte 0x00 "HC103,DSI8 HC103 Tile Configuration" group.byte 0x68++0x00 line.byte 0x00 "HC104,DSI8 HC104 Tile Configuration" group.byte 0x69++0x00 line.byte 0x00 "HC105,DSI8 HC105 Tile Configuration" group.byte 0x6A++0x00 line.byte 0x00 "HC106,DSI8 HC106 Tile Configuration" group.byte 0x6B++0x00 line.byte 0x00 "HC107,DSI8 HC107 Tile Configuration" group.byte 0x6C++0x00 line.byte 0x00 "HC108,DSI8 HC108 Tile Configuration" group.byte 0x6D++0x00 line.byte 0x00 "HC109,DSI8 HC109 Tile Configuration" group.byte 0x6E++0x00 line.byte 0x00 "HC110,DSI8 HC110 Tile Configuration" group.byte 0x6F++0x00 line.byte 0x00 "HC111,DSI8 HC111 Tile Configuration" group.byte 0x70++0x00 line.byte 0x00 "HC112,DSI8 HC112 Tile Configuration" group.byte 0x71++0x00 line.byte 0x00 "HC113,DSI8 HC113 Tile Configuration" group.byte 0x72++0x00 line.byte 0x00 "HC114,DSI8 HC114 Tile Configuration" group.byte 0x73++0x00 line.byte 0x00 "HC115,DSI8 HC115 Tile Configuration" group.byte 0x74++0x00 line.byte 0x00 "HC116,DSI8 HC116 Tile Configuration" group.byte 0x75++0x00 line.byte 0x00 "HC117,DSI8 HC117 Tile Configuration" group.byte 0x76++0x00 line.byte 0x00 "HC118,DSI8 HC118 Tile Configuration" group.byte 0x77++0x00 line.byte 0x00 "HC119,DSI8 HC119 Tile Configuration" group.byte 0x78++0x00 line.byte 0x00 "HC120,DSI8 HC120 Tile Configuration" group.byte 0x79++0x00 line.byte 0x00 "HC121,DSI8 HC121 Tile Configuration" group.byte 0x7A++0x00 line.byte 0x00 "HC122,DSI8 HC122 Tile Configuration" group.byte 0x7B++0x00 line.byte 0x00 "HC123,DSI8 HC123 Tile Configuration" group.byte 0x7C++0x00 line.byte 0x00 "HC124,DSI8 HC124 Tile Configuration" group.byte 0x7D++0x00 line.byte 0x00 "HC125,DSI8 HC125 Tile Configuration" group.byte 0x7E++0x00 line.byte 0x00 "HC126,DSI8 HC126 Tile Configuration" group.byte 0x7F++0x00 line.byte 0x00 "HC127,DSI8 HC127 Tile Configuration" group.byte 0x80++0x00 line.byte 0x00 "HV_L0,DSI8 HV0 Tile Configuration" group.byte 0x81++0x00 line.byte 0x00 "HV_L1,DSI8 HV1 Tile Configuration" group.byte 0x82++0x00 line.byte 0x00 "HV_L2,DSI8 HV2 Tile Configuration" group.byte 0x83++0x00 line.byte 0x00 "HV_L3,DSI8 HV3 Tile Configuration" group.byte 0x84++0x00 line.byte 0x00 "HV_L4,DSI8 HV4 Tile Configuration" group.byte 0x85++0x00 line.byte 0x00 "HV_L5,DSI8 HV5 Tile Configuration" group.byte 0x86++0x00 line.byte 0x00 "HV_L6,DSI8 HV6 Tile Configuration" group.byte 0x87++0x00 line.byte 0x00 "HV_L7,DSI8 HV7 Tile Configuration" group.byte 0x88++0x00 line.byte 0x00 "HV_L8,DSI8 HV8 Tile Configuration" group.byte 0x89++0x00 line.byte 0x00 "HV_L9,DSI8 HV9 Tile Configuration" group.byte 0x8A++0x00 line.byte 0x00 "HV_L10,DSI8 HV10 Tile Configuration" group.byte 0x8B++0x00 line.byte 0x00 "HV_L11,DSI8 HV11 Tile Configuration" group.byte 0x8C++0x00 line.byte 0x00 "HV_L12,DSI8 HV12 Tile Configuration" group.byte 0x8D++0x00 line.byte 0x00 "HV_L13,DSI8 HV13 Tile Configuration" group.byte 0x8E++0x00 line.byte 0x00 "HV_L14,DSI8 HV14 Tile Configuration" group.byte 0x8F++0x00 line.byte 0x00 "HV_L15,DSI8 HV15 Tile Configuration" group.byte 0x90++0x00 line.byte 0x00 "HS0,DSI8 HS0 Tile Configuration" group.byte 0x91++0x00 line.byte 0x00 "HS1,DSI8 HS1 Tile Configuration" group.byte 0x92++0x00 line.byte 0x00 "HS2,DSI8 HS2 Tile Configuration" group.byte 0x93++0x00 line.byte 0x00 "HS3,DSI8 HS3 Tile Configuration" group.byte 0x94++0x00 line.byte 0x00 "HS4,DSI8 HS4 Tile Configuration" group.byte 0x95++0x00 line.byte 0x00 "HS5,DSI8 HS5 Tile Configuration" group.byte 0x96++0x00 line.byte 0x00 "HS6,DSI8 HS6 Tile Configuration" group.byte 0x97++0x00 line.byte 0x00 "HS7,DSI8 HS7 Tile Configuration" group.byte 0x98++0x00 line.byte 0x00 "HS8,DSI8 HS8 Tile Configuration" group.byte 0x99++0x00 line.byte 0x00 "HS9,DSI8 HS9 Tile Configuration" group.byte 0x9A++0x00 line.byte 0x00 "HS10,DSI8 HS10 Tile Configuration" group.byte 0x9B++0x00 line.byte 0x00 "HS11,DSI8 HS11 Tile Configuration" group.byte 0x9C++0x00 line.byte 0x00 "HS12,DSI8 HS12 Tile Configuration" group.byte 0x9D++0x00 line.byte 0x00 "HS13,DSI8 HS13 Tile Configuration" group.byte 0x9E++0x00 line.byte 0x00 "HS14,DSI8 HS14 Tile Configuration" group.byte 0x9F++0x00 line.byte 0x00 "HS15,DSI8 HS15 Tile Configuration" group.byte 0xA0++0x00 line.byte 0x00 "HS16,DSI8 HS16 Tile Configuration" group.byte 0xA1++0x00 line.byte 0x00 "HS17,DSI8 HS17 Tile Configuration" group.byte 0xA2++0x00 line.byte 0x00 "HS18,DSI8 HS18 Tile Configuration" group.byte 0xA3++0x00 line.byte 0x00 "HS19,DSI8 HS19 Tile Configuration" group.byte 0xA4++0x00 line.byte 0x00 "HS20,DSI8 HS20 Tile Configuration" group.byte 0xA5++0x00 line.byte 0x00 "HS21,DSI8 HS21 Tile Configuration" group.byte 0xA6++0x00 line.byte 0x00 "HS22,DSI8 HS22 Tile Configuration" group.byte 0xA7++0x00 line.byte 0x00 "HS23,DSI8 HS23 Tile Configuration" group.byte 0xA8++0x00 line.byte 0x00 "HV_R0,DSI8 HV0 Tile Configuration" group.byte 0xA9++0x00 line.byte 0x00 "HV_R1,DSI8 HV1 Tile Configuration" group.byte 0xAA++0x00 line.byte 0x00 "HV_R2,DSI8 HV2 Tile Configuration" group.byte 0xAB++0x00 line.byte 0x00 "HV_R3,DSI8 HV3 Tile Configuration" group.byte 0xAC++0x00 line.byte 0x00 "HV_R4,DSI8 HV4 Tile Configuration" group.byte 0xAD++0x00 line.byte 0x00 "HV_R5,DSI8 HV5 Tile Configuration" group.byte 0xAE++0x00 line.byte 0x00 "HV_R6,DSI8 HV6 Tile Configuration" group.byte 0xAF++0x00 line.byte 0x00 "HV_R7,DSI8 HV7 Tile Configuration" group.byte 0xB0++0x00 line.byte 0x00 "HV_R8,DSI8 HV8 Tile Configuration" group.byte 0xB1++0x00 line.byte 0x00 "HV_R9,DSI8 HV9 Tile Configuration" group.byte 0xB2++0x00 line.byte 0x00 "HV_R10,DSI8 HV10 Tile Configuration" group.byte 0xB3++0x00 line.byte 0x00 "HV_R11,DSI8 HV11 Tile Configuration" group.byte 0xB4++0x00 line.byte 0x00 "HV_R12,DSI8 HV12 Tile Configuration" group.byte 0xB5++0x00 line.byte 0x00 "HV_R13,DSI8 HV13 Tile Configuration" group.byte 0xB6++0x00 line.byte 0x00 "HV_R14,DSI8 HV14 Tile Configuration" group.byte 0xB7++0x00 line.byte 0x00 "HV_R15,DSI8 HV15 Tile Configuration" group.byte 0xC0++0x00 line.byte 0x00 "DSIINP0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC2++0x00 line.byte 0x00 "DSIINP1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC4++0x00 line.byte 0x00 "DSIINP2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC6++0x00 line.byte 0x00 "DSIINP3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC8++0x00 line.byte 0x00 "DSIINP4,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCA++0x00 line.byte 0x00 "DSIINP5,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCC++0x00 line.byte 0x00 "DSIOUTP0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCE++0x00 line.byte 0x00 "DSIOUTP1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD0++0x00 line.byte 0x00 "DSIOUTP2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD2++0x00 line.byte 0x00 "DSIOUTP3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD4++0x00 line.byte 0x00 "DSIOUTT0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD6++0x00 line.byte 0x00 "DSIOUTT1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD8++0x00 line.byte 0x00 "DSIOUTT2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDA++0x00 line.byte 0x00 "DSIOUTT3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDC++0x00 line.byte 0x00 "DSIOUTT4,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDE++0x00 line.byte 0x00 "DSIOUTT5,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xE0++0x00 line.byte 0x00 "VS0,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE2++0x00 line.byte 0x00 "VS1,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE4++0x00 line.byte 0x00 "VS2,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE6++0x00 line.byte 0x00 "VS3,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE8++0x00 line.byte 0x00 "VS4,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEA++0x00 line.byte 0x00 "VS5,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEC++0x00 line.byte 0x00 "VS6,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEE++0x00 line.byte 0x00 "VS7,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" width 0x0B tree.end tree "DSI 9" base ad:0x40014900 width 10. group.byte 0x0++0x00 line.byte 0x00 "HC0,DSI9 HC0 Tile Configuration" group.byte 0x1++0x00 line.byte 0x00 "HC1,DSI9 HC1 Tile Configuration" group.byte 0x2++0x00 line.byte 0x00 "HC2,DSI9 HC2 Tile Configuration" group.byte 0x3++0x00 line.byte 0x00 "HC3,DSI9 HC3 Tile Configuration" group.byte 0x4++0x00 line.byte 0x00 "HC4,DSI9 HC4 Tile Configuration" group.byte 0x5++0x00 line.byte 0x00 "HC5,DSI9 HC5 Tile Configuration" group.byte 0x6++0x00 line.byte 0x00 "HC6,DSI9 HC6 Tile Configuration" group.byte 0x7++0x00 line.byte 0x00 "HC7,DSI9 HC7 Tile Configuration" group.byte 0x8++0x00 line.byte 0x00 "HC8,DSI9 HC8 Tile Configuration" group.byte 0x9++0x00 line.byte 0x00 "HC9,DSI9 HC9 Tile Configuration" group.byte 0xA++0x00 line.byte 0x00 "HC10,DSI9 HC10 Tile Configuration" group.byte 0xB++0x00 line.byte 0x00 "HC11,DSI9 HC11 Tile Configuration" group.byte 0xC++0x00 line.byte 0x00 "HC12,DSI9 HC12 Tile Configuration" group.byte 0xD++0x00 line.byte 0x00 "HC13,DSI9 HC13 Tile Configuration" group.byte 0xE++0x00 line.byte 0x00 "HC14,DSI9 HC14 Tile Configuration" group.byte 0xF++0x00 line.byte 0x00 "HC15,DSI9 HC15 Tile Configuration" group.byte 0x10++0x00 line.byte 0x00 "HC16,DSI9 HC16 Tile Configuration" group.byte 0x11++0x00 line.byte 0x00 "HC17,DSI9 HC17 Tile Configuration" group.byte 0x12++0x00 line.byte 0x00 "HC18,DSI9 HC18 Tile Configuration" group.byte 0x13++0x00 line.byte 0x00 "HC19,DSI9 HC19 Tile Configuration" group.byte 0x14++0x00 line.byte 0x00 "HC20,DSI9 HC20 Tile Configuration" group.byte 0x15++0x00 line.byte 0x00 "HC21,DSI9 HC21 Tile Configuration" group.byte 0x16++0x00 line.byte 0x00 "HC22,DSI9 HC22 Tile Configuration" group.byte 0x17++0x00 line.byte 0x00 "HC23,DSI9 HC23 Tile Configuration" group.byte 0x18++0x00 line.byte 0x00 "HC24,DSI9 HC24 Tile Configuration" group.byte 0x19++0x00 line.byte 0x00 "HC25,DSI9 HC25 Tile Configuration" group.byte 0x1A++0x00 line.byte 0x00 "HC26,DSI9 HC26 Tile Configuration" group.byte 0x1B++0x00 line.byte 0x00 "HC27,DSI9 HC27 Tile Configuration" group.byte 0x1C++0x00 line.byte 0x00 "HC28,DSI9 HC28 Tile Configuration" group.byte 0x1D++0x00 line.byte 0x00 "HC29,DSI9 HC29 Tile Configuration" group.byte 0x1E++0x00 line.byte 0x00 "HC30,DSI9 HC30 Tile Configuration" group.byte 0x1F++0x00 line.byte 0x00 "HC31,DSI9 HC31 Tile Configuration" group.byte 0x20++0x00 line.byte 0x00 "HC32,DSI9 HC32 Tile Configuration" group.byte 0x21++0x00 line.byte 0x00 "HC33,DSI9 HC33 Tile Configuration" group.byte 0x22++0x00 line.byte 0x00 "HC34,DSI9 HC34 Tile Configuration" group.byte 0x23++0x00 line.byte 0x00 "HC35,DSI9 HC35 Tile Configuration" group.byte 0x24++0x00 line.byte 0x00 "HC36,DSI9 HC36 Tile Configuration" group.byte 0x25++0x00 line.byte 0x00 "HC37,DSI9 HC37 Tile Configuration" group.byte 0x26++0x00 line.byte 0x00 "HC38,DSI9 HC38 Tile Configuration" group.byte 0x27++0x00 line.byte 0x00 "HC39,DSI9 HC39 Tile Configuration" group.byte 0x28++0x00 line.byte 0x00 "HC40,DSI9 HC40 Tile Configuration" group.byte 0x29++0x00 line.byte 0x00 "HC41,DSI9 HC41 Tile Configuration" group.byte 0x2A++0x00 line.byte 0x00 "HC42,DSI9 HC42 Tile Configuration" group.byte 0x2B++0x00 line.byte 0x00 "HC43,DSI9 HC43 Tile Configuration" group.byte 0x2C++0x00 line.byte 0x00 "HC44,DSI9 HC44 Tile Configuration" group.byte 0x2D++0x00 line.byte 0x00 "HC45,DSI9 HC45 Tile Configuration" group.byte 0x2E++0x00 line.byte 0x00 "HC46,DSI9 HC46 Tile Configuration" group.byte 0x2F++0x00 line.byte 0x00 "HC47,DSI9 HC47 Tile Configuration" group.byte 0x30++0x00 line.byte 0x00 "HC48,DSI9 HC48 Tile Configuration" group.byte 0x31++0x00 line.byte 0x00 "HC49,DSI9 HC49 Tile Configuration" group.byte 0x32++0x00 line.byte 0x00 "HC50,DSI9 HC50 Tile Configuration" group.byte 0x33++0x00 line.byte 0x00 "HC51,DSI9 HC51 Tile Configuration" group.byte 0x34++0x00 line.byte 0x00 "HC52,DSI9 HC52 Tile Configuration" group.byte 0x35++0x00 line.byte 0x00 "HC53,DSI9 HC53 Tile Configuration" group.byte 0x36++0x00 line.byte 0x00 "HC54,DSI9 HC54 Tile Configuration" group.byte 0x37++0x00 line.byte 0x00 "HC55,DSI9 HC55 Tile Configuration" group.byte 0x38++0x00 line.byte 0x00 "HC56,DSI9 HC56 Tile Configuration" group.byte 0x39++0x00 line.byte 0x00 "HC57,DSI9 HC57 Tile Configuration" group.byte 0x3A++0x00 line.byte 0x00 "HC58,DSI9 HC58 Tile Configuration" group.byte 0x3B++0x00 line.byte 0x00 "HC59,DSI9 HC59 Tile Configuration" group.byte 0x3C++0x00 line.byte 0x00 "HC60,DSI9 HC60 Tile Configuration" group.byte 0x3D++0x00 line.byte 0x00 "HC61,DSI9 HC61 Tile Configuration" group.byte 0x3E++0x00 line.byte 0x00 "HC62,DSI9 HC62 Tile Configuration" group.byte 0x3F++0x00 line.byte 0x00 "HC63,DSI9 HC63 Tile Configuration" group.byte 0x40++0x00 line.byte 0x00 "HC64,DSI9 HC64 Tile Configuration" group.byte 0x41++0x00 line.byte 0x00 "HC65,DSI9 HC65 Tile Configuration" group.byte 0x42++0x00 line.byte 0x00 "HC66,DSI9 HC66 Tile Configuration" group.byte 0x43++0x00 line.byte 0x00 "HC67,DSI9 HC67 Tile Configuration" group.byte 0x44++0x00 line.byte 0x00 "HC68,DSI9 HC68 Tile Configuration" group.byte 0x45++0x00 line.byte 0x00 "HC69,DSI9 HC69 Tile Configuration" group.byte 0x46++0x00 line.byte 0x00 "HC70,DSI9 HC70 Tile Configuration" group.byte 0x47++0x00 line.byte 0x00 "HC71,DSI9 HC71 Tile Configuration" group.byte 0x48++0x00 line.byte 0x00 "HC72,DSI9 HC72 Tile Configuration" group.byte 0x49++0x00 line.byte 0x00 "HC73,DSI9 HC73 Tile Configuration" group.byte 0x4A++0x00 line.byte 0x00 "HC74,DSI9 HC74 Tile Configuration" group.byte 0x4B++0x00 line.byte 0x00 "HC75,DSI9 HC75 Tile Configuration" group.byte 0x4C++0x00 line.byte 0x00 "HC76,DSI9 HC76 Tile Configuration" group.byte 0x4D++0x00 line.byte 0x00 "HC77,DSI9 HC77 Tile Configuration" group.byte 0x4E++0x00 line.byte 0x00 "HC78,DSI9 HC78 Tile Configuration" group.byte 0x4F++0x00 line.byte 0x00 "HC79,DSI9 HC79 Tile Configuration" group.byte 0x50++0x00 line.byte 0x00 "HC80,DSI9 HC80 Tile Configuration" group.byte 0x51++0x00 line.byte 0x00 "HC81,DSI9 HC81 Tile Configuration" group.byte 0x52++0x00 line.byte 0x00 "HC82,DSI9 HC82 Tile Configuration" group.byte 0x53++0x00 line.byte 0x00 "HC83,DSI9 HC83 Tile Configuration" group.byte 0x54++0x00 line.byte 0x00 "HC84,DSI9 HC84 Tile Configuration" group.byte 0x55++0x00 line.byte 0x00 "HC85,DSI9 HC85 Tile Configuration" group.byte 0x56++0x00 line.byte 0x00 "HC86,DSI9 HC86 Tile Configuration" group.byte 0x57++0x00 line.byte 0x00 "HC87,DSI9 HC87 Tile Configuration" group.byte 0x58++0x00 line.byte 0x00 "HC88,DSI9 HC88 Tile Configuration" group.byte 0x59++0x00 line.byte 0x00 "HC89,DSI9 HC89 Tile Configuration" group.byte 0x5A++0x00 line.byte 0x00 "HC90,DSI9 HC90 Tile Configuration" group.byte 0x5B++0x00 line.byte 0x00 "HC91,DSI9 HC91 Tile Configuration" group.byte 0x5C++0x00 line.byte 0x00 "HC92,DSI9 HC92 Tile Configuration" group.byte 0x5D++0x00 line.byte 0x00 "HC93,DSI9 HC93 Tile Configuration" group.byte 0x5E++0x00 line.byte 0x00 "HC94,DSI9 HC94 Tile Configuration" group.byte 0x5F++0x00 line.byte 0x00 "HC95,DSI9 HC95 Tile Configuration" group.byte 0x60++0x00 line.byte 0x00 "HC96,DSI9 HC96 Tile Configuration" group.byte 0x61++0x00 line.byte 0x00 "HC97,DSI9 HC97 Tile Configuration" group.byte 0x62++0x00 line.byte 0x00 "HC98,DSI9 HC98 Tile Configuration" group.byte 0x63++0x00 line.byte 0x00 "HC99,DSI9 HC99 Tile Configuration" group.byte 0x64++0x00 line.byte 0x00 "HC100,DSI9 HC100 Tile Configuration" group.byte 0x65++0x00 line.byte 0x00 "HC101,DSI9 HC101 Tile Configuration" group.byte 0x66++0x00 line.byte 0x00 "HC102,DSI9 HC102 Tile Configuration" group.byte 0x67++0x00 line.byte 0x00 "HC103,DSI9 HC103 Tile Configuration" group.byte 0x68++0x00 line.byte 0x00 "HC104,DSI9 HC104 Tile Configuration" group.byte 0x69++0x00 line.byte 0x00 "HC105,DSI9 HC105 Tile Configuration" group.byte 0x6A++0x00 line.byte 0x00 "HC106,DSI9 HC106 Tile Configuration" group.byte 0x6B++0x00 line.byte 0x00 "HC107,DSI9 HC107 Tile Configuration" group.byte 0x6C++0x00 line.byte 0x00 "HC108,DSI9 HC108 Tile Configuration" group.byte 0x6D++0x00 line.byte 0x00 "HC109,DSI9 HC109 Tile Configuration" group.byte 0x6E++0x00 line.byte 0x00 "HC110,DSI9 HC110 Tile Configuration" group.byte 0x6F++0x00 line.byte 0x00 "HC111,DSI9 HC111 Tile Configuration" group.byte 0x70++0x00 line.byte 0x00 "HC112,DSI9 HC112 Tile Configuration" group.byte 0x71++0x00 line.byte 0x00 "HC113,DSI9 HC113 Tile Configuration" group.byte 0x72++0x00 line.byte 0x00 "HC114,DSI9 HC114 Tile Configuration" group.byte 0x73++0x00 line.byte 0x00 "HC115,DSI9 HC115 Tile Configuration" group.byte 0x74++0x00 line.byte 0x00 "HC116,DSI9 HC116 Tile Configuration" group.byte 0x75++0x00 line.byte 0x00 "HC117,DSI9 HC117 Tile Configuration" group.byte 0x76++0x00 line.byte 0x00 "HC118,DSI9 HC118 Tile Configuration" group.byte 0x77++0x00 line.byte 0x00 "HC119,DSI9 HC119 Tile Configuration" group.byte 0x78++0x00 line.byte 0x00 "HC120,DSI9 HC120 Tile Configuration" group.byte 0x79++0x00 line.byte 0x00 "HC121,DSI9 HC121 Tile Configuration" group.byte 0x7A++0x00 line.byte 0x00 "HC122,DSI9 HC122 Tile Configuration" group.byte 0x7B++0x00 line.byte 0x00 "HC123,DSI9 HC123 Tile Configuration" group.byte 0x7C++0x00 line.byte 0x00 "HC124,DSI9 HC124 Tile Configuration" group.byte 0x7D++0x00 line.byte 0x00 "HC125,DSI9 HC125 Tile Configuration" group.byte 0x7E++0x00 line.byte 0x00 "HC126,DSI9 HC126 Tile Configuration" group.byte 0x7F++0x00 line.byte 0x00 "HC127,DSI9 HC127 Tile Configuration" group.byte 0x80++0x00 line.byte 0x00 "HV_L0,DSI9 HV0 Tile Configuration" group.byte 0x81++0x00 line.byte 0x00 "HV_L1,DSI9 HV1 Tile Configuration" group.byte 0x82++0x00 line.byte 0x00 "HV_L2,DSI9 HV2 Tile Configuration" group.byte 0x83++0x00 line.byte 0x00 "HV_L3,DSI9 HV3 Tile Configuration" group.byte 0x84++0x00 line.byte 0x00 "HV_L4,DSI9 HV4 Tile Configuration" group.byte 0x85++0x00 line.byte 0x00 "HV_L5,DSI9 HV5 Tile Configuration" group.byte 0x86++0x00 line.byte 0x00 "HV_L6,DSI9 HV6 Tile Configuration" group.byte 0x87++0x00 line.byte 0x00 "HV_L7,DSI9 HV7 Tile Configuration" group.byte 0x88++0x00 line.byte 0x00 "HV_L8,DSI9 HV8 Tile Configuration" group.byte 0x89++0x00 line.byte 0x00 "HV_L9,DSI9 HV9 Tile Configuration" group.byte 0x8A++0x00 line.byte 0x00 "HV_L10,DSI9 HV10 Tile Configuration" group.byte 0x8B++0x00 line.byte 0x00 "HV_L11,DSI9 HV11 Tile Configuration" group.byte 0x8C++0x00 line.byte 0x00 "HV_L12,DSI9 HV12 Tile Configuration" group.byte 0x8D++0x00 line.byte 0x00 "HV_L13,DSI9 HV13 Tile Configuration" group.byte 0x8E++0x00 line.byte 0x00 "HV_L14,DSI9 HV14 Tile Configuration" group.byte 0x8F++0x00 line.byte 0x00 "HV_L15,DSI9 HV15 Tile Configuration" group.byte 0x90++0x00 line.byte 0x00 "HS0,DSI9 HS0 Tile Configuration" group.byte 0x91++0x00 line.byte 0x00 "HS1,DSI9 HS1 Tile Configuration" group.byte 0x92++0x00 line.byte 0x00 "HS2,DSI9 HS2 Tile Configuration" group.byte 0x93++0x00 line.byte 0x00 "HS3,DSI9 HS3 Tile Configuration" group.byte 0x94++0x00 line.byte 0x00 "HS4,DSI9 HS4 Tile Configuration" group.byte 0x95++0x00 line.byte 0x00 "HS5,DSI9 HS5 Tile Configuration" group.byte 0x96++0x00 line.byte 0x00 "HS6,DSI9 HS6 Tile Configuration" group.byte 0x97++0x00 line.byte 0x00 "HS7,DSI9 HS7 Tile Configuration" group.byte 0x98++0x00 line.byte 0x00 "HS8,DSI9 HS8 Tile Configuration" group.byte 0x99++0x00 line.byte 0x00 "HS9,DSI9 HS9 Tile Configuration" group.byte 0x9A++0x00 line.byte 0x00 "HS10,DSI9 HS10 Tile Configuration" group.byte 0x9B++0x00 line.byte 0x00 "HS11,DSI9 HS11 Tile Configuration" group.byte 0x9C++0x00 line.byte 0x00 "HS12,DSI9 HS12 Tile Configuration" group.byte 0x9D++0x00 line.byte 0x00 "HS13,DSI9 HS13 Tile Configuration" group.byte 0x9E++0x00 line.byte 0x00 "HS14,DSI9 HS14 Tile Configuration" group.byte 0x9F++0x00 line.byte 0x00 "HS15,DSI9 HS15 Tile Configuration" group.byte 0xA0++0x00 line.byte 0x00 "HS16,DSI9 HS16 Tile Configuration" group.byte 0xA1++0x00 line.byte 0x00 "HS17,DSI9 HS17 Tile Configuration" group.byte 0xA2++0x00 line.byte 0x00 "HS18,DSI9 HS18 Tile Configuration" group.byte 0xA3++0x00 line.byte 0x00 "HS19,DSI9 HS19 Tile Configuration" group.byte 0xA4++0x00 line.byte 0x00 "HS20,DSI9 HS20 Tile Configuration" group.byte 0xA5++0x00 line.byte 0x00 "HS21,DSI9 HS21 Tile Configuration" group.byte 0xA6++0x00 line.byte 0x00 "HS22,DSI9 HS22 Tile Configuration" group.byte 0xA7++0x00 line.byte 0x00 "HS23,DSI9 HS23 Tile Configuration" group.byte 0xA8++0x00 line.byte 0x00 "HV_R0,DSI9 HV0 Tile Configuration" group.byte 0xA9++0x00 line.byte 0x00 "HV_R1,DSI9 HV1 Tile Configuration" group.byte 0xAA++0x00 line.byte 0x00 "HV_R2,DSI9 HV2 Tile Configuration" group.byte 0xAB++0x00 line.byte 0x00 "HV_R3,DSI9 HV3 Tile Configuration" group.byte 0xAC++0x00 line.byte 0x00 "HV_R4,DSI9 HV4 Tile Configuration" group.byte 0xAD++0x00 line.byte 0x00 "HV_R5,DSI9 HV5 Tile Configuration" group.byte 0xAE++0x00 line.byte 0x00 "HV_R6,DSI9 HV6 Tile Configuration" group.byte 0xAF++0x00 line.byte 0x00 "HV_R7,DSI9 HV7 Tile Configuration" group.byte 0xB0++0x00 line.byte 0x00 "HV_R8,DSI9 HV8 Tile Configuration" group.byte 0xB1++0x00 line.byte 0x00 "HV_R9,DSI9 HV9 Tile Configuration" group.byte 0xB2++0x00 line.byte 0x00 "HV_R10,DSI9 HV10 Tile Configuration" group.byte 0xB3++0x00 line.byte 0x00 "HV_R11,DSI9 HV11 Tile Configuration" group.byte 0xB4++0x00 line.byte 0x00 "HV_R12,DSI9 HV12 Tile Configuration" group.byte 0xB5++0x00 line.byte 0x00 "HV_R13,DSI9 HV13 Tile Configuration" group.byte 0xB6++0x00 line.byte 0x00 "HV_R14,DSI9 HV14 Tile Configuration" group.byte 0xB7++0x00 line.byte 0x00 "HV_R15,DSI9 HV15 Tile Configuration" group.byte 0xC0++0x00 line.byte 0x00 "DSIINP0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC2++0x00 line.byte 0x00 "DSIINP1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC4++0x00 line.byte 0x00 "DSIINP2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC6++0x00 line.byte 0x00 "DSIINP3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC8++0x00 line.byte 0x00 "DSIINP4,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCA++0x00 line.byte 0x00 "DSIINP5,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCC++0x00 line.byte 0x00 "DSIOUTP0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCE++0x00 line.byte 0x00 "DSIOUTP1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD0++0x00 line.byte 0x00 "DSIOUTP2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD2++0x00 line.byte 0x00 "DSIOUTP3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD4++0x00 line.byte 0x00 "DSIOUTT0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD6++0x00 line.byte 0x00 "DSIOUTT1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD8++0x00 line.byte 0x00 "DSIOUTT2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDA++0x00 line.byte 0x00 "DSIOUTT3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDC++0x00 line.byte 0x00 "DSIOUTT4,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDE++0x00 line.byte 0x00 "DSIOUTT5,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xE0++0x00 line.byte 0x00 "VS0,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE2++0x00 line.byte 0x00 "VS1,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE4++0x00 line.byte 0x00 "VS2,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE6++0x00 line.byte 0x00 "VS3,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE8++0x00 line.byte 0x00 "VS4,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEA++0x00 line.byte 0x00 "VS5,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEC++0x00 line.byte 0x00 "VS6,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEE++0x00 line.byte 0x00 "VS7,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" width 0x0B tree.end tree "DSI 12" base ad:0x40014C00 width 10. group.byte 0x0++0x00 line.byte 0x00 "HC0,DSI12 HC0 Tile Configuration" group.byte 0x1++0x00 line.byte 0x00 "HC1,DSI12 HC1 Tile Configuration" group.byte 0x2++0x00 line.byte 0x00 "HC2,DSI12 HC2 Tile Configuration" group.byte 0x3++0x00 line.byte 0x00 "HC3,DSI12 HC3 Tile Configuration" group.byte 0x4++0x00 line.byte 0x00 "HC4,DSI12 HC4 Tile Configuration" group.byte 0x5++0x00 line.byte 0x00 "HC5,DSI12 HC5 Tile Configuration" group.byte 0x6++0x00 line.byte 0x00 "HC6,DSI12 HC6 Tile Configuration" group.byte 0x7++0x00 line.byte 0x00 "HC7,DSI12 HC7 Tile Configuration" group.byte 0x8++0x00 line.byte 0x00 "HC8,DSI12 HC8 Tile Configuration" group.byte 0x9++0x00 line.byte 0x00 "HC9,DSI12 HC9 Tile Configuration" group.byte 0xA++0x00 line.byte 0x00 "HC10,DSI12 HC10 Tile Configuration" group.byte 0xB++0x00 line.byte 0x00 "HC11,DSI12 HC11 Tile Configuration" group.byte 0xC++0x00 line.byte 0x00 "HC12,DSI12 HC12 Tile Configuration" group.byte 0xD++0x00 line.byte 0x00 "HC13,DSI12 HC13 Tile Configuration" group.byte 0xE++0x00 line.byte 0x00 "HC14,DSI12 HC14 Tile Configuration" group.byte 0xF++0x00 line.byte 0x00 "HC15,DSI12 HC15 Tile Configuration" group.byte 0x10++0x00 line.byte 0x00 "HC16,DSI12 HC16 Tile Configuration" group.byte 0x11++0x00 line.byte 0x00 "HC17,DSI12 HC17 Tile Configuration" group.byte 0x12++0x00 line.byte 0x00 "HC18,DSI12 HC18 Tile Configuration" group.byte 0x13++0x00 line.byte 0x00 "HC19,DSI12 HC19 Tile Configuration" group.byte 0x14++0x00 line.byte 0x00 "HC20,DSI12 HC20 Tile Configuration" group.byte 0x15++0x00 line.byte 0x00 "HC21,DSI12 HC21 Tile Configuration" group.byte 0x16++0x00 line.byte 0x00 "HC22,DSI12 HC22 Tile Configuration" group.byte 0x17++0x00 line.byte 0x00 "HC23,DSI12 HC23 Tile Configuration" group.byte 0x18++0x00 line.byte 0x00 "HC24,DSI12 HC24 Tile Configuration" group.byte 0x19++0x00 line.byte 0x00 "HC25,DSI12 HC25 Tile Configuration" group.byte 0x1A++0x00 line.byte 0x00 "HC26,DSI12 HC26 Tile Configuration" group.byte 0x1B++0x00 line.byte 0x00 "HC27,DSI12 HC27 Tile Configuration" group.byte 0x1C++0x00 line.byte 0x00 "HC28,DSI12 HC28 Tile Configuration" group.byte 0x1D++0x00 line.byte 0x00 "HC29,DSI12 HC29 Tile Configuration" group.byte 0x1E++0x00 line.byte 0x00 "HC30,DSI12 HC30 Tile Configuration" group.byte 0x1F++0x00 line.byte 0x00 "HC31,DSI12 HC31 Tile Configuration" group.byte 0x20++0x00 line.byte 0x00 "HC32,DSI12 HC32 Tile Configuration" group.byte 0x21++0x00 line.byte 0x00 "HC33,DSI12 HC33 Tile Configuration" group.byte 0x22++0x00 line.byte 0x00 "HC34,DSI12 HC34 Tile Configuration" group.byte 0x23++0x00 line.byte 0x00 "HC35,DSI12 HC35 Tile Configuration" group.byte 0x24++0x00 line.byte 0x00 "HC36,DSI12 HC36 Tile Configuration" group.byte 0x25++0x00 line.byte 0x00 "HC37,DSI12 HC37 Tile Configuration" group.byte 0x26++0x00 line.byte 0x00 "HC38,DSI12 HC38 Tile Configuration" group.byte 0x27++0x00 line.byte 0x00 "HC39,DSI12 HC39 Tile Configuration" group.byte 0x28++0x00 line.byte 0x00 "HC40,DSI12 HC40 Tile Configuration" group.byte 0x29++0x00 line.byte 0x00 "HC41,DSI12 HC41 Tile Configuration" group.byte 0x2A++0x00 line.byte 0x00 "HC42,DSI12 HC42 Tile Configuration" group.byte 0x2B++0x00 line.byte 0x00 "HC43,DSI12 HC43 Tile Configuration" group.byte 0x2C++0x00 line.byte 0x00 "HC44,DSI12 HC44 Tile Configuration" group.byte 0x2D++0x00 line.byte 0x00 "HC45,DSI12 HC45 Tile Configuration" group.byte 0x2E++0x00 line.byte 0x00 "HC46,DSI12 HC46 Tile Configuration" group.byte 0x2F++0x00 line.byte 0x00 "HC47,DSI12 HC47 Tile Configuration" group.byte 0x30++0x00 line.byte 0x00 "HC48,DSI12 HC48 Tile Configuration" group.byte 0x31++0x00 line.byte 0x00 "HC49,DSI12 HC49 Tile Configuration" group.byte 0x32++0x00 line.byte 0x00 "HC50,DSI12 HC50 Tile Configuration" group.byte 0x33++0x00 line.byte 0x00 "HC51,DSI12 HC51 Tile Configuration" group.byte 0x34++0x00 line.byte 0x00 "HC52,DSI12 HC52 Tile Configuration" group.byte 0x35++0x00 line.byte 0x00 "HC53,DSI12 HC53 Tile Configuration" group.byte 0x36++0x00 line.byte 0x00 "HC54,DSI12 HC54 Tile Configuration" group.byte 0x37++0x00 line.byte 0x00 "HC55,DSI12 HC55 Tile Configuration" group.byte 0x38++0x00 line.byte 0x00 "HC56,DSI12 HC56 Tile Configuration" group.byte 0x39++0x00 line.byte 0x00 "HC57,DSI12 HC57 Tile Configuration" group.byte 0x3A++0x00 line.byte 0x00 "HC58,DSI12 HC58 Tile Configuration" group.byte 0x3B++0x00 line.byte 0x00 "HC59,DSI12 HC59 Tile Configuration" group.byte 0x3C++0x00 line.byte 0x00 "HC60,DSI12 HC60 Tile Configuration" group.byte 0x3D++0x00 line.byte 0x00 "HC61,DSI12 HC61 Tile Configuration" group.byte 0x3E++0x00 line.byte 0x00 "HC62,DSI12 HC62 Tile Configuration" group.byte 0x3F++0x00 line.byte 0x00 "HC63,DSI12 HC63 Tile Configuration" group.byte 0x40++0x00 line.byte 0x00 "HC64,DSI12 HC64 Tile Configuration" group.byte 0x41++0x00 line.byte 0x00 "HC65,DSI12 HC65 Tile Configuration" group.byte 0x42++0x00 line.byte 0x00 "HC66,DSI12 HC66 Tile Configuration" group.byte 0x43++0x00 line.byte 0x00 "HC67,DSI12 HC67 Tile Configuration" group.byte 0x44++0x00 line.byte 0x00 "HC68,DSI12 HC68 Tile Configuration" group.byte 0x45++0x00 line.byte 0x00 "HC69,DSI12 HC69 Tile Configuration" group.byte 0x46++0x00 line.byte 0x00 "HC70,DSI12 HC70 Tile Configuration" group.byte 0x47++0x00 line.byte 0x00 "HC71,DSI12 HC71 Tile Configuration" group.byte 0x48++0x00 line.byte 0x00 "HC72,DSI12 HC72 Tile Configuration" group.byte 0x49++0x00 line.byte 0x00 "HC73,DSI12 HC73 Tile Configuration" group.byte 0x4A++0x00 line.byte 0x00 "HC74,DSI12 HC74 Tile Configuration" group.byte 0x4B++0x00 line.byte 0x00 "HC75,DSI12 HC75 Tile Configuration" group.byte 0x4C++0x00 line.byte 0x00 "HC76,DSI12 HC76 Tile Configuration" group.byte 0x4D++0x00 line.byte 0x00 "HC77,DSI12 HC77 Tile Configuration" group.byte 0x4E++0x00 line.byte 0x00 "HC78,DSI12 HC78 Tile Configuration" group.byte 0x4F++0x00 line.byte 0x00 "HC79,DSI12 HC79 Tile Configuration" group.byte 0x50++0x00 line.byte 0x00 "HC80,DSI12 HC80 Tile Configuration" group.byte 0x51++0x00 line.byte 0x00 "HC81,DSI12 HC81 Tile Configuration" group.byte 0x52++0x00 line.byte 0x00 "HC82,DSI12 HC82 Tile Configuration" group.byte 0x53++0x00 line.byte 0x00 "HC83,DSI12 HC83 Tile Configuration" group.byte 0x54++0x00 line.byte 0x00 "HC84,DSI12 HC84 Tile Configuration" group.byte 0x55++0x00 line.byte 0x00 "HC85,DSI12 HC85 Tile Configuration" group.byte 0x56++0x00 line.byte 0x00 "HC86,DSI12 HC86 Tile Configuration" group.byte 0x57++0x00 line.byte 0x00 "HC87,DSI12 HC87 Tile Configuration" group.byte 0x58++0x00 line.byte 0x00 "HC88,DSI12 HC88 Tile Configuration" group.byte 0x59++0x00 line.byte 0x00 "HC89,DSI12 HC89 Tile Configuration" group.byte 0x5A++0x00 line.byte 0x00 "HC90,DSI12 HC90 Tile Configuration" group.byte 0x5B++0x00 line.byte 0x00 "HC91,DSI12 HC91 Tile Configuration" group.byte 0x5C++0x00 line.byte 0x00 "HC92,DSI12 HC92 Tile Configuration" group.byte 0x5D++0x00 line.byte 0x00 "HC93,DSI12 HC93 Tile Configuration" group.byte 0x5E++0x00 line.byte 0x00 "HC94,DSI12 HC94 Tile Configuration" group.byte 0x5F++0x00 line.byte 0x00 "HC95,DSI12 HC95 Tile Configuration" group.byte 0x60++0x00 line.byte 0x00 "HC96,DSI12 HC96 Tile Configuration" group.byte 0x61++0x00 line.byte 0x00 "HC97,DSI12 HC97 Tile Configuration" group.byte 0x62++0x00 line.byte 0x00 "HC98,DSI12 HC98 Tile Configuration" group.byte 0x63++0x00 line.byte 0x00 "HC99,DSI12 HC99 Tile Configuration" group.byte 0x64++0x00 line.byte 0x00 "HC100,DSI12 HC100 Tile Configuration" group.byte 0x65++0x00 line.byte 0x00 "HC101,DSI12 HC101 Tile Configuration" group.byte 0x66++0x00 line.byte 0x00 "HC102,DSI12 HC102 Tile Configuration" group.byte 0x67++0x00 line.byte 0x00 "HC103,DSI12 HC103 Tile Configuration" group.byte 0x68++0x00 line.byte 0x00 "HC104,DSI12 HC104 Tile Configuration" group.byte 0x69++0x00 line.byte 0x00 "HC105,DSI12 HC105 Tile Configuration" group.byte 0x6A++0x00 line.byte 0x00 "HC106,DSI12 HC106 Tile Configuration" group.byte 0x6B++0x00 line.byte 0x00 "HC107,DSI12 HC107 Tile Configuration" group.byte 0x6C++0x00 line.byte 0x00 "HC108,DSI12 HC108 Tile Configuration" group.byte 0x6D++0x00 line.byte 0x00 "HC109,DSI12 HC109 Tile Configuration" group.byte 0x6E++0x00 line.byte 0x00 "HC110,DSI12 HC110 Tile Configuration" group.byte 0x6F++0x00 line.byte 0x00 "HC111,DSI12 HC111 Tile Configuration" group.byte 0x70++0x00 line.byte 0x00 "HC112,DSI12 HC112 Tile Configuration" group.byte 0x71++0x00 line.byte 0x00 "HC113,DSI12 HC113 Tile Configuration" group.byte 0x72++0x00 line.byte 0x00 "HC114,DSI12 HC114 Tile Configuration" group.byte 0x73++0x00 line.byte 0x00 "HC115,DSI12 HC115 Tile Configuration" group.byte 0x74++0x00 line.byte 0x00 "HC116,DSI12 HC116 Tile Configuration" group.byte 0x75++0x00 line.byte 0x00 "HC117,DSI12 HC117 Tile Configuration" group.byte 0x76++0x00 line.byte 0x00 "HC118,DSI12 HC118 Tile Configuration" group.byte 0x77++0x00 line.byte 0x00 "HC119,DSI12 HC119 Tile Configuration" group.byte 0x78++0x00 line.byte 0x00 "HC120,DSI12 HC120 Tile Configuration" group.byte 0x79++0x00 line.byte 0x00 "HC121,DSI12 HC121 Tile Configuration" group.byte 0x7A++0x00 line.byte 0x00 "HC122,DSI12 HC122 Tile Configuration" group.byte 0x7B++0x00 line.byte 0x00 "HC123,DSI12 HC123 Tile Configuration" group.byte 0x7C++0x00 line.byte 0x00 "HC124,DSI12 HC124 Tile Configuration" group.byte 0x7D++0x00 line.byte 0x00 "HC125,DSI12 HC125 Tile Configuration" group.byte 0x7E++0x00 line.byte 0x00 "HC126,DSI12 HC126 Tile Configuration" group.byte 0x7F++0x00 line.byte 0x00 "HC127,DSI12 HC127 Tile Configuration" group.byte 0x80++0x00 line.byte 0x00 "HV_L0,DSI12 HV0 Tile Configuration" group.byte 0x81++0x00 line.byte 0x00 "HV_L1,DSI12 HV1 Tile Configuration" group.byte 0x82++0x00 line.byte 0x00 "HV_L2,DSI12 HV2 Tile Configuration" group.byte 0x83++0x00 line.byte 0x00 "HV_L3,DSI12 HV3 Tile Configuration" group.byte 0x84++0x00 line.byte 0x00 "HV_L4,DSI12 HV4 Tile Configuration" group.byte 0x85++0x00 line.byte 0x00 "HV_L5,DSI12 HV5 Tile Configuration" group.byte 0x86++0x00 line.byte 0x00 "HV_L6,DSI12 HV6 Tile Configuration" group.byte 0x87++0x00 line.byte 0x00 "HV_L7,DSI12 HV7 Tile Configuration" group.byte 0x88++0x00 line.byte 0x00 "HV_L8,DSI12 HV8 Tile Configuration" group.byte 0x89++0x00 line.byte 0x00 "HV_L9,DSI12 HV9 Tile Configuration" group.byte 0x8A++0x00 line.byte 0x00 "HV_L10,DSI12 HV10 Tile Configuration" group.byte 0x8B++0x00 line.byte 0x00 "HV_L11,DSI12 HV11 Tile Configuration" group.byte 0x8C++0x00 line.byte 0x00 "HV_L12,DSI12 HV12 Tile Configuration" group.byte 0x8D++0x00 line.byte 0x00 "HV_L13,DSI12 HV13 Tile Configuration" group.byte 0x8E++0x00 line.byte 0x00 "HV_L14,DSI12 HV14 Tile Configuration" group.byte 0x8F++0x00 line.byte 0x00 "HV_L15,DSI12 HV15 Tile Configuration" group.byte 0x90++0x00 line.byte 0x00 "HS0,DSI12 HS0 Tile Configuration" group.byte 0x91++0x00 line.byte 0x00 "HS1,DSI12 HS1 Tile Configuration" group.byte 0x92++0x00 line.byte 0x00 "HS2,DSI12 HS2 Tile Configuration" group.byte 0x93++0x00 line.byte 0x00 "HS3,DSI12 HS3 Tile Configuration" group.byte 0x94++0x00 line.byte 0x00 "HS4,DSI12 HS4 Tile Configuration" group.byte 0x95++0x00 line.byte 0x00 "HS5,DSI12 HS5 Tile Configuration" group.byte 0x96++0x00 line.byte 0x00 "HS6,DSI12 HS6 Tile Configuration" group.byte 0x97++0x00 line.byte 0x00 "HS7,DSI12 HS7 Tile Configuration" group.byte 0x98++0x00 line.byte 0x00 "HS8,DSI12 HS8 Tile Configuration" group.byte 0x99++0x00 line.byte 0x00 "HS9,DSI12 HS9 Tile Configuration" group.byte 0x9A++0x00 line.byte 0x00 "HS10,DSI12 HS10 Tile Configuration" group.byte 0x9B++0x00 line.byte 0x00 "HS11,DSI12 HS11 Tile Configuration" group.byte 0x9C++0x00 line.byte 0x00 "HS12,DSI12 HS12 Tile Configuration" group.byte 0x9D++0x00 line.byte 0x00 "HS13,DSI12 HS13 Tile Configuration" group.byte 0x9E++0x00 line.byte 0x00 "HS14,DSI12 HS14 Tile Configuration" group.byte 0x9F++0x00 line.byte 0x00 "HS15,DSI12 HS15 Tile Configuration" group.byte 0xA0++0x00 line.byte 0x00 "HS16,DSI12 HS16 Tile Configuration" group.byte 0xA1++0x00 line.byte 0x00 "HS17,DSI12 HS17 Tile Configuration" group.byte 0xA2++0x00 line.byte 0x00 "HS18,DSI12 HS18 Tile Configuration" group.byte 0xA3++0x00 line.byte 0x00 "HS19,DSI12 HS19 Tile Configuration" group.byte 0xA4++0x00 line.byte 0x00 "HS20,DSI12 HS20 Tile Configuration" group.byte 0xA5++0x00 line.byte 0x00 "HS21,DSI12 HS21 Tile Configuration" group.byte 0xA6++0x00 line.byte 0x00 "HS22,DSI12 HS22 Tile Configuration" group.byte 0xA7++0x00 line.byte 0x00 "HS23,DSI12 HS23 Tile Configuration" group.byte 0xA8++0x00 line.byte 0x00 "HV_R0,DSI12 HV0 Tile Configuration" group.byte 0xA9++0x00 line.byte 0x00 "HV_R1,DSI12 HV1 Tile Configuration" group.byte 0xAA++0x00 line.byte 0x00 "HV_R2,DSI12 HV2 Tile Configuration" group.byte 0xAB++0x00 line.byte 0x00 "HV_R3,DSI12 HV3 Tile Configuration" group.byte 0xAC++0x00 line.byte 0x00 "HV_R4,DSI12 HV4 Tile Configuration" group.byte 0xAD++0x00 line.byte 0x00 "HV_R5,DSI12 HV5 Tile Configuration" group.byte 0xAE++0x00 line.byte 0x00 "HV_R6,DSI12 HV6 Tile Configuration" group.byte 0xAF++0x00 line.byte 0x00 "HV_R7,DSI12 HV7 Tile Configuration" group.byte 0xB0++0x00 line.byte 0x00 "HV_R8,DSI12 HV8 Tile Configuration" group.byte 0xB1++0x00 line.byte 0x00 "HV_R9,DSI12 HV9 Tile Configuration" group.byte 0xB2++0x00 line.byte 0x00 "HV_R10,DSI12 HV10 Tile Configuration" group.byte 0xB3++0x00 line.byte 0x00 "HV_R11,DSI12 HV11 Tile Configuration" group.byte 0xB4++0x00 line.byte 0x00 "HV_R12,DSI12 HV12 Tile Configuration" group.byte 0xB5++0x00 line.byte 0x00 "HV_R13,DSI12 HV13 Tile Configuration" group.byte 0xB6++0x00 line.byte 0x00 "HV_R14,DSI12 HV14 Tile Configuration" group.byte 0xB7++0x00 line.byte 0x00 "HV_R15,DSI12 HV15 Tile Configuration" group.byte 0xC0++0x00 line.byte 0x00 "DSIINP0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC2++0x00 line.byte 0x00 "DSIINP1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC4++0x00 line.byte 0x00 "DSIINP2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC6++0x00 line.byte 0x00 "DSIINP3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC8++0x00 line.byte 0x00 "DSIINP4,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCA++0x00 line.byte 0x00 "DSIINP5,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCC++0x00 line.byte 0x00 "DSIOUTP0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCE++0x00 line.byte 0x00 "DSIOUTP1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD0++0x00 line.byte 0x00 "DSIOUTP2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD2++0x00 line.byte 0x00 "DSIOUTP3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD4++0x00 line.byte 0x00 "DSIOUTT0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD6++0x00 line.byte 0x00 "DSIOUTT1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD8++0x00 line.byte 0x00 "DSIOUTT2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDA++0x00 line.byte 0x00 "DSIOUTT3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDC++0x00 line.byte 0x00 "DSIOUTT4,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDE++0x00 line.byte 0x00 "DSIOUTT5,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xE0++0x00 line.byte 0x00 "VS0,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE2++0x00 line.byte 0x00 "VS1,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE4++0x00 line.byte 0x00 "VS2,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE6++0x00 line.byte 0x00 "VS3,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE8++0x00 line.byte 0x00 "VS4,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEA++0x00 line.byte 0x00 "VS5,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEC++0x00 line.byte 0x00 "VS6,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEE++0x00 line.byte 0x00 "VS7,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" width 0x0B tree.end tree "DSI 13" base ad:0x40014D00 width 10. group.byte 0x0++0x00 line.byte 0x00 "HC0,DSI13 HC0 Tile Configuration" group.byte 0x1++0x00 line.byte 0x00 "HC1,DSI13 HC1 Tile Configuration" group.byte 0x2++0x00 line.byte 0x00 "HC2,DSI13 HC2 Tile Configuration" group.byte 0x3++0x00 line.byte 0x00 "HC3,DSI13 HC3 Tile Configuration" group.byte 0x4++0x00 line.byte 0x00 "HC4,DSI13 HC4 Tile Configuration" group.byte 0x5++0x00 line.byte 0x00 "HC5,DSI13 HC5 Tile Configuration" group.byte 0x6++0x00 line.byte 0x00 "HC6,DSI13 HC6 Tile Configuration" group.byte 0x7++0x00 line.byte 0x00 "HC7,DSI13 HC7 Tile Configuration" group.byte 0x8++0x00 line.byte 0x00 "HC8,DSI13 HC8 Tile Configuration" group.byte 0x9++0x00 line.byte 0x00 "HC9,DSI13 HC9 Tile Configuration" group.byte 0xA++0x00 line.byte 0x00 "HC10,DSI13 HC10 Tile Configuration" group.byte 0xB++0x00 line.byte 0x00 "HC11,DSI13 HC11 Tile Configuration" group.byte 0xC++0x00 line.byte 0x00 "HC12,DSI13 HC12 Tile Configuration" group.byte 0xD++0x00 line.byte 0x00 "HC13,DSI13 HC13 Tile Configuration" group.byte 0xE++0x00 line.byte 0x00 "HC14,DSI13 HC14 Tile Configuration" group.byte 0xF++0x00 line.byte 0x00 "HC15,DSI13 HC15 Tile Configuration" group.byte 0x10++0x00 line.byte 0x00 "HC16,DSI13 HC16 Tile Configuration" group.byte 0x11++0x00 line.byte 0x00 "HC17,DSI13 HC17 Tile Configuration" group.byte 0x12++0x00 line.byte 0x00 "HC18,DSI13 HC18 Tile Configuration" group.byte 0x13++0x00 line.byte 0x00 "HC19,DSI13 HC19 Tile Configuration" group.byte 0x14++0x00 line.byte 0x00 "HC20,DSI13 HC20 Tile Configuration" group.byte 0x15++0x00 line.byte 0x00 "HC21,DSI13 HC21 Tile Configuration" group.byte 0x16++0x00 line.byte 0x00 "HC22,DSI13 HC22 Tile Configuration" group.byte 0x17++0x00 line.byte 0x00 "HC23,DSI13 HC23 Tile Configuration" group.byte 0x18++0x00 line.byte 0x00 "HC24,DSI13 HC24 Tile Configuration" group.byte 0x19++0x00 line.byte 0x00 "HC25,DSI13 HC25 Tile Configuration" group.byte 0x1A++0x00 line.byte 0x00 "HC26,DSI13 HC26 Tile Configuration" group.byte 0x1B++0x00 line.byte 0x00 "HC27,DSI13 HC27 Tile Configuration" group.byte 0x1C++0x00 line.byte 0x00 "HC28,DSI13 HC28 Tile Configuration" group.byte 0x1D++0x00 line.byte 0x00 "HC29,DSI13 HC29 Tile Configuration" group.byte 0x1E++0x00 line.byte 0x00 "HC30,DSI13 HC30 Tile Configuration" group.byte 0x1F++0x00 line.byte 0x00 "HC31,DSI13 HC31 Tile Configuration" group.byte 0x20++0x00 line.byte 0x00 "HC32,DSI13 HC32 Tile Configuration" group.byte 0x21++0x00 line.byte 0x00 "HC33,DSI13 HC33 Tile Configuration" group.byte 0x22++0x00 line.byte 0x00 "HC34,DSI13 HC34 Tile Configuration" group.byte 0x23++0x00 line.byte 0x00 "HC35,DSI13 HC35 Tile Configuration" group.byte 0x24++0x00 line.byte 0x00 "HC36,DSI13 HC36 Tile Configuration" group.byte 0x25++0x00 line.byte 0x00 "HC37,DSI13 HC37 Tile Configuration" group.byte 0x26++0x00 line.byte 0x00 "HC38,DSI13 HC38 Tile Configuration" group.byte 0x27++0x00 line.byte 0x00 "HC39,DSI13 HC39 Tile Configuration" group.byte 0x28++0x00 line.byte 0x00 "HC40,DSI13 HC40 Tile Configuration" group.byte 0x29++0x00 line.byte 0x00 "HC41,DSI13 HC41 Tile Configuration" group.byte 0x2A++0x00 line.byte 0x00 "HC42,DSI13 HC42 Tile Configuration" group.byte 0x2B++0x00 line.byte 0x00 "HC43,DSI13 HC43 Tile Configuration" group.byte 0x2C++0x00 line.byte 0x00 "HC44,DSI13 HC44 Tile Configuration" group.byte 0x2D++0x00 line.byte 0x00 "HC45,DSI13 HC45 Tile Configuration" group.byte 0x2E++0x00 line.byte 0x00 "HC46,DSI13 HC46 Tile Configuration" group.byte 0x2F++0x00 line.byte 0x00 "HC47,DSI13 HC47 Tile Configuration" group.byte 0x30++0x00 line.byte 0x00 "HC48,DSI13 HC48 Tile Configuration" group.byte 0x31++0x00 line.byte 0x00 "HC49,DSI13 HC49 Tile Configuration" group.byte 0x32++0x00 line.byte 0x00 "HC50,DSI13 HC50 Tile Configuration" group.byte 0x33++0x00 line.byte 0x00 "HC51,DSI13 HC51 Tile Configuration" group.byte 0x34++0x00 line.byte 0x00 "HC52,DSI13 HC52 Tile Configuration" group.byte 0x35++0x00 line.byte 0x00 "HC53,DSI13 HC53 Tile Configuration" group.byte 0x36++0x00 line.byte 0x00 "HC54,DSI13 HC54 Tile Configuration" group.byte 0x37++0x00 line.byte 0x00 "HC55,DSI13 HC55 Tile Configuration" group.byte 0x38++0x00 line.byte 0x00 "HC56,DSI13 HC56 Tile Configuration" group.byte 0x39++0x00 line.byte 0x00 "HC57,DSI13 HC57 Tile Configuration" group.byte 0x3A++0x00 line.byte 0x00 "HC58,DSI13 HC58 Tile Configuration" group.byte 0x3B++0x00 line.byte 0x00 "HC59,DSI13 HC59 Tile Configuration" group.byte 0x3C++0x00 line.byte 0x00 "HC60,DSI13 HC60 Tile Configuration" group.byte 0x3D++0x00 line.byte 0x00 "HC61,DSI13 HC61 Tile Configuration" group.byte 0x3E++0x00 line.byte 0x00 "HC62,DSI13 HC62 Tile Configuration" group.byte 0x3F++0x00 line.byte 0x00 "HC63,DSI13 HC63 Tile Configuration" group.byte 0x40++0x00 line.byte 0x00 "HC64,DSI13 HC64 Tile Configuration" group.byte 0x41++0x00 line.byte 0x00 "HC65,DSI13 HC65 Tile Configuration" group.byte 0x42++0x00 line.byte 0x00 "HC66,DSI13 HC66 Tile Configuration" group.byte 0x43++0x00 line.byte 0x00 "HC67,DSI13 HC67 Tile Configuration" group.byte 0x44++0x00 line.byte 0x00 "HC68,DSI13 HC68 Tile Configuration" group.byte 0x45++0x00 line.byte 0x00 "HC69,DSI13 HC69 Tile Configuration" group.byte 0x46++0x00 line.byte 0x00 "HC70,DSI13 HC70 Tile Configuration" group.byte 0x47++0x00 line.byte 0x00 "HC71,DSI13 HC71 Tile Configuration" group.byte 0x48++0x00 line.byte 0x00 "HC72,DSI13 HC72 Tile Configuration" group.byte 0x49++0x00 line.byte 0x00 "HC73,DSI13 HC73 Tile Configuration" group.byte 0x4A++0x00 line.byte 0x00 "HC74,DSI13 HC74 Tile Configuration" group.byte 0x4B++0x00 line.byte 0x00 "HC75,DSI13 HC75 Tile Configuration" group.byte 0x4C++0x00 line.byte 0x00 "HC76,DSI13 HC76 Tile Configuration" group.byte 0x4D++0x00 line.byte 0x00 "HC77,DSI13 HC77 Tile Configuration" group.byte 0x4E++0x00 line.byte 0x00 "HC78,DSI13 HC78 Tile Configuration" group.byte 0x4F++0x00 line.byte 0x00 "HC79,DSI13 HC79 Tile Configuration" group.byte 0x50++0x00 line.byte 0x00 "HC80,DSI13 HC80 Tile Configuration" group.byte 0x51++0x00 line.byte 0x00 "HC81,DSI13 HC81 Tile Configuration" group.byte 0x52++0x00 line.byte 0x00 "HC82,DSI13 HC82 Tile Configuration" group.byte 0x53++0x00 line.byte 0x00 "HC83,DSI13 HC83 Tile Configuration" group.byte 0x54++0x00 line.byte 0x00 "HC84,DSI13 HC84 Tile Configuration" group.byte 0x55++0x00 line.byte 0x00 "HC85,DSI13 HC85 Tile Configuration" group.byte 0x56++0x00 line.byte 0x00 "HC86,DSI13 HC86 Tile Configuration" group.byte 0x57++0x00 line.byte 0x00 "HC87,DSI13 HC87 Tile Configuration" group.byte 0x58++0x00 line.byte 0x00 "HC88,DSI13 HC88 Tile Configuration" group.byte 0x59++0x00 line.byte 0x00 "HC89,DSI13 HC89 Tile Configuration" group.byte 0x5A++0x00 line.byte 0x00 "HC90,DSI13 HC90 Tile Configuration" group.byte 0x5B++0x00 line.byte 0x00 "HC91,DSI13 HC91 Tile Configuration" group.byte 0x5C++0x00 line.byte 0x00 "HC92,DSI13 HC92 Tile Configuration" group.byte 0x5D++0x00 line.byte 0x00 "HC93,DSI13 HC93 Tile Configuration" group.byte 0x5E++0x00 line.byte 0x00 "HC94,DSI13 HC94 Tile Configuration" group.byte 0x5F++0x00 line.byte 0x00 "HC95,DSI13 HC95 Tile Configuration" group.byte 0x60++0x00 line.byte 0x00 "HC96,DSI13 HC96 Tile Configuration" group.byte 0x61++0x00 line.byte 0x00 "HC97,DSI13 HC97 Tile Configuration" group.byte 0x62++0x00 line.byte 0x00 "HC98,DSI13 HC98 Tile Configuration" group.byte 0x63++0x00 line.byte 0x00 "HC99,DSI13 HC99 Tile Configuration" group.byte 0x64++0x00 line.byte 0x00 "HC100,DSI13 HC100 Tile Configuration" group.byte 0x65++0x00 line.byte 0x00 "HC101,DSI13 HC101 Tile Configuration" group.byte 0x66++0x00 line.byte 0x00 "HC102,DSI13 HC102 Tile Configuration" group.byte 0x67++0x00 line.byte 0x00 "HC103,DSI13 HC103 Tile Configuration" group.byte 0x68++0x00 line.byte 0x00 "HC104,DSI13 HC104 Tile Configuration" group.byte 0x69++0x00 line.byte 0x00 "HC105,DSI13 HC105 Tile Configuration" group.byte 0x6A++0x00 line.byte 0x00 "HC106,DSI13 HC106 Tile Configuration" group.byte 0x6B++0x00 line.byte 0x00 "HC107,DSI13 HC107 Tile Configuration" group.byte 0x6C++0x00 line.byte 0x00 "HC108,DSI13 HC108 Tile Configuration" group.byte 0x6D++0x00 line.byte 0x00 "HC109,DSI13 HC109 Tile Configuration" group.byte 0x6E++0x00 line.byte 0x00 "HC110,DSI13 HC110 Tile Configuration" group.byte 0x6F++0x00 line.byte 0x00 "HC111,DSI13 HC111 Tile Configuration" group.byte 0x70++0x00 line.byte 0x00 "HC112,DSI13 HC112 Tile Configuration" group.byte 0x71++0x00 line.byte 0x00 "HC113,DSI13 HC113 Tile Configuration" group.byte 0x72++0x00 line.byte 0x00 "HC114,DSI13 HC114 Tile Configuration" group.byte 0x73++0x00 line.byte 0x00 "HC115,DSI13 HC115 Tile Configuration" group.byte 0x74++0x00 line.byte 0x00 "HC116,DSI13 HC116 Tile Configuration" group.byte 0x75++0x00 line.byte 0x00 "HC117,DSI13 HC117 Tile Configuration" group.byte 0x76++0x00 line.byte 0x00 "HC118,DSI13 HC118 Tile Configuration" group.byte 0x77++0x00 line.byte 0x00 "HC119,DSI13 HC119 Tile Configuration" group.byte 0x78++0x00 line.byte 0x00 "HC120,DSI13 HC120 Tile Configuration" group.byte 0x79++0x00 line.byte 0x00 "HC121,DSI13 HC121 Tile Configuration" group.byte 0x7A++0x00 line.byte 0x00 "HC122,DSI13 HC122 Tile Configuration" group.byte 0x7B++0x00 line.byte 0x00 "HC123,DSI13 HC123 Tile Configuration" group.byte 0x7C++0x00 line.byte 0x00 "HC124,DSI13 HC124 Tile Configuration" group.byte 0x7D++0x00 line.byte 0x00 "HC125,DSI13 HC125 Tile Configuration" group.byte 0x7E++0x00 line.byte 0x00 "HC126,DSI13 HC126 Tile Configuration" group.byte 0x7F++0x00 line.byte 0x00 "HC127,DSI13 HC127 Tile Configuration" group.byte 0x80++0x00 line.byte 0x00 "HV_L0,DSI13 HV0 Tile Configuration" group.byte 0x81++0x00 line.byte 0x00 "HV_L1,DSI13 HV1 Tile Configuration" group.byte 0x82++0x00 line.byte 0x00 "HV_L2,DSI13 HV2 Tile Configuration" group.byte 0x83++0x00 line.byte 0x00 "HV_L3,DSI13 HV3 Tile Configuration" group.byte 0x84++0x00 line.byte 0x00 "HV_L4,DSI13 HV4 Tile Configuration" group.byte 0x85++0x00 line.byte 0x00 "HV_L5,DSI13 HV5 Tile Configuration" group.byte 0x86++0x00 line.byte 0x00 "HV_L6,DSI13 HV6 Tile Configuration" group.byte 0x87++0x00 line.byte 0x00 "HV_L7,DSI13 HV7 Tile Configuration" group.byte 0x88++0x00 line.byte 0x00 "HV_L8,DSI13 HV8 Tile Configuration" group.byte 0x89++0x00 line.byte 0x00 "HV_L9,DSI13 HV9 Tile Configuration" group.byte 0x8A++0x00 line.byte 0x00 "HV_L10,DSI13 HV10 Tile Configuration" group.byte 0x8B++0x00 line.byte 0x00 "HV_L11,DSI13 HV11 Tile Configuration" group.byte 0x8C++0x00 line.byte 0x00 "HV_L12,DSI13 HV12 Tile Configuration" group.byte 0x8D++0x00 line.byte 0x00 "HV_L13,DSI13 HV13 Tile Configuration" group.byte 0x8E++0x00 line.byte 0x00 "HV_L14,DSI13 HV14 Tile Configuration" group.byte 0x8F++0x00 line.byte 0x00 "HV_L15,DSI13 HV15 Tile Configuration" group.byte 0x90++0x00 line.byte 0x00 "HS0,DSI13 HS0 Tile Configuration" group.byte 0x91++0x00 line.byte 0x00 "HS1,DSI13 HS1 Tile Configuration" group.byte 0x92++0x00 line.byte 0x00 "HS2,DSI13 HS2 Tile Configuration" group.byte 0x93++0x00 line.byte 0x00 "HS3,DSI13 HS3 Tile Configuration" group.byte 0x94++0x00 line.byte 0x00 "HS4,DSI13 HS4 Tile Configuration" group.byte 0x95++0x00 line.byte 0x00 "HS5,DSI13 HS5 Tile Configuration" group.byte 0x96++0x00 line.byte 0x00 "HS6,DSI13 HS6 Tile Configuration" group.byte 0x97++0x00 line.byte 0x00 "HS7,DSI13 HS7 Tile Configuration" group.byte 0x98++0x00 line.byte 0x00 "HS8,DSI13 HS8 Tile Configuration" group.byte 0x99++0x00 line.byte 0x00 "HS9,DSI13 HS9 Tile Configuration" group.byte 0x9A++0x00 line.byte 0x00 "HS10,DSI13 HS10 Tile Configuration" group.byte 0x9B++0x00 line.byte 0x00 "HS11,DSI13 HS11 Tile Configuration" group.byte 0x9C++0x00 line.byte 0x00 "HS12,DSI13 HS12 Tile Configuration" group.byte 0x9D++0x00 line.byte 0x00 "HS13,DSI13 HS13 Tile Configuration" group.byte 0x9E++0x00 line.byte 0x00 "HS14,DSI13 HS14 Tile Configuration" group.byte 0x9F++0x00 line.byte 0x00 "HS15,DSI13 HS15 Tile Configuration" group.byte 0xA0++0x00 line.byte 0x00 "HS16,DSI13 HS16 Tile Configuration" group.byte 0xA1++0x00 line.byte 0x00 "HS17,DSI13 HS17 Tile Configuration" group.byte 0xA2++0x00 line.byte 0x00 "HS18,DSI13 HS18 Tile Configuration" group.byte 0xA3++0x00 line.byte 0x00 "HS19,DSI13 HS19 Tile Configuration" group.byte 0xA4++0x00 line.byte 0x00 "HS20,DSI13 HS20 Tile Configuration" group.byte 0xA5++0x00 line.byte 0x00 "HS21,DSI13 HS21 Tile Configuration" group.byte 0xA6++0x00 line.byte 0x00 "HS22,DSI13 HS22 Tile Configuration" group.byte 0xA7++0x00 line.byte 0x00 "HS23,DSI13 HS23 Tile Configuration" group.byte 0xA8++0x00 line.byte 0x00 "HV_R0,DSI13 HV0 Tile Configuration" group.byte 0xA9++0x00 line.byte 0x00 "HV_R1,DSI13 HV1 Tile Configuration" group.byte 0xAA++0x00 line.byte 0x00 "HV_R2,DSI13 HV2 Tile Configuration" group.byte 0xAB++0x00 line.byte 0x00 "HV_R3,DSI13 HV3 Tile Configuration" group.byte 0xAC++0x00 line.byte 0x00 "HV_R4,DSI13 HV4 Tile Configuration" group.byte 0xAD++0x00 line.byte 0x00 "HV_R5,DSI13 HV5 Tile Configuration" group.byte 0xAE++0x00 line.byte 0x00 "HV_R6,DSI13 HV6 Tile Configuration" group.byte 0xAF++0x00 line.byte 0x00 "HV_R7,DSI13 HV7 Tile Configuration" group.byte 0xB0++0x00 line.byte 0x00 "HV_R8,DSI13 HV8 Tile Configuration" group.byte 0xB1++0x00 line.byte 0x00 "HV_R9,DSI13 HV9 Tile Configuration" group.byte 0xB2++0x00 line.byte 0x00 "HV_R10,DSI13 HV10 Tile Configuration" group.byte 0xB3++0x00 line.byte 0x00 "HV_R11,DSI13 HV11 Tile Configuration" group.byte 0xB4++0x00 line.byte 0x00 "HV_R12,DSI13 HV12 Tile Configuration" group.byte 0xB5++0x00 line.byte 0x00 "HV_R13,DSI13 HV13 Tile Configuration" group.byte 0xB6++0x00 line.byte 0x00 "HV_R14,DSI13 HV14 Tile Configuration" group.byte 0xB7++0x00 line.byte 0x00 "HV_R15,DSI13 HV15 Tile Configuration" group.byte 0xC0++0x00 line.byte 0x00 "DSIINP0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC2++0x00 line.byte 0x00 "DSIINP1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC4++0x00 line.byte 0x00 "DSIINP2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC6++0x00 line.byte 0x00 "DSIINP3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xC8++0x00 line.byte 0x00 "DSIINP4,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCA++0x00 line.byte 0x00 "DSIINP5,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCC++0x00 line.byte 0x00 "DSIOUTP0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xCE++0x00 line.byte 0x00 "DSIOUTP1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD0++0x00 line.byte 0x00 "DSIOUTP2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD2++0x00 line.byte 0x00 "DSIOUTP3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD4++0x00 line.byte 0x00 "DSIOUTT0,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD6++0x00 line.byte 0x00 "DSIOUTT1,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xD8++0x00 line.byte 0x00 "DSIOUTT2,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDA++0x00 line.byte 0x00 "DSIOUTT3,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDC++0x00 line.byte 0x00 "DSIOUTT4,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xDE++0x00 line.byte 0x00 "DSIOUTT5,DSI PI Tile Configuration for DSI I/O" hexmask.byte 0x00 4.--7. 1. " PI_BOT ,RAM configuration for BOTTOM DSI port interface" hexmask.byte 0x00 0.--3. 1. " PI_TOP ,RAM configuration for TOP DSI port interface" group.byte 0xE0++0x00 line.byte 0x00 "VS0,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE2++0x00 line.byte 0x00 "VS1,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE4++0x00 line.byte 0x00 "VS2,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE6++0x00 line.byte 0x00 "VS3,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xE8++0x00 line.byte 0x00 "VS4,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEA++0x00 line.byte 0x00 "VS5,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEC++0x00 line.byte 0x00 "VS6,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" group.byte 0xEE++0x00 line.byte 0x00 "VS7,DSI VS Tile Configuration" hexmask.byte 0x00 4.--7. 1. " VS_BOT ,RAM configuration for BOTTOM DSI vertical segmentation" hexmask.byte 0x00 0.--3. 1. " VS_TOP ,RAM configuration for TOP DSI vertical segmentation" width 0x0B tree.end tree.end tree.open "BCTL" tree "BCTL 0" base ad:0x40015000 width 10. group.byte 0x00++0x03 line.byte 0x00 "MDCLK_EN,Digital Clock Enable" bitfld.byte 0x00 7. " DCEN7 ,Bank Clock Enable Control bit 7" "Disabled,Enabled" bitfld.byte 0x00 6. " DCEN6 ,Bank Clock Enable Control bit 6" "Disabled,Enabled" bitfld.byte 0x00 5. " DCEN5 ,Bank Clock Enable Control bit 5" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " DCEN4 ,Bank Clock Enable Control bit 4" "Disabled,Enabled" bitfld.byte 0x00 3. " DCEN3 ,Bank Clock Enable Control bit 3" "Disabled,Enabled" bitfld.byte 0x00 2. " DCEN2 ,Bank Clock Enable Control bit 2" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " DCEN1 ,Bank Clock Enable Control bit 1" "Disabled,Enabled" bitfld.byte 0x00 0. " DCEN0 ,Bank Clock Enable Control bit 0" "Disabled,Enabled" line.byte 0x01 "MBCLK_EN,Bus Clock Enable" bitfld.byte 0x01 2. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x01 1. " NC0 ,Spare register bit" "0,1" bitfld.byte 0x01 0. " BCEN ,Bank Clock Enable Control" "Disabled,Enabled" line.byte 0x02 "WAIT_CFG,Wait State Configuration Register" bitfld.byte 0x02 6.--7. " WR_WRK_WAIT ,Wait States for Writing UDB Working Registers" "1,2,3,0" bitfld.byte 0x02 4.--5. " RD_WRK_WAIT ,Wait States for Reading UDB Working Registers" "1,2,3,0" bitfld.byte 0x02 2.--3. " WR_CFG_WAIT ,Wait States for Writing UDB Configuration" "1,2,3,0" textline " " bitfld.byte 0x02 0.--1. " RD_CFG_WAIT ,Wait States for Reading UDB Configuration" "5,4,3,1" line.byte 0x03 "BANK_CTL,Bank Control Register" bitfld.byte 0x03 3. " GLBL_WR ,Global Write Test Mode" "Disabled,Enabled" bitfld.byte 0x03 2. " DPARAM_TM ,DPARAM Test Mode" "Disabled,Enabled" bitfld.byte 0x03 1. " ROUTE_ENABLE ,Route Enable" "Disabled,Enabled" textline " " bitfld.byte 0x03 0. " DIS_COR ,Disable Clear On Read" "No,Yes" group.byte 0x8++0x01 line.byte 0x00 "DCLK_EN0,Digital Clock Enable 0" bitfld.byte 0x00 7. " DCEN7 ,Bank Clock Enable Control bit 7" "Disabled,Enabled" bitfld.byte 0x00 6. " DCEN6 ,Bank Clock Enable Control bit 6" "Disabled,Enabled" bitfld.byte 0x00 5. " DCEN5 ,Bank Clock Enable Control bit 5" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " DCEN4 ,Bank Clock Enable Control bit 4" "Disabled,Enabled" bitfld.byte 0x00 3. " DCEN3 ,Bank Clock Enable Control bit 3" "Disabled,Enabled" bitfld.byte 0x00 2. " DCEN2 ,Bank Clock Enable Control bit 2" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " DCEN1 ,Bank Clock Enable Control bit 1" "Disabled,Enabled" bitfld.byte 0x00 0. " DCEN0 ,Bank Clock Enable Control bit 0" "Disabled,Enabled" line.byte 0x01 "BCLK_EN0,Bus Clock Enable 0" bitfld.byte 0x01 4. " NC ,Spare register bit" "0,1" bitfld.byte 0x01 3. " DISABLE_ROUTE ,Disable Route" "No,Yes" bitfld.byte 0x01 2. " GCH_WR_HI ,Enable global write operation for the routing channel with the higher address in the associated quadrant" "Disabled,Enabled" textline " " bitfld.byte 0x01 1. " GCH_WR_LO ,Enable global write operation for the routing channel with the lower address in the associated quadrant" "Disabled,Enabled" bitfld.byte 0x01 0. " BCEN ,Bank Clock Enable Control" "Disabled,Enabled" group.byte 0xA++0x01 line.byte 0x00 "DCLK_EN1,Digital Clock Enable 1" bitfld.byte 0x00 7. " DCEN7 ,Bank Clock Enable Control bit 7" "Disabled,Enabled" bitfld.byte 0x00 6. " DCEN6 ,Bank Clock Enable Control bit 6" "Disabled,Enabled" bitfld.byte 0x00 5. " DCEN5 ,Bank Clock Enable Control bit 5" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " DCEN4 ,Bank Clock Enable Control bit 4" "Disabled,Enabled" bitfld.byte 0x00 3. " DCEN3 ,Bank Clock Enable Control bit 3" "Disabled,Enabled" bitfld.byte 0x00 2. " DCEN2 ,Bank Clock Enable Control bit 2" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " DCEN1 ,Bank Clock Enable Control bit 1" "Disabled,Enabled" bitfld.byte 0x00 0. " DCEN0 ,Bank Clock Enable Control bit 0" "Disabled,Enabled" line.byte 0x01 "BCLK_EN1,Bus Clock Enable 1" bitfld.byte 0x01 4. " NC ,Spare register bit" "0,1" bitfld.byte 0x01 3. " DISABLE_ROUTE ,Disable Route" "No,Yes" bitfld.byte 0x01 2. " GCH_WR_HI ,Enable global write operation for the routing channel with the higher address in the associated quadrant" "Disabled,Enabled" textline " " bitfld.byte 0x01 1. " GCH_WR_LO ,Enable global write operation for the routing channel with the lower address in the associated quadrant" "Disabled,Enabled" bitfld.byte 0x01 0. " BCEN ,Bank Clock Enable Control" "Disabled,Enabled" group.byte 0xC++0x01 line.byte 0x00 "DCLK_EN2,Digital Clock Enable 2" bitfld.byte 0x00 7. " DCEN7 ,Bank Clock Enable Control bit 7" "Disabled,Enabled" bitfld.byte 0x00 6. " DCEN6 ,Bank Clock Enable Control bit 6" "Disabled,Enabled" bitfld.byte 0x00 5. " DCEN5 ,Bank Clock Enable Control bit 5" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " DCEN4 ,Bank Clock Enable Control bit 4" "Disabled,Enabled" bitfld.byte 0x00 3. " DCEN3 ,Bank Clock Enable Control bit 3" "Disabled,Enabled" bitfld.byte 0x00 2. " DCEN2 ,Bank Clock Enable Control bit 2" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " DCEN1 ,Bank Clock Enable Control bit 1" "Disabled,Enabled" bitfld.byte 0x00 0. " DCEN0 ,Bank Clock Enable Control bit 0" "Disabled,Enabled" line.byte 0x01 "BCLK_EN2,Bus Clock Enable 2" bitfld.byte 0x01 4. " NC ,Spare register bit" "0,1" bitfld.byte 0x01 3. " DISABLE_ROUTE ,Disable Route" "No,Yes" bitfld.byte 0x01 2. " GCH_WR_HI ,Enable global write operation for the routing channel with the higher address in the associated quadrant" "Disabled,Enabled" textline " " bitfld.byte 0x01 1. " GCH_WR_LO ,Enable global write operation for the routing channel with the lower address in the associated quadrant" "Disabled,Enabled" bitfld.byte 0x01 0. " BCEN ,Bank Clock Enable Control" "Disabled,Enabled" group.byte 0xE++0x01 line.byte 0x00 "DCLK_EN3,Digital Clock Enable 3" bitfld.byte 0x00 7. " DCEN7 ,Bank Clock Enable Control bit 7" "Disabled,Enabled" bitfld.byte 0x00 6. " DCEN6 ,Bank Clock Enable Control bit 6" "Disabled,Enabled" bitfld.byte 0x00 5. " DCEN5 ,Bank Clock Enable Control bit 5" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " DCEN4 ,Bank Clock Enable Control bit 4" "Disabled,Enabled" bitfld.byte 0x00 3. " DCEN3 ,Bank Clock Enable Control bit 3" "Disabled,Enabled" bitfld.byte 0x00 2. " DCEN2 ,Bank Clock Enable Control bit 2" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " DCEN1 ,Bank Clock Enable Control bit 1" "Disabled,Enabled" bitfld.byte 0x00 0. " DCEN0 ,Bank Clock Enable Control bit 0" "Disabled,Enabled" line.byte 0x01 "BCLK_EN3,Bus Clock Enable 3" bitfld.byte 0x01 4. " NC ,Spare register bit" "0,1" bitfld.byte 0x01 3. " DISABLE_ROUTE ,Disable Route" "No,Yes" bitfld.byte 0x01 2. " GCH_WR_HI ,Enable global write operation for the routing channel with the higher address in the associated quadrant" "Disabled,Enabled" textline " " bitfld.byte 0x01 1. " GCH_WR_LO ,Enable global write operation for the routing channel with the lower address in the associated quadrant" "Disabled,Enabled" bitfld.byte 0x01 0. " BCEN ,Bank Clock Enable Control" "Disabled,Enabled" width 0x0B tree.end tree "BCTL 1" base ad:0x40015010 width 10. group.byte 0x00++0x03 line.byte 0x00 "MDCLK_EN,Digital Clock Enable" bitfld.byte 0x00 7. " DCEN7 ,Bank Clock Enable Control bit 7" "Disabled,Enabled" bitfld.byte 0x00 6. " DCEN6 ,Bank Clock Enable Control bit 6" "Disabled,Enabled" bitfld.byte 0x00 5. " DCEN5 ,Bank Clock Enable Control bit 5" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " DCEN4 ,Bank Clock Enable Control bit 4" "Disabled,Enabled" bitfld.byte 0x00 3. " DCEN3 ,Bank Clock Enable Control bit 3" "Disabled,Enabled" bitfld.byte 0x00 2. " DCEN2 ,Bank Clock Enable Control bit 2" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " DCEN1 ,Bank Clock Enable Control bit 1" "Disabled,Enabled" bitfld.byte 0x00 0. " DCEN0 ,Bank Clock Enable Control bit 0" "Disabled,Enabled" line.byte 0x01 "MBCLK_EN,Bus Clock Enable" bitfld.byte 0x01 2. " NC1 ,Spare register bit" "0,1" bitfld.byte 0x01 1. " NC0 ,Spare register bit" "0,1" bitfld.byte 0x01 0. " BCEN ,Bank Clock Enable Control" "Disabled,Enabled" line.byte 0x02 "WAIT_CFG,Wait State Configuration Register" bitfld.byte 0x02 6.--7. " WR_WRK_WAIT ,Wait States for Writing UDB Working Registers" "1,2,3,0" bitfld.byte 0x02 4.--5. " RD_WRK_WAIT ,Wait States for Reading UDB Working Registers" "1,2,3,0" bitfld.byte 0x02 2.--3. " WR_CFG_WAIT ,Wait States for Writing UDB Configuration" "1,2,3,0" textline " " bitfld.byte 0x02 0.--1. " RD_CFG_WAIT ,Wait States for Reading UDB Configuration" "5,4,3,1" line.byte 0x03 "BANK_CTL,Bank Control Register" bitfld.byte 0x03 3. " GLBL_WR ,Global Write Test Mode" "Disabled,Enabled" bitfld.byte 0x03 2. " DPARAM_TM ,DPARAM Test Mode" "Disabled,Enabled" bitfld.byte 0x03 1. " ROUTE_ENABLE ,Route Enable" "Disabled,Enabled" textline " " bitfld.byte 0x03 0. " DIS_COR ,Disable Clear On Read" "No,Yes" group.byte 0x8++0x01 line.byte 0x00 "DCLK_EN0,Digital Clock Enable 0" bitfld.byte 0x00 7. " DCEN7 ,Bank Clock Enable Control bit 7" "Disabled,Enabled" bitfld.byte 0x00 6. " DCEN6 ,Bank Clock Enable Control bit 6" "Disabled,Enabled" bitfld.byte 0x00 5. " DCEN5 ,Bank Clock Enable Control bit 5" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " DCEN4 ,Bank Clock Enable Control bit 4" "Disabled,Enabled" bitfld.byte 0x00 3. " DCEN3 ,Bank Clock Enable Control bit 3" "Disabled,Enabled" bitfld.byte 0x00 2. " DCEN2 ,Bank Clock Enable Control bit 2" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " DCEN1 ,Bank Clock Enable Control bit 1" "Disabled,Enabled" bitfld.byte 0x00 0. " DCEN0 ,Bank Clock Enable Control bit 0" "Disabled,Enabled" line.byte 0x01 "BCLK_EN0,Bus Clock Enable 0" bitfld.byte 0x01 4. " NC ,Spare register bit" "0,1" bitfld.byte 0x01 3. " DISABLE_ROUTE ,Disable Route" "No,Yes" bitfld.byte 0x01 2. " GCH_WR_HI ,Enable global write operation for the routing channel with the higher address in the associated quadrant" "Disabled,Enabled" textline " " bitfld.byte 0x01 1. " GCH_WR_LO ,Enable global write operation for the routing channel with the lower address in the associated quadrant" "Disabled,Enabled" bitfld.byte 0x01 0. " BCEN ,Bank Clock Enable Control" "Disabled,Enabled" group.byte 0xA++0x01 line.byte 0x00 "DCLK_EN1,Digital Clock Enable 1" bitfld.byte 0x00 7. " DCEN7 ,Bank Clock Enable Control bit 7" "Disabled,Enabled" bitfld.byte 0x00 6. " DCEN6 ,Bank Clock Enable Control bit 6" "Disabled,Enabled" bitfld.byte 0x00 5. " DCEN5 ,Bank Clock Enable Control bit 5" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " DCEN4 ,Bank Clock Enable Control bit 4" "Disabled,Enabled" bitfld.byte 0x00 3. " DCEN3 ,Bank Clock Enable Control bit 3" "Disabled,Enabled" bitfld.byte 0x00 2. " DCEN2 ,Bank Clock Enable Control bit 2" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " DCEN1 ,Bank Clock Enable Control bit 1" "Disabled,Enabled" bitfld.byte 0x00 0. " DCEN0 ,Bank Clock Enable Control bit 0" "Disabled,Enabled" line.byte 0x01 "BCLK_EN1,Bus Clock Enable 1" bitfld.byte 0x01 4. " NC ,Spare register bit" "0,1" bitfld.byte 0x01 3. " DISABLE_ROUTE ,Disable Route" "No,Yes" bitfld.byte 0x01 2. " GCH_WR_HI ,Enable global write operation for the routing channel with the higher address in the associated quadrant" "Disabled,Enabled" textline " " bitfld.byte 0x01 1. " GCH_WR_LO ,Enable global write operation for the routing channel with the lower address in the associated quadrant" "Disabled,Enabled" bitfld.byte 0x01 0. " BCEN ,Bank Clock Enable Control" "Disabled,Enabled" group.byte 0xC++0x01 line.byte 0x00 "DCLK_EN2,Digital Clock Enable 2" bitfld.byte 0x00 7. " DCEN7 ,Bank Clock Enable Control bit 7" "Disabled,Enabled" bitfld.byte 0x00 6. " DCEN6 ,Bank Clock Enable Control bit 6" "Disabled,Enabled" bitfld.byte 0x00 5. " DCEN5 ,Bank Clock Enable Control bit 5" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " DCEN4 ,Bank Clock Enable Control bit 4" "Disabled,Enabled" bitfld.byte 0x00 3. " DCEN3 ,Bank Clock Enable Control bit 3" "Disabled,Enabled" bitfld.byte 0x00 2. " DCEN2 ,Bank Clock Enable Control bit 2" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " DCEN1 ,Bank Clock Enable Control bit 1" "Disabled,Enabled" bitfld.byte 0x00 0. " DCEN0 ,Bank Clock Enable Control bit 0" "Disabled,Enabled" line.byte 0x01 "BCLK_EN2,Bus Clock Enable 2" bitfld.byte 0x01 4. " NC ,Spare register bit" "0,1" bitfld.byte 0x01 3. " DISABLE_ROUTE ,Disable Route" "No,Yes" bitfld.byte 0x01 2. " GCH_WR_HI ,Enable global write operation for the routing channel with the higher address in the associated quadrant" "Disabled,Enabled" textline " " bitfld.byte 0x01 1. " GCH_WR_LO ,Enable global write operation for the routing channel with the lower address in the associated quadrant" "Disabled,Enabled" bitfld.byte 0x01 0. " BCEN ,Bank Clock Enable Control" "Disabled,Enabled" group.byte 0xE++0x01 line.byte 0x00 "DCLK_EN3,Digital Clock Enable 3" bitfld.byte 0x00 7. " DCEN7 ,Bank Clock Enable Control bit 7" "Disabled,Enabled" bitfld.byte 0x00 6. " DCEN6 ,Bank Clock Enable Control bit 6" "Disabled,Enabled" bitfld.byte 0x00 5. " DCEN5 ,Bank Clock Enable Control bit 5" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " DCEN4 ,Bank Clock Enable Control bit 4" "Disabled,Enabled" bitfld.byte 0x00 3. " DCEN3 ,Bank Clock Enable Control bit 3" "Disabled,Enabled" bitfld.byte 0x00 2. " DCEN2 ,Bank Clock Enable Control bit 2" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " DCEN1 ,Bank Clock Enable Control bit 1" "Disabled,Enabled" bitfld.byte 0x00 0. " DCEN0 ,Bank Clock Enable Control bit 0" "Disabled,Enabled" line.byte 0x01 "BCLK_EN3,Bus Clock Enable 3" bitfld.byte 0x01 4. " NC ,Spare register bit" "0,1" bitfld.byte 0x01 3. " DISABLE_ROUTE ,Disable Route" "No,Yes" bitfld.byte 0x01 2. " GCH_WR_HI ,Enable global write operation for the routing channel with the higher address in the associated quadrant" "Disabled,Enabled" textline " " bitfld.byte 0x01 1. " GCH_WR_LO ,Enable global write operation for the routing channel with the lower address in the associated quadrant" "Disabled,Enabled" bitfld.byte 0x01 0. " BCEN ,Bank Clock Enable Control" "Disabled,Enabled" width 0x0B tree.end tree.end tree "IDMUX" base ad:0x40015100 width 10. group.byte 0x0++0x00 line.byte 0x00 "IRQ_CTL0,Control Register IRQ_CTL0" bitfld.byte 0x00 6.--7. " ICTRL3 ,IRQ Control 3" "Fixed Function,DMA,UDB,UDB EDGE" bitfld.byte 0x00 4.--5. " ICTRL2 ,IRQ Control 2" "Fixed Function,DMA,UDB,UDB EDGE" bitfld.byte 0x00 2.--3. " ICTRL1 ,IRQ Control 1" "Fixed Function,DMA,UDB,UDB EDGE" textline " " bitfld.byte 0x00 0.--1. " ICTRL0 ,IRQ Control 0" "Fixed Function,DMA,UDB,UDB EDGE" group.byte 0x1++0x00 line.byte 0x00 "IRQ_CTL1,Control Register IRQ_CTL1" bitfld.byte 0x00 6.--7. " ICTRL3 ,IRQ Control 3" "Fixed Function,DMA,UDB,UDB EDGE" bitfld.byte 0x00 4.--5. " ICTRL2 ,IRQ Control 2" "Fixed Function,DMA,UDB,UDB EDGE" bitfld.byte 0x00 2.--3. " ICTRL1 ,IRQ Control 1" "Fixed Function,DMA,UDB,UDB EDGE" textline " " bitfld.byte 0x00 0.--1. " ICTRL0 ,IRQ Control 0" "Fixed Function,DMA,UDB,UDB EDGE" group.byte 0x2++0x00 line.byte 0x00 "IRQ_CTL2,Control Register IRQ_CTL2" bitfld.byte 0x00 6.--7. " ICTRL3 ,IRQ Control 3" "Fixed Function,DMA,UDB,UDB EDGE" bitfld.byte 0x00 4.--5. " ICTRL2 ,IRQ Control 2" "Fixed Function,DMA,UDB,UDB EDGE" bitfld.byte 0x00 2.--3. " ICTRL1 ,IRQ Control 1" "Fixed Function,DMA,UDB,UDB EDGE" textline " " bitfld.byte 0x00 0.--1. " ICTRL0 ,IRQ Control 0" "Fixed Function,DMA,UDB,UDB EDGE" group.byte 0x3++0x00 line.byte 0x00 "IRQ_CTL3,Control Register IRQ_CTL3" bitfld.byte 0x00 6.--7. " ICTRL3 ,IRQ Control 3" "Fixed Function,DMA,UDB,UDB EDGE" bitfld.byte 0x00 4.--5. " ICTRL2 ,IRQ Control 2" "Fixed Function,DMA,UDB,UDB EDGE" bitfld.byte 0x00 2.--3. " ICTRL1 ,IRQ Control 1" "Fixed Function,DMA,UDB,UDB EDGE" textline " " bitfld.byte 0x00 0.--1. " ICTRL0 ,IRQ Control 0" "Fixed Function,DMA,UDB,UDB EDGE" group.byte 0x4++0x00 line.byte 0x00 "IRQ_CTL4,Control Register IRQ_CTL4" bitfld.byte 0x00 6.--7. " ICTRL3 ,IRQ Control 3" "Fixed Function,DMA,UDB,UDB EDGE" bitfld.byte 0x00 4.--5. " ICTRL2 ,IRQ Control 2" "Fixed Function,DMA,UDB,UDB EDGE" bitfld.byte 0x00 2.--3. " ICTRL1 ,IRQ Control 1" "Fixed Function,DMA,UDB,UDB EDGE" textline " " bitfld.byte 0x00 0.--1. " ICTRL0 ,IRQ Control 0" "Fixed Function,DMA,UDB,UDB EDGE" group.byte 0x5++0x00 line.byte 0x00 "IRQ_CTL5,Control Register IRQ_CTL5" bitfld.byte 0x00 6.--7. " ICTRL3 ,IRQ Control 3" "Fixed Function,DMA,UDB,UDB EDGE" bitfld.byte 0x00 4.--5. " ICTRL2 ,IRQ Control 2" "Fixed Function,DMA,UDB,UDB EDGE" bitfld.byte 0x00 2.--3. " ICTRL1 ,IRQ Control 1" "Fixed Function,DMA,UDB,UDB EDGE" textline " " bitfld.byte 0x00 0.--1. " ICTRL0 ,IRQ Control 0" "Fixed Function,DMA,UDB,UDB EDGE" group.byte 0x6++0x00 line.byte 0x00 "IRQ_CTL6,Control Register IRQ_CTL6" bitfld.byte 0x00 6.--7. " ICTRL3 ,IRQ Control 3" "Fixed Function,DMA,UDB,UDB EDGE" bitfld.byte 0x00 4.--5. " ICTRL2 ,IRQ Control 2" "Fixed Function,DMA,UDB,UDB EDGE" bitfld.byte 0x00 2.--3. " ICTRL1 ,IRQ Control 1" "Fixed Function,DMA,UDB,UDB EDGE" textline " " bitfld.byte 0x00 0.--1. " ICTRL0 ,IRQ Control 0" "Fixed Function,DMA,UDB,UDB EDGE" group.byte 0x7++0x00 line.byte 0x00 "IRQ_CTL7,Control Register IRQ_CTL7" bitfld.byte 0x00 6.--7. " ICTRL3 ,IRQ Control 3" "Fixed Function,DMA,UDB,UDB EDGE" bitfld.byte 0x00 4.--5. " ICTRL2 ,IRQ Control 2" "Fixed Function,DMA,UDB,UDB EDGE" bitfld.byte 0x00 2.--3. " ICTRL1 ,IRQ Control 1" "Fixed Function,DMA,UDB,UDB EDGE" textline " " bitfld.byte 0x00 0.--1. " ICTRL0 ,IRQ Control 0" "Fixed Function,DMA,UDB,UDB EDGE" group.byte 0x10++0x00 line.byte 0x00 "DRQ_CTL0,Configuration Register DRQ_CTL0" bitfld.byte 0x00 6.--7. " DCTRL3 ,DMA input type 3" "Fixed Function,UDB,UDB EDGE,?..." bitfld.byte 0x00 4.--5. " DCTRL2 ,DMA input type 2" "Fixed Function,UDB,UDB EDGE,?..." bitfld.byte 0x00 2.--3. " DCTRL1 ,DMA input type 1" "Fixed Function,UDB,UDB EDGE,?..." textline " " bitfld.byte 0x00 0.--1. " DCTRL0 ,DMA input type 0" "Fixed Function,UDB,UDB EDGE,?..." group.byte 0x11++0x00 line.byte 0x00 "DRQ_CTL1,Configuration Register DRQ_CTL1" bitfld.byte 0x00 6.--7. " DCTRL3 ,DMA input type 3" "Fixed Function,UDB,UDB EDGE,?..." bitfld.byte 0x00 4.--5. " DCTRL2 ,DMA input type 2" "Fixed Function,UDB,UDB EDGE,?..." bitfld.byte 0x00 2.--3. " DCTRL1 ,DMA input type 1" "Fixed Function,UDB,UDB EDGE,?..." textline " " bitfld.byte 0x00 0.--1. " DCTRL0 ,DMA input type 0" "Fixed Function,UDB,UDB EDGE,?..." group.byte 0x12++0x00 line.byte 0x00 "DRQ_CTL2,Configuration Register DRQ_CTL2" bitfld.byte 0x00 6.--7. " DCTRL3 ,DMA input type 3" "Fixed Function,UDB,UDB EDGE,?..." bitfld.byte 0x00 4.--5. " DCTRL2 ,DMA input type 2" "Fixed Function,UDB,UDB EDGE,?..." bitfld.byte 0x00 2.--3. " DCTRL1 ,DMA input type 1" "Fixed Function,UDB,UDB EDGE,?..." textline " " bitfld.byte 0x00 0.--1. " DCTRL0 ,DMA input type 0" "Fixed Function,UDB,UDB EDGE,?..." group.byte 0x13++0x00 line.byte 0x00 "DRQ_CTL3,Configuration Register DRQ_CTL3" bitfld.byte 0x00 6.--7. " DCTRL3 ,DMA input type 3" "Fixed Function,UDB,UDB EDGE,?..." bitfld.byte 0x00 4.--5. " DCTRL2 ,DMA input type 2" "Fixed Function,UDB,UDB EDGE,?..." bitfld.byte 0x00 2.--3. " DCTRL1 ,DMA input type 1" "Fixed Function,UDB,UDB EDGE,?..." textline " " bitfld.byte 0x00 0.--1. " DCTRL0 ,DMA input type 0" "Fixed Function,UDB,UDB EDGE,?..." group.byte 0x14++0x00 line.byte 0x00 "DRQ_CTL4,Configuration Register DRQ_CTL4" bitfld.byte 0x00 6.--7. " DCTRL3 ,DMA input type 3" "Fixed Function,UDB,UDB EDGE,?..." bitfld.byte 0x00 4.--5. " DCTRL2 ,DMA input type 2" "Fixed Function,UDB,UDB EDGE,?..." bitfld.byte 0x00 2.--3. " DCTRL1 ,DMA input type 1" "Fixed Function,UDB,UDB EDGE,?..." textline " " bitfld.byte 0x00 0.--1. " DCTRL0 ,DMA input type 0" "Fixed Function,UDB,UDB EDGE,?..." group.byte 0x15++0x00 line.byte 0x00 "DRQ_CTL5,Configuration Register DRQ_CTL5" bitfld.byte 0x00 6.--7. " DCTRL3 ,DMA input type 3" "Fixed Function,UDB,UDB EDGE,?..." bitfld.byte 0x00 4.--5. " DCTRL2 ,DMA input type 2" "Fixed Function,UDB,UDB EDGE,?..." bitfld.byte 0x00 2.--3. " DCTRL1 ,DMA input type 1" "Fixed Function,UDB,UDB EDGE,?..." textline " " bitfld.byte 0x00 0.--1. " DCTRL0 ,DMA input type 0" "Fixed Function,UDB,UDB EDGE,?..." width 0x0B tree.end tree "SFR_USER (General purpose I/Os)" base ad:0x40050100 width 12. group.byte 0x80++0x00 "Port 0" line.byte 0x00 "GPIO0,GPIO0 Output Data State Register" bitfld.byte 0x00 7. " GPIO0[7] ,GPIO0 Output Data Pin 7" "Low,High" bitfld.byte 0x00 6. " GPIO0[6] ,GPIO0 Output Data Pin 6" "Low,High" bitfld.byte 0x00 5. " GPIO0[5] ,GPIO0 Output Data Pin 5" "Low,High" bitfld.byte 0x00 4. " GPIO0[4] ,GPIO0 Output Data Pin 4" "Low,High" textline " " bitfld.byte 0x00 3. " GPIO0[3] ,GPIO0 Output Data Pin 3" "Low,High" bitfld.byte 0x00 2. " GPIO0[2] ,GPIO0 Output Data Pin 2" "Low,High" bitfld.byte 0x00 1. " GPIO0[1] ,GPIO0 Output Data Pin 1" "Low,High" bitfld.byte 0x00 0. " GPIO0[0] ,GPIO0 Output Data Pin 0" "Low,High" rgroup.byte 0x89++0x01 line.byte 0x00 "GPIRD0,GPIRD0 Pin State Register" bitfld.byte 0x00 7. " GPIRD0[7] ,GPIO0 Pin 7 State" "Low,High" bitfld.byte 0x00 6. " GPIRD0[6] ,GPIO0 Pin 6 State" "Low,High" bitfld.byte 0x00 5. " GPIRD0[5] ,GPIO0 Pin 5 State" "Low,High" bitfld.byte 0x00 4. " GPIRD0[4] ,GPIO0 Pin 4 State" "Low,High" textline " " bitfld.byte 0x00 3. " GPIRD0[3] ,GPIO0 Pin 3 State" "Low,High" bitfld.byte 0x00 2. " GPIRD0[2] ,GPIO0 Pin 2 State" "Low,High" bitfld.byte 0x00 1. " GPIRD0[1] ,GPIO0 Pin 1 State" "Low,High" bitfld.byte 0x00 0. " GPIRD0[0] ,GPIO0 Pin 0 State" "Low,High" line.byte 0x01 "GPIO0_SEL,GPIO0 Select Register" bitfld.byte 0x01 7. " GPIO0_SEL[7] ,GPIO0 Select Pin 7" "Not selected,Selected" bitfld.byte 0x01 6. " GPIO0_SEL[6] ,GPIO0 Select Pin 6" "Not selected,Selected" bitfld.byte 0x01 5. " GPIO0_SEL[5] ,GPIO0 Select Pin 5" "Not selected,Selected" textline " " bitfld.byte 0x01 4. " GPIO0_SEL[4] ,GPIO0 Select Pin 4" "Not selected,Selected" bitfld.byte 0x01 3. " GPIO0_SEL[3] ,GPIO0 Select Pin 3" "Not selected,Selected" bitfld.byte 0x01 2. " GPIO0_SEL[2] ,GPIO0 Select Pin 2" "Not selected,Selected" textline " " bitfld.byte 0x01 1. " GPIO0_SEL[1] ,GPIO0 Select Pin 1" "Not selected,Selected" bitfld.byte 0x01 0. " GPIO0_SEL[0] ,GPIO0 Select Pin 0" "Not selected,Selected" group.byte 0x90++0x00 "Port 1" line.byte 0x00 "GPIO1,GPIO1 Output Data State Register" bitfld.byte 0x00 7. " GPIO1[7] ,GPIO1 Output Data Pin 7" "Low,High" bitfld.byte 0x00 6. " GPIO1[6] ,GPIO1 Output Data Pin 6" "Low,High" bitfld.byte 0x00 5. " GPIO1[5] ,GPIO1 Output Data Pin 5" "Low,High" bitfld.byte 0x00 4. " GPIO1[4] ,GPIO1 Output Data Pin 4" "Low,High" textline " " bitfld.byte 0x00 3. " GPIO1[3] ,GPIO1 Output Data Pin 3" "Low,High" bitfld.byte 0x00 2. " GPIO1[2] ,GPIO1 Output Data Pin 2" "Low,High" bitfld.byte 0x00 1. " GPIO1[1] ,GPIO1 Output Data Pin 1" "Low,High" bitfld.byte 0x00 0. " GPIO1[0] ,GPIO1 Output Data Pin 0" "Low,High" rgroup.byte 0x91++0x00 line.byte 0x00 "GPIRD1,GPIRD1 Pin State Register" bitfld.byte 0x00 7. " GPIRD1[7] ,GPIO1 Pin 7 State" "Low,High" bitfld.byte 0x00 6. " GPIRD1[6] ,GPIO1 Pin 6 State" "Low,High" bitfld.byte 0x00 5. " GPIRD1[5] ,GPIO1 Pin 5 State" "Low,High" bitfld.byte 0x00 4. " GPIRD1[4] ,GPIO1 Pin 4 State" "Low,High" textline " " bitfld.byte 0x00 3. " GPIRD1[3] ,GPIO1 Pin 3 State" "Low,High" bitfld.byte 0x00 2. " GPIRD1[2] ,GPIO1 Pin 2 State" "Low,High" bitfld.byte 0x00 1. " GPIRD1[1] ,GPIO1 Pin 1 State" "Low,High" bitfld.byte 0x00 0. " GPIRD1[0] ,GPIO1 Pin 0 State" "Low,High" group.byte 0xa2++0x00 line.byte 0x00 "GPIO1_SEL,GPIO1 Select Register" bitfld.byte 0x00 7. " GPIO1_SEL[7] ,GPIO1 Select Pin 7" "Not selected,Selected" bitfld.byte 0x00 6. " GPIO1_SEL[6] ,GPIO1 Select Pin 6" "Not selected,Selected" bitfld.byte 0x00 5. " GPIO1_SEL[5] ,GPIO1 Select Pin 5" "Not selected,Selected" textline " " bitfld.byte 0x00 4. " GPIO1_SEL[4] ,GPIO1 Select Pin 4" "Not selected,Selected" bitfld.byte 0x00 3. " GPIO1_SEL[3] ,GPIO1 Select Pin 3" "Not selected,Selected" bitfld.byte 0x00 2. " GPIO1_SEL[2] ,GPIO1 Select Pin 2" "Not selected,Selected" textline " " bitfld.byte 0x00 1. " GPIO1_SEL[1] ,GPIO1 Select Pin 1" "Not selected,Selected" bitfld.byte 0x00 0. " GPIO1_SEL[0] ,GPIO1 Select Pin 0" "Not selected,Selected" group.byte 0x98++0x00 "Port 2" line.byte 0x00 "GPIO2,GPIO2 Output Data State Register" bitfld.byte 0x00 7. " GPIO2[7] ,GPIO2 Output Data Pin 7" "Low,High" bitfld.byte 0x00 6. " GPIO2[6] ,GPIO2 Output Data Pin 6" "Low,High" bitfld.byte 0x00 5. " GPIO2[5] ,GPIO2 Output Data Pin 5" "Low,High" bitfld.byte 0x00 4. " GPIO2[4] ,GPIO2 Output Data Pin 4" "Low,High" textline " " bitfld.byte 0x00 3. " GPIO2[3] ,GPIO2 Output Data Pin 3" "Low,High" bitfld.byte 0x00 2. " GPIO2[2] ,GPIO2 Output Data Pin 2" "Low,High" bitfld.byte 0x00 1. " GPIO2[1] ,GPIO2 Output Data Pin 1" "Low,High" bitfld.byte 0x00 0. " GPIO2[0] ,GPIO2 Output Data Pin 0" "Low,High" rgroup.byte (0x98+0x01)++0x00 line.byte 0x00 "GPIRD2,GPIRD2 Pin State Register" bitfld.byte 0x00 7. " GPIRD2[7] ,GPIO2 Pin 7 State" "Low,High" bitfld.byte 0x00 6. " GPIRD2[6] ,GPIO2 Pin 6 State" "Low,High" bitfld.byte 0x00 5. " GPIRD2[5] ,GPIO2 Pin 5 State" "Low,High" bitfld.byte 0x00 4. " GPIRD2[4] ,GPIO2 Pin 4 State" "Low,High" textline " " bitfld.byte 0x00 3. " GPIRD2[3] ,GPIO2 Pin 3 State" "Low,High" bitfld.byte 0x00 2. " GPIRD2[2] ,GPIO2 Pin 2 State" "Low,High" bitfld.byte 0x00 1. " GPIRD2[1] ,GPIO2 Pin 1 State" "Low,High" bitfld.byte 0x00 0. " GPIRD2[0] ,GPIO2 Pin 0 State" "Low,High" group.byte (0x98+0x02)++0x00 line.byte 0x00 "GPIO2_SEL,GPIO2 Select Register" bitfld.byte 0x00 7. " GPIO2_SEL[7] ,GPIO2 Select Pin 7" "Not selected,Selected" bitfld.byte 0x00 6. " GPIO2_SEL[6] ,GPIO2 Select Pin 6" "Not selected,Selected" bitfld.byte 0x00 5. " GPIO2_SEL[5] ,GPIO2 Select Pin 5" "Not selected,Selected" textline " " bitfld.byte 0x00 4. " GPIO2_SEL[4] ,GPIO2 Select Pin 4" "Not selected,Selected" bitfld.byte 0x00 3. " GPIO2_SEL[3] ,GPIO2 Select Pin 3" "Not selected,Selected" bitfld.byte 0x00 2. " GPIO2_SEL[2] ,GPIO2 Select Pin 2" "Not selected,Selected" textline " " bitfld.byte 0x00 1. " GPIO2_SEL[1] ,GPIO2 Select Pin 1" "Not selected,Selected" bitfld.byte 0x00 0. " GPIO2_SEL[0] ,GPIO2 Select Pin 0" "Not selected,Selected" group.byte 0xb0++0x00 "Port 3" line.byte 0x00 "GPIO3,GPIO3 Output Data State Register" bitfld.byte 0x00 7. " GPIO3[7] ,GPIO3 Output Data Pin 7" "Low,High" bitfld.byte 0x00 6. " GPIO3[6] ,GPIO3 Output Data Pin 6" "Low,High" bitfld.byte 0x00 5. " GPIO3[5] ,GPIO3 Output Data Pin 5" "Low,High" bitfld.byte 0x00 4. " GPIO3[4] ,GPIO3 Output Data Pin 4" "Low,High" textline " " bitfld.byte 0x00 3. " GPIO3[3] ,GPIO3 Output Data Pin 3" "Low,High" bitfld.byte 0x00 2. " GPIO3[2] ,GPIO3 Output Data Pin 2" "Low,High" bitfld.byte 0x00 1. " GPIO3[1] ,GPIO3 Output Data Pin 1" "Low,High" bitfld.byte 0x00 0. " GPIO3[0] ,GPIO3 Output Data Pin 0" "Low,High" rgroup.byte (0xb0+0x01)++0x00 line.byte 0x00 "GPIRD3,GPIRD3 Pin State Register" bitfld.byte 0x00 7. " GPIRD3[7] ,GPIO3 Pin 7 State" "Low,High" bitfld.byte 0x00 6. " GPIRD3[6] ,GPIO3 Pin 6 State" "Low,High" bitfld.byte 0x00 5. " GPIRD3[5] ,GPIO3 Pin 5 State" "Low,High" bitfld.byte 0x00 4. " GPIRD3[4] ,GPIO3 Pin 4 State" "Low,High" textline " " bitfld.byte 0x00 3. " GPIRD3[3] ,GPIO3 Pin 3 State" "Low,High" bitfld.byte 0x00 2. " GPIRD3[2] ,GPIO3 Pin 2 State" "Low,High" bitfld.byte 0x00 1. " GPIRD3[1] ,GPIO3 Pin 1 State" "Low,High" bitfld.byte 0x00 0. " GPIRD3[0] ,GPIO3 Pin 0 State" "Low,High" group.byte (0xb0+0x02)++0x00 line.byte 0x00 "GPIO3_SEL,GPIO3 Select Register" bitfld.byte 0x00 7. " GPIO3_SEL[7] ,GPIO3 Select Pin 7" "Not selected,Selected" bitfld.byte 0x00 6. " GPIO3_SEL[6] ,GPIO3 Select Pin 6" "Not selected,Selected" bitfld.byte 0x00 5. " GPIO3_SEL[5] ,GPIO3 Select Pin 5" "Not selected,Selected" textline " " bitfld.byte 0x00 4. " GPIO3_SEL[4] ,GPIO3 Select Pin 4" "Not selected,Selected" bitfld.byte 0x00 3. " GPIO3_SEL[3] ,GPIO3 Select Pin 3" "Not selected,Selected" bitfld.byte 0x00 2. " GPIO3_SEL[2] ,GPIO3 Select Pin 2" "Not selected,Selected" textline " " bitfld.byte 0x00 1. " GPIO3_SEL[1] ,GPIO3 Select Pin 1" "Not selected,Selected" bitfld.byte 0x00 0. " GPIO3_SEL[0] ,GPIO3 Select Pin 0" "Not selected,Selected" group.byte 0xc0++0x00 "Port 4" line.byte 0x00 "GPIO4,GPIO4 Output Data State Register" bitfld.byte 0x00 7. " GPIO4[7] ,GPIO4 Output Data Pin 7" "Low,High" bitfld.byte 0x00 6. " GPIO4[6] ,GPIO4 Output Data Pin 6" "Low,High" bitfld.byte 0x00 5. " GPIO4[5] ,GPIO4 Output Data Pin 5" "Low,High" bitfld.byte 0x00 4. " GPIO4[4] ,GPIO4 Output Data Pin 4" "Low,High" textline " " bitfld.byte 0x00 3. " GPIO4[3] ,GPIO4 Output Data Pin 3" "Low,High" bitfld.byte 0x00 2. " GPIO4[2] ,GPIO4 Output Data Pin 2" "Low,High" bitfld.byte 0x00 1. " GPIO4[1] ,GPIO4 Output Data Pin 1" "Low,High" bitfld.byte 0x00 0. " GPIO4[0] ,GPIO4 Output Data Pin 0" "Low,High" rgroup.byte (0xc0+0x01)++0x00 line.byte 0x00 "GPIRD4,GPIRD4 Pin State Register" bitfld.byte 0x00 7. " GPIRD4[7] ,GPIO4 Pin 7 State" "Low,High" bitfld.byte 0x00 6. " GPIRD4[6] ,GPIO4 Pin 6 State" "Low,High" bitfld.byte 0x00 5. " GPIRD4[5] ,GPIO4 Pin 5 State" "Low,High" bitfld.byte 0x00 4. " GPIRD4[4] ,GPIO4 Pin 4 State" "Low,High" textline " " bitfld.byte 0x00 3. " GPIRD4[3] ,GPIO4 Pin 3 State" "Low,High" bitfld.byte 0x00 2. " GPIRD4[2] ,GPIO4 Pin 2 State" "Low,High" bitfld.byte 0x00 1. " GPIRD4[1] ,GPIO4 Pin 1 State" "Low,High" bitfld.byte 0x00 0. " GPIRD4[0] ,GPIO4 Pin 0 State" "Low,High" group.byte (0xc0+0x02)++0x00 line.byte 0x00 "GPIO4_SEL,GPIO4 Select Register" bitfld.byte 0x00 7. " GPIO4_SEL[7] ,GPIO4 Select Pin 7" "Not selected,Selected" bitfld.byte 0x00 6. " GPIO4_SEL[6] ,GPIO4 Select Pin 6" "Not selected,Selected" bitfld.byte 0x00 5. " GPIO4_SEL[5] ,GPIO4 Select Pin 5" "Not selected,Selected" textline " " bitfld.byte 0x00 4. " GPIO4_SEL[4] ,GPIO4 Select Pin 4" "Not selected,Selected" bitfld.byte 0x00 3. " GPIO4_SEL[3] ,GPIO4 Select Pin 3" "Not selected,Selected" bitfld.byte 0x00 2. " GPIO4_SEL[2] ,GPIO4 Select Pin 2" "Not selected,Selected" textline " " bitfld.byte 0x00 1. " GPIO4_SEL[1] ,GPIO4 Select Pin 1" "Not selected,Selected" bitfld.byte 0x00 0. " GPIO4_SEL[0] ,GPIO4 Select Pin 0" "Not selected,Selected" group.byte 0xc8++0x00 "Port 5" line.byte 0x00 "GPIO5,GPIO5 Output Data State Register" bitfld.byte 0x00 7. " GPIO5[7] ,GPIO5 Output Data Pin 7" "Low,High" bitfld.byte 0x00 6. " GPIO5[6] ,GPIO5 Output Data Pin 6" "Low,High" bitfld.byte 0x00 5. " GPIO5[5] ,GPIO5 Output Data Pin 5" "Low,High" bitfld.byte 0x00 4. " GPIO5[4] ,GPIO5 Output Data Pin 4" "Low,High" textline " " bitfld.byte 0x00 3. " GPIO5[3] ,GPIO5 Output Data Pin 3" "Low,High" bitfld.byte 0x00 2. " GPIO5[2] ,GPIO5 Output Data Pin 2" "Low,High" bitfld.byte 0x00 1. " GPIO5[1] ,GPIO5 Output Data Pin 1" "Low,High" bitfld.byte 0x00 0. " GPIO5[0] ,GPIO5 Output Data Pin 0" "Low,High" rgroup.byte (0xc8+0x01)++0x00 line.byte 0x00 "GPIRD5,GPIRD5 Pin State Register" bitfld.byte 0x00 7. " GPIRD5[7] ,GPIO5 Pin 7 State" "Low,High" bitfld.byte 0x00 6. " GPIRD5[6] ,GPIO5 Pin 6 State" "Low,High" bitfld.byte 0x00 5. " GPIRD5[5] ,GPIO5 Pin 5 State" "Low,High" bitfld.byte 0x00 4. " GPIRD5[4] ,GPIO5 Pin 4 State" "Low,High" textline " " bitfld.byte 0x00 3. " GPIRD5[3] ,GPIO5 Pin 3 State" "Low,High" bitfld.byte 0x00 2. " GPIRD5[2] ,GPIO5 Pin 2 State" "Low,High" bitfld.byte 0x00 1. " GPIRD5[1] ,GPIO5 Pin 1 State" "Low,High" bitfld.byte 0x00 0. " GPIRD5[0] ,GPIO5 Pin 0 State" "Low,High" group.byte (0xc8+0x02)++0x00 line.byte 0x00 "GPIO5_SEL,GPIO5 Select Register" bitfld.byte 0x00 7. " GPIO5_SEL[7] ,GPIO5 Select Pin 7" "Not selected,Selected" bitfld.byte 0x00 6. " GPIO5_SEL[6] ,GPIO5 Select Pin 6" "Not selected,Selected" bitfld.byte 0x00 5. " GPIO5_SEL[5] ,GPIO5 Select Pin 5" "Not selected,Selected" textline " " bitfld.byte 0x00 4. " GPIO5_SEL[4] ,GPIO5 Select Pin 4" "Not selected,Selected" bitfld.byte 0x00 3. " GPIO5_SEL[3] ,GPIO5 Select Pin 3" "Not selected,Selected" bitfld.byte 0x00 2. " GPIO5_SEL[2] ,GPIO5 Select Pin 2" "Not selected,Selected" textline " " bitfld.byte 0x00 1. " GPIO5_SEL[1] ,GPIO5 Select Pin 1" "Not selected,Selected" bitfld.byte 0x00 0. " GPIO5_SEL[0] ,GPIO5 Select Pin 0" "Not selected,Selected" group.byte 0xd8++0x00 "Port 6" line.byte 0x00 "GPIO6,GPIO6 Output Data State Register" bitfld.byte 0x00 7. " GPIO6[7] ,GPIO6 Output Data Pin 7" "Low,High" bitfld.byte 0x00 6. " GPIO6[6] ,GPIO6 Output Data Pin 6" "Low,High" bitfld.byte 0x00 5. " GPIO6[5] ,GPIO6 Output Data Pin 5" "Low,High" bitfld.byte 0x00 4. " GPIO6[4] ,GPIO6 Output Data Pin 4" "Low,High" textline " " bitfld.byte 0x00 3. " GPIO6[3] ,GPIO6 Output Data Pin 3" "Low,High" bitfld.byte 0x00 2. " GPIO6[2] ,GPIO6 Output Data Pin 2" "Low,High" bitfld.byte 0x00 1. " GPIO6[1] ,GPIO6 Output Data Pin 1" "Low,High" bitfld.byte 0x00 0. " GPIO6[0] ,GPIO6 Output Data Pin 0" "Low,High" rgroup.byte (0xd8+0x01)++0x00 line.byte 0x00 "GPIRD6,GPIRD6 Pin State Register" bitfld.byte 0x00 7. " GPIRD6[7] ,GPIO6 Pin 7 State" "Low,High" bitfld.byte 0x00 6. " GPIRD6[6] ,GPIO6 Pin 6 State" "Low,High" bitfld.byte 0x00 5. " GPIRD6[5] ,GPIO6 Pin 5 State" "Low,High" bitfld.byte 0x00 4. " GPIRD6[4] ,GPIO6 Pin 4 State" "Low,High" textline " " bitfld.byte 0x00 3. " GPIRD6[3] ,GPIO6 Pin 3 State" "Low,High" bitfld.byte 0x00 2. " GPIRD6[2] ,GPIO6 Pin 2 State" "Low,High" bitfld.byte 0x00 1. " GPIRD6[1] ,GPIO6 Pin 1 State" "Low,High" bitfld.byte 0x00 0. " GPIRD6[0] ,GPIO6 Pin 0 State" "Low,High" group.byte (0xd8+0x02)++0x00 line.byte 0x00 "GPIO6_SEL,GPIO6 Select Register" bitfld.byte 0x00 7. " GPIO6_SEL[7] ,GPIO6 Select Pin 7" "Not selected,Selected" bitfld.byte 0x00 6. " GPIO6_SEL[6] ,GPIO6 Select Pin 6" "Not selected,Selected" bitfld.byte 0x00 5. " GPIO6_SEL[5] ,GPIO6 Select Pin 5" "Not selected,Selected" textline " " bitfld.byte 0x00 4. " GPIO6_SEL[4] ,GPIO6 Select Pin 4" "Not selected,Selected" bitfld.byte 0x00 3. " GPIO6_SEL[3] ,GPIO6 Select Pin 3" "Not selected,Selected" bitfld.byte 0x00 2. " GPIO6_SEL[2] ,GPIO6 Select Pin 2" "Not selected,Selected" textline " " bitfld.byte 0x00 1. " GPIO6_SEL[1] ,GPIO6 Select Pin 1" "Not selected,Selected" bitfld.byte 0x00 0. " GPIO6_SEL[0] ,GPIO6 Select Pin 0" "Not selected,Selected" group.byte 0xe8++0x00 "Port 12" line.byte 0x00 "GPIO12,GPIO12 Output Data State Register" bitfld.byte 0x00 7. " GPIO12[7] ,GPIO12 Output Data Pin 7" "Low,High" bitfld.byte 0x00 6. " GPIO12[6] ,GPIO12 Output Data Pin 6" "Low,High" bitfld.byte 0x00 5. " GPIO12[5] ,GPIO12 Output Data Pin 5" "Low,High" bitfld.byte 0x00 4. " GPIO12[4] ,GPIO12 Output Data Pin 4" "Low,High" textline " " bitfld.byte 0x00 3. " GPIO12[3] ,GPIO12 Output Data Pin 3" "Low,High" bitfld.byte 0x00 2. " GPIO12[2] ,GPIO12 Output Data Pin 2" "Low,High" bitfld.byte 0x00 1. " GPIO12[1] ,GPIO12 Output Data Pin 1" "Low,High" bitfld.byte 0x00 0. " GPIO12[0] ,GPIO12 Output Data Pin 0" "Low,High" rgroup.byte 0xe9++0x00 line.byte 0x00 "GPIRD12,GPIRD12 Pin State Register" bitfld.byte 0x00 7. " GPIRD12[7] ,GPIO12 Pin 7 State" "Low,High" bitfld.byte 0x00 6. " GPIRD12[6] ,GPIO12 Pin 6 State" "Low,High" bitfld.byte 0x00 5. " GPIRD12[5] ,GPIO12 Pin 5 State" "Low,High" bitfld.byte 0x00 4. " GPIRD12[4] ,GPIO12 Pin 4 State" "Low,High" textline " " bitfld.byte 0x00 3. " GPIRD12[3] ,GPIO12 Pin 3 State" "Low,High" bitfld.byte 0x00 2. " GPIRD12[2] ,GPIO12 Pin 2 State" "Low,High" bitfld.byte 0x00 1. " GPIRD12[1] ,GPIO12 Pin 1 State" "Low,High" bitfld.byte 0x00 0. " GPIRD12[0] ,GPIO12 Pin 0 State" "Low,High" group.byte 0xf2++0x00 line.byte 0x00 "GPIO12_SEL,GPIO12 Select Register" bitfld.byte 0x00 7. " GPIO12_SEL[7] ,GPIO12 Select Pin 7" "Not selected,Selected" bitfld.byte 0x00 6. " GPIO12_SEL[6] ,GPIO12 Select Pin 6" "Not selected,Selected" bitfld.byte 0x00 5. " GPIO12_SEL[5] ,GPIO12 Select Pin 5" "Not selected,Selected" textline " " bitfld.byte 0x00 4. " GPIO12_SEL[4] ,GPIO12 Select Pin 4" "Not selected,Selected" bitfld.byte 0x00 3. " GPIO12_SEL[3] ,GPIO12 Select Pin 3" "Not selected,Selected" bitfld.byte 0x00 2. " GPIO12_SEL[2] ,GPIO12 Select Pin 2" "Not selected,Selected" textline " " bitfld.byte 0x00 1. " GPIO12_SEL[1] ,GPIO12 Select Pin 1" "Not selected,Selected" bitfld.byte 0x00 0. " GPIO12_SEL[0] ,GPIO12 Select Pin 0" "Not selected,Selected" group.byte 0xf8++0x00 "Port 15" line.byte 0x00 "GPIO15,GPIO15 Output Data State Register" bitfld.byte 0x00 7. " GPIO15[7] ,GPIO15 Output Data Pin 7" "Low,High" bitfld.byte 0x00 6. " GPIO15[6] ,GPIO15 Output Data Pin 6" "Low,High" bitfld.byte 0x00 5. " GPIO15[5] ,GPIO15 Output Data Pin 5" "Low,High" bitfld.byte 0x00 4. " GPIO15[4] ,GPIO15 Output Data Pin 4" "Low,High" textline " " bitfld.byte 0x00 3. " GPIO15[3] ,GPIO15 Output Data Pin 3" "Low,High" bitfld.byte 0x00 2. " GPIO15[2] ,GPIO15 Output Data Pin 2" "Low,High" bitfld.byte 0x00 1. " GPIO15[1] ,GPIO15 Output Data Pin 1" "Low,High" bitfld.byte 0x00 0. " GPIO15[0] ,GPIO15 Output Data Pin 0" "Low,High" rgroup.byte 0xf9++0x00 line.byte 0x00 "GPIRD15,GPIRD15 Pin State Register" bitfld.byte 0x00 7. " GPIRD15[7] ,GPIO15 Pin 7 State" "Low,High" bitfld.byte 0x00 6. " GPIRD15[6] ,GPIO15 Pin 6 State" "Low,High" bitfld.byte 0x00 5. " GPIRD15[5] ,GPIO15 Pin 5 State" "Low,High" bitfld.byte 0x00 4. " GPIRD15[4] ,GPIO15 Pin 4 State" "Low,High" textline " " bitfld.byte 0x00 3. " GPIRD15[3] ,GPIO15 Pin 3 State" "Low,High" bitfld.byte 0x00 2. " GPIRD15[2] ,GPIO15 Pin 2 State" "Low,High" bitfld.byte 0x00 1. " GPIRD15[1] ,GPIO15 Pin 1 State" "Low,High" bitfld.byte 0x00 0. " GPIRD15[0] ,GPIO15 Pin 0 State" "Low,High" group.byte 0xfa++0x00 line.byte 0x00 "GPIO15_SEL,GPIO15 Select Register" bitfld.byte 0x00 7. " GPIO15_SEL[7] ,GPIO15 Select Pin 7" "Not selected,Selected" bitfld.byte 0x00 6. " GPIO15_SEL[6] ,GPIO15 Select Pin 6" "Not selected,Selected" bitfld.byte 0x00 5. " GPIO15_SEL[5] ,GPIO15 Select Pin 5" "Not selected,Selected" textline " " bitfld.byte 0x00 4. " GPIO15_SEL[4] ,GPIO15 Select Pin 4" "Not selected,Selected" bitfld.byte 0x00 3. " GPIO15_SEL[3] ,GPIO15 Select Pin 3" "Not selected,Selected" bitfld.byte 0x00 2. " GPIO15_SEL[2] ,GPIO15 Select Pin 2" "Not selected,Selected" textline " " bitfld.byte 0x00 1. " GPIO15_SEL[1] ,GPIO15 Select Pin 1" "Not selected,Selected" bitfld.byte 0x00 0. " GPIO15_SEL[0] ,GPIO15 Select Pin 0" "Not selected,Selected" width 0x0B tree.end tree "P3BA" base ad:0x40050300 width 17. group.byte 0x00++0x0b line.byte 0x00 "Y_START,Y_START" hexmask.byte 0x00 0.--6. 1. " Y_START ,Starting value of Y address" line.byte 0x01 "YROLL,YROLL" hexmask.byte 0x01 0.--6. 1. " Y_ROLL ,Roll-over value for Y address" line.byte 0x02 "YCFG,YCFG" bitfld.byte 0x02 7. " Y_SUB ,Increment/Decrement value Y_INC" "Incremented,Decremented" hexmask.byte 0x02 0.--6. 1. " Y_INC ,Increment/Decrement step value for Y address" line.byte 0x03 "X_START1,X_START1" line.byte 0x04 "X_START2,X_START2" line.byte 0x05 "XROLL1,XROLL1" line.byte 0x06 "XROLL2,XROLL2" line.byte 0x07 "XINC,XINC" line.byte 0x08 "XCFG,XCFG" bitfld.byte 0x08 1. " FAST_X ,FAST_X/FAST_Y incrementing" "FAST_Y,FAST_X" bitfld.byte 0x08 0. " X_SUB ,Incremented/Decremented x_cur" "Incremented,Decremented" line.byte 0x09 "OFFSETADDR1,OFFSETADDR1" line.byte 0x0a "OFFSETADDR2,OFFSETADDR2" line.byte 0x0b "OFFSETADDR3,OFFSETADDR3" rgroup.byte 0x0c++0x03 line.byte 0x00 "ABSADDR1,ABSADDR1" line.byte 0x01 "ABSADDR2,ABSADDR2" line.byte 0x02 "ABSADDR3,ABSADDR3" line.byte 0x03 "ABSADDR4,ABSADDR4" group.byte 0x10++0x01 line.byte 0x00 "DATCFG1,DATCFG1" line.byte 0x01 "DATCFG2,DATCFG2" bitfld.byte 0x01 1.--2. " DATA_PATTERN ,Basic 2-bit data pattern" "0,1,2,3" bitfld.byte 0x01 0. " DATA_OVR ,DATA_OVR" "Entered INIT state,Skipped INIT state" rgroup.byte 0x14++0x03 line.byte 0x00 "CMP_RSLT1,CMP_RSLT1" line.byte 0x01 "CMP_RSLT2,CMP_RSLT2" line.byte 0x02 "CMP_RSLT3,CMP_RSLT3" line.byte 0x03 "CMP_RSLT4,CMP_RSLT4" group.byte 0x18++0x03 line.byte 0x00 "DATA_REG1,DATA_REG1" line.byte 0x01 "DATA_REG2,DATA_REG2" line.byte 0x02 "DATA_REG3,DATA_REG3" line.byte 0x03 "DATA_REG4,DATA_REG4" rgroup.byte 0x1c++0x07 line.byte 0x00 "EXP_DATA1,EXP_DATA1" line.byte 0x01 "EXP_DATA2,EXP_DATA2" line.byte 0x02 "EXP_DATA3,EXP_DATA3" line.byte 0x03 "EXP_DATA4,EXP_DATA4" line.byte 0x04 "MSTR_HRDATA1,MSTR_HRDATA1" line.byte 0x05 "MSTR_HRDATA2,MSTR_HRDATA2" line.byte 0x06 "MSTR_HRDATA3,MSTR_HRDATA3" line.byte 0x07 "MSTR_HRDATA4,MSTR_HRDATA4" width 17. group.byte 0x24++0x03 line.byte 0x00 "BIST_EN,BIST_EN" bitfld.byte 0x00 2. " PASSING ,Pass status of the memory test" "Not passed,Passed" bitfld.byte 0x00 1. " INIT_COMPL ,Initialization complete" "Not completed,Completed" bitfld.byte 0x00 0. " BIST_GO ,BIST_GO" "Slave,Master" line.byte 0x01 "PHUB_MASTER_SSR,PHUB_MASTER_SSR" bitfld.byte 0x01 2. " BITS24_TRUE ,Identify target memory" "32-bit,24-bit" bitfld.byte 0x01 0.--1. " MSTR_HSIZE ,Identify size of the spoke for synchronization with PHUB" "0,1,2,3" line.byte 0x02 "SEQCFG1,SEQCFG1" bitfld.byte 0x02 4.--6. " OPCODE_2 ,Second opcode" "NOOP,WDATA,WDATABAR,RDATA,RDATABAR,EXCLUDE,?..." bitfld.byte 0x02 1.--3. " OPCODE_1 ,First opcode" "NOOP,WDATA,WDATABAR,RDATA,RDATABAR,EXCLUDE,?..." bitfld.byte 0x02 0. " PRE_ADDRESS ,Pre address" "Skipped,Entered" line.byte 0x03 "SEQCFG2,SEQCFG2" bitfld.byte 0x03 6. " BIST_STOP ,BIST Stop" "Not stopped,Stopped" bitfld.byte 0x03 3.--5. " OPCODE_4 ,Fourth opcode" "NOOP,WDATA,WDATABAR,RDATA,RDATABAR,EXCLUDE,?..." bitfld.byte 0x03 0.--2. " opcode_3 ,Third opcode" "NOOP,WDATA,WDATABAR,RDATA,RDATABAR,EXCLUDE,?..." rgroup.byte 0x28++0x02 line.byte 0x00 "Y_CURR,Current Y address value" hexmask.byte 0x00 0.--6. 1. " Y_CURR ,Current value of Y address" line.byte 0x01 "X_CURR1,Current X address value (7:0)" line.byte 0x02 "X_CURR2,current X address value (15:8)" width 0x0B tree.end tree "PANTHER" base ad:0x40080000 width 13. group.long 0x00++0x17 line.long 0x00 "STCALIB_CFG,SYSTICK Calibration register" bitfld.long 0x00 31. " NOREF ,External reference clock available" "Available,Not available" bitfld.long 0x00 30. " SKEW ,TENMS value precise 10 millisecond time generation" "Precise,Not precise" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Calibration value for the Ten Millisecond timer" line.long 0x04 "WAITPIPE,Wait State Pipline" bitfld.long 0x04 4. " CM3_TRACECLKIN_SRCSEL ,CM3 TRACECLKIN SOURCE SELECTION" "CPU/2,EXTCLK on SWD" bitfld.long 0x04 2. " CM3_SYSTCK_SRCSEL ,NMI SOURCE SELECTION" "100 KHz,DSI" textline " " bitfld.long 0x04 1. " NMI_SRCSEL ,NMI SOURCE SELECTION" "Tied-off,DSI_01_OUT_P_14" bitfld.long 0x04 0. " BYPASS ,Wait-state pipeline for high MHz operation" "Bypassed,Enabled" line.long 0x08 "TRACE_CFG,Debug Trace Configuration" bitfld.long 0x08 1. " TRACE_MODE ,Trace Mode" "Normal,Trace Mode" bitfld.long 0x08 0. " SWV_MODE ,SWV Mode" "Normal,SWV Mode" line.long 0x0c "ETMFIFO,Embedded Trace Overflow Stall" bitfld.long 0x0c 1. " BOOT_CM3SYSRST_BYPASS ,BOOT CM3 System Reset Bypass" "No effect,Bypass" bitfld.long 0x0c 0. " EMTOFLOW ,EMTOFLOW" "Stalled,Free-run" line.long 0x10 "PVTCFG1,PVT Controller CFG1" bitfld.long 0x10 0. " PVT_ENABLE1 ,PVT Enable 1" "Disabled,Enabled" line.long 0x14 "PVTCFG2,PVT Controller CFG2" bitfld.long 0x14 0. " PVT_ENABLE2 ,PVT Enable 2" "Disabled,Enabled" width 0x0B tree.end tree "EXTMEM (External Memory Interface)" base ad:0x60000000 width 6. group.byte 0x00++0x00 "External Memory" line.byte 0x00 "DATA,External Memory Data" button "DATA" "data ad:0x60000000--(ad:0x60000000+0xffffff) /byte" width 0x0B tree.end textline ""