; --------------------------------------------------------------------------------
; @Title: TMS320DM6467 Specific Menu
; @Props: Released
; @Author: MPO
; @Changelog: 2008-03-07 MPO
; @Manufacturer: TI - Texas Instruments
; @Core: ARM926EJ-S
; @Chip: TMS320DM6467
; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: mentms320dm646xa.men 16339 2023-07-03 13:30:14Z pegold $

add
menu
(
popup "Peripherals"
(
popup "ARM Core Registers"
(
menuitem "ID Registers"                                     "per , ""ARM Core Registers,ID Registers"""
menuitem "MMU"                                              "per , ""ARM Core Registers,MMU Control and Configuration"""
menuitem "Cache"                                            "per , ""ARM Core Registers,Cache Control and Configuration"""
menuitem "TCM"                                              "per , ""ARM Core Registers,TCM Control and Configuration"""
menuitem "Test and Debug"                                   "per , ""ARM Core Registers,Test and Debug"""
menuitem "ICEbreaker"                                       "per , ""ARM Core Registers,ICEbreaker"""
)
popup "Enhanced Direct Memory Access Controller (EDMA3)"
(
menuitem "Parameter RAM"                                    "per , ""Enhanced Direct Memory Access Controller (EDMA3)"""
popup "Channel Controller Registers"
(
menuitem "Global Registers "                            "per , ""Enhanced Direct Memory Access Controller (EDMA3),Channel Controller Registers,Global Registers"""
menuitem "Error Registers "                             "per , ""Enhanced Direct Memory Access Controller (EDMA3),Channel Controller Registers,Error Registers"""
menuitem "Region Access Enable Registers"               "per , ""Enhanced Direct Memory Access Controller (EDMA3),Channel Controller Registers,Region Access Enable Registers"""
menuitem "Status/Debug Visibility Registers"            "per , ""Enhanced Direct Memory Access Controller (EDMA3),Channel Controller Registers,Status/Debug Visibility Registers"""
menuitem "DMA Channel Registers"                        "per , ""Enhanced Direct Memory Access Controller (EDMA3),Channel Controller Registers,DMA Channel Registers"""
menuitem "Interrupt Registers"                          "per , ""Enhanced Direct Memory Access Controller (EDMA3),Channel Controller Registers,Interrupt Registers"""
menuitem "QDMA Registers"                               "per , ""Enhanced Direct Memory Access Controller (EDMA3),Channel Controller Registers,QDMA Registers"""
menuitem "Shadow Region Channel Registers"              "per , ""Enhanced Direct Memory Access Controller (EDMA3),Channel Controller Registers,Shadow Region Channel Registers"""
)
popup "Transfer Controller Registers"
(
menuitem "TC0 "                                         "per , ""Enhanced Direct Memory Access 3,Transfer Controller Registers,TC0 (EDMA3 Transfer Controller Registers)"""
menuitem "TC1 "                                         "per , ""Enhanced Direct Memory Access 3,Transfer Controller Registers,TC1 (EDMA3 Transfer Controller Registers)"""
menuitem "TC2 "                                         "per , ""Enhanced Direct Memory Access 3,Transfer Controller Registers,TC2 (EDMA3 Transfer Controller Registers)"""
menuitem "TC3 "                                         "per , ""Enhanced Direct Memory Access 3,Transfer Controller Registers,TC3 (EDMA3 Transfer Controller Registers)"""
)
)
menuitem "Universal Serial Bus (USB)"                           "per , ""Universal Serial Bus (USB)"""
popup "ATA Controller (ATA)"
(
menuitem "ATA Bus Master Interface DMA Engine Registers"    "per , ""ATA Controller,ATA Bus Master Interface DMA Engine Registers"""
menuitem "ATA Configuration Registers"                      "per , ""ATA Controller,ATA Configuration Registers"""
)
menuitem "VLYNQ Port"                                           "per , ""VLYNQ Port"""
menuitem "Remote VLYNQ Port"                                    "per , ""Remote VLYNQ Port"""
menuitem "Host Port Interface (HPI)"                            "per , ""Host Port Interface (HPI)"""
popup "Peripheral Component Interconnect (PCI)"
(
menuitem "PCI Configurations Registrors"                    "per , ""Peripheral Component Interconnect (PCI),PCI Configurations Registrors"""
menuitem "PCI Back End Configuration Registers"             "per , ""Peripheral Component Interconnect (PCI),PCI Back End Configuration Registers"""
)
popup "Ethernet Media Access Controller/Management Data Input/Output Module (EMAC/MDIO)"
(
menuitem "EMAC module registers"                            "per , ""Ethernet Media Access Controller/Management Data Input/Output Module (EMAC/MDIO),EMAC module registers"""
menuitem "EMAC control redisters"                           "per , ""Ethernet Media Access Controller/Management Data Input/Output Module (EMAC/MDIO),EMAC control redisters"""
menuitem "MDIO Registers"                                   "per , ""Ethernet Media Access Controller/Management Data Input/Output Module (EMAC/MDIO),EMAC control redisters,MDIO Registers"""
)
menuitem "Video Data Conversion Engine (VDCE)"                  "per , ""Video Data Conversion Engine (VDCE)"""
menuitem "Video Port Interface (VPIF)"                          "per , ""Video Port Interface (VPIF)"""
popup "Transport Stream Interface (TSIF)"
(
menuitem "TSIF0"                                            "per , ""Transport Stream Interface (TSIF),TSIF0"""
menuitem "TSIF1"                                            "per , ""Transport Stream Interface (TSIF),TSIF1"""
)
menuitem "DDR2 Memory Controller"                               "per , ""DDR2 Memory Controller"""
menuitem "Asynchronous External Memory Interface (EMIF)"        "per , ""Asynchronous External Memory Interface (EMIF)"""
popup "Multichannel Audio Serial Ports (McASP)"
(
menuitem "McASP0"                                           "per , ""Multichannel Audio Serial Ports (McASP),McASP0"""
menuitem "McASP1"                                           "per , ""Multichannel Audio Serial Ports (McASP),McASP0"""
)
popup "Clock Recovery Generator (CRGEN)"
(
menuitem "CRGEN0"                                           "per , ""Clock Recovery Generator (CRGEN),CRGEN0"""
menuitem "CRGEN1"                                           "per , ""Clock Recovery Generator (CRGEN),CRGEN1"""
)
popup "Universal Asynchronous Receiver/Transmitter (UART)"
(
menuitem "UART 0"                                           "per , ""Universal Asynchronous Receiver/Transmitter (UART),UART 0"""
menuitem "UART 1"                                           "per , ""Universal Asynchronous Receiver/Transmitter (UART),UART 1"""
menuitem "UART 2"                                           "per , ""Universal Asynchronous Receiver/Transmitter (UART),UART 2"""
)
popup "Pulse Width Modulator (PWM)"
(
menuitem "PWM 0"                                            "per , ""Pulse Width Modulator (PWM),PWM 0"""
menuitem "PWM 1"                                            "per , ""Pulse Width Modulator (PWM),PWM 1"""
)
menuitem "Inter-Integrated Circuit (I2C)"                       "per , ""Inter-Integrated Circuit (I2C)"""
menuitem "Serial Peripheral Interface (SPI)"                    "per , ""Serial Peripheral Interface"""
popup "General-Purpose Input/Output (GPIO)"
(
menuitem "GPIO Banks 0 and 1"                               "per , ""General-Purpose Input/Output (GPIO),GPIO Banks 0 and 1"""
menuitem "GPIO Bank 2"                                      "per , ""General-Purpose Input/Output (GPIO),GPIO Bank 2"""
)
popup "64-bit Timer"
(
menuitem "Timer 0"                                          "per , ""64-bit Timer,Timer 0"""
menuitem "Timer 1"                                          "per , ""64-bit Timer,Timer 1"""
menuitem "Timer 2"                                          "per , ""64-bit Timer,Timer 2(Watchdog)"""
)
menuitem "Interrupt Controller"                                 "per , ""Interrupt Controller"""
menuitem "System Module Registers"                              "per , ""System Module Registers"""
popup "Phase-Locked Loop Controller (PLL)"
(
menuitem "PLL1"                                             "per , ""Phase-Locked Loop Controller (PLL),PLL1"""
menuitem "PLL2"                                             "per , ""Phase-Locked Loop Controller (PLL),PLL1"""
)
)
)