; --------------------------------------------------------------------------------
; @Title: STM32Lxx Specific menu
; @Props: Released
; @Author: BIC, CNA, TAT, WIL
; @Changelog:
;   2010-12-20
;   2012-05-02
;   2016-04-07 WIL
;   2016-05-04 WIL
; @Manufacturer: STM - ST Microelectronics N.V.
; @Core: Cortex-M3
; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: menstm32l.men 16339 2023-07-03 13:30:14Z pegold $

add
menu
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
popup "&CPU"
(
separator
IF CPU.FEATURE(MMU)
(
popup "[:mmu]MMU"
(
menuitem "[:mmureg]MMU Control" "MMU.view"
separator
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
separator
IF CPU.FEATURE(ITLBDUMP)
(
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
)
IF CPU.FEATURE(DTLBDUMP)
(
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
)
IF CPU.FEATURE(TLB0DUMP)
(
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
)
IF CPU.FEATURE(TLB1DUMP)
(
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
)
)
)
IF COMPonent.AVAILable("SMMU")
(
popup "[:mmu]SMMU"
(
menuitem "[:chip]SMMU1 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU1 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.StreamMapTable &(name)
)
IF COMPonent.AVAILable("SMMU2")
(
separator
menuitem "[:chip]SMMU2 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU2 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU3")
(
separator
menuitem "[:chip]SMMU3 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU3 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU4")
(
separator
menuitem "[:chip]SMMU4 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU4 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU5")
(
separator
menuitem "[:chip]SMMU5 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU5 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU6")
(
separator
menuitem "[:chip]SMMU6 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU6 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.StreamMapTable &(name)
)
)
)
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
popup "[:cache]Cache"
(
IF CPU.FEATURE(L1ICACHEDUMP)
(
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
menuitem "[:cache]ICACHE List" "CACHE.List IC"
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
)
IF CPU.FEATURE(L1DCACHEDUMP)
(
separator
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
menuitem "[:cache]DCACHE List" "CACHE.List DC"
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
)
IF CPU.FEATURE(L2CACHEDUMP)
(
separator
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
)
)
)
)
popup "&Trace"
(
separator
IF COMPonent.AVAILable("ITM")
(
popup "ITM"
(
default
menuitem "[:oconfig]ITM settings..." "ITM.state"
separator
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
)
)
IF COMPonent.AVAILable("STM")
(
popup "STM"
(
default
menuitem "[:oconfig]STM settings..." "STM.state"
separator
menuitem "[:alist]STMTrace List" "STMTrace.List"
)
)
IF COMPonent.AVAILable("HTM")
(
popup "HTM"
(
default
menuitem "[:oconfig]HTM settings..." "HTM.state"
separator
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
)
)
IF COMPonent.AVAILable("TPIU")
(
menuitem "[:oconfig]TPIU settings..." "TPIU.state"
)
IF COMPonent.AVAILable("ETR")
(
menuitem "[:oconfig]ETR settings..."
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
)
)
)
popup "&Misc"
(
popup "Tools"
(
IF CPUIS64BIT()||CPU.FEATURE("SPR")
(
menuitem "ARM System Register Converter"
(
DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
)
)
IF CPU.FEATURE("C15")
(
menuitem "ARM Coprocessor Converter"
(
DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
)
)
)
)
popup "&Perf"
(
IF CPU.FEATURE(BMC)
(
before "Reset"
menuitem "[:bmc]Benchmark Counters" "BMC.state"
before "Reset"
separator
)
)
)
popup "Peripherals"
(
popup "[:chip]Core Registers (Cortex-M3)"
(
menuitem "[:chip]System Control"                                "per , ""Core Registers (Cortex-M3),System Control"""
menuitem "[:chip]MPU;Memory Protection Unit"                    "per , ""Core Registers (Cortex-M3),Memory Protection Unit"""
menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller"     "per , ""Core Registers (Cortex-M3),Nested Vectored Interrupt Controller"""
popup "[:chip]Debug"
(
menuitem "[:chip]Core Debug"                                "per , ""Core Registers (Cortex-M3),Debug,Core Debug"""
menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit"       "per , ""Core Registers (Cortex-M3),Debug,Flash Patch and Breakpoint Unit (FPB)"""
menuitem "[:chip]DWT;Data Watchpoint and Trace Unit"        "per , ""Core Registers (Cortex-M3),Debug,Data Watchpoint and Trace Unit (DWT)"""
)
)
separator
if !cpuis("STM32L162*")||cpuis("STM32L151C6-A")||cpuis("STM32L151C8-A")||cpuis("STM32L151CB-A")||cpuis("STM32L151R6-A")||cpuis("STM32L151R8-A")||cpuis("STM32L151RB-A")||cpuis("STM32L151V8-A")||cpuis("STM32L151VB-A")||cpuis("STM32L152C6-A")||cpuis("STM32L152C8-A")||cpuis("STM32L152CB-A")||cpuis("STM32L152R6-A")||cpuis("STM32L152R8-A")||cpuis("STM32L152RB-A")||cpuis("STM32L152V8-A")||cpuis("STM32L152VB-A")||cpuis("STM32L151CC")||cpuis("STM32L151RC-A")||cpuis("STM32L151UC")||cpuis("STM32L151VC-A")||cpuis("STM32L152CC")||cpuis("STM32L152RC-A")||cpuis("STM32L152VC-A")||cpuis("STM32L162RC")||cpuis("STM32L162RC-A")||cpuis("STM32L162VC")||cpuis("STM32L162VC-A")||cpuis("STM32L151QE")||cpuis("STM32L151RE")||cpuis("STM32L151VE")||cpuis("STM32L152QE")||cpuis("STM32L152RE")||cpuis("STM32L152VE")||cpuis("STM32L162RE")||cpuis("STM32L162VE")||cpuis("STM32L162ZE")||cpuis("STM32L151VD-X")||cpuis("STM32L152VD-X")||cpuis("STM32L162VD-X")||cpuis("STM32L100C6")||cpuis("STM32L100R8")||cpuis("STM32L100RB")||cpuis("STM32L100C6-A")||cpuis("STM32L100R8-A")||cpuis("STM32L100RB-A")||cpuis("STM32L100RC")
(
menuitem "FMI"      "per , ""Flash Memory Interface"""
)
menuitem "CRC"          "per , ""CRC (Cyclic Redundancy Check)"""
menuitem "PWR"          "per , ""PWR (Power Control Register)"""
menuitem "RCC"          "per , ""RCC (Reset and Clock Control)"""
menuitem "GPIO"         "per , ""GPIO (General-Purpose I/Os)"""
menuitem "RI"           "per , ""RI (Routing Interface)"""
menuitem "SYSCFG"       "per , ""SYSCFG (System configuration controller)"""
menuitem "EXTI"         "per , ""EXTI (External interrupt/event controller)"""
menuitem "DMA"          "per , ""DMA"""
menuitem "ADC"          "per , ""ADC (Analog/Digital Converter)"""
menuitem "DAC"          "per , ""DAC (Digital-to-Analog Converter)"""
menuitem "COMP"         "per , ""COMP (Comparators)"""
if cpuis("STM32L151CC")||cpuis("STM32L151RC-A")||cpuis("STM32L151UC")||cpuis("STM32L151VC-A")||cpuis("STM32L152CC")||cpuis("STM32L152RC-A")||cpuis("STM32L152VC-A")||cpuis("STM32L162RC")||cpuis("STM32L162RC-A")||cpuis("STM32L162VC")||cpuis("STM32L162VC-A")||cpuis("STM32L151QE")||cpuis("STM32L151RE")||cpuis("STM32L151VE")||cpuis("STM32L152QE")||cpuis("STM32L152RE")||cpuis("STM32L152VE")||cpuis("STM32L162RE")||cpuis("STM32L162VE")||cpuis("STM32L162ZE")||cpuis("STM32L151VD-X")||cpuis("STM32L152VD-X")||cpuis("STM32L162VD-X")
(
menuitem "OPAMP"    "per , ""OPAMP (Operational amplifiers)"""
)
if (cpuis("STM32L152*")||cpuis("STM32L162*"))
(
menuitem "LCD"      "per , ""LCD"""
)
menuitem "GPTIM"        "per , ""General-purpose timers"""
menuitem "BTIM"         "per , ""Basic Timers"""
menuitem "RTC"          "per , ""RTC (Real-Time Clock)"""
menuitem "IWDG"         "per , ""IWDG (Independent Watchdog)"""
menuitem "WWDG"         "per , ""WWDG (Window Watchdog)"""
if cpuis("STM32L162*")
(
menuitem "AES"      "per , ""AES (Advanced encryption standard hardware accelerator)"""
)
menuitem "USB"          "per , ""USB (USB Full Speed Device)"""
if (cpuis("STM32L162ZD")||cpuis("STM32L162QD")||cpuis("STM32L162VD")||cpuis("STM32L151VD")||cpuis("STM32L152VD")||cpuis("STM32L151ZD")||cpuis("STM32L152ZD")||cpuis("STM32L151QD")||cpuis("STM32L152QD"))
(
menuitem "FSMC"     "per , ""FSMC (Flexible static memory controller)"""
)
menuitem "I2C"          "per , ""I2C (Inter-Integrated Circuit)"""
menuitem "USART"        "per , ""USART (Universal Synchronous Asynchronous Receiver Transmitter)"""
menuitem "SPI"          "per , ""SPI (Serial Peripheral Interface)"""
if (cpuis("STM32L162?D")||cpuis("STM32L152?D")||cpuis("STM32L151?D"))
(
menuitem "SDIO"     "per , ""SDIO (Secure digital input/output interface"""
)
)
)