; -------------------------------------------------------------------------------- ; @Title: RCARV3M Specific Menu ; @Props: Released ; @Author: STR, WWI, AJK, DAS, KOF, MRO, PID, PIJ, PAK ; @Changelog: 2017-02-14 WWI ; 2017-10-05 AJK ; 2020-06-18 PID ; 2020-10-07 PAK ; @Manufacturer: RENESAS - Renesas Technology, Corp. ; @Core: Cortex-A53, Cortex-R7 ; @Chip: R8A77970, R8A77970-CR7 ; @Copyright: (C) 1989-2020 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: menrcarv3m.men 16339 2023-07-03 13:30:14Z pegold $ add menu ( IF SOFTWARE.BUILD.BASE()>=69655. ( popup "&CPU" ( separator IF CPU.FEATURE(MMU) ( popup "[:mmu]MMU" ( menuitem "[:mmureg]MMU Control" "MMU.view" separator menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable" menuitem "[:mmu]MMU Table List" "MMU.List.PageTable" separator IF CPU.FEATURE(ITLBDUMP) ( menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB" ) IF CPU.FEATURE(DTLBDUMP) ( menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB" ) IF CPU.FEATURE(TLB0DUMP) ( menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0" ) IF CPU.FEATURE(TLB1DUMP) ( menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1" ) ) ) IF COMPonent.AVAILable("SMMU") ( popup "[:mmu]SMMU" ( menuitem "[:chip]SMMU1 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU1 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.StreamMapTable &(name) ) IF COMPonent.AVAILable("SMMU2") ( separator menuitem "[:chip]SMMU2 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU2 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU3") ( separator menuitem "[:chip]SMMU3 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU3 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU4") ( separator menuitem "[:chip]SMMU4 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU4 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU5") ( separator menuitem "[:chip]SMMU5 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU5 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU6") ( separator menuitem "[:chip]SMMU6 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU6 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.StreamMapTable &(name) ) ) ) ) IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE) ( popup "[:cache]Cache" ( IF CPU.FEATURE(L1ICACHEDUMP) ( menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC" menuitem "[:cache]ICACHE List" "CACHE.List IC" menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC" ) IF CPU.FEATURE(L1DCACHEDUMP) ( separator menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC" menuitem "[:cache]DCACHE List" "CACHE.List DC" menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC" ) IF CPU.FEATURE(L2CACHEDUMP) ( separator menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2" menuitem "[:cache]L2CACHE List" "CACHE.List L2" menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2" ) ) ) ) popup "&Trace" ( separator IF COMPonent.AVAILable("ITM") ( popup "ITM" ( default menuitem "[:oconfig]ITM settings..." "ITM.state" separator menuitem "[:alist]ITMTrace List" "ITMTrace.List" ) ) IF COMPonent.AVAILable("STM") ( popup "STM" ( default menuitem "[:oconfig]STM settings..." "STM.state" separator menuitem "[:alist]STMTrace List" "STMTrace.List" ) ) IF COMPonent.AVAILable("HTM") ( popup "HTM" ( default menuitem "[:oconfig]HTM settings..." "HTM.state" separator menuitem "[:alist]HTMTrace List" "HTMTrace.List" ) ) IF COMPonent.AVAILable("TPIU") ( menuitem "[:oconfig]TPIU settings..." "TPIU.state" ) IF COMPonent.AVAILable("ETR") ( menuitem "[:oconfig]ETR settings..." ( PRIVATE &pdd &pdd=OS.PDD() DO "&pdd/etc/embedded_trace_router/etr_utility.cmm" ) ) ) popup "&Misc" ( popup "Tools" ( IF CPUIS64BIT()||CPU.FEATURE("SPR") ( menuitem "ARM System Register Converter" ( DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm" ) ) IF CPU.FEATURE("C15") ( menuitem "ARM Coprocessor Converter" ( DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm" ) ) ) ) popup "&Perf" ( IF CPU.FEATURE(BMC) ( before "Reset" menuitem "[:bmc]Benchmark Counters" "BMC.state" before "Reset" separator ) ) ) popup "Peripherals" ( if (CORENAME()=="CORTEXA53") ( popup "[:chip]Core Registers (Cortex-A53)" ( menuitem "[:chip]ID Registers[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,ID Registers""" menuitem "[:chip]System Control and Configuration[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,System Control and Configuration""" menuitem "[:chip]Memory Management Unit[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,Memory Management Unit""" menuitem "[:chip]Virtualization Extensions[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,Virtualization Extensions""" menuitem "[:chip]Cache Control and Configuration[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,Cache Control and Configuration""" menuitem "[:chip]System Performance Monitor[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,System Performance Monitor""" menuitem "[:chip]System Timer Registers[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,System Timer Registers""" menuitem "[:chip]Generic Interrupt Controller CPU Interface[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,Generic Interrupt Controller CPU Interface""" separator menuitem "[:chip]Debug Registers[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,Debug Registers""" separator menuitem "[:chip]Breakpoint Registers[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,Breakpoint Registers""" menuitem "[:chip]Watchpoint Control Registers[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,Watchpoint Control Registers""" separator menuitem "[:chip]ID Registers[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,ID Registers""" menuitem "[:chip]System Control and Configuration[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,System Control and Configuration""" menuitem "[:chip]Memory Management Unit[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,Memory Management Unit""" menuitem "[:chip]Virtualization Extensions[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,Virtualization Extensions""" menuitem "[:chip]Cache Control and Configuration[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,Cache Control and Configuration""" menuitem "[:chip]System Performance Monitor[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,System Performance Monitor""" menuitem "[:chip]System Timer Registers[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,System Timer Registers""" menuitem "[:chip]Generic Interrupt Controller CPU Interface[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,Generic Interrupt Controller CPU Interface""" separator menuitem "[:chip]Debug Registers[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,Debug Registers""" separator menuitem "[:chip]Breakpoint Registers[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,Breakpoint Registers""" menuitem "[:chip]Watchpoint Control Registers[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,Watchpoint Control Registers""" separator menuitem "[:chip]Interrupt Controller (GIC-400)" "per , ""Core Registers (Cortex-A53),Interrupt Controller (GIC-400)""" ) menuitem "[:chip]Generic Counter" "per , ""Generic Counter""" ) if (CORENAME()=="CORTEXR7MPCORE") ( popup "[:chip]Core Registers (Cortex-R7MPCore)" ( menuitem "[:chip]ID Registers" "per , ""Core Registers (Cortex-R7MPCore),ID Registers""" menuitem "[:chip]System Control and Configuration" "per , ""Core Registers (Cortex-R7MPCore),System Control and Configuration""" menuitem "[:chip]MPU Control and Configuration" "per , ""Core Registers (Cortex-R7MPCore),MPU Control and Configuration""" menuitem "[:chip]Cache Control and Configuration" "per , ""Core Registers (Cortex-R7MPCore),Cache Control and Configuration""" menuitem "[:chip]TCM Control and Configuration" "per , ""Core Registers (Cortex-R7MPCore),TCM Control and Configuration""" menuitem "[:chip]System Performance Monitor" "per , ""Core Registers (Cortex-R7MPCore),System Performance Monitor""" separator menuitem "[:chip]Debug Registers" "per , ""Core Registers (Cortex-R7MPCore),Debug Registers""" menuitem "[:chip]Breakpoint Registers" "per , ""Core Registers (Cortex-R7MPCore),Breakpoint Registers""" menuitem "[:chip]Watchpoint Control Registers" "per , ""Core Registers (Cortex-R7MPCore),Watchpoint Control Registers""" separator menuitem "[:chip]Snoop Control Unit" "per , ""Core Registers (Cortex-R7MPCore),Snoop Control Unit (SCU)""" menuitem "[:chip]Global Timer" "per , ""Core Registers (Cortex-R7MPCore),Global Timer""" menuitem "[:chip]Private Timer" "per , ""Core Registers (Cortex-R7MPCore),Private Timer""" menuitem "[:chip]Watchdog Timer" "per , ""Core Registers (Cortex-R7MPCore),Watchdog Timer""" menuitem "[:chip]Interrupt Controller (PL-390)" "per , ""Core Registers (Cortex-R7MPCore),Interrupt Controller (PL-390)""" ) menuitem "[:chip]Write Buffer" "per , ""Write Buffer""" ) separator menuitem "PFC;Pin Function Controller" "per , ""PFC (Pin Function Controller)""" popup "GPIO;General-Purpose Input/Output Ports" ( menuitem "Block 0" "per , ""GPIO (General-Purpose Input/Output Ports),Block 0""" menuitem "Block 1" "per , ""GPIO (General-Purpose Input/Output Ports),Block 1""" menuitem "Block 2" "per , ""GPIO (General-Purpose Input/Output Ports),Block 2""" menuitem "Block 3" "per , ""GPIO (General-Purpose Input/Output Ports),Block 3""" menuitem "Block 4" "per , ""GPIO (General-Purpose Input/Output Ports),Block 4""" menuitem "Block 5" "per , ""GPIO (General-Purpose Input/Output Ports),Block 5""" ) menuitem "CPG;Clock Pulse Generator" "per , ""CPG (Clock Pulse Generator)""" menuitem "MSSR;Module Standby / Software Reset" "per , ""MSSR (Module Standby / Software Reset)""" popup "APMU;Advanced Power Management Unit for AP-System Core" ( menuitem "Cortex-A53" "per , ""APMU (Advanced Power Management Unit for AP-System Core),Cortex-A53""" ) menuitem "SYSC;System Controller" "per , ""SYSC (System Controller)""" menuitem "THS/CIVM;Thermal Sensor/Chip Internal Voltage Monitor" "per , ""THS/CIVM (Thermal Sensor/Chip Internal Voltage Monitor)""" menuitem "RST;Reset" "per , ""RST (Reset)""" popup "INTC;Interrupt Controller" ( menuitem "INTC" "per , ""INTC (Interrupt Controller),INTC""" menuitem "INTC-AP;GIC-400" "per , ""INTC (Interrupt Controller),INTC-AP (GIC-400)""" menuitem "INTC-RT;GIC-400" "per , ""INTC (Interrupt Controller),INTC-RT (GIC-400)""" menuitem "INTC-EX" "per , ""INTC (Interrupt Controller),INTC-EX""" ) menuitem "MFIS;Multifunctional Interface" "per , ""MFIS (Multifunctional Interface)""" menuitem "AXI-bus" "per , ""AXI-bus""" popup "IPMMU" ( menuitem "IPMMU-VI0" "per , ""IPMMU,IPMMU-VI0""" menuitem "IPMMU-IR" "per , ""IPMMU,IPMMU-IR""" menuitem "IPMMU-RT" "per , ""IPMMU,IPMMU-RT""" menuitem "IPMMU-DS1" "per , ""IPMMU,IPMMU-DS1""" menuitem "IPMMU-MM" "per , ""IPMMU,IPMMU-MM""" ) menuitem "SYS-DMAC;Direct Memory Access Controller for System" "per , ""SYS-DMAC (Direct Memory Access Controller for System)""" menuitem "RT-DMAC;Realtime Direct Memory Access Controller" "per , ""RT-DMAC (Realtime Direct Memory Access Controller)""" menuitem "LBSC;External Bus Controller for EX-Bus" "per , ""LBSC (External Bus Controller for EX-Bus)""" menuitem "DBSC4;External Bus Controller for DDR4 SDRAM" "per , ""DBSC4 (External Bus Controller for DDR4 SDRAM)""" menuitem "R-GP2D" "per , ""R-GP2D""" popup "CSI2;Camera Serial Interface 2" ( menuitem "CSI40" "per , ""CSI2 (Camera Serial Interface 2),CSI40""" ) popup "VIN;Video Input Module" ( menuitem "Channel 0" "per , ""VIN (Video Input Module),Channel 0""" menuitem "Channel 1" "per , ""VIN (Video Input Module),Channel 1""" menuitem "Channel 2" "per , ""VIN (Video Input Module),Channel 2""" menuitem "Channel 3" "per , ""VIN (Video Input Module),Channel 3""" ) popup "IMR-LX4;Image Renderer Light Extended 4" ( menuitem "Channel 0" "per , ""IMR-LX4 (Image Renderer Light Extended 4),Channel 0""" menuitem "Channel 1" "per , ""IMR-LX4 (Image Renderer Light Extended 4),Channel 1""" menuitem "Channel 2" "per , ""IMR-LX4 (Image Renderer Light Extended 4),Channel 2""" menuitem "Channel 3" "per , ""IMR-LX4 (Image Renderer Light Extended 4),Channel 3""" ) popup "VSP2;Video Signal Processor" ( popup "VSPD0" ( menuitem "VSPD0" "per , ""VSP2 (Video Signal Processor),VSPD0""" popup "DISCOM;Display Output Compare Unit" ( menuitem "UIF4" "per , ""VSP2 (Video Signal Processor),VSPD0,DISCOM (Display Output Compare Unit),UIF4""" ) ) ) popup "FCPV;Frame Compression Processor for VSP" ( menuitem "FCPVD0" "per , ""FCPV (Frame Compression Processor for VSP),FCPVD0""" ) menuitem "DU;Display Unit" "per , ""DU (Display Unit)""" menuitem "LVDS;LVDS Interface" "per , ""LVDS (LVDS Interface)""" menuitem "EthernetAVB-IF" "per , ""EthernetAVB-IF""" menuitem "CAN-FD;CANFD Interface" "per , ""CAN-FD (CANFD Interface)""" menuitem "FlexRay" "per , ""FlexRay""" popup "SCIF;Serial Communication Interface With FIFO" ( menuitem "SCIF_0" "per , ""SCIF (Serial Communication Interface With FIFO),SCIF_0""" menuitem "SCIF_1" "per , ""SCIF (Serial Communication Interface With FIFO),SCIF_1""" menuitem "SCIF_3" "per , ""SCIF (Serial Communication Interface With FIFO),SCIF_3""" menuitem "SCIF_4" "per , ""SCIF (Serial Communication Interface With FIFO),SCIF_4""" ) popup "HSCIF;High Speed Serial Communication Interface with FIFO" ( menuitem "Channel 0" "per , ""HSCIF (High Speed Serial Communication Interface with FIFO),Channel 0""" menuitem "Channel 1" "per , ""HSCIF (High Speed Serial Communication Interface with FIFO),Channel 1""" menuitem "Channel 2" "per , ""HSCIF (High Speed Serial Communication Interface with FIFO),Channel 2""" menuitem "Channel 3" "per , ""HSCIF (High Speed Serial Communication Interface with FIFO),Channel 3""" ) popup "I2C;I2C Bus Interface" ( menuitem "I2C_0" "per , ""I2C (I2C Bus Interface),I2C_0""" menuitem "I2C_1" "per , ""I2C (I2C Bus Interface),I2C_1""" menuitem "I2C_2" "per , ""I2C (I2C Bus Interface),I2C_2""" menuitem "I2C_3" "per , ""I2C (I2C Bus Interface),I2C_3""" menuitem "I2C_4" "per , ""I2C (I2C Bus Interface),I2C_4""" ) popup "MSIOF;Clock-Synchronized Serial Interface with FIFO" ( menuitem "MSIOF_0" "per , ""MSIOF (Clock-Synchronized Serial Interface with FIFO),MSIOF_0""" menuitem "MSIOF_1" "per , ""MSIOF (Clock-Synchronized Serial Interface with FIFO),MSIOF_1""" menuitem "MSIOF_2" "per , ""MSIOF (Clock-Synchronized Serial Interface with FIFO),MSIOF_2""" menuitem "MSIOF_3" "per , ""MSIOF (Clock-Synchronized Serial Interface with FIFO),MSIOF_3""" ) popup "PWM Timer" ( menuitem "Channel 0" "per , ""PWM Timer,Channel 0""" menuitem "Channel 1" "per , ""PWM Timer,Channel 1""" menuitem "Channel 2" "per , ""PWM Timer,Channel 2""" menuitem "Channel 3" "per , ""PWM Timer,Channel 3""" menuitem "Channel 4" "per , ""PWM Timer,Channel 4""" ) menuitem "RPC;SPI Multi I/O Bus Controller" "per , ""RPC (SPI Multi I/O Bus Controller)""" menuitem "ADC I/F;AD Converter I/F" "per , ""ADC I/F (AD Converter I/F)""" menuitem "SPIF;Speed-pulse I/F" "per , ""SPIF (Speed-pulse I/F)""" popup "LifeC;Life Cycle" ( menuitem "Channel 0" "per , ""LifeC (Life Cycle),Channel 0""" menuitem "Channel 1" "per , ""LifeC (Life Cycle),Channel 1""" ) menuitem "RWDT;RCLK Watchdog Timer" "per , ""RWDT (RCLK Watchdog Timer)""" popup "WWDT;Window Watchdog Timer" ( menuitem "Channel 0" "per , ""WWDT (Window Watchdog Timer),Channel 0""" menuitem "Channel 1" "per , ""WWDT (Window Watchdog Timer),Channel 1""" ) menuitem "SWDT;System Watchdog" "per , ""SWDT (System Watchdog)""" menuitem "TPU;16-Bit Timer Pulse Unit" "per , ""TPU (16-Bit Timer Pulse Unit)""" menuitem "CMT0;Compare Match Timer Type0" "per , ""CMT0 (Compare Match Timer Type0)""" popup "CMT1;Compare Match Timer Type1" ( menuitem "CMT_1" "per , ""CMT1 (Compare Match Timer Type1),CMT_1""" menuitem "CMT_2" "per , ""CMT1 (Compare Match Timer Type1),CMT_2""" menuitem "CMT_3" "per , ""CMT1 (Compare Match Timer Type1),CMT_3""" ) popup "TMU;Timer Unit" ( menuitem "Timer 0" "per , ""TMU (Timer Unit),Timer 0""" menuitem "Timer 1" "per , ""TMU (Timer Unit),Timer 1""" menuitem "Timer 2" "per , ""TMU (Timer Unit),Timer 2""" menuitem "Timer 3" "per , ""TMU (Timer Unit),Timer 3""" menuitem "Timer 4" "per , ""TMU (Timer Unit),Timer 4""" ) menuitem "SCMT;System Timer" "per , ""SCMT (System Timer)""" menuitem "SUCMT;System Up-Time Clock" "per , ""SUCMT (System Up-Time Clock)""" menuitem "PRR;Product Register" "per , ""PRR (Product Register)""" menuitem "DBG;Debug and Trace" "per , ""DBG (Debug and Trace)""" ) )