; -------------------------------------------------------------------------------- ; @Title: RF7FS1 Specific Menu ; @Props: Released ; @Author: AST, WIL ; @Changelog: 2016-10-12 WIL ; @Manufacturer: RENESAS - Renesas Technology, Corp. ; @Chip: R7FS124762A01CLM, R7FS124763A01CFL, R7FS124763A01CFM, R7FS124763A01CNB, ; R7FS124763A01CNE, R7FS124763A01CNF, R7FS124772A01CLM, R7FS124773A01CFL, ; R7FS124773A01CFM, R7FS124773A01CNB, R7FS124773A01CNE, R7FS124773A01CNF ; @Core: Cortex-M0P ; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: menr7fs1.men 16339 2023-07-03 13:30:14Z pegold $ add menu ( IF SOFTWARE.BUILD.BASE()>=69655. ( popup "&CPU" ( separator IF CPU.FEATURE(MMU) ( popup "[:mmu]MMU" ( menuitem "[:mmureg]MMU Control" "MMU.view" separator menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable" menuitem "[:mmu]MMU Table List" "MMU.List.PageTable" separator IF CPU.FEATURE(ITLBDUMP) ( menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB" ) IF CPU.FEATURE(DTLBDUMP) ( menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB" ) IF CPU.FEATURE(TLB0DUMP) ( menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0" ) IF CPU.FEATURE(TLB1DUMP) ( menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1" ) ) ) IF COMPonent.AVAILable("SMMU") ( popup "[:mmu]SMMU" ( menuitem "[:chip]SMMU1 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU1 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.StreamMapTable &(name) ) IF COMPonent.AVAILable("SMMU2") ( separator menuitem "[:chip]SMMU2 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU2 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU3") ( separator menuitem "[:chip]SMMU3 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU3 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU4") ( separator menuitem "[:chip]SMMU4 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU4 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU5") ( separator menuitem "[:chip]SMMU5 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU5 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU6") ( separator menuitem "[:chip]SMMU6 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU6 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.StreamMapTable &(name) ) ) ) ) IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE) ( popup "[:cache]Cache" ( IF CPU.FEATURE(L1ICACHEDUMP) ( menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC" menuitem "[:cache]ICACHE List" "CACHE.List IC" menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC" ) IF CPU.FEATURE(L1DCACHEDUMP) ( separator menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC" menuitem "[:cache]DCACHE List" "CACHE.List DC" menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC" ) IF CPU.FEATURE(L2CACHEDUMP) ( separator menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2" menuitem "[:cache]L2CACHE List" "CACHE.List L2" menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2" ) ) ) ) popup "&Trace" ( separator IF COMPonent.AVAILable("ITM") ( popup "ITM" ( default menuitem "[:oconfig]ITM settings..." "ITM.state" separator menuitem "[:alist]ITMTrace List" "ITMTrace.List" ) ) IF COMPonent.AVAILable("STM") ( popup "STM" ( default menuitem "[:oconfig]STM settings..." "STM.state" separator menuitem "[:alist]STMTrace List" "STMTrace.List" ) ) IF COMPonent.AVAILable("HTM") ( popup "HTM" ( default menuitem "[:oconfig]HTM settings..." "HTM.state" separator menuitem "[:alist]HTMTrace List" "HTMTrace.List" ) ) IF COMPonent.AVAILable("TPIU") ( menuitem "[:oconfig]TPIU settings..." "TPIU.state" ) IF COMPonent.AVAILable("ETR") ( menuitem "[:oconfig]ETR settings..." ( PRIVATE &pdd &pdd=OS.PDD() DO "&pdd/etc/embedded_trace_router/etr_utility.cmm" ) ) ) popup "&Misc" ( popup "Tools" ( IF CPUIS64BIT()||CPU.FEATURE("SPR") ( menuitem "ARM System Register Converter" ( DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm" ) ) IF CPU.FEATURE("C15") ( menuitem "ARM Coprocessor Converter" ( DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm" ) ) ) ) popup "&Perf" ( IF CPU.FEATURE(BMC) ( before "Reset" menuitem "[:bmc]Benchmark Counters" "BMC.state" before "Reset" separator ) ) ) popup "Peripherals" ( popup "[:chip]Core Registers (Cortex-M0+)" ( menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M0+),System Control""" menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M0+),Memory Protection Unit (MPU)""" menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M0+),Nested Vectored Interrupt Controller (NVIC)""" popup "[:chip]Debug" ( menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M0+),Debug,Core Debug""" menuitem "[:chip]BPU;Breakpoint Unit" "per , ""Core Registers (Cortex-M0+),Debug,Breakpoint Unit (BPU)""" menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M0+),Debug,Data Watchpoint and Trace Unit (DWT)""" ) ) separator menuitem "Resets" "per , ""Resets""" menuitem "OM/IM" "per , ""Option-Setting Memory and Information Memory""" menuitem "LVD" "per , ""LVD (Low Voltage Detection)""" menuitem "CGC" "per , ""Clock Generation Circuit""" menuitem "CAC" "per , ""CAC (Clock Frequency Accuracy Measurement Circuit)""" menuitem "LPM" "per , ""Low Power Modes""" menuitem "RWP" "per , ""Register Write Protection""" menuitem "ICU" "per , ""ICU (Interrupt Controller Unit)""" menuitem "Buses" "per , ""Buses""" menuitem "DTC" "per , ""DTC (Data Transfer Controller)""" menuitem "ELC" "per , ""ELC (Event Link Controller)""" popup "IO" ( menuitem "Port 0" "per , ""IO,port 0""" menuitem "Port 1" "per , ""IO,port 1""" menuitem "Port 2" "per , ""IO,port 2""" menuitem "Port 3" "per , ""IO,port 3""" menuitem "Port 4" "per , ""IO,port 4""" if (cpuis("R7FS124773A01CFM")||cpuis("R7FS124763A01CFM")||cpuis("R7FS124773A01CNB")||cpuis("R7FS124763A01CNB")||cpuis("R7FS124773A01CFL")||cpuis("R7FS124763A01CFL")||cpuis("R7FS124773A01CNE")||cpuis("R7FS124763A01CNE")) ( menuitem "Port 5" "per , ""IO,Port 5""" ) ) menuitem "KINT" "per , ""KINT (Key Interrupt Function)""" menuitem "POEG" "per , ""POEG (Port Output Enable for GPT)""" popup "GPT" ( menuitem "32bit" "per , ""GPT (General PWM Timer),32bit""" menuitem "16bit (1)" "per , ""GPT (General PWM Timer),16bit (1)""" menuitem "16bit (2)" "per , ""GPT (General PWM Timer),16bit (2)""" menuitem "16bit (3)" "per , ""GPT (General PWM Timer),16bit (3)""" menuitem "16bit (4)" "per , ""GPT (General PWM Timer),16bit (4)""" if (!cpuis("R7FS124762A01CLM")&&!cpuis("R7FS124762A01CLM")&&!cpuis("R7FS124773A01CNF")&&!cpuis("R7FS124763A01CNF")) ( menuitem "16bit (5)" "per , ""GPT (General PWM Timer),16bit (5)""" menuitem "16bit (6)" "per , ""GPT (General PWM Timer),16bit (6)""" ) ) popup "AGT" ( menuitem "AGT 1" "per , ""AGT (Asynchronous General Purpose Timer),AGT 1""" menuitem "AGT 2" "per , ""AGT (Asynchronous General Purpose Timer),AGT 2""" ) menuitem "RTC" "per , ""RTC (Real Time Clock)""" menuitem "WDT" "per , ""WDT (Watchdog Timer)""" menuitem "IWDT" "per , ""IWDT (Independent Watchdog Timer)""" menuitem "USBFS" "per , ""USBFS (USB 2.0 Full-Speed Module)""" popup "SCI" ( menuitem "SCI 0" "per , ""SCI (Serial Communications Interface),SCI 0""" menuitem "SCI 1" "per , ""SCI (Serial Communications Interface),SCI 1""" menuitem "SCI 9" "per , ""SCI (Serial Communications Interface),SCI 9""" ) popup "IIC" ( menuitem "IIC 0" "per , ""IIC (I2C Bus Interface),IIC 0""" menuitem "IIC 1" "per , ""IIC (I2C Bus Interface),IIC 1""" ) menuitem "CAN" "per , ""CAN (Controller Area Network)""" popup "SPI" ( menuitem "SPI 0" "per , ""SPI (Serial Peripheral Interface),SPI 0""" menuitem "SPI 1" "per , ""SPI (Serial Peripheral Interface),SPI 1""" ) menuitem "CRC" "per , ""CRC (Cyclic Redundancy Check Calculator)""" menuitem "ADC14" "per , ""ADC14 (14-Bit A/D Converter)""" menuitem "DAC12" "per , ""DAC12 (12-Bit D/A Converter)""" menuitem "TSN" "per , ""TSN (Temperature Sensor)""" menuitem "ACMPLP" "per , ""ACMPLP (Low-Power Analog Comparator)""" menuitem "CTSU" "per , ""CTSU (Capacitive Touch Sensing Unit)""" menuitem "DOC" "per , ""DOC (Data Operation Circuit)""" menuitem "SRAM" "per , ""SRAM (Static Random Access Memory)""" ) )