; --------------------------------------------------------------------------------
; @Title: DA1470x Specific Menu
; @Props: Released
; @Author: JDU
; @Changelog: 2023-02-13 JDU
; @Manufacturer: DIALOG - Dialog Semiconductor
; @Core: Cortex-M33F, Cortex-M0+
; @Chip: DA14701-CM33, DA14701-CM0+-SNC, DA14701-CM0+-CMAC,
;        DA14705-CM33, DA14705-CM0+-SNC, DA14705-CM0+-CMAC,
;        DA14706-CM33, DA14706-CM0+-SNC, DA14706-CM0+-CMAC,
;        DA14708-CM33, DA14708-CM0+-SNC, DA14708-CM0+-CMAC
; @Copyright: (C) 1989-2023 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: menda1470x.men 16339 2023-07-03 13:30:14Z pegold $

add
menu
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
popup "&CPU"
(
separator
IF CPU.FEATURE(MMU)
(
popup "[:mmu]MMU"
(
menuitem "[:mmureg]MMU Control" "MMU.view"
separator
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
separator
IF CPU.FEATURE(ITLBDUMP)
(
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
)
IF CPU.FEATURE(DTLBDUMP)
(
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
)
IF CPU.FEATURE(TLB0DUMP)
(
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
)
IF CPU.FEATURE(TLB1DUMP)
(
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
)
)
)
IF COMPonent.AVAILable("SMMU")
(
popup "[:mmu]SMMU"
(
menuitem "[:chip]SMMU1 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU1 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.StreamMapTable &(name)
)
IF COMPonent.AVAILable("SMMU2")
(
separator
menuitem "[:chip]SMMU2 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU2 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU3")
(
separator
menuitem "[:chip]SMMU3 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU3 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU4")
(
separator
menuitem "[:chip]SMMU4 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU4 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU5")
(
separator
menuitem "[:chip]SMMU5 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU5 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU6")
(
separator
menuitem "[:chip]SMMU6 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU6 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.StreamMapTable &(name)
)
)
)
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
popup "[:cache]Cache"
(
IF CPU.FEATURE(L1ICACHEDUMP)
(
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
menuitem "[:cache]ICACHE List" "CACHE.List IC"
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
)
IF CPU.FEATURE(L1DCACHEDUMP)
(
separator
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
menuitem "[:cache]DCACHE List" "CACHE.List DC"
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
)
IF CPU.FEATURE(L2CACHEDUMP)
(
separator
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
)
)
)
)
popup "&Trace"
(
separator
IF COMPonent.AVAILable("ITM")
(
popup "ITM"
(
default
menuitem "[:oconfig]ITM settings..." "ITM.state"
separator
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
)
)
IF COMPonent.AVAILable("STM")
(
popup "STM"
(
default
menuitem "[:oconfig]STM settings..." "STM.state"
separator
menuitem "[:alist]STMTrace List" "STMTrace.List"
)
)
IF COMPonent.AVAILable("HTM")
(
popup "HTM"
(
default
menuitem "[:oconfig]HTM settings..." "HTM.state"
separator
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
)
)
IF COMPonent.AVAILable("TPIU")
(
menuitem "[:oconfig]TPIU settings..." "TPIU.state"
)
IF COMPonent.AVAILable("ETR")
(
menuitem "[:oconfig]ETR settings..."
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
)
)
)
popup "&Misc"
(
popup "Tools"
(
IF CPUIS64BIT()||CPU.FEATURE("SPR")
(
menuitem "ARM System Register Converter"
(
DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
)
)
IF CPU.FEATURE("C15")
(
menuitem "ARM Coprocessor Converter"
(
DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
)
)
)
)
popup "&Perf"
(
IF CPU.FEATURE(BMC)
(
before "Reset"
menuitem "[:bmc]Benchmark Counters" "BMC.state"
before "Reset"
separator
)
)
)
popup "Peripherals"
(
if (CORENAME()=="CORTEXM33F")
(
popup "[:chip]Core Registers (Cortex-M33F)"
(
menuitem "[:chip]System Control"                                   "per , ""Core Registers (Cortex-M33F),System Control"""
menuitem "[:chip]MPU;Memory Protection Unit"                       "per , ""Core Registers (Cortex-M33F),Memory Protection Unit (MPU)"""
menuitem "[:chip]SAU;Security Attribution Unit"                    "per , ""Core Registers (Cortex-M33F),Security Attribution Unit (SAU)"""
menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller"        "per , ""Core Registers (Cortex-M33F),Nested Vectored Interrupt Controller (NVIC)"""
menuitem "[:chip]FPU;Floating-point Unit"                          "per , ""Core Registers (Cortex-M33F),Floating-point Unit (FPU)"""
popup "[:chip]Debug"
(
menuitem "[:chip]Core Debug"                                   "per , ""Core Registers (Cortex-M33F),Debug,Core Debug"""
menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit"          "per , ""Core Registers (Cortex-M33F),Debug,Flash Patch and Breakpoint Unit (FPB)"""
menuitem "[:chip]DWT;Data Watchpoint and Trace Unit"           "per , ""Core Registers (Cortex-M33F),Debug,Data Watchpoint and Trace Unit (DWT)"""
)
)
)
else if (CORENAME()=="CORTEXM0+")
(
popup "[:chip]Core Registers (Cortex-M0+)"
(
menuitem "[:chip]System Control"                                  "per , ""Core Registers (Cortex-M0+),System Control"""
menuitem "[:chip]MPU;Memory Protection Unit"                      "per , ""Core Registers (Cortex-M0+),Memory Protection Unit (MPU)"""
menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller"       "per , ""Core Registers (Cortex-M0+),Nested Vectored Interrupt Controller (NVIC)"""
popup "[:chip]Debug"
(
menuitem "[:chip]Core Debug"                                  "per , ""Core Registers (Cortex-M0+),Debug,Core Debug"""
menuitem "[:chip]BPU;Breakpoint Unit"                         "per , ""Core Registers (Cortex-M0+),Debug,Breakpoint Unit (BPU)"""
menuitem "[:chip]DWT;Data Watchpoint and Trace Unit"          "per , ""Core Registers (Cortex-M0+),Debug,Data Watchpoint and Trace Unit (DWT)"""
)
)
)
separator
menuitem "AES_HASH"                                  "per , ""AES_HASH"""
menuitem "ANAMISC_BIF"                              "per , ""ANAMISC_BIF"""
menuitem "CACHE"                                     "per , ""CACHE"""
menuitem "CHARGER"                                   "per , ""CHARGER"""
menuitem "CHG_DET"                                   "per , ""CHG_DET"""
popup "CRG"
(
menuitem "CRG_AUD"                               "per , ""CRG,CRG_AUD"""
menuitem "CRG_CTRL"                              "per , ""CRG,CRG_CTRL"""
menuitem "CRG_GPU"                               "per , ""CRG,CRG_GPU"""
menuitem "CRG_SNC"                               "per , ""CRG,CRG_SNC"""
menuitem "CRG_SYS"                               "per , ""CRG,CRG_SYS"""
menuitem "CRG_TOP"                               "per , ""CRG,CRG_TOP"""
menuitem "CRG_VSYS"                              "per , ""CRG,CRG_VSYS"""
menuitem "CRG_XTAL"                              "per , ""CRG,CRG_XTAL"""
)
menuitem "DCACHE"                                    "per , ""DCACHE"""
menuitem "DCDC"                                      "per , ""DCDC"""
menuitem "DCDC_BOOST"                               "per , ""DCDC_BOOST"""
menuitem "DMA"                                       "per , ""DMA"""
menuitem "DSI2"                                      "per , ""DSI2"""
menuitem "DSIDPHY_REG"                              "per , ""DSIDPHY_REG"""
menuitem "EMMC"                                      "per , ""EMMC"""
menuitem "GPADC"                                     "per , ""GPADC"""
menuitem "GPIO"                                      "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines)"""
menuitem "GPREG"                                     "per , ""GPREG"""
menuitem "GPU_CORE"                                  "per , ""GPU_CORE"""
menuitem "GPU_REG"                                   "per , ""GPU_REG"""
popup "I2C;Inter-Integrated Circuit"
(
menuitem "I2C"                                   "per , ""I2C (Inter-Integrated Circuit),I2C"""
menuitem "I2C2"                                  "per , ""I2C (Inter-Integrated Circuit),I2C2"""
menuitem "I2C3"                                  "per , ""I2C (Inter-Integrated Circuit),I2C3"""
)
menuitem "I3C"                                       "per , ""I3C"""
menuitem "LCDC"                                      "per , ""LCDC"""
menuitem "MEMCTRL"                                   "per , ""MEMCTRL"""
menuitem "OQSPIF"                                    "per , ""OQSPIF"""
)
)