; --------------------------------------------------------------------------------
; @Title: AM387x, DM3814x, DRA6x, C6A814x Specific Menu
; @Props: Released
; @Author: ART, LEM, MAR, PAC, SLA, SOL, STR
; @Changelog:
;   2011-02-28 MAR
;   2011-12-22 MAR
;   2012-06-25 MAR
; @Manufacturer: TI - Texas Instruments
; @Core: Cortex-A8
; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: menam387x.men 7098 2016-08-05 13:50:24Z askoncej $

add
menu
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
popup "&CPU"
(
separator
IF CPU.FEATURE(MMU)
(
popup "[:mmu]MMU"
(
menuitem "[:mmureg]MMU Control" "MMU.view"
separator
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
separator
IF CPU.FEATURE(ITLBDUMP)
(
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
)
IF CPU.FEATURE(DTLBDUMP)
(
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
)
IF CPU.FEATURE(TLB0DUMP)
(
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
)
IF CPU.FEATURE(TLB1DUMP)
(
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
)
)
)
IF COMPonent.AVAILable("SMMU")
(
popup "[:mmu]SMMU"
(
menuitem "[:chip]SMMU1 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU1 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.StreamMapTable &(name)
)
IF COMPonent.AVAILable("SMMU2")
(
separator
menuitem "[:chip]SMMU2 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU2 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU3")
(
separator
menuitem "[:chip]SMMU3 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU3 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU4")
(
separator
menuitem "[:chip]SMMU4 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU4 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU5")
(
separator
menuitem "[:chip]SMMU5 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU5 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU6")
(
separator
menuitem "[:chip]SMMU6 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU6 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.StreamMapTable &(name)
)
)
)
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
popup "[:cache]Cache"
(
IF CPU.FEATURE(L1ICACHEDUMP)
(
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
menuitem "[:cache]ICACHE List" "CACHE.List IC"
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
)
IF CPU.FEATURE(L1DCACHEDUMP)
(
separator
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
menuitem "[:cache]DCACHE List" "CACHE.List DC"
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
)
IF CPU.FEATURE(L2CACHEDUMP)
(
separator
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
)
)
)
)
popup "&Trace"
(
separator
IF COMPonent.AVAILable("ITM")
(
popup "ITM"
(
default
menuitem "[:oconfig]ITM settings..." "ITM.state"
separator
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
)
)
IF COMPonent.AVAILable("STM")
(
popup "STM"
(
default
menuitem "[:oconfig]STM settings..." "STM.state"
separator
menuitem "[:alist]STMTrace List" "STMTrace.List"
)
)
IF COMPonent.AVAILable("HTM")
(
popup "HTM"
(
default
menuitem "[:oconfig]HTM settings..." "HTM.state"
separator
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
)
)
IF COMPonent.AVAILable("TPIU")
(
menuitem "[:oconfig]TPIU settings..." "TPIU.state"
)
IF COMPonent.AVAILable("ETR")
(
menuitem "[:oconfig]ETR settings..."
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
)
)
)
popup "&Misc"
(
popup "Tools"
(
IF CPUIS64BIT()||CPU.FEATURE("SPR")
(
menuitem "ARM System Register Converter"
(
DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
)
)
IF CPU.FEATURE("C15")
(
menuitem "ARM Coprocessor Converter"
(
DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
)
)
)
)
popup "&Perf"
(
IF CPU.FEATURE(BMC)
(
before "Reset"
menuitem "[:bmc]Benchmark Counters" "BMC.state"
before "Reset"
separator
)
)
)
popup "Peripherals"
(
popup "[:chip]Core Registers (Cortex-A8)"
(
menuitem "[:chip]ID Registers"                          "per , ""Core Registers (Cortex-A8),ID Registers"""
menuitem "[:chip]System Control and Configuration"      "per , ""Core Registers (Cortex-A8),System Control and Configuration"""
menuitem "[:chip]Memory Management Unit"                "per , ""Core Registers (Cortex-A8),Memory Management Unit"""
menuitem "[:chip]Cache Control and Configuration"       "per , ""Core Registers (Cortex-A8),Cache Control and Configuration"""
menuitem "[:chip]L2 Cache Control and Configuration"    "per , ""Core Registers (Cortex-A8),L2 Cache Control and Configuration"""
menuitem "[:chip]System Performance Monitor"            "per , ""Core Registers (Cortex-A8),System Performance Monitor"""
menuitem "[:chip]Debug Registers"                       "per , ""Core Registers (Cortex-A8),Debug Registers"""
menuitem "[:chip]Breakpoint Registers"                  "per , ""Core Registers (Cortex-A8),Breakpoint Registers"""
menuitem "[:chip]Watchpoint Control Registers"          "per , ""Core Registers (Cortex-A8),Watchpoint Control Registers"""
)
separator
if (cpuis("DRA62?"))
(
menuitem "Media Control Subsystem"                          "per , ""Media Control Subsystem"""
menuitem "MMU"                                              "per , ""MMU (Memory Management Unit)"""
)
menuitem "System Control"                                       "per , ""System Control"""
menuitem "Interrupt"                                            "per , ""INTC (Interrupt Controller)"""
menuitem "DCAN"                                                 "per , ""DCAN (Dual Controller Area Network)"""
menuitem "EDMA"                                                 "per , ""EDMA (Enhanced Direct-Memory-Access)"""
menuitem "Spinlock"                                             "per , ""SPINLOCK (Spinlock Registers)"""
if (cpu()=="AM3874"||cpu()=="C6A8148"||cpu()=="DM8148"||cpuis("DRA6*"))
(
menuitem "SGX530"                                           "per , ""SGX530 (2D/3D Graphics Accelerator)"""
)
menuitem "Mailbox"                                              "per , ""MAILBOX (Mailbox Registers)"""
menuitem "ELM"                                                  "per , ""ELM (Error Location Module)"""
if (!cpuis("DRA62?"))
(
menuitem "DMM"                                              "per , ""DMM (Dynamic Memory Manager)"""
)
if (cpuis("AM387*")||cpuis("DRA6x?"))
(
menuitem "DDR"                                              "per , ""DDR2/3/mDDR Memory Controller"""
)
menuitem "Ethernet"                                             "per , ""Ethernet"""
menuitem "RTC"                                                  "per , ""RTC (Real Time Clock)"""
menuitem "GPIO"                                                 "per , ""GPIO (General Purpose Input/Output)"""
menuitem "GPMC"                                                 "per , ""GPMC (General Purpose Memory Controller)"""
if (cpu()!="AM3871"&&!cpuis("DRA62?"))
(
menuitem "HDVPSS"                                           "per , ""HDVPSS (HD Video Processing Subsystem)"""
)
if ((cpu()=="AM3874")||(cpu()=="AM3872"))
(
menuitem "HDMI (High-Definition Multimedia Interface)"      "per , ""HDMI (High-Definition Multimedia Interface)"""
)
menuitem "I2C"                                                  "per , ""I2C (Inter Integrated Circuit)"""
menuitem "McASP"                                                "per , ""McASP (Multichannel Audio Serial Port)"""
menuitem "McBSP"                                                "per , ""McBSP (Multichannel Buffered Serial Port)"""
if (cpuis("DRA6*"))
(
menuitem "MLB"                                              "per , ""MLB (Media Local Bus)"""
)
menuitem "MMC/SD/SDIO"                                          "per , ""MMC/SD/SDIO (Secure Digital/Secure Digital I/O Card Interface)"""
if (cpuis("AM387*"))
(
menuitem "PATA"                                             "per , ""PATA (Parallel ATA)"""
)
menuitem "PCIe"                                                 "per , ""PCIe (Peripheral Component Interconnect Express)"""
if (!cpuis("DRA62?"))
(
menuitem "SATA"                                             "per , ""SATA (Serial ATA)"""
)
menuitem "McSPI"                                                "per , ""McSPI (Multichannel Serial Port Interface)"""
menuitem "Timers"                                               "per , ""Timers"""
menuitem "Watchdog"                                             "per , ""WDOG (Watchdog Timer)"""
if (cpuis("DRA62?"))
(
menuitem "VCP"                                              "per , ""VCP (Viterbi-Decoder Coprocessor)"""
)
menuitem "UART"                                                 "per , ""UART (Universal Asynchronous Receiver/Transmitter)"""
menuitem "USB"                                                  "per , ""USB (Universal Serial Bus)"""
if (cpuis("DRA62?"))
(
menuitem "ATL"                                              "per , ""ATL (Audio Tracking Logic)"""
menuitem "Touchscreen Controller"                           "per , ""Touchscreen Controller"""
)
)
)