; -------------------------------------------------------------------------------- ; @Title: 66AK2Gx Specific Menu ; @Props: Released ; @Author: ASK, KRZ ; @Changelog: 2016-10-14 ASK ; 2022-04-29 KRZ ; @Manufacturer: TI - Texas Instruments ; @Core: Cortex-A15, C646X, PRU ; @Copyright: 1989-2022 Lauterbach GmbH, licensed for use with TRACE32 only ; -------------------------------------------------------------------------------- ; $Id: men66ak2gx.men 16339 2023-07-03 13:30:14Z pegold $ add menu ( if (CPUFAMILY()=="C6000") ( popup "&CPU" ( after "FPU Registers" separator popup "[:cache]Cache" ( menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC" menuitem "[:cache]ICACHE List" "CACHE.List IC" menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC" separator menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC" menuitem "[:cache]DCACHE List" "CACHE.List DC" menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC" separator menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2" menuitem "[:cache]L2CACHE List" "CACHE.List L2" menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2" ) ) popup "&Trace" ( IF COMPonent.AVAILable("TPIU") ( menuitem "[:oconfig]TPIU settings..." "TPIU.state" ) IF COMPonent.AVAILable("AET") ( menuitem "[:oconfig]AET settings..." "AET.state" ) ) popup "&Perf" ( before "Reset" menuitem "[:bmc]Benchmark Counters" "BMC.state" before "Reset" separator ) ) if (!cpuis("66AK2G?2-ICSS?")&&cpu()!="PRU") ( IF SOFTWARE.BUILD.BASE()>=69655. ( popup "&CPU" ( separator IF CPU.FEATURE(MMU) ( popup "[:mmu]MMU" ( menuitem "[:mmureg]MMU Control" "MMU.view" separator menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable" menuitem "[:mmu]MMU Table List" "MMU.List.PageTable" separator IF CPU.FEATURE(ITLBDUMP) ( menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB" ) IF CPU.FEATURE(DTLBDUMP) ( menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB" ) IF CPU.FEATURE(TLB0DUMP) ( menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0" ) IF CPU.FEATURE(TLB1DUMP) ( menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1" ) ) ) IF COMPonent.AVAILable("SMMU") ( popup "[:mmu]SMMU" ( menuitem "[:chip]SMMU1 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU1 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.StreamMapTable &(name) ) IF COMPonent.AVAILable("SMMU2") ( separator menuitem "[:chip]SMMU2 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU2 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU3") ( separator menuitem "[:chip]SMMU3 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU3 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU4") ( separator menuitem "[:chip]SMMU4 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU4 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU5") ( separator menuitem "[:chip]SMMU5 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU5 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU6") ( separator menuitem "[:chip]SMMU6 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU6 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.StreamMapTable &(name) ) ) ) ) IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE) ( popup "[:cache]Cache" ( IF CPU.FEATURE(L1ICACHEDUMP) ( menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC" menuitem "[:cache]ICACHE List" "CACHE.List IC" menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC" ) IF CPU.FEATURE(L1DCACHEDUMP) ( separator menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC" menuitem "[:cache]DCACHE List" "CACHE.List DC" menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC" ) IF CPU.FEATURE(L2CACHEDUMP) ( separator menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2" menuitem "[:cache]L2CACHE List" "CACHE.List L2" menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2" ) ) ) ) popup "&Trace" ( separator IF COMPonent.AVAILable("ITM") ( popup "ITM" ( default menuitem "[:oconfig]ITM settings..." "ITM.state" separator menuitem "[:alist]ITMTrace List" "ITMTrace.List" ) ) IF COMPonent.AVAILable("STM") ( popup "STM" ( default menuitem "[:oconfig]STM settings..." "STM.state" separator menuitem "[:alist]STMTrace List" "STMTrace.List" ) ) IF COMPonent.AVAILable("HTM") ( popup "HTM" ( default menuitem "[:oconfig]HTM settings..." "HTM.state" separator menuitem "[:alist]HTMTrace List" "HTMTrace.List" ) ) IF COMPonent.AVAILable("TPIU") ( menuitem "[:oconfig]TPIU settings..." "TPIU.state" ) IF COMPonent.AVAILable("ETR") ( menuitem "[:oconfig]ETR settings..." ( PRIVATE &pdd &pdd=OS.PDD() DO "&pdd/etc/embedded_trace_router/etr_utility.cmm" ) ) ) popup "&Misc" ( popup "Tools" ( IF CPUIS64BIT()||CPU.FEATURE("SPR") ( menuitem "ARM System Register Converter" ( DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm" ) ) IF CPU.FEATURE("C15") ( menuitem "ARM Coprocessor Converter" ( DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm" ) ) ) ) popup "&Perf" ( IF CPU.FEATURE(BMC) ( before "Reset" menuitem "[:bmc]Benchmark Counters" "BMC.state" before "Reset" separator ) ) ) popup "Peripherals" ( if (CORENAME()=="CORTEXA15MPCORE") ( popup "[:chip]Core Registers (Cortex-A15MPCore)" ( menuitem "[:chip]ID Registers" "per , ""Core Registers (Cortex-A15MPCore),ID Registers""" menuitem "[:chip]System Control and Configuration" "per , ""Core Registers (Cortex-A15MPCore),System Control and Configuration""" menuitem "[:chip]Memory Management Unit" "per , ""Core Registers (Cortex-A15MPCore),Memory Management Unit""" menuitem "[:chip]Virtualization Extensions" "per , ""Core Registers (Cortex-A15MPCore),Virtualization Extensions""" menuitem "[:chip]Cache Control and Configuration" "per , ""Core Registers (Cortex-A15MPCore),Cache Control and Configuration""" menuitem "[:chip]System Performance Monitor" "per , ""Core Registers (Cortex-A15MPCore),System Performance Monitor""" menuitem "[:chip]System Timer Register" "per , ""Core Registers (Cortex-A15MPCore),System Timer Register""" separator menuitem "[:chip]Debug Registers" "per , ""Core Registers (Cortex-A15MPCore),Debug Registers""" menuitem "[:chip]Breakpoint Registers" "per , ""Core Registers (Cortex-A15MPCore),Breakpoint Registers""" menuitem "[:chip]Watchpoint Control Registers" "per , ""Core Registers (Cortex-A15MPCore),Watchpoint Control Registers""" ) ) else ( popup "[:chip]Core Registers (c66x)" ( menuitem "[:chip]L1P;L1P Registers" "per , ""Core Registers (c66x),Cache,L1P Cache""" menuitem "[:chip]L1D;L1D Registers" "per , ""Core Registers (c66x),Cache,L1D Cache""" menuitem "[:chip]L2;L2 Registers" "per , ""Core Registers (c66x),Cache,L2 Cache""" menuitem "[:chip]IDMA;IDMA Registers" "per , ""Core Registers (c66x),IDMA (Internal Direct Memory Access Controller)""" menuitem "[:chip]XMC;XMC Registers" "per , ""Core Registers (c66x),XMC (Extended Memory Controller)""" menuitem "[:chip]BM;BM Registers" "per , ""Core Registers (c66x),Bandwith Management""" menuitem "[:chip]IC;IC Registers" "per , ""Core Registers (c66x),Interrupt Controller""" menuitem "[:chip]PD;PD Registers" "per , ""Core Registers (c66x),Power-Down Controller""" ) ) separator popup "ARM_Cortex_A15_Subsystem" ( menuitem "ARM_VBUSP" "per , ""ARM_Cortex_A15_Subsystem,ARM_VBUSP""" menuitem "ARM_VBUSP" "per , ""ARM_Cortex_A15_Subsystem,ARM_VBUSP""" menuitem "AXI2VBUS_MASTER" "per , ""ARM_Cortex_A15_Subsystem,AXI2VBUS_MASTER""" menuitem "AXI2VBUS_MASTER" "per , ""ARM_Cortex_A15_Subsystem,AXI2VBUS_MASTER""" ) popup "BOOT_CFG" ( menuitem "BOOT_CFG" "per , ""BOOT_CFG,BOOT_CFG""" ) popup "DCAN" ( menuitem "DCAN_0" "per , ""DCAN,DCAN_0""" menuitem "DCAN_0_DATA" "per , ""DCAN,DCAN_0_DATA""" menuitem "DCAN_1" "per , ""DCAN,DCAN_1""" menuitem "DCAN_1_DATA" "per , ""DCAN,DCAN_1_DATA""" ) popup "DISPC_COMMON" ( menuitem "DISPC_COMMON" "per , ""DISPC_COMMON,DISPC_COMMON""" ) popup "DISPC_OVR1" ( menuitem "DISPC_OVR1" "per , ""DISPC_OVR1,DISPC_OVR1""" ) popup "DISPC_VID1" ( menuitem "DISPC_VID1" "per , ""DISPC_VID1,DISPC_VID1""" ) popup "DISPC_VP1" ( menuitem "DISPC_VP1" "per , ""DISPC_VP1,DISPC_VP1""" ) popup "DSSUL_0_CFG" ( menuitem "DSSUL_0_CFG" "per , ""DSSUL_0_CFG,DSSUL_0_CFG""" ) popup "eCAP" ( menuitem "ECAP_0" "per , ""eCAP,ECAP_0""" menuitem "ECAP_1" "per , ""eCAP,ECAP_1""" ) popup "EDMA" ( menuitem "EDMACC_0" "per , ""EDMA,EDMACC_0""" menuitem "EDMACC_1" "per , ""EDMA,EDMACC_1""" menuitem "EDMACC_0" "per , ""EDMA,EDMACC_0""" menuitem "EDMACC_1" "per , ""EDMA,EDMACC_1""" menuitem "EDMACC_0_TC_0" "per , ""EDMA,EDMACC_0_TC_0""" menuitem "EDMACC_0_TC_1" "per , ""EDMA,EDMACC_0_TC_1""" menuitem "EDMACC_1_TC_0" "per , ""EDMA,EDMACC_1_TC_0""" menuitem "EDMACC_1_TC_1" "per , ""EDMA,EDMACC_1_TC_1""" menuitem "EDMACC_0_TC_0" "per , ""EDMA,EDMACC_0_TC_0""" menuitem "EDMACC_0_TC_1" "per , ""EDMA,EDMACC_0_TC_1""" menuitem "EDMACC_1_TC_0" "per , ""EDMA,EDMACC_1_TC_0""" menuitem "EDMACC_1_TC_1" "per , ""EDMA,EDMACC_1_TC_1""" ) popup "ELM" ( menuitem "ELM" "per , ""ELM,ELM""" ) popup "EMIF" ( menuitem "DDR_PHY" "per , ""EMIF,DDR_PHY""" menuitem "EMIF" "per , ""EMIF,EMIF""" ) popup "ePWM" ( menuitem "EPWM_0" "per , ""ePWM,EPWM_0""" menuitem "EPWM_1" "per , ""ePWM,EPWM_1""" menuitem "EPWM_2" "per , ""ePWM,EPWM_2""" menuitem "EPWM_3" "per , ""ePWM,EPWM_3""" menuitem "EPWM_4" "per , ""ePWM,EPWM_4""" menuitem "EPWM_5" "per , ""ePWM,EPWM_5""" ) popup "eQEP" ( menuitem "EQEP_0" "per , ""eQEP,EQEP_0""" menuitem "EQEP_1" "per , ""eQEP,EQEP_1""" menuitem "EQEP_2" "per , ""eQEP,EQEP_2""" ) popup "GPIO" ( menuitem "GPIO_0" "per , ""GPIO,GPIO_0""" menuitem "GPIO_1" "per , ""GPIO,GPIO_1""" ) popup "GPMC" ( menuitem "GPMC" "per , ""GPMC,GPMC""" ) popup "I2C" ( menuitem "I2C_0" "per , ""I2C,I2C_0""" menuitem "I2C_1" "per , ""I2C,I2C_1""" menuitem "I2C_2" "per , ""I2C,I2C_2""" ) popup "MPU" ( menuitem "MPU_0" "per , ""MPU,MPU_0""" menuitem "MPU_1" "per , ""MPU,MPU_1""" menuitem "MPU_2" "per , ""MPU,MPU_2""" menuitem "MPU_3" "per , ""MPU,MPU_3""" menuitem "MPU_4" "per , ""MPU,MPU_4""" menuitem "MPU_5" "per , ""MPU,MPU_5""" menuitem "MPU_6" "per , ""MPU,MPU_6""" menuitem "MPU_7" "per , ""MPU,MPU_7""" menuitem "MPU_8" "per , ""MPU,MPU_8""" menuitem "MPU_9" "per , ""MPU,MPU_9""" menuitem "MPU_10" "per , ""MPU,MPU_10""" menuitem "MPU_11" "per , ""MPU,MPU_11""" menuitem "MPU_12" "per , ""MPU,MPU_12""" menuitem "MPU_13" "per , ""MPU,MPU_13""" menuitem "MPU_14" "per , ""MPU,MPU_14""" menuitem "MPU_15" "per , ""MPU,MPU_15""" menuitem "MPU_16" "per , ""MPU,MPU_16""" ) popup "MSMC" ( menuitem "MSMC" "per , ""MSMC,MSMC""" ) popup "NSS" ( menuitem "NSS_0_CFG__cppidma0_tx_scheduler" "per , ""NSS,NSS_0_CFG__cppidma0_tx_scheduler""" menuitem "NSS_0_CFG__cppidma0_tx_scheduler" "per , ""NSS,NSS_0_CFG__cppidma0_tx_scheduler""" menuitem "NSS_0_CFG__cppidma0_tx_scheduler" "per , ""NSS,NSS_0_CFG__cppidma0_tx_scheduler""" menuitem "NSS_0_CFG__cppidma0_tx_scheduler" "per , ""NSS,NSS_0_CFG__cppidma0_tx_scheduler""" menuitem "NSS_0_CFG_ALE" "per , ""NSS,NSS_0_CFG_ALE""" menuitem "NSS_0_CFG_ALE" "per , ""NSS,NSS_0_CFG_ALE""" menuitem "NSS_0_CFG_ALE" "per , ""NSS,NSS_0_CFG_ALE""" menuitem "NSS_0_CFG_CPPIDMA0_CONFIG" "per , ""NSS,NSS_0_CFG_CPPIDMA0_CONFIG""" menuitem "NSS_0_CFG_CPPIDMA0_CONFIG" "per , ""NSS,NSS_0_CFG_CPPIDMA0_CONFIG""" menuitem "NSS_0_CFG_CPPIDMA0_CONFIG" "per , ""NSS,NSS_0_CFG_CPPIDMA0_CONFIG""" menuitem "NSS_0_CFG_CPPIDMA0_CONFIG" "per , ""NSS,NSS_0_CFG_CPPIDMA0_CONFIG""" menuitem "NSS_0_CFG_CPSW" "per , ""NSS,NSS_0_CFG_CPSW""" menuitem "NSS_0_CFG_CPSW" "per , ""NSS,NSS_0_CFG_CPSW""" menuitem "NSS_0_CFG_CPSW" "per , ""NSS,NSS_0_CFG_CPSW""" menuitem "NSS_0_CFG_CPTS" "per , ""NSS,NSS_0_CFG_CPTS""" menuitem "NSS_0_CFG_CPTS" "per , ""NSS,NSS_0_CFG_CPTS""" menuitem "NSS_0_CFG_CPTS" "per , ""NSS,NSS_0_CFG_CPTS""" menuitem "NSS_0_CFG_EMAC" "per , ""NSS,NSS_0_CFG_EMAC""" menuitem "NSS_0_CFG_EMAC" "per , ""NSS,NSS_0_CFG_EMAC""" menuitem "NSS_0_CFG_EMAC" "per , ""NSS,NSS_0_CFG_EMAC""" menuitem "NSS_0_CFG_INTD" "per , ""NSS,NSS_0_CFG_INTD""" menuitem "NSS_0_CFG_INTD" "per , ""NSS,NSS_0_CFG_INTD""" menuitem "NSS_0_CFG_INTD" "per , ""NSS,NSS_0_CFG_INTD""" menuitem "NSS_0_CFG_MDIO" "per , ""NSS,NSS_0_CFG_MDIO""" menuitem "NSS_0_CFG_MDIO" "per , ""NSS,NSS_0_CFG_MDIO""" menuitem "NSS_0_CFG_MDIO" "per , ""NSS,NSS_0_CFG_MDIO""" menuitem "NSS_0_CFG_NAVSS_CFG" "per , ""NSS,NSS_0_CFG_NAVSS_CFG""" menuitem "NSS_0_CFG_NAVSS_CFG" "per , ""NSS,NSS_0_CFG_NAVSS_CFG""" menuitem "NSS_0_CFG_NAVSS_CFG" "per , ""NSS,NSS_0_CFG_NAVSS_CFG""" menuitem "NSS_0_CFG_EMAC_ECC" "per , ""NSS,NSS_0_CFG_EMAC_ECC""" menuitem "NSS_0_CFG_NAVSS_ECC" "per , ""NSS,NSS_0_CFG_NAVSS_ECC""" menuitem "NSS_0_CFG_EMAC_ECC" "per , ""NSS,NSS_0_CFG_EMAC_ECC""" menuitem "NSS_0_CFG_NAVSS_ECC" "per , ""NSS,NSS_0_CFG_NAVSS_ECC""" menuitem "NSS_0_CFG_EMAC_ECC" "per , ""NSS,NSS_0_CFG_EMAC_ECC""" menuitem "NSS_0_CFG_NAVSS_ECC" "per , ""NSS,NSS_0_CFG_NAVSS_ECC""" menuitem "NSS_0_CFG_QMGR0_CFG" "per , ""NSS,NSS_0_CFG_QMGR0_CFG""" menuitem "NSS_0_CFG_QMGR0_CFG" "per , ""NSS,NSS_0_CFG_QMGR0_CFG""" menuitem "NSS_0_CFG_QMGR0_CFG" "per , ""NSS,NSS_0_CFG_QMGR0_CFG""" menuitem "NSS_0_CFG_QMGR0_CFG" "per , ""NSS,NSS_0_CFG_QMGR0_CFG""" menuitem "PCIE_0_ECC_CFG" "per , ""NSS,PCIE_0_ECC_CFG""" menuitem "PCIE_0_ECC_CFG" "per , ""NSS,PCIE_0_ECC_CFG""" menuitem "PCIE_0_PHY_CFG" "per , ""NSS,PCIE_0_PHY_CFG""" menuitem "PCIE_0_PHY_CFG" "per , ""NSS,PCIE_0_PHY_CFG""" menuitem "PCIE_APPLICATION" "per , ""NSS,PCIE_APPLICATION""" menuitem "PCIE_APPLICATION" "per , ""NSS,PCIE_APPLICATION""" menuitem "PCIE_CAP_EXT_REGS" "per , ""NSS,PCIE_CAP_EXT_REGS""" menuitem "PCIE_CAP_EXT_REGS" "per , ""NSS,PCIE_CAP_EXT_REGS""" menuitem "PCIE_CAP_REGS" "per , ""NSS,PCIE_CAP_REGS""" menuitem "PCIE_CAP_REGS" "per , ""NSS,PCIE_CAP_REGS""" menuitem "PCIE_CFG" "per , ""NSS,PCIE_CFG""" menuitem "PCIE_CFG" "per , ""NSS,PCIE_CFG""" menuitem "PCIE_CFG_TYPE0" "per , ""NSS,PCIE_CFG_TYPE0""" menuitem "PCIE_CFG_TYPE0" "per , ""NSS,PCIE_CFG_TYPE0""" menuitem "PCIE_CFG_TYPE1" "per , ""NSS,PCIE_CFG_TYPE1""" menuitem "PCIE_CFG_TYPE1" "per , ""NSS,PCIE_CFG_TYPE1""" menuitem "PCIE_MSG_IRQ_REGS" "per , ""NSS,PCIE_MSG_IRQ_REGS""" menuitem "PCIE_MSG_IRQ_REGS" "per , ""NSS,PCIE_MSG_IRQ_REGS""" menuitem "PCIE_PORT_LOGIC_REGS" "per , ""NSS,PCIE_PORT_LOGIC_REGS""" menuitem "PCIE_PORT_LOGIC_REGS" "per , ""NSS,PCIE_PORT_LOGIC_REGS""" menuitem "PCIE_PWR_REGS" "per , ""NSS,PCIE_PWR_REGS""" menuitem "PCIE_PWR_REGS" "per , ""NSS,PCIE_PWR_REGS""" menuitem "PSC" "per , ""NSS,PSC""" menuitem "QSPI" "per , ""NSS,QSPI""" menuitem "SEMAPHORE" "per , ""NSS,SEMAPHORE""" ) popup "PLL_Controller" ( menuitem "PLL" "per , ""PLL_Controller,PLL""" ) popup "PRU_ICSS" ( menuitem "CIC" "per , ""PRU_ICSS,CIC""" menuitem "MCASP_0__CFG" "per , ""PRU_ICSS,MCASP_0__CFG""" menuitem "MCASP_1__CFG" "per , ""PRU_ICSS,MCASP_1__CFG""" menuitem "MCASP_2__CFG" "per , ""PRU_ICSS,MCASP_2__CFG""" menuitem "MCASP_0__FIFO_CFG" "per , ""PRU_ICSS,MCASP_0__FIFO_CFG""" menuitem "MCASP_1__FIFO_CFG" "per , ""PRU_ICSS,MCASP_1__FIFO_CFG""" menuitem "MCASP_2__FIFO_CFG" "per , ""PRU_ICSS,MCASP_2__FIFO_CFG""" menuitem "MCASP_0_SLV" "per , ""PRU_ICSS,MCASP_0_SLV""" menuitem "MCASP_1_SLV" "per , ""PRU_ICSS,MCASP_1_SLV""" menuitem "MCASP_2_SLV" "per , ""PRU_ICSS,MCASP_2_SLV""" menuitem "MCBSP" "per , ""PRU_ICSS,MCBSP""" menuitem "MLB" "per , ""PRU_ICSS,MLB""" menuitem "MMCSD_0" "per , ""PRU_ICSS,MMCSD_0""" menuitem "MMCSD_1" "per , ""PRU_ICSS,MMCSD_1""" menuitem "PRU_ICSS_0_CFG" "per , ""PRU_ICSS,PRU_ICSS_0_CFG""" menuitem "PRU_ICSS_1_CFG" "per , ""PRU_ICSS,PRU_ICSS_1_CFG""" menuitem "PRU_ICSS_0_ECAP" "per , ""PRU_ICSS,PRU_ICSS_0_ECAP""" menuitem "PRU_ICSS_1_ECAP" "per , ""PRU_ICSS,PRU_ICSS_1_ECAP""" menuitem "PRU_ICSS_0_ECC_CFG" "per , ""PRU_ICSS,PRU_ICSS_0_ECC_CFG""" menuitem "PRU_ICSS_1_ECC_CFG" "per , ""PRU_ICSS,PRU_ICSS_1_ECC_CFG""" menuitem "PRU_ICSS_0_IEP" "per , ""PRU_ICSS,PRU_ICSS_0_IEP""" menuitem "PRU_ICSS_1_IEP" "per , ""PRU_ICSS,PRU_ICSS_1_IEP""" menuitem "PRU_ICSS_0_INTC" "per , ""PRU_ICSS,PRU_ICSS_0_INTC""" menuitem "PRU_ICSS_1_INTC" "per , ""PRU_ICSS,PRU_ICSS_1_INTC""" menuitem "PRU_ICSS_0_MII_MDIO" "per , ""PRU_ICSS,PRU_ICSS_0_MII_MDIO""" menuitem "PRU_ICSS_1_MII_MDIO" "per , ""PRU_ICSS,PRU_ICSS_1_MII_MDIO""" menuitem "PRU_ICSS_0_MII_RT" "per , ""PRU_ICSS,PRU_ICSS_0_MII_RT""" menuitem "PRU_ICSS_1_MII_RT" "per , ""PRU_ICSS,PRU_ICSS_1_MII_RT""" menuitem "PRU_ICSS_0_PRU0_CTRL" "per , ""PRU_ICSS,PRU_ICSS_0_PRU0_CTRL""" menuitem "PRU_ICSS_0_PRU1_CTRL" "per , ""PRU_ICSS,PRU_ICSS_0_PRU1_CTRL""" menuitem "PRU_ICSS_1_PRU0_CTRL" "per , ""PRU_ICSS,PRU_ICSS_1_PRU0_CTRL""" menuitem "PRU_ICSS_1_PRU1_CTRL" "per , ""PRU_ICSS,PRU_ICSS_1_PRU1_CTRL""" menuitem "PRU_ICSS_0_UART" "per , ""PRU_ICSS,PRU_ICSS_0_UART""" menuitem "PRU_ICSS_1_UART" "per , ""PRU_ICSS,PRU_ICSS_1_UART""" ) popup "RFBI" ( menuitem "RFBI" "per , ""RFBI,RFBI""" ) popup "SPI" ( menuitem "SPI0" "per , ""SPI,SPI0""" menuitem "SPI1" "per , ""SPI,SPI1""" menuitem "SPI2" "per , ""SPI,SPI2""" menuitem "SPI3" "per , ""SPI,SPI3""" ) popup "Timers" ( menuitem "TIMER_0" "per , ""Timers,TIMER_0""" menuitem "TIMER_1" "per , ""Timers,TIMER_1""" menuitem "TIMER_2" "per , ""Timers,TIMER_2""" menuitem "TIMER_3" "per , ""Timers,TIMER_3""" menuitem "TIMER_4" "per , ""Timers,TIMER_4""" menuitem "TIMER_5" "per , ""Timers,TIMER_5""" menuitem "TIMER_6" "per , ""Timers,TIMER_6""" ) popup "UART" ( menuitem "UART_0" "per , ""UART,UART_0""" menuitem "UART_1" "per , ""UART,UART_1""" menuitem "UART_2" "per , ""UART,UART_2""" ) popup "USB" ( menuitem "USB_0_CFG" "per , ""USB,USB_0_CFG""" menuitem "USB_0_CFG" "per , ""USB,USB_0_CFG""" menuitem "USB_1_CFG" "per , ""USB,USB_1_CFG""" menuitem "USB_1_CFG" "per , ""USB,USB_1_CFG""" menuitem "USB_WRAPPER" "per , ""USB,USB_WRAPPER""" ) ) ) else ( popup "66AK2Gx-ICSS" ( popup "ICSS_0" ( menuitem "ECC_CFG" "per , ""ICSS_0,ECC_CFG""" menuitem "CFG" "per , ""ICSS_0,CFG""" menuitem "PRU0_CTRL" "per , ""ICSS_0,PRU0_CTRL""" menuitem "PRU1_CTRL" "per , ""ICSS_0,PRU1_CTRL""" menuitem "INTC" "per , ""ICSS_0,INTC""" menuitem "UART" "per , ""ICSS_0,UART""" menuitem "ECAP" "per , ""ICSS_0,ECAP""" menuitem "IEP" "per , ""ICSS_0,IEP""" menuitem "MII_RT" "per , ""ICSS_0,MII_RT""" menuitem "MII_MDIO" "per , ""ICSS_0,MII_MDIO""" menuitem "DEBUG_0" "per , ""ICSS_0,DEBUG_0""" menuitem "DEBUG_1" "per , ""ICSS_0,DEBUG_1""" ) popup "ICSS_1" ( menuitem "ECC_CFG" "per , ""ICSS_1,ECC_CFG""" menuitem "CFG" "per , ""ICSS_1,CFG""" menuitem "PRU0_CTRL" "per , ""ICSS_1,PRU0_CTRL""" menuitem "PRU1_CTRL" "per , ""ICSS_1,PRU1_CTRL""" menuitem "INTC" "per , ""ICSS_1,INTC""" menuitem "UART" "per , ""ICSS_1,UART""" menuitem "ECAP" "per , ""ICSS_1,ECAP""" menuitem "IEP" "per , ""ICSS_1,IEP""" menuitem "MII_RT" "per , ""ICSS_1,MII_RT""" menuitem "MII_MDIO" "per , ""ICSS_1,MII_MDIO""" menuitem "DEBUG_0" "per , ""ICSS_1,DEBUG_0""" menuitem "DEBUG_1" "per , ""ICSS_1,DEBUG_1""" ) ) ) )