; --------------------------------------------------------------------------------
; @Title: Measure MC/DC
; @Description:
;   Measure MC/DC for sample application using imported ECA data.
;
;   Supported Targets:
;       RM57 (Arm Cortex-R5)
;       STM32F407IG (Arm Cortex-M4)
;       LA-3854 "Bolero3M Adapter" with MPC5646C 
;       T2080 (PPC QorIQ)
;       TC399XE (TriCore TC39X)
;
; @Author: CSA
; @Board: RM57, LA-3854, T2080QDS
; @Chip: RM57L843-ZWT, STM32F407IG, MPC5646C, T2080, TC399XE
; @Keywords: coverage mc/dc eca
; @Copyright: (C) 1989-2018 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: measure_mcdc.cmm 19349 2022-05-17 12:40:44Z meick $

WinCLEAR
PMACRO.EXPLICIT


; --------------------------------------------------------------------------------
; Check TRACE32 version
; --------------------------------------------------------------------------------
PRIVATE &min_build
&min_build=70316.
IF VERSION.BUILD.BASE()<&min_build
(
  DIALOG.OK "Sorry, the script" """"+OS.PPF()+"""" "requires at least TRACE32 build "+FORMAT.Decimal(1,&min_build)+"."
  ENDDO FALSE()
)

RESet
SYStem.RESet

IF CPUFAMILY()=="ARM"
(
  SYStem.CPU RM57L843-ZWT
  SYStem.DETECT IDCode
  IF (IDCODE(0)==0x06413041)&&((IDCODE(1)&0x0fffffff)==0x0BA00477)
  (
    SYStem.CPU STM32F407IG
    SYStem.MemAccess DAP
    SYStem.JtagClock CTCK 10MHz
    IF Analyzer()
    (
      Trace.METHOD Analyzer
      Analyzer.TERMination OFF
    )
    ELSE IF hardware.COMBIPROBE()||hardware.UTRACE()
    (
      Trace.METHOD CAnalyzer
      SYStem.CONFIG CONNECTOR MIPI20T
    )
    SYStem.Up
    Register.Init

    sYmbol.SourcePATH.SetBaseDir arm
    Data.LOAD.Elf "~~~~/arm/coverage_cm.elf" /RelPath /PlusVM

    IF Analyzer()||hardware.COMBIPROBE()||hardware.UTRACE()
    (
      Data.Set E:0x40023830 %Long 0yXXXXxxxxXXXXxxxxXXXXxxxxXXX1xxxx  // RCC_AHB1ENR : IO port E clock enable
      Data.Set E:0x40021000 %Long 0yXXXXxxxxXXXXxxxxXX1010101010xxxx  // GPOIE_PORTMODE : Enable "alternate funtion" on trace pins (PE2..PE6)
      Data.Set E:0x40021020 %Long 0yXXXX00000000000000000000XXXXxxxx  // GPIOE_AFRL : Use ETM as "alternate funtion" for trace pins (PE2..PE6)
      Data.Set E:0x40021008 %Long 0yXXXXxxxxXXXXxxxxXX0101010101xxxx  // GPOIE_PORTSPEED : Use "Medium speed" for trace pins (PE2..PE6)
      ETM.RESet
      ETM.TImeMode ExternalInterpolated
      ITM.RESet
      ITM.ON
      ITM.DataTrace CorrelatedData
      TPIU.PortMode Continuous
      TPIU.PortSize 4
      Trace.ACCESS DualPort
      Trace.AutoArm ON
      Trace.AutoInit ON
      Trace.THreshold 1.5
      Trace.CLOCK 16.MHz
      Trace.TraceCLOCK 16.MHz
    )
  )
  ELSE
  (
    SYStem.CPU RM57L843-ZWT
    SYStem.Option EnReset OFF  // Stop the CPU at RESET Vector
    SYStem.Option ICEPICK SystemReset.ON
    SYStem.Option ICEPICK WaitInReset.ON
    SYStem.MemAccess DAP
    SYStem.JtagClock CTCK 10MHz
    SYStem.Up

    Data.Set 0x08000000++0x7ffff %Quad 0x0  // Init ECC - via CPU

    sYmbol.SourcePATH.SetBaseDir arm
    Data.LOAD.Elf "~~~~/arm/coverage.elf" /RelPath /PlusVM

    GOSUB CtiSetup

    IF Analyzer()
    (
      Data.Set APB:0x80003404 %Long 0x00000001  // Enable TPIU, by setting input clock to VCLK
      TPIU.PortSize 16
      TPIU.PortMode Continuous
      ETM.Trace ON
      ETM.ON
      Trace.METHOD Analyzer
      Trace.AutoFocus
    )
  )
)
ELSE IF CPUFAMILY()=="POWERPC"
(
  IF CPUIS64BIT()
  (
    SYStem.BdmClock 15.MHz     ;try lower debug frequencies if problems occur
    SYStem.CPU T2080
    SYStem.DETECT CPU
    CORE.ASSIGN 1.             ;Assign just the first core to this T32 instance
    ;NEXUS.CoreENable 0.       ;Optional: trace only core 1
    SYStem.Option.SLOWRESET ON ;Needed by some Freescale/NXP boards

    DO ~~/demo/powerpc64bit/hardware/qoriq_t2/t2080qds/demo_set_rcw.cmm                   ; Set a temporary RCW if needed by the target
    DO ~~/demo/powerpc64bit/hardware/qoriq_t2/t2080qds/qixis_config_serdes_aurora_mux.cmm ; Ensure Aurora trace works

    SYStem.Option.IMASKASM ON  ;disable insterrupts for assembler single steps
    SYStem.Option.FREEZE ON    ;stop time base when in debug mode
    SYStem.MemAccess NEXUS     ;allow non-intrusive run-time memory access

    PRIVATE &base_path
    &base_path=OS.PWD()

    ;Set CCSRBAR to 0x40000000
    Data.Set ANC:IOBASE.ADDRESS()+0x00004 %Long 0x40000000
    Data.Set ANC:IOBASE.ADDRESS()+0x00008 %Long 0x80000000 ;commit
    Data.Set ANC:IOBASE.ADDRESS()+0x00008 %Long 0x00000000

    ;Set up local access window, 0x0000000--0x0007FFFF, memory complex (for CPC, 512kB)
    Data.Set ANC:IOBASE.ADDRESS()+0x00C00 %Long %BE 0x00000000
    Data.Set ANC:IOBASE.ADDRESS()+0x00C04 %Long %BE 0x00000000
    Data.Set ANC:IOBASE.ADDRESS()+0x00C08 %Long %BE 0x81000012

    ;Enable CoreNet Platform Cache (CPC) as SRAM
    Data.Set ANC:IOBASE.ADDRESS()+0x10000 %Long %BE 0x80200000 
    Data.Set ANC:IOBASE.ADDRESS()+0x10100 %Long %BE 0x00000000
    Data.Set ANC:IOBASE.ADDRESS()+0x10104 %Long %BE 0x00000009   ;Set maximum (512kB) and enable, start at 0x0

    ;reset stack pointer
    Register.Set R1 0x00000000 

    ;TLB entry for 512kB CPC-SRAM 0x40000000--0x4007ffff 
    MMU.TLB1.Set 1. 0x80000480 0x40000002 0x00000015 0x00000000 0x00000000

    ;reset stack pointer
    Register.Set R1 0x00000000 

    sYmbol.SourcePATH.SetBaseDir ppc
    Data.LOAD.Elf ~~~~/ppc/coverage.elf /RelPATH /PlusVM
  )
  ELSE
  (
    SYStem.CPU MPC55XX
    SYStem.BdmClock 1.MHz
    SYStem.Option IMASKASM ON
    SYStem.Option IMASKHLL ON
    SYStem.Option WATCHDOG OFF
    SYStem.Option DisMode AUTO

    IF !SIMULATOR()
    (
      SYStem.MemAccess NEXUS
    )
    SYStem.Mode Up

    Register.Init
    MMU.Set TLB1 1 0xC0000200 0x40000000 0x4000003F ; Map 16 KB of SRAM to logical address space
    MMU.Set TLB1 2 0xC0000500 0xFFF0000A 0xFFF0003F ; Map 1 MB of peripheral reg. to logical address space
    Data.Set EA:0x40000000++0x3FFF %Quad 0x55AA55AA55AA55AA ; Initialize 16 KB of internal SRAM

    sYmbol.SourcePATH.SetBaseDir ppc
    Data.LOAD.Elf ~~~~/ppc/coverage.elf /RelPATH /PlusVM
    Data.Set SPR:0x03f3 3  // Enable (and invalidate) instruction cache (if available)

    IF Analyzer()
    (
      Analyzer.Init
      Analyzer.CLOCK 8.MHz
      Analyzer.Mode FIFO
      Analyzer.AutoArm ON
      NEXUS.BTM ON
      NEXUS.HTM ON  // Treat isel/fsel as conditional instruction
    )
  )
)
ELSE IF CPUFAMILY()=="TRICORE"
(
   IF SIMULATOR()
     SYStem.CPU TC399XE
   ELSE
     SYStem.DETECT CPU
   SYStem.Mode Up
   sYmbol.SourcePATH.SetBaseDir tricore
   IF CPUIS("TC3*")
      Data.LOAD.Elf ~~~~/tricore/coverage.elf /RelPATH /PlusVM /SingleLineAdjacent
   ELSE IF CPUIS("TC2*")
      Data.LOAD.Elf ~~~~/tricore/coverage_tc2.elf /RelPATH /PlusVM /SingleLineAdjacent
   ELSE
   (
      PRINT %ERROR "CPU "+CPU()+" not supported."
      ENDDO FALSE()
   )
   IF (Onchip())&&(!Analyzer())
   (
      Trace.METHOD Onchip
   )
)
ELSE IF CPUFAMILY()=="RISCV"
(
  SYStem.CPU RV32

  IF !SIMULATOR()
  (
    SYStem.CONFIG.NEXUS.Type SiFive
    SYStem.CONFIG.NEXUS.Base SB:0x10000000
    SYStem.CONFIG.NEXUS.NTB OFF
    Trace.METHOD CAnalyzer
    NEXUS.ON
    NEXUS.PIBMode 4TDATA
    NEXUS.PIBDivider 1.
    NEXUS.PTM HTM+ReturnStack
    NEXUS.TimeStamps ON

    CAnalyzer.CLOCK 64.MHz
    CAnalyzer.PortFilter AUTO
    CAnalyzer.TERMination ON
  )

  SYStem.Mode Up

  IF CAnalyzer()
  (
    CAnalyzer.AutoFocus
  )

  sYmbol.SourcePATH.SetBaseDir riscv
  Data.LOAD.Elf ~~~~/riscv/coverage.rv32.elf /RelPATH /PlusVM /SingleLineAdjacent
)

Go main
WAIT !RUN()

Break.Set sYmbol.EXIT(TestObcDiffersMcdc)
Var.Break.Set RunCoverageDemo\tic /Write

Mode.Hll
GOSUB RestoreWindows

; --------------------------------------------------------------------------------
; Import ECA data
; --------------------------------------------------------------------------------
sYmbol.ECA.LOAD \coverage

COVerage.Option.SourceMetric MCDC

ENDDO TRUE()


; --------------------------------------------------------------------------------
; Display windows for HLL coverage
; --------------------------------------------------------------------------------
RestoreWindows:
(
  WinCLEAR

  WinPOS 0.0 0.0 125. 33. 28. 1. W001
  List /COVerage

  WinPOS 0.0 41.667 125. 35. 27. 1. W002
  List.Mix /COVerage /Track

  WinPOS 132.57 0.083333 108. 33. 26. 1. W004
  COVerage.ListFunc.sYmbol \coverage

  WinPOS 194.43 41.5 64. 21. 0. 0. W003
  Trace

  WinPOS 135.57 45.333 45. 16. 0. 0. W000
  COVerage

  RETURN
)

; --------------------------------------------------------------------------------
; Setup CTI to freeze peripherals while debugging
; --------------------------------------------------------------------------------
CtiSetup: ;()
(
  PRIVATE &CoreCtiBase &PeriphCtiBase

  &CoreCtiBase=COMPonent.BASE("CTI",0.)
  &CoreCtiBase=CONVert.ADDRESSTODUALPORT(&CoreCtiBase)
  &PeriphCtiBase=EDAP:0x8000a000

  ; <do not change>
  ; MAP CR5-"Core-Stopped" (CTITRIGIN7) to CTM Channel 2
  Data.Set &CoreCtiBase+0x3c %Long 0x4
  ; ensure CTM2 is not GATED
  Data.Set &CoreCtiBase+0x40 %Long Data.Long(&CoreCtiBase+0x40)|0x4
  ; enable CR5-CTI
  Data.Set &CoreCtiBase+0x00 %Long 0x1
  ; </do not change>

  ; <user config>
  ; the following Data.Set's connect "Core-Stopped" signal to the
  ; listed peripherals
  ; L2FMC, CCMR5, CRCx, and SYS modules
  Data.Set &PeriphCtiBase+0xa0 %Long 0x4
  ; DMA, RTIx, AWMx, HTUx, SCIx, LINx, I2Cx, EMAC, EQEP, ECAP, DMM and DCCx modules
  Data.Set &PeriphCtiBase+0xa4 %Long 0x4
  ; DCANx
  Data.Set &PeriphCtiBase+0xa8 %Long 0x4
  ; ETPWMx
  Data.Set &PeriphCtiBase+0xac %Long 0x4
  ; </user config>
  ; <do not change>
  ; ensure CTM2 is not GATED
  Data.Set &PeriphCtiBase+0x40 %Long Data.Long(&CoreCtiBase+0x40)|0x4
  ; enable PERIPH-CTI
  Data.Set &PeriphCtiBase+0x00 %Long 0x1
  ; </do not change>

  RETURN
)