; -------------------------------------------------------------------------------- ; @Title: sa1110 On-Chip Peripherals ; @Props: Released ; @Author: SYL ; @Changelog: 2005-01-06 SYL ; @Manufacturer: INTEL - Intel Corporation ; @Core: StrongARM ; @Chiplist: SA1110 ; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: persa1110.per 16305 2023-06-28 11:47:37Z pegold $ config 16. 8. width 0x0B ASSERT VERSION.BUILD.BASE()>=80109. sif PER.isNOTIFICATION() base AVM:0x00000000 wgroup AVM:0x00++0 textline " Peripheral File Notification - " button "show missing files" "DIALOG.MESSAGE ""Please check your installation for the possibly missing files:""+CONV.CHAR(0xa)+PER.NOTIFICATION.MISSINGFILES()" textline " ---------------------------------------------------------------" textline " The peripheral file for this SoC cannot be displayed. " textline " Possible reasons are: " textline " - it is missing in the local installation or under development " textline " - it is confidential " textline " " textline " As fallback only the core registers are shown. " textline " Please check www.lauterbach.com/scripts.html " textline " or contact support@lauterbach.com . " textline " " endif base ad:0x00000000 ;COMPLETE tree "DMA Controller" tree "Channel 0" width 0x0B group (ad:0xB0000000+0x00)++0x0B line.long 0x00 "DDAR0,DMA device address register 0" hexmask.long.tbyte 0x00 8.--31. 0x01 " DA ,Device address field" bitfld.long 0x00 4.--7. " DS ,Device select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. " DW ,Device datum width" "Byte,Half-word" bitfld.long 0x00 2. " BS ,Device burst size" "Four,Eight" textline " " bitfld.long 0x00 1. " E ,Device endianess" "Little,Big" bitfld.long 0x00 0. " RW ,Device data transfer direction (read/write)" "Write,Read" line.long 0x04 "DCSR0_set,DMA control/status register 0 (Set)" line.long 0x08 "DCSR0_clr,DMA control/status register 0 (Clear)" group (ad:0xB0000000+0x0C)++0x03 line.long 0x00 "DCSR0,DMA control/status register 0 (Read only)" bitfld.long 0x00 7. " BIU ,Buffer in use" "A,B" bitfld.long 0x00 6. " STRTB ,Buffer B transfer start" "Not started,Start" bitfld.long 0x00 5. " DONEB ,Buffer B done" "Not done,Done" bitfld.long 0x00 4. " STRTA ,Buffer A transfer start" "Not started,Start" textline " " bitfld.long 0x00 3. " DONEA ,Buffer A done" "Not done,Done" bitfld.long 0x00 2. " ERROR ,Transfer error bit" "Not occured,Occured" bitfld.long 0x00 1. " IE ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run bit" "Not run,Run" if (((per.byte(ad:(ad:0xB0000000+0x0C)))&0x10)==0x00) group (ad:0xB0000000+0x10)++0x07 line.long 0x00 "DBSA0,DMA buffer A start address 0" line.long 0x04 "DBTA0,DMA buffer A transfer count 0" hexmask.long.word 0x04 0.--12. 1. " TCA ,Transfer count (buffer A)" else rgroup (ad:0xB0000000+0x10)++0x07 line.long 0x00 "DBSA0,DMA buffer A start address 0" line.long 0x04 "DBTA0,DMA buffer A transfer count 0" hexmask.long.word 0x04 0.--12. 1. " TCA ,Transfer count (buffer A)" endif if (((per.byte(ad:(ad:0xB0000000+0x0C)))&0x10)==0x00) group (ad:0xB0000000+0x18)++0x07 line.long 0x00 "DBSB0,DMA buffer B start address 0" line.long 0x04 "DBTB0,DMA buffer B transfer count 0" hexmask.long.word 0x04 0.--12. 1. " TCB ,Transfer count (buffer B)" else rgroup (ad:0xB0000000+0x18)++0x07 line.long 0x00 "DBSB0,DMA buffer B start address 0" line.long 0x04 "DBTB0,DMA buffer B transfer count 0" hexmask.long.word 0x04 0.--12. 1. " TCB ,Transfer count (buffer B)" endif width 0xb tree.end tree "Channel 1" width 0x0B group (ad:0xB0000020+0x00)++0x0B line.long 0x00 "DDAR1,DMA device address register 1" hexmask.long.tbyte 0x00 8.--31. 0x01 " DA ,Device address field" bitfld.long 0x00 4.--7. " DS ,Device select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. " DW ,Device datum width" "Byte,Half-word" bitfld.long 0x00 2. " BS ,Device burst size" "Four,Eight" textline " " bitfld.long 0x00 1. " E ,Device endianess" "Little,Big" bitfld.long 0x00 0. " RW ,Device data transfer direction (read/write)" "Write,Read" line.long 0x04 "DCSR1_set,DMA control/status register 0 (Set)" line.long 0x08 "DCSR1_clr,DMA control/status register 0 (Clear)" group (ad:0xB0000020+0x0C)++0x03 line.long 0x00 "DCSR1,DMA control/status register 1 (Read only)" bitfld.long 0x00 7. " BIU ,Buffer in use" "A,B" bitfld.long 0x00 6. " STRTB ,Buffer B transfer start" "Not started,Start" bitfld.long 0x00 5. " DONEB ,Buffer B done" "Not done,Done" bitfld.long 0x00 4. " STRTA ,Buffer A transfer start" "Not started,Start" textline " " bitfld.long 0x00 3. " DONEA ,Buffer A done" "Not done,Done" bitfld.long 0x00 2. " ERROR ,Transfer error bit" "Not occured,Occured" bitfld.long 0x00 1. " IE ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run bit" "Not run,Run" if (((per.byte(ad:(ad:0xB0000020+0x0C)))&0x10)==0x00) group (ad:0xB0000020+0x10)++0x07 line.long 0x00 "DBSA1,DMA buffer A start address 1" line.long 0x04 "DBTA1,DMA buffer A transfer count 1" hexmask.long.word 0x04 0.--12. 1. " TCA ,Transfer count (buffer A)" else rgroup (ad:0xB0000020+0x10)++0x07 line.long 0x00 "DBSA1,DMA buffer A start address 1" line.long 0x04 "DBTA1,DMA buffer A transfer count 1" hexmask.long.word 0x04 0.--12. 1. " TCA ,Transfer count (buffer A)" endif if (((per.byte(ad:(ad:0xB0000020+0x0C)))&0x10)==0x00) group (ad:0xB0000020+0x18)++0x07 line.long 0x00 "DBSB1,DMA buffer B start address 1" line.long 0x04 "DBTB1,DMA buffer B transfer count 1" hexmask.long.word 0x04 0.--12. 1. " TCB ,Transfer count (buffer B)" else rgroup (ad:0xB0000020+0x18)++0x07 line.long 0x00 "DBSB1,DMA buffer B start address 1" line.long 0x04 "DBTB1,DMA buffer B transfer count 1" hexmask.long.word 0x04 0.--12. 1. " TCB ,Transfer count (buffer B)" endif width 0xb tree.end tree "Channel 2" width 0x0B group (ad:0xB0000040+0x00)++0x0B line.long 0x00 "DDAR2,DMA device address register 2" hexmask.long.tbyte 0x00 8.--31. 0x01 " DA ,Device address field" bitfld.long 0x00 4.--7. " DS ,Device select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. " DW ,Device datum width" "Byte,Half-word" bitfld.long 0x00 2. " BS ,Device burst size" "Four,Eight" textline " " bitfld.long 0x00 1. " E ,Device endianess" "Little,Big" bitfld.long 0x00 0. " RW ,Device data transfer direction (read/write)" "Write,Read" line.long 0x04 "DCSR2_set,DMA control/status register 0 (Set)" line.long 0x08 "DCSR2_clr,DMA control/status register 0 (Clear)" group (ad:0xB0000040+0x0C)++0x03 line.long 0x00 "DCSR2,DMA control/status register 2 (Read only)" bitfld.long 0x00 7. " BIU ,Buffer in use" "A,B" bitfld.long 0x00 6. " STRTB ,Buffer B transfer start" "Not started,Start" bitfld.long 0x00 5. " DONEB ,Buffer B done" "Not done,Done" bitfld.long 0x00 4. " STRTA ,Buffer A transfer start" "Not started,Start" textline " " bitfld.long 0x00 3. " DONEA ,Buffer A done" "Not done,Done" bitfld.long 0x00 2. " ERROR ,Transfer error bit" "Not occured,Occured" bitfld.long 0x00 1. " IE ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run bit" "Not run,Run" if (((per.byte(ad:(ad:0xB0000040+0x0C)))&0x10)==0x00) group (ad:0xB0000040+0x10)++0x07 line.long 0x00 "DBSA2,DMA buffer A start address 2" line.long 0x04 "DBTA2,DMA buffer A transfer count 2" hexmask.long.word 0x04 0.--12. 1. " TCA ,Transfer count (buffer A)" else rgroup (ad:0xB0000040+0x10)++0x07 line.long 0x00 "DBSA2,DMA buffer A start address 2" line.long 0x04 "DBTA2,DMA buffer A transfer count 2" hexmask.long.word 0x04 0.--12. 1. " TCA ,Transfer count (buffer A)" endif if (((per.byte(ad:(ad:0xB0000040+0x0C)))&0x10)==0x00) group (ad:0xB0000040+0x18)++0x07 line.long 0x00 "DBSB2,DMA buffer B start address 2" line.long 0x04 "DBTB2,DMA buffer B transfer count 2" hexmask.long.word 0x04 0.--12. 1. " TCB ,Transfer count (buffer B)" else rgroup (ad:0xB0000040+0x18)++0x07 line.long 0x00 "DBSB2,DMA buffer B start address 2" line.long 0x04 "DBTB2,DMA buffer B transfer count 2" hexmask.long.word 0x04 0.--12. 1. " TCB ,Transfer count (buffer B)" endif width 0xb tree.end tree "Channel 3" width 0x0B group (ad:0xB0000060+0x00)++0x0B line.long 0x00 "DDAR3,DMA device address register 3" hexmask.long.tbyte 0x00 8.--31. 0x01 " DA ,Device address field" bitfld.long 0x00 4.--7. " DS ,Device select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. " DW ,Device datum width" "Byte,Half-word" bitfld.long 0x00 2. " BS ,Device burst size" "Four,Eight" textline " " bitfld.long 0x00 1. " E ,Device endianess" "Little,Big" bitfld.long 0x00 0. " RW ,Device data transfer direction (read/write)" "Write,Read" line.long 0x04 "DCSR3_set,DMA control/status register 0 (Set)" line.long 0x08 "DCSR3_clr,DMA control/status register 0 (Clear)" group (ad:0xB0000060+0x0C)++0x03 line.long 0x00 "DCSR3,DMA control/status register 3 (Read only)" bitfld.long 0x00 7. " BIU ,Buffer in use" "A,B" bitfld.long 0x00 6. " STRTB ,Buffer B transfer start" "Not started,Start" bitfld.long 0x00 5. " DONEB ,Buffer B done" "Not done,Done" bitfld.long 0x00 4. " STRTA ,Buffer A transfer start" "Not started,Start" textline " " bitfld.long 0x00 3. " DONEA ,Buffer A done" "Not done,Done" bitfld.long 0x00 2. " ERROR ,Transfer error bit" "Not occured,Occured" bitfld.long 0x00 1. " IE ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run bit" "Not run,Run" if (((per.byte(ad:(ad:0xB0000060+0x0C)))&0x10)==0x00) group (ad:0xB0000060+0x10)++0x07 line.long 0x00 "DBSA3,DMA buffer A start address 3" line.long 0x04 "DBTA3,DMA buffer A transfer count 3" hexmask.long.word 0x04 0.--12. 1. " TCA ,Transfer count (buffer A)" else rgroup (ad:0xB0000060+0x10)++0x07 line.long 0x00 "DBSA3,DMA buffer A start address 3" line.long 0x04 "DBTA3,DMA buffer A transfer count 3" hexmask.long.word 0x04 0.--12. 1. " TCA ,Transfer count (buffer A)" endif if (((per.byte(ad:(ad:0xB0000060+0x0C)))&0x10)==0x00) group (ad:0xB0000060+0x18)++0x07 line.long 0x00 "DBSB3,DMA buffer B start address 3" line.long 0x04 "DBTB3,DMA buffer B transfer count 3" hexmask.long.word 0x04 0.--12. 1. " TCB ,Transfer count (buffer B)" else rgroup (ad:0xB0000060+0x18)++0x07 line.long 0x00 "DBSB3,DMA buffer B start address 3" line.long 0x04 "DBTB3,DMA buffer B transfer count 3" hexmask.long.word 0x04 0.--12. 1. " TCB ,Transfer count (buffer B)" endif width 0xb tree.end tree "Channel 4" width 0x0B group (ad:0xB0000080+0x00)++0x0B line.long 0x00 "DDAR4,DMA device address register 4" hexmask.long.tbyte 0x00 8.--31. 0x01 " DA ,Device address field" bitfld.long 0x00 4.--7. " DS ,Device select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. " DW ,Device datum width" "Byte,Half-word" bitfld.long 0x00 2. " BS ,Device burst size" "Four,Eight" textline " " bitfld.long 0x00 1. " E ,Device endianess" "Little,Big" bitfld.long 0x00 0. " RW ,Device data transfer direction (read/write)" "Write,Read" line.long 0x04 "DCSR4_set,DMA control/status register 0 (Set)" line.long 0x08 "DCSR4_clr,DMA control/status register 0 (Clear)" group (ad:0xB0000080+0x0C)++0x03 line.long 0x00 "DCSR4,DMA control/status register 4 (Read only)" bitfld.long 0x00 7. " BIU ,Buffer in use" "A,B" bitfld.long 0x00 6. " STRTB ,Buffer B transfer start" "Not started,Start" bitfld.long 0x00 5. " DONEB ,Buffer B done" "Not done,Done" bitfld.long 0x00 4. " STRTA ,Buffer A transfer start" "Not started,Start" textline " " bitfld.long 0x00 3. " DONEA ,Buffer A done" "Not done,Done" bitfld.long 0x00 2. " ERROR ,Transfer error bit" "Not occured,Occured" bitfld.long 0x00 1. " IE ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run bit" "Not run,Run" if (((per.byte(ad:(ad:0xB0000080+0x0C)))&0x10)==0x00) group (ad:0xB0000080+0x10)++0x07 line.long 0x00 "DBSA4,DMA buffer A start address 4" line.long 0x04 "DBTA4,DMA buffer A transfer count 4" hexmask.long.word 0x04 0.--12. 1. " TCA ,Transfer count (buffer A)" else rgroup (ad:0xB0000080+0x10)++0x07 line.long 0x00 "DBSA4,DMA buffer A start address 4" line.long 0x04 "DBTA4,DMA buffer A transfer count 4" hexmask.long.word 0x04 0.--12. 1. " TCA ,Transfer count (buffer A)" endif if (((per.byte(ad:(ad:0xB0000080+0x0C)))&0x10)==0x00) group (ad:0xB0000080+0x18)++0x07 line.long 0x00 "DBSB4,DMA buffer B start address 4" line.long 0x04 "DBTB4,DMA buffer B transfer count 4" hexmask.long.word 0x04 0.--12. 1. " TCB ,Transfer count (buffer B)" else rgroup (ad:0xB0000080+0x18)++0x07 line.long 0x00 "DBSB4,DMA buffer B start address 4" line.long 0x04 "DBTB4,DMA buffer B transfer count 4" hexmask.long.word 0x04 0.--12. 1. " TCB ,Transfer count (buffer B)" endif width 0xb tree.end tree "Channel 5" width 0x0B group (ad:0xB00000A0+0x00)++0x0B line.long 0x00 "DDAR5,DMA device address register 5" hexmask.long.tbyte 0x00 8.--31. 0x01 " DA ,Device address field" bitfld.long 0x00 4.--7. " DS ,Device select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. " DW ,Device datum width" "Byte,Half-word" bitfld.long 0x00 2. " BS ,Device burst size" "Four,Eight" textline " " bitfld.long 0x00 1. " E ,Device endianess" "Little,Big" bitfld.long 0x00 0. " RW ,Device data transfer direction (read/write)" "Write,Read" line.long 0x04 "DCSR5_set,DMA control/status register 0 (Set)" line.long 0x08 "DCSR5_clr,DMA control/status register 0 (Clear)" group (ad:0xB00000A0+0x0C)++0x03 line.long 0x00 "DCSR5,DMA control/status register 5 (Read only)" bitfld.long 0x00 7. " BIU ,Buffer in use" "A,B" bitfld.long 0x00 6. " STRTB ,Buffer B transfer start" "Not started,Start" bitfld.long 0x00 5. " DONEB ,Buffer B done" "Not done,Done" bitfld.long 0x00 4. " STRTA ,Buffer A transfer start" "Not started,Start" textline " " bitfld.long 0x00 3. " DONEA ,Buffer A done" "Not done,Done" bitfld.long 0x00 2. " ERROR ,Transfer error bit" "Not occured,Occured" bitfld.long 0x00 1. " IE ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run bit" "Not run,Run" if (((per.byte(ad:(ad:0xB00000A0+0x0C)))&0x10)==0x00) group (ad:0xB00000A0+0x10)++0x07 line.long 0x00 "DBSA5,DMA buffer A start address 5" line.long 0x04 "DBTA5,DMA buffer A transfer count 5" hexmask.long.word 0x04 0.--12. 1. " TCA ,Transfer count (buffer A)" else rgroup (ad:0xB00000A0+0x10)++0x07 line.long 0x00 "DBSA5,DMA buffer A start address 5" line.long 0x04 "DBTA5,DMA buffer A transfer count 5" hexmask.long.word 0x04 0.--12. 1. " TCA ,Transfer count (buffer A)" endif if (((per.byte(ad:(ad:0xB00000A0+0x0C)))&0x10)==0x00) group (ad:0xB00000A0+0x18)++0x07 line.long 0x00 "DBSB5,DMA buffer B start address 5" line.long 0x04 "DBTB5,DMA buffer B transfer count 5" hexmask.long.word 0x04 0.--12. 1. " TCB ,Transfer count (buffer B)" else rgroup (ad:0xB00000A0+0x18)++0x07 line.long 0x00 "DBSB5,DMA buffer B start address 5" line.long 0x04 "DBTB5,DMA buffer B transfer count 5" hexmask.long.word 0x04 0.--12. 1. " TCB ,Transfer count (buffer B)" endif width 0xb tree.end tree.end ;COMPLETE tree "LCD Controller" width 0x07 group (ad:0xB0100000+0x00)++0x13 line.long 0x00 "LCCR0,LCD controller control register 0" hexmask.long.byte 0x00 12.--19. 1. " PDD ,Palette DMA request delay" bitfld.long 0x00 10.--11. " VSC ,Vertical slant line correction" "00,01,10,11" bitfld.long 0x00 9. " DPD ,Double-pixel data pin mode" "Disabled,Enabled" bitfld.long 0x00 8. " PLE ,Big/little endian select" "Little,Big" textline " " bitfld.long 0x00 7. " PAS ,Passive/active display select" "Passive/STN,Active/TFT" bitfld.long 0x00 5. " ERM ,Error mask" "Generate,Not generate" bitfld.long 0x00 4. " BAM ,Base address update mask" "Generate,Not generate" bitfld.long 0x00 3. " LDM ,LCD disable done mask" "Generate,Not generate" textline " " bitfld.long 0x00 2. " SDS ,Single-/dual-panel display select" "Single,Dual" bitfld.long 0x00 1. " CMS ,Color/monochrome select" "Color,Monochrome" bitfld.long 0x00 0. " LEN ,LCD controller enable" "Disabled,Enabled" line.long 0x04 "LCSR,LCD controller status register 1" bitfld.long 0x04 11. " OUU ,Output FIFO underrun upper panel status" "Not underrunned,Underrunned" bitfld.long 0x04 10. " OOU ,Output FIFO overrun upper panel status" "Not overrunned,Overrunned" bitfld.long 0x04 9. " OUL ,Output FIFO underrun lower panel status" "Not underrunned,Underrunned" bitfld.long 0x04 8. " OOL ,Output FIFO overrun lower panel status" "Not overrunned,Overrunned" textline " " bitfld.long 0x04 7. " IUU ,Input FIFO underrun upper panel status" "Not underrunned,Underrunned" bitfld.long 0x04 6. " IOU ,Input FIFO overrun upper panel status." "Not overrunned,Overrunned" bitfld.long 0x04 5. " IUL ,Input FIFO underrun lower panel status" "Not underrunned,Underrunned" bitfld.long 0x04 4. " IOL ,Input FIFO overrun lower panel status" "Not overrunned,Overrunned" textline " " bitfld.long 0x04 3. " ABC ,AC bias count status" "Not decremented,Decremented" bitfld.long 0x04 2. " BER ,Bus error status" "Not attempted,Attempted" bitfld.long 0x04 1. " BAU ,Base address update flag (read-only)" "Not transferred,Transferred" bitfld.long 0x04 0. " LDD ,LCD disable done status" "Not disabled,Disabled" line.long 0x10 "DBAR1,DMA channel 1 base address register" rgroup (ad:0xB0100000+0x14)++0x03 line.long 0x00 "DCAR1,DMA channel 1 current address register" group (ad:0xB0100000+0x18)++0x03 line.long 0x00 "DBAR2,DMA channel 2 base address register" rgroup (ad:0xB0100000+0x1C)++0x03 line.long 0x00 "DCAR2,DMA channel 2 current address register" group (ad:0xB0100000+0x20)++0x0B line.long 0x00 "LCCR1,LCD controller control register 1" hexmask.long.byte 0x00 24.--31. 1. " BLW ,Beginning-of-line pixel clock wait count" hexmask.long.byte 0x00 16.--23. 1. " ELW ,End-of-line pixel clock wait count" hexmask.long.byte 0x00 10.--15. 1. " HSW ,Horizontal sync pulse width" hexmask.long.word 0x00 0.--9. 1. " PPL ,Pixels per line" line.long 0x04 "LCCR2,LCD controller control register 2" hexmask.long.byte 0x04 24.--31. 1. " BFW ,Beginning-of-frame line clock wait count" hexmask.long.byte 0x04 16.--23. 1. " EFW ,End-of-frame line clock wait count" hexmask.long.byte 0x04 10.--15. 1. " VSW ,Vertical sync pulse width" hexmask.long.word 0x04 0.--9. 1. " LPP ,Lines per panel" line.long 0x08 "LCCR3,LCD controller control register 3" bitfld.long 0x08 23. " OEP ,Output enable polarity" "Active high,Active low" bitfld.long 0x08 22. " PCP ,Pixel clock polarity" "Rising,Falling" bitfld.long 0x08 21. " HSP ,Horizontal sync polarity" "Active high,Active low" bitfld.long 0x08 20. " VSP ,Vertical sync polarity" "Active high,Active low" textline " " bitfld.long 0x08 16.--19. " API ,AC bias pin transitions per interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x08 8.--15. 1. " ACB ,AC bias pin frequency" hexmask.long.byte 0x08 0.--7. 1. " PCD ,Pixel clock divisor" width 0x0B tree.end ;COMPLETE tree "Peripheral Pin Controller" width 0x06 group (ad:0x90060000+0x00)++0x03 line.long 0x00 "PPDR,PPC pin direction register" bitfld.long 0x00 21. " SFRM ,Serial port 4: MPC/SSP serial frame pin direction" "Input,Output" bitfld.long 0x00 20. " SCLK ,Serial port 4: MPC/SSP serial clock pin direction" "Input,Output" bitfld.long 0x00 19. " RXD4 ,Serial port 4: MPC/SSP receive pin direction" "Input,Output" bitfld.long 0x00 18. " TXD4 ,Serial port 4: MCP/SSP transmit pin direction" "Input,Output" textline " " bitfld.long 0x00 17. " RXD3 ,Serial port 3: UART receive pin direction" "Input,Output" bitfld.long 0x00 16. " TXD3 ,Serial port 3: UART transmit pin direction" "Input,Output" bitfld.long 0x00 15. " RXD2 ,Serial port 2: IPC receive pin direction" "Input,Output" bitfld.long 0x00 14. " TXD2 ,Serial port 2: IPC transmit pin direction" "Input,Output" textline " " bitfld.long 0x00 13. " RXD1 ,Serial port 1: UART receive pin direction" "Input,Output" bitfld.long 0x00 12. " TXD1 ,Serial port 1: UART transmit pin direction" "Input,Output" bitfld.long 0x00 11. " L_BIAS ,LCD AC bias pin direction" "Input,Output" bitfld.long 0x00 10. " L_FCLK ,LCD frame clock pin direction" "Input,Output" textline " " bitfld.long 0x00 9. " L_LCLK ,LCD line clock pin direction" "Input,Output" bitfld.long 0x00 8. " L_PCLK ,LCD pixel clock pin direction" "Input,Output" bitfld.long 0x00 7. " LDD7 ,LCD data pin 7 direction" "Input,Output" bitfld.long 0x00 6. " LDD6 ,LCD data pin 6 direction" "Input,Output" textline " " bitfld.long 0x00 5. " LDD5 ,LCD data pin 5 direction" "Input,Output" bitfld.long 0x00 4. " LDD4 ,LCD data pin 4 direction" "Input,Output" bitfld.long 0x00 3. " LDD3 ,LCD data pin 3 direction" "Input,Output" bitfld.long 0x00 2. " LDD2 ,LCD data pin 2 direction" "Input,Output" textline " " bitfld.long 0x00 1. " LDD1 ,LCD data pin 1 direction" "Input,Output" bitfld.long 0x00 0. " LDD0 ,LCD data pin 0 direction" "Input,Output" rgroup (ad:0x90060000+0x04)++0x03 line.long 0x00 "PPSR,PPC pin state register (Read Access)" bitfld.long 0x00 21. " SFRM ,Serial port 4: MPC/SSP serial frame pin state" "Low,High" bitfld.long 0x00 20. " SCLK ,Serial port 4: MPC/SSP serial clock pin state" "Low,High" bitfld.long 0x00 19. " RXD4 ,Serial port 4: MPC/SSP receive pin state" "Low,High" bitfld.long 0x00 18. " TXD4 ,Serial port 4: MCP/SSP transmit pin state" "Low,High" textline " " bitfld.long 0x00 17. " RXD3 ,Serial port 3: UART receive pin state" "Low,High" bitfld.long 0x00 16. " TXD3 ,Serial port 3: UART transmit pin state" "Low,High" bitfld.long 0x00 15. " RXD2 ,Serial port 2: IPC receive pin state" "Low,High" bitfld.long 0x00 14. " TXD2 ,Serial port 2: IPC transmit pin state" "Low,High" textline " " bitfld.long 0x00 13. " RXD1 ,Serial port 1: UART receive pin state" "Low,High" bitfld.long 0x00 12. " TXD1 ,Serial port 1: UART transmit pin state" "Low,High" bitfld.long 0x00 11. " L_BIAS ,LCD AC bias pin state" "Low,High" bitfld.long 0x00 10. " L_FCLK ,LCD frame clock pin state" "Low,High" textline " " bitfld.long 0x00 9. " L_LCLK ,LCD line clock pin state" "Low,High" bitfld.long 0x00 8. " L_PCLK ,LCD pixel clock pin state" "Low,High" bitfld.long 0x00 7. " LDD7 ,LCD data pin 7 state" "Low,High" bitfld.long 0x00 6. " LDD6 ,LCD data pin 6 state" "Low,High" textline " " bitfld.long 0x00 5. " LDD5 ,LCD data pin 5 state" "Low,High" bitfld.long 0x00 4. " LDD4 ,LCD data pin 4 state" "Low,High" bitfld.long 0x00 3. " LDD3 ,LCD data pin 3 state" "Low,High" bitfld.long 0x00 2. " LDD2 ,LCD data pin 2 state" "Low,High" textline " " bitfld.long 0x00 1. " LDD1 ,LCD data pin 1 state" "Low,High" bitfld.long 0x00 0. " LDD0 ,LCD data pin 0 state" "Low,High" wgroup (ad:0x90060000+0x04)++0x03 line.long 0x00 "PPSR,PPC pin state register (Write Access)" bitfld.long 0x00 21. " SFRM ,Serial port 4: MPC/SSP serial frame pin state" "Reset,Set" bitfld.long 0x00 20. " SCLK ,Serial port 4: MPC/SSP serial clock pin state" "Reset,Set" bitfld.long 0x00 19. " RXD4 ,Serial port 4: MPC/SSP receive pin state" "Reset,Set" bitfld.long 0x00 18. " TXD4 ,Serial port 4: MCP/SSP transmit pin state" "Reset,Set" textline " " bitfld.long 0x00 17. " RXD3 ,Serial port 3: UART receive pin state" "Reset,Set" bitfld.long 0x00 16. " TXD3 ,Serial port 3: UART transmit pin state" "Reset,Set" bitfld.long 0x00 15. " RXD2 ,Serial port 2: IPC receive pin state" "Reset,Set" bitfld.long 0x00 14. " TXD2 ,Serial port 2: IPC transmit pin state" "Reset,Set" textline " " bitfld.long 0x00 13. " RXD1 ,Serial port 1: UART receive pin state" "Reset,Set" bitfld.long 0x00 12. " TXD1 ,Serial port 1: UART transmit pin state" "Reset,Set" bitfld.long 0x00 11. " L_BIAS ,LCD AC bias pin state" "Reset,Set" bitfld.long 0x00 10. " L_FCLK ,LCD frame clock pin state" "Reset,Set" textline " " bitfld.long 0x00 9. " L_LCLK ,LCD line clock pin state" "Reset,Set" bitfld.long 0x00 8. " L_PCLK ,LCD pixel clock pin state" "Reset,Set" bitfld.long 0x00 7. " LDD7 ,LCD data pin 7 state" "Reset,Set" bitfld.long 0x00 6. " LDD6 ,LCD data pin 6 state" "Reset,Set" textline " " bitfld.long 0x00 5. " LDD5 ,LCD data pin 5 state" "Reset,Set" bitfld.long 0x00 4. " LDD4 ,LCD data pin 4 state" "Reset,Set" bitfld.long 0x00 3. " LDD3 ,LCD data pin 3 state" "Reset,Set" bitfld.long 0x00 2. " LDD2 ,LCD data pin 2 state" "Reset,Set" textline " " bitfld.long 0x00 1. " LDD1 ,LCD data pin 1 state" "Reset,Set" bitfld.long 0x00 0. " LDD0 ,LCD data pin 0 state" "Reset,Set" group (ad:0x90060000+0x08)++0x07 line.long 0x00 "PPAR,PPC pin assignment register" bitfld.long 0x00 18. " SPR ,SSP pin reassignment" "Not made,Made" bitfld.long 0x00 12. " UPR ,UART pin reassignment" "Not made,Made" line.long 0x04 "PSDR,PPC sleep mode direction register" bitfld.long 0x04 21. " SFRM ,Serial port 4: MCP/SSP serial frame sleep mode pin direction" "Driven low,Input" bitfld.long 0x04 20. " SCLK ,Serial port 4: MCP/SSP serial clock sleep mode pin direction" "Driven low,Input" bitfld.long 0x04 19. " RXD4 ,Serial port 4: MCP/SSP receive sleep mode pin direction" "Driven low,Input" bitfld.long 0x04 18. " TXD4 ,Serial port 4: MCP/SSP transmit sleep mode pin direction" "Driven low,Input" textline " " bitfld.long 0x04 17. " RXD3 ,Serial port 3: UART receive sleep mode pin direction" "Driven low,Input" bitfld.long 0x04 16. " TXD3 ,Serial port 3: UART transmit sleep mode pin direction" "Driven low,Input" bitfld.long 0x04 15. " RXD2 ,Serial port 2: IPC receive sleep mode pin direction" "Driven low,Input" bitfld.long 0x04 14. " TXD2 ,Serial port 2: IPC transmit sleep mode pin direction" "Driven low,Input" textline " " bitfld.long 0x04 13. " RXD1 ,Serial port 1: UART receive sleep mode pin direction" "Driven low,Input" bitfld.long 0x04 12. " TXD1 ,Serial port 1: UART transmit sleep mode pin direction" "Driven low,Input" bitfld.long 0x04 11. " L_BIAS ,LCD ac bias sleep mode pin direction" "Driven low,Input" bitfld.long 0x04 10. " L_FCLK ,LCD frame clock sleep mode pin direction" "Driven low,Input" textline " " bitfld.long 0x04 9. " L_LCLK ,LCD line clock sleep mode pin direction" "Driven low,Input" bitfld.long 0x04 8. " L_PCLK ,LCD pixel clock sleep mode pin direction" "Driven low,Input" bitfld.long 0x04 7. " LDD7 ,LCD data sleep mode pin 7 direction" "Driven low,Input" bitfld.long 0x04 6. " LDD6 ,LCD data sleep mode pin 6 direction" "Driven low,Input" textline " " bitfld.long 0x04 5. " LDD5 ,LCD data sleep mode pin 5 direction" "Driven low,Input" bitfld.long 0x04 4. " LDD4 ,LCD data sleep mode pin 4 direction" "Driven low,Input" bitfld.long 0x04 3. " LDD3 ,LCD data sleep mode pin 3 direction" "Driven low,Input" bitfld.long 0x04 2. " LDD2 ,LCD data sleep mode pin 2 direction" "Driven low,Input" textline " " bitfld.long 0x04 1. " LDD1 ,LCD data sleep mode pin 1 direction" "Driven low,Input" bitfld.long 0x04 0. " LDD0 ,LCD data sleep mode pin 0 direction" "Driven low,Input" group (ad:0x90060000+0x10)++0x03 line.long 0x00 "PPFR,PPC pin flag register" bitfld.long 0x00 18. " SP4 ,Serial port 4: MCP/SSP flag" "Enabled,Disabled" bitfld.long 0x00 17. " SP3_RX ,Serial port 3: UART receive flag" "Enabled,Disabled" bitfld.long 0x00 16. " SP3_TX ,Serial port 3: UART transmit flag" "Enabled,Disabled" bitfld.long 0x00 15. " SP2_RX ,Serial port 2: ICP receive flag" "Enabled,Disabled" textline " " bitfld.long 0x00 14. " SP2_TX ,Serial port 2: ICP transmit flag" "Enabled,Disabled" bitfld.long 0x00 13. " SP1_RX ,Serial port 1: GPCLK/UART receive flag" "Enabled,Disabled" bitfld.long 0x00 12. " SP1_TX ,Serial port 1: GPCLK/UART transmit flag" "Enabled,Disabled" bitfld.long 0x00 0. " LCD ,LCD controller flag" "Enabled,Disabled" width 0x0B tree.end ;COMPLETE tree "Serial Port 0 USB Device Controller" width 0x08 group (ad:0x80000000+0x00)++0x18 line.byte 0x00 "UDCCR,UDC control register" bitfld.byte 0x00 7. " B5 ,For the B5 version of the SA-1110, setting this bit to 1 activates the internal fix for Errata 29" "Not activated,Activated" bitfld.byte 0x00 6. " SUSIM ,Suspend interrupt mask" "Enabled,Disabled" bitfld.byte 0x00 5. " TIM ,Transmit interrupt mask" "Enabled,Disabled" bitfld.byte 0x00 4. " RIM ,Receive interrupt mask" "Enabled,Disabled" textline " " bitfld.byte 0x00 3. " EIM ,Endpoint 0 interrupt mask" "Enabled,Disabled" bitfld.byte 0x00 2. " RESIM ,Resume interrupt mask" "Enabled,Disabled" bitfld.byte 0x00 1. " UDA ,SA-1110 UDC active (read-only)" "Inactive,Active" bitfld.byte 0x00 0. " UDD ,UDD disable" "Enabled,Disabled" line.byte 0x04 "UDCAR,UDC address register" hexmask.byte 0x04 0.--6. 1. " ADDRESS ,Function address field" line.byte 0x08 "UDCOMP,UDC OUT maximum packet register" hexfld.byte 0x08 " OUT_MaxP ,OUT maximum packet size" line.byte 0x0C "UDCIMP,UDC IN maximum packet register" hexfld.byte 0x0C " IN_MaxP ,IN maximum packet size" line.byte 0x10 "UDCCS0,UDC Endpoint 0 control/status register" bitfld.byte 0x10 7. " SSE ,Serviced setup end (write-only)" "No effect,Clear SE" bitfld.byte 0x10 6. " SO ,Serviced OPR (write-only)" "No effect,Clear OPR" bitfld.byte 0x10 5. " SE ,Setup end (read-only)" "Not ended,Ended" bitfld.byte 0x10 4. " DE ,Data end (read/write 1 to set)" "Not ended,Ended" textline " " bitfld.byte 0x10 3. " FST ,Force stall (read/write 1 to set)" "Not forced,Forced" bitfld.byte 0x10 2. " SST ,Sent stall (read/write 1 to clear)" "Not sent,Sent" bitfld.byte 0x10 1. " IPR ,IN packet ready (read/write 1 to set)" "Not ready,Ready" bitfld.byte 0x10 0. " OPR ,OUT packet ready (read-only)" "Not ready,Ready" line.byte 0x14 "UDCCS1,UDC Endpoint 1 (OUT) control/status register" bitfld.byte 0x14 5. " RNE ,Receive FIFO not empty (read-only)" "Empty,Not empty" bitfld.byte 0x14 4. " FST ,Force stall (read/write)" "Not forced,Forced" bitfld.byte 0x14 3. " SST ,Sent stall (read/write 1 to clear)" "Not sent,Sent" bitfld.byte 0x14 2. " RPE ,Receive packet error (read-only)" "No errors,Errors" textline " " bitfld.byte 0x14 1. " RPC ,Receive packet complete (read/write 1 to clear)" "Invalid,Valid" bitfld.byte 0x14 0. " RFS ,Receive FIFO service (read-only)" "Less than 12,12 or more" line.byte 0x18 "UDCCS2,UDC Endpoint 2 (IN) control/status register" bitfld.byte 0x18 5. " FST ,Force STALL (read/write)" "Not forced,Forced" bitfld.byte 0x18 4. " SST ,Sent STALL (read/write 1 to clear)" "Not sent,Sent" bitfld.byte 0x18 3. " TUR ,Transmit FIFO underrun" "Not experienced,Experienced" bitfld.byte 0x18 2. " TPE ,Transmit packet error (read-only)" "No errors,Errors" textline " " bitfld.byte 0x18 1. " TPC ,Transmit packet complete (read/write 1 to clear)" "Invalid,Valid" bitfld.byte 0x18 0. " TFS ,Transmit FIFO service (read-only)" "More than 8,8 or less" rgroup (ad:0x80000000+0x1C)++0x00 line.byte 0x00 "UDCD0,UDC Endpoint 0 data register (Read Access)" hexfld.byte 0x00 " B_DATA ,Bottom of Endpoint 0 FIFO data" wgroup (ad:0x80000000+0x1C)++0x00 line.byte 0x00 "UDCD0,UDC Endpoint 0 data register (Write Access)" hexfld.byte 0x00 " T_DATA ,Top of Endpoint 0 FIFO data" rgroup (ad:0x80000000+0x20)++0x00 line.byte 0x00 "UDCWC,UDC Endpoint 0 write count register" bitfld.byte 0x00 0.--3. " WC ,Endpoint 0 write count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup (ad:0x80000000+0x28)++0x00 line.byte 0x00 "UDCDR,UDC transmit/receive data register (FIFOs) (Read Access)" hexfld.byte 0x00 " B_FIFO ,Bottom of receive FIFO data" wgroup (ad:0x80000000+0x28)++0x00 line.byte 0x00 "UDCDR,UDC transmit/receive data register (FIFOs) (Write Access)" hexfld.byte 0x00 " T_FIFO ,Top of transmit FIFO data" rgroup (ad:0x80000000+0x30)++0x00 line.byte 0x00 "UDCSR,UDC status/interrupt register (Read Access)" bitfld.byte 0x00 5. " RSTIR ,Reset interrupt request" "Not occured,Occured" bitfld.byte 0x00 4. " RESIR ,Resume interrupt request" "Not occured,Occured" bitfld.byte 0x00 3. " SUSIR ,Suspend interrupt request" "Not occured,Occured" bitfld.byte 0x00 2. " TIR ,Transmit interrupt request" "Not occured,Occured" textline " " bitfld.byte 0x00 1. " RIR ,Receive interrupt request" "Not occured,Occured" bitfld.byte 0x00 0. " EIR ,Endpoint 0 interrupt request" "Not occured,Occured" wgroup (ad:0x80000000+0x30)++0x00 line.byte 0x00 "UDCSR,UDC status/interrupt register (Write Access)" bitfld.byte 0x00 5. " RSTIR ,Reset interrupt request" "No effect,Clear" bitfld.byte 0x00 4. " RESIR ,Resume interrupt request" "No effect,Clear" bitfld.byte 0x00 3. " SUSIR ,Suspend interrupt request" "No effect,Clear" bitfld.byte 0x00 2. " TIR ,Transmit interrupt request" "No effect,Clear" textline " " bitfld.byte 0x00 1. " RIR ,Receive interrupt request" "No effect,Clear" bitfld.byte 0x00 0. " EIR ,Endpoint 0 interrupt request" "No effect,Clear" width 0x0B tree.end ;COMPLETE tree "Serial Port 1 GPCLK/UART" tree "UART" width 0x07 group (ad:0x80010000+0x00)++0x0C line.byte 0x00 "UTCR0,UART control register 0" bitfld.byte 0x00 6. " TCE ,Transmit clock edge select" "Rising,Falling" bitfld.byte 0x00 5. " RCE ,Receive clock edge select" "Rising,Falling" bitfld.byte 0x00 4. " SCE ,Sample clock enable" "Disabled,Enabled" bitfld.byte 0x00 3. " DSS ,Data size select" "7-bit,8-bit" textline " " bitfld.byte 0x00 2. " SBS ,Stop bit select" "One,Two" bitfld.byte 0x00 1. " OES ,Odd/even parity select" "Odd,Even" bitfld.byte 0x00 0. " PE ,Parity enable" "Disabled,Enabled" line.byte 0x04 "UTCR1,UART control register 1" bitfld.byte 0x04 0.--3. " BRD[11:8] ,Baud rate divisor" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111" line.byte 0x08 "UTCR2,UART control register 2" hexfld.byte 0x08 " BRD[7:0] ,Baud rate divisor" line.byte 0x0C "UTCR3,UART control register 3" bitfld.byte 0x0C 5. " LBM ,Loopback mode" "Normal,Loopback" bitfld.byte 0x0C 4. " TIE ,Transmit FIFO interrupt enable" "Disabled,Enabled" bitfld.byte 0x0C 3. " RIE ,Receive FIFO interrupt enable" "Disabled,Enabled" bitfld.byte 0x0C 2. " BRK ,Break" "Normal,Break" textline " " bitfld.byte 0x0C 1. " TXE ,Transmitter enable" "Disabled,Enabled" bitfld.byte 0x0C 0. " RXE ,Receiver enable" "Disabled,Enabled" rgroup (ad:0x80010000+0x14)++0x01 line.word 0x00 "UTDR,UART data register" bitfld.word 0x00 10. " ROR ,Receiver overrun" "Not detected,Detected" bitfld.word 0x00 9. " FRE ,Framing error" "One,Zero" bitfld.word 0x00 8. " PRE ,Parity error" "Not encountered,Encountered" hexmask.word.byte 0x00 0.--7. 1. " RDATA ,Bottom of receive FIFO data" textline " " wgroup (ad:0x80010000+0x14)++0x00 line.byte 0x00 "UTDR,UART data register" hexfld.byte 0x00 " TDATA ,Top of Transmit FIFO Data" group (ad:0x80010000+0x1C)++0x00 line.byte 0x00 "UTSR0,UART status register 0" bitfld.byte 0x00 5. " EIF ,Error in FIFO (read-only)" "No error,Error" bitfld.byte 0x00 4. " REB ,Receiver end of break" "Not detected,Detected" bitfld.byte 0x00 3. " RBB ,Receiver begin of break" "Not detected,Detected" bitfld.byte 0x00 2. " RID ,Receiver idle" "Busy,Enabled" textline " " bitfld.byte 0x00 1. " RFS ,Receive FIFO service request (read-only)" "Seven or fewer,Five or more" bitfld.byte 0x00 0. " TFS ,Transmit FIFO service request (read-only)" "Five or more,Four or fewer" rgroup (ad:0x80010000+0x20)++0x00 line.byte 0x00 "UTSR1,UART status register 1" bitfld.byte 0x00 5. " ROR ,Receive FIFO overrun (read-only)" "Not experienced,Experienced" bitfld.byte 0x00 4. " FRE ,Framing error (read-only)" "One,Zero" bitfld.byte 0x00 3. " PRE ,Parity error (read-only)" "Not encountered,Encountered" bitfld.byte 0x00 2. " TNF ,Transmit FIFO not full (read-only)" "Full,Not full" textline " " bitfld.byte 0x00 1. " RNE ,Receive FIFO not empty (read-only)" "Empty,Not Empty" bitfld.byte 0x00 0. " TBY ,Transmitter busy flag (read-only)" "Idle,Busy" width 0x0B tree.end tree "GPCLK" width 0x09 group (ad:0x80020000+0x60)++0x10 line.byte 0x00 "GPCLKR0,GPCLK Control Register 0" bitfld.long 0x00 5. " SCD ,Sample clock direction" "Pin16 - input,Pin16 - output" bitfld.long 0x00 4. " SCE ,Sample clock enable" "Disabled,Enabled" bitfld.long 0x00 0. " SUS ,GPCLK/UART select" "GPCLK,UART" line.byte 0x04 "GPCLKR1,GPCLK Control Register 1" bitfld.long 0x04 1. " TXE ,Transmit Enable" "Disabled,Enabled" line.byte 0x0C "GPCLKR2,GPCLK Control Register 2" bitfld.long 0x0C 0.--3. " BRD[11:8] ,Baud rate divisor bits 11-8" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111" line.byte 0x10 "GPCLKR3,GPCLK Control Register 3" hexfld.byte 0x10 " BRD[7:0] ,Baud rate divisor bits 7-0" width 0x0B tree.end tree.end ;COMPLETE tree "Serial Port 2 Infrared Communications Port" width 0x0B tree "UART" width 0x07 group (ad:0x80030000+0x00)++0x10 line.byte 0x00 "UTCR0,UART control register 0" bitfld.byte 0x00 6. " TCE ,Transmit clock edge select" "Rising,Falling" bitfld.byte 0x00 5. " RCE ,Receive clock edge select" "Rising,Falling" bitfld.byte 0x00 4. " SCE ,Sample clock enable" "Disabled,Enabled" bitfld.byte 0x00 3. " DSS ,Data size select" "7-bit,8-bit" textline " " bitfld.byte 0x00 2. " SBS ,Stop bit select" "One,Two" bitfld.byte 0x00 1. " OES ,Odd/even parity select" "Odd,Even" bitfld.byte 0x00 0. " PE ,Parity enable" "Disabled,Enabled" line.byte 0x04 "UTCR1,UART control register 1" bitfld.byte 0x04 0.--3. " BRD[11:8] ,Baud rate divisor" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111" line.byte 0x08 "UTCR2,UART control register 2" hexfld.byte 0x08 " BRD[7:0] ,Baud rate divisor" line.byte 0x0C "UTCR3,UART control register 3" bitfld.byte 0x0C 5. " LBM ,Loopback mode" "Normal,Loopback" bitfld.byte 0x0C 4. " TIE ,Transmit FIFO interrupt enable" "Disabled,Enabled" bitfld.byte 0x0C 3. " RIE ,Receive FIFO interrupt enable" "Disabled,Enabled" bitfld.byte 0x0C 2. " BRK ,Break" "Normal,Break" textline " " bitfld.byte 0x0C 1. " TXE ,Transmitter enable" "Disabled,Enabled" bitfld.byte 0x0C 0. " RXE ,Receiver enable" "Disabled,Enabled" line.byte 0x10 "UTCR4,UART Control Register 4" bitfld.byte 0x10 1. " LPM ,Low-power mode" "Disabled,Enabled" bitfld.byte 0x10 0. " HSE ,HP-SIR enable" "Disabled,Enabled" rgroup (ad:0x80030000+0x14)++0x01 line.word 0x00 "UTDR,UART data register" bitfld.word 0x00 10. " ROR ,Receiver overrun" "Not detected,Detected" bitfld.word 0x00 9. " FRE ,Framing error" "One,Zero" bitfld.word 0x00 8. " PRE ,Parity error" "Not encountered,Encountered" hexmask.word.byte 0x00 0.--7. 1. " RDATA ,Bottom of receive FIFO data" textline " " wgroup (ad:0x80030000+0x14)++0x00 line.byte 0x00 "UTDR,UART data register" hexfld.byte 0x00 " TDATA ,Top of Transmit FIFO Data" group (ad:0x80030000+0x1C)++0x00 line.byte 0x00 "UTSR0,UART status register 0" bitfld.byte 0x00 5. " EIF ,Error in FIFO (read-only)" "No error,Error" bitfld.byte 0x00 4. " REB ,Receiver end of break" "Not detected,Detected" bitfld.byte 0x00 3. " RBB ,Receiver begin of break" "Not detected,Detected" bitfld.byte 0x00 2. " RID ,Receiver idle" "Busy,Enabled" textline " " bitfld.byte 0x00 1. " RFS ,Receive FIFO service request (read-only)" "Seven or fewer,Five or more" bitfld.byte 0x00 0. " TFS ,Transmit FIFO service request (read-only)" "Five or more,Four or fewer" rgroup (ad:0x80030000+0x20)++0x00 line.byte 0x00 "UTSR1,UART status register 1" bitfld.byte 0x00 5. " ROR ,Receive FIFO overrun (read-only)" "Not experienced,Experienced" bitfld.byte 0x00 4. " FRE ,Framing error (read-only)" "One,Zero" bitfld.byte 0x00 3. " PRE ,Parity error (read-only)" "Not encountered,Encountered" bitfld.byte 0x00 2. " TNF ,Transmit FIFO not full (read-only)" "Full,Not full" textline " " bitfld.byte 0x00 1. " RNE ,Receive FIFO not empty (read-only)" "Empty,Not Empty" bitfld.byte 0x00 0. " TBY ,Transmitter busy flag (read-only)" "Idle,Busy" width 0x0B tree.end tree "HSSP" width 0x07 group (ad:0x80040000+0x60)++0x04 line.byte 0x00 "HSCR0,HSSP Control Register 0" bitfld.long 0x00 7. " AME ,Address match enable" "Disabled,Enabled" bitfld.long 0x00 6. " TIE ,Transmit FIFO interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " RIE ,Receive FIFO interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " RXE ,Receive enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 2. " TUS ,Transmit FIFO underrun select" "0,1" bitfld.long 0x00 1. " LBM ,Loopback mode" "Normal,Loopback" bitfld.long 0x00 0. " ITR ,IrDA transmission rate" "115.2 Kbps,4.0 Mbps" line.byte 0x04 "HSCR1,HSSP Control Register 1" hexfld.byte 0x04 " AMV ,Address match value" rgroup (ad:0x80040000+0x6C)++0x01 line.word 0x00 "HSDR,HSSP Data Register (Read Access)" bitfld.word 0x00 10. " ROR ,Receiver overrun" "Not detected,Detected" bitfld.word 0x00 9. " CRE ,CRC error" "No error,Error" bitfld.word 0x00 8. " EOF ,End of frame" "No end,End" hexfld.byte 0x00 " B_DATA ,Bottom of receive FIFO" wgroup (ad:0x80040000+0x6C)++0x00 line.byte 0x00 "HSDR,HSSP Data Register (Write Access)" hexfld.byte 0x00 " T_DATA ,Top of transmit FIFO" group (ad:0x80040000+0x74)++0x00 line.byte 0x00 "HSSR0,HSSP Status Register 0" bitfld.byte 0x00 5. " FRE ,Framing error" "Not occured,Occured" bitfld.byte 0x00 4. " RFS ,Receive FIFO service request (read-only)" "11 or fewer,9; 10; 11 or 12" bitfld.byte 0x00 3. " TFS ,Transmit FIFO service request (read-only)" "Nine or more,Eight or fewer" bitfld.byte 0x00 2. " RAB ,Receiver abort" "Not detected,Detected" textline " " bitfld.byte 0x00 1. " TUR ,Transmit FIFO underrun" "Not experienced,Experienced" bitfld.byte 0x00 0. " EIF ,End/error in FIFO (read-only)" "No error/end,Error/end" rgroup (ad:0x80040000+0x78)++0x00 line.byte 0x00 "HSSR1,HSSP Status Register 1" bitfld.byte 0x00 6. " ROR ,Receive FIFO overrun" "Not experienced,Experienced" bitfld.byte 0x00 5. " CRE ,CRC error" "No error,Error" bitfld.byte 0x00 4. " EOF ,End of frame" "Not completed,Completed" bitfld.byte 0x00 3. " TNF ,Transmit FIFO not full" "Full,Not full" textline " " bitfld.byte 0x00 2. " RNE ,Receive FIFO not empty" "Empty,Not empty" bitfld.byte 0x00 1. " TBY ,Transmitter busy flag" "Idle,Busy" bitfld.byte 0x00 0. " RSY ,Receiver synchronized flag" "Not synchronized,Synchronized" group ad:0x90060028++0x00 line.byte 0x00 "HSCR2,HSSP Control Register 2" bitfld.byte 0x00 3. " RXP ,Receive pin polarity select" "Inverted,Non-inverted" bitfld.byte 0x00 2. " TXP ,Transmit pin polarity select" "Inverted,Non-inverted" width 0x0B tree.end tree.end ;COMPLETE tree "Serial Port 3 UART" width 0x07 group (ad:0x80050000+0x00)++0x0C line.byte 0x00 "UTCR0,UART control register 0" bitfld.byte 0x00 6. " TCE ,Transmit clock edge select" "Rising,Falling" bitfld.byte 0x00 5. " RCE ,Receive clock edge select" "Rising,Falling" bitfld.byte 0x00 4. " SCE ,Sample clock enable" "Disabled,Enabled" bitfld.byte 0x00 3. " DSS ,Data size select" "7-bit,8-bit" textline " " bitfld.byte 0x00 2. " SBS ,Stop bit select" "One,Two" bitfld.byte 0x00 1. " OES ,Odd/even parity select" "Odd,Even" bitfld.byte 0x00 0. " PE ,Parity enable" "Disabled,Enabled" line.byte 0x04 "UTCR1,UART control register 1" bitfld.byte 0x04 0.--3. " BRD[11:8] ,Baud rate divisor" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111" line.byte 0x08 "UTCR2,UART control register 2" hexfld.byte 0x08 " BRD[7:0] ,Baud rate divisor" line.byte 0x0C "UTCR3,UART control register 3" bitfld.byte 0x0C 5. " LBM ,Loopback mode" "Normal,Loopback" bitfld.byte 0x0C 4. " TIE ,Transmit FIFO interrupt enable" "Disabled,Enabled" bitfld.byte 0x0C 3. " RIE ,Receive FIFO interrupt enable" "Disabled,Enabled" bitfld.byte 0x0C 2. " BRK ,Break" "Normal,Break" textline " " bitfld.byte 0x0C 1. " TXE ,Transmitter enable" "Disabled,Enabled" bitfld.byte 0x0C 0. " RXE ,Receiver enable" "Disabled,Enabled" rgroup (ad:0x80050000+0x14)++0x01 line.word 0x00 "UTDR,UART data register" bitfld.word 0x00 10. " ROR ,Receiver overrun" "Not detected,Detected" bitfld.word 0x00 9. " FRE ,Framing error" "One,Zero" bitfld.word 0x00 8. " PRE ,Parity error" "Not encountered,Encountered" hexmask.word.byte 0x00 0.--7. 1. " RDATA ,Bottom of receive FIFO data" textline " " wgroup (ad:0x80050000+0x14)++0x00 line.byte 0x00 "UTDR,UART data register" hexfld.byte 0x00 " TDATA ,Top of Transmit FIFO Data" group (ad:0x80050000+0x1C)++0x00 line.byte 0x00 "UTSR0,UART status register 0" bitfld.byte 0x00 5. " EIF ,Error in FIFO (read-only)" "No error,Error" bitfld.byte 0x00 4. " REB ,Receiver end of break" "Not detected,Detected" bitfld.byte 0x00 3. " RBB ,Receiver begin of break" "Not detected,Detected" bitfld.byte 0x00 2. " RID ,Receiver idle" "Busy,Enabled" textline " " bitfld.byte 0x00 1. " RFS ,Receive FIFO service request (read-only)" "Seven or fewer,Five or more" bitfld.byte 0x00 0. " TFS ,Transmit FIFO service request (read-only)" "Five or more,Four or fewer" rgroup (ad:0x80050000+0x20)++0x00 line.byte 0x00 "UTSR1,UART status register 1" bitfld.byte 0x00 5. " ROR ,Receive FIFO overrun (read-only)" "Not experienced,Experienced" bitfld.byte 0x00 4. " FRE ,Framing error (read-only)" "One,Zero" bitfld.byte 0x00 3. " PRE ,Parity error (read-only)" "Not encountered,Encountered" bitfld.byte 0x00 2. " TNF ,Transmit FIFO not full (read-only)" "Full,Not full" textline " " bitfld.byte 0x00 1. " RNE ,Receive FIFO not empty (read-only)" "Empty,Not Empty" bitfld.byte 0x00 0. " TBY ,Transmitter busy flag (read-only)" "Idle,Busy" width 0x0B tree.end ;COMPLETE tree "Serial Port 4 MCP / SSP" tree "MCP" width 0x07 group (ad:0x80060000+0x00)++0x03 line.long 0x00 "MCCR0,MCP control register 0" bitfld.long 0x00 24.--25. " ECP ,External clock prescaler" "1,2,3,4" bitfld.long 0x00 23. " LBM ,Loopback mode" "Normal,Loopback" bitfld.long 0x00 22. " ARE ,Audio receive FIFO interrupt enable" "Disabled,Enabled" bitfld.long 0x00 21. " ATE ,Audio transmit FIFO interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " TRE ,Telecom receive FIFO interrupt enable" "Disabled,Enabled" bitfld.long 0x00 19. " TTE ,Telecom transmit FIFO interrupt enable" "Disabled,Enabled" bitfld.long 0x00 18. " ADM ,A/D data sampling mode" "Whenever,First time" bitfld.long 0x00 17. " ECS ,External clock select" "On-chip,External" textline " " bitfld.long 0x00 16. " MCE ,Multimedia communications port enable" "Disabled,Enabled" hexmask.long.byte 0x00 8.--14. 1. " TSD ,Telecom sample rate divisor" hexmask.long.byte 0x00 0.--6. 1. " ASD ,Audio sample rate divisor" rgroup (ad:0x80060000+0x08)++0x03 line.long 0x00 "MCDR0,MCP data register 0 (Read Access)" hexfld.word 0x00 " Audio_data ,Bottom of Audio Receive FIFO" wgroup (ad:0x80060000+0x08)++0x03 line.long 0x00 "MCDR0,MCP data register 0 (Write Access)" hexfld.word 0x00 " Audio_data ,Top of Audio Transmit FIFO" rgroup (ad:0x80060000+0x0C)++0x03 line.long 0x00 "MCDR1,MCP data register 1 (Read Access)" hexfld.word 0x00 " Telecom_data ,Bottom of telecom receive FIFO data" wgroup (ad:0x80060000+0x0C)++0x03 line.long 0x00 "MCDR1,MCP data register 1 (Write Access)" hexfld.word 0x00 " Telecom_data ,Top of telecom transmit FIFO data" rgroup (ad:0x80060000+0x10)++0x03 line.long 0x00 "MCDR2,MCP data register 2 (Read Access)" bitfld.long 0x00 17.--20. " CRRWA ,Codec register read/write address" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111" bitfld.long 0x00 16. " RW ,Read/write" "0,0" hexmask.long.word 0x00 0.--15. 1. " CRRWD ,Codec register read/write data" wgroup (ad:0x80060000+0x10)++0x03 line.long 0x00 "MCDR2,MCP data register 2 (Write Access)" bitfld.long 0x00 17.--20. " CRRWA ,Codec register read/write address" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111" bitfld.long 0x00 16. " RW ,Read/write" "Read,Write" hexmask.long.word 0x00 0.--15. 1. " CRRWD ,Codec register read/write data" group (ad:0x80060000+0x18)++0x03 line.long 0x00 "MCSR,MCP status register" bitfld.long 0x00 15. " TCE ,Telecom codec enabled" "Disabled,Enabled" bitfld.long 0x00 14. " ACE ,Audio codec enabled (read-only)" "Disabled,Enabled" bitfld.long 0x00 13. " CRC ,Codec read completed (read-only)" "Not completed,Completed" bitfld.long 0x00 12. " CWC ,Codec write completed (read-only)" "Not completed,Completed" textline " " bitfld.long 0x00 11. " TNE ,Telecom receive FIFO not empty (read-only)" "Empty,Not empty" bitfld.long 0x00 10. " TNF ,Telecom transmit FIFO not full (read-only)" "Full,Not full" bitfld.long 0x00 9. " ANE ,Audio receive FIFO not empty (read-only)" "Empty,Not empty" bitfld.long 0x00 8. " ANF ,Audio transmit FIFO not full (read-only)" "Full,Not full" textline " " bitfld.long 0x00 7. " TRO ,Telecom receive FIFO overrun" "Not occured,Occured" bitfld.long 0x00 6. " TTU ,Telecom transmit FIFO underrun" "Not occured,Occured" bitfld.long 0x00 5. " ARO ,Audio receive FIFO overrun" "Not occured,Occured" bitfld.long 0x00 4. " ATU ,Audio transmit FIFO underrun" "Not occured,Occured" textline " " bitfld.long 0x00 3. " TRS ,Telecom receive FIFO service request (read-only)" "Three or fewer,Four or more" bitfld.long 0x00 2. " TTS ,Telecom transmit FIFO service request flag (read-only)" "Five or more,Four or fewer" bitfld.long 0x00 1. " ARS ,Audio receive FIFO service request (read-only)" "Three or fewer,Four or more" bitfld.long 0x00 0. " ATS ,Audio transmit FIFO service request flag (read-only)" "Five or more,Four or fewer" group ad:0x90060030++0x03 line.long 0x00 "MCCR1,MCP control register 1" bitfld.long 0x00 20. " CFS ,Clock frequency select" "11.981 MHz,9.585 MHz" width 0x0B tree.end tree "SSP" width 0x07 group (ad:0x80070000+0x60)++0x05 line.word 0x00 "SSCR0,SSP control register 0" hexmask.word.byte 0x00 8.--15. 1. " SCR ,Serial clock rate" bitfld.word 0x00 7. " SSE ,Synchronous serial port enable" "Disabled,Enabled" bitfld.word 0x00 4.--5. " FRF ,Frame Format" "Motorola,Texas,Microwire,?..." bitfld.word 0x00 0.--3. " DSS ,Data size select" "Reserved,Reserved,Reserved,4,5,6,7,8,9,10,11,12,13,14,15,16" line.word 0x04 "SSCR1,SSP control register 1" bitfld.word 0x04 5. " ECS ,External clock select" "Internal,External" bitfld.word 0x04 4. " SPH ,Serial clock phase" "One full cycle,One-half cycle" bitfld.word 0x04 3. " SPO ,Serial clock polarity" "Inactive low,Inactive high" bitfld.word 0x04 2. " LBM ,Loopback mode" "Normal,Loopback" textline " " bitfld.word 0x04 1. " TIE ,Transmit FIFO interrupt enable" "Disabled,Enabled" bitfld.word 0x04 0. " RIE ,Receive FIFO interrupt enable" "Disabled,Enabled" group (ad:0x80070000+0x6C)++0x01 line.word 0x00 "SSDR,SSP data register - Bottom of Receive FIFO" group (ad:0x80070000+0x6C)++0x01 line.word 0x00 "SSDR,SSP data register - Top of Receive FIFO" group (ad:0x80070000+0x74)++0x01 line.word 0x00 "SSSR,SSP status register" bitfld.word 0x00 6. " ROR ,Receive FIFO overrun" "Not experienced,Experienced" bitfld.word 0x00 5. " RFS ,Receive FIFO service request (read-only)" "Three or fewer,Four or more" bitfld.word 0x00 4. " TFS ,Transmit FIFO service request (read-only)" "Five or more,Four or fewer" bitfld.word 0x00 3. " BSY ,SSP busy flag (read-only)" "Idle,Busy" textline " " bitfld.word 0x00 2. " RNE ,Receive FIFO not empty (read-only)" "Empty,Not empty" bitfld.word 0x00 1. " TNF ,Transmit FIFO not full (read-only)" "Full,Not full" width 0x0B tree.end tree.end ;COMPLETE tree "General-Purpose I/O" width 0x06 rgroup (ad:0x90040000+0x00)++0x03 line.long 0x00 "GPLR,GPIO pin-level register" bitfld.long 0x00 27. " PL27 ,GPIO port pin level 27" "Low,High" bitfld.long 0x00 26. " PL26 ,GPIO port pin level 26" "Low,High" bitfld.long 0x00 25. " PL25 ,GPIO port pin level 25" "Low,High" bitfld.long 0x00 24. " PL24 ,GPIO port pin level 24" "Low,High" textline " " bitfld.long 0x00 23. " PL23 ,GPIO port pin level 23" "Low,High" bitfld.long 0x00 22. " PL22 ,GPIO port pin level 22" "Low,High" bitfld.long 0x00 21. " PL21 ,GPIO port pin level 21" "Low,High" bitfld.long 0x00 20. " PL20 ,GPIO port pin level 20" "Low,High" textline " " bitfld.long 0x00 19. " PL19 ,GPIO port pin level 19" "Low,High" bitfld.long 0x00 18. " PL18 ,GPIO port pin level 18" "Low,High" bitfld.long 0x00 17. " PL17 ,GPIO port pin level 17" "Low,High" bitfld.long 0x00 16. " PL16 ,GPIO port pin level 16" "Low,High" textline " " bitfld.long 0x00 15. " PL15 ,GPIO port pin level 15" "Low,High" bitfld.long 0x00 14. " PL14 ,GPIO port pin level 14" "Low,High" bitfld.long 0x00 13. " PL13 ,GPIO port pin level 13" "Low,High" bitfld.long 0x00 12. " PL12 ,GPIO port pin level 12" "Low,High" textline " " bitfld.long 0x00 11. " PL11 ,GPIO port pin level 11" "Low,High" bitfld.long 0x00 10. " PL10 ,GPIO port pin level 10" "Low,High" bitfld.long 0x00 9. " PL9 ,GPIO port pin level 9" "Low,High" bitfld.long 0x00 8. " PL8 ,GPIO port pin level 8" "Low,High" textline " " bitfld.long 0x00 7. " PL7 ,GPIO port pin level 7" "Low,High" bitfld.long 0x00 6. " PL6 ,GPIO port pin level 6" "Low,High" bitfld.long 0x00 5. " PL5 ,GPIO port pin level 5" "Low,High" bitfld.long 0x00 4. " PL4 ,GPIO port pin level 4" "Low,High" textline " " bitfld.long 0x00 3. " PL3 ,GPIO port pin level 3" "Low,High" bitfld.long 0x00 2. " PL2 ,GPIO port pin level 2" "Low,High" bitfld.long 0x00 1. " PL1 ,GPIO port pin level 1" "Low,High" bitfld.long 0x00 0. " PL0 ,GPIO port pin level 0" "Low,High" group (ad:0x90040000+0x04)++0x03 line.long 0x00 "GPDR,GPIO pin direction register" bitfld.long 0x00 27. " PD27 ,GPIO port pin direction 27" "Input,Output" bitfld.long 0x00 26. " PD26 ,GPIO port pin direction 26" "Input,Output" bitfld.long 0x00 25. " PD25 ,GPIO port pin direction 25" "Input,Output" bitfld.long 0x00 24. " PD24 ,GPIO port pin direction 24" "Input,Output" textline " " bitfld.long 0x00 23. " PD23 ,GPIO port pin direction 23" "Input,Output" bitfld.long 0x00 22. " PD22 ,GPIO port pin direction 22" "Input,Output" bitfld.long 0x00 21. " PD21 ,GPIO port pin direction 21" "Input,Output" bitfld.long 0x00 20. " PD20 ,GPIO port pin direction 20" "Input,Output" textline " " bitfld.long 0x00 19. " PD19 ,GPIO port pin direction 19" "Input,Output" bitfld.long 0x00 18. " PD18 ,GPIO port pin direction 18" "Input,Output" bitfld.long 0x00 17. " PD17 ,GPIO port pin direction 17" "Input,Output" bitfld.long 0x00 16. " PD16 ,GPIO port pin direction 16" "Input,Output" textline " " bitfld.long 0x00 15. " PD15 ,GPIO port pin direction 15" "Input,Output" bitfld.long 0x00 14. " PD14 ,GPIO port pin direction 14" "Input,Output" bitfld.long 0x00 13. " PD13 ,GPIO port pin direction 13" "Input,Output" bitfld.long 0x00 12. " PD12 ,GPIO port pin direction 12" "Input,Output" textline " " bitfld.long 0x00 11. " PD11 ,GPIO port pin direction 11" "Input,Output" bitfld.long 0x00 10. " PD10 ,GPIO port pin direction 10" "Input,Output" bitfld.long 0x00 9. " PD9 ,GPIO port pin direction 9" "Input,Output" bitfld.long 0x00 8. " PD8 ,GPIO port pin direction 8" "Input,Output" textline " " bitfld.long 0x00 7. " PD7 ,GPIO port pin direction 7" "Input,Output" bitfld.long 0x00 6. " PD6 ,GPIO port pin direction 6" "Input,Output" bitfld.long 0x00 5. " PD5 ,GPIO port pin direction 5" "Input,Output" bitfld.long 0x00 4. " PD4 ,GPIO port pin direction 4" "Input,Output" textline " " bitfld.long 0x00 3. " PD3 ,GPIO port pin direction 3" "Input,Output" bitfld.long 0x00 2. " PD2 ,GPIO port pin direction 2" "Input,Output" bitfld.long 0x00 1. " PD1 ,GPIO port pin direction 1" "Input,Output" bitfld.long 0x00 0. " PD0 ,GPIO port pin direction 0" "Input,Output" wgroup (ad:0x90040000+0x08)++0x07 line.long 0x00 "GPSR,GPIO pin output set register" bitfld.long 0x00 27. " PS27 ,GPIO port pin set 27" "No effect,Set" bitfld.long 0x00 26. " PS26 ,GPIO port pin set 26" "No effect,Set" bitfld.long 0x00 25. " PS25 ,GPIO port pin set 25" "No effect,Set" bitfld.long 0x00 24. " PS24 ,GPIO port pin set 24" "No effect,Set" textline " " bitfld.long 0x00 23. " PS23 ,GPIO port pin set 23" "No effect,Set" bitfld.long 0x00 22. " PS22 ,GPIO port pin set 22" "No effect,Set" bitfld.long 0x00 21. " PS21 ,GPIO port pin set 21" "No effect,Set" bitfld.long 0x00 20. " PS20 ,GPIO port pin set 20" "No effect,Set" textline " " bitfld.long 0x00 19. " PS19 ,GPIO port pin set 19" "No effect,Set" bitfld.long 0x00 18. " PS18 ,GPIO port pin set 18" "No effect,Set" bitfld.long 0x00 17. " PS17 ,GPIO port pin set 17" "No effect,Set" bitfld.long 0x00 16. " PS16 ,GPIO port pin set 16" "No effect,Set" textline " " bitfld.long 0x00 15. " PS15 ,GPIO port pin set 15" "No effect,Set" bitfld.long 0x00 14. " PS14 ,GPIO port pin set 14" "No effect,Set" bitfld.long 0x00 13. " PS13 ,GPIO port pin set 13" "No effect,Set" bitfld.long 0x00 12. " PS12 ,GPIO port pin set 12" "No effect,Set" textline " " bitfld.long 0x00 11. " PS11 ,GPIO port pin set 11" "No effect,Set" bitfld.long 0x00 10. " PS10 ,GPIO port pin set 10" "No effect,Set" bitfld.long 0x00 9. " PS9 ,GPIO port pin set 9" "No effect,Set" bitfld.long 0x00 8. " PS8 ,GPIO port pin set 8" "No effect,Set" textline " " bitfld.long 0x00 7. " PS7 ,GPIO port pin set 7" "No effect,Set" bitfld.long 0x00 6. " PS6 ,GPIO port pin set 6" "No effect,Set" bitfld.long 0x00 5. " PS5 ,GPIO port pin set 5" "No effect,Set" bitfld.long 0x00 4. " PS4 ,GPIO port pin set 4" "No effect,Set" textline " " bitfld.long 0x00 3. " PS3 ,GPIO port pin set 3" "No effect,Set" bitfld.long 0x00 2. " PS2 ,GPIO port pin set 2" "No effect,Set" bitfld.long 0x00 1. " PS1 ,GPIO port pin set 1" "No effect,Set" bitfld.long 0x00 0. " PS0 ,GPIO port pin set 0" "No effect,Set" line.long 0x04 "GPCR,GPIO pin output clear register" bitfld.long 0x04 27. " PC27 ,GPIO port pin clear 27" "No effect,Clear" bitfld.long 0x04 26. " PC26 ,GPIO port pin clear 26" "No effect,Clear" bitfld.long 0x04 25. " PC25 ,GPIO port pin clear 25" "No effect,Clear" bitfld.long 0x04 24. " PC24 ,GPIO port pin clear 24" "No effect,Clear" textline " " bitfld.long 0x04 23. " PC23 ,GPIO port pin clear 23" "No effect,Clear" bitfld.long 0x04 22. " PC22 ,GPIO port pin clear 22" "No effect,Clear" bitfld.long 0x04 21. " PC21 ,GPIO port pin clear 21" "No effect,Clear" bitfld.long 0x04 20. " PC20 ,GPIO port pin clear 20" "No effect,Clear" textline " " bitfld.long 0x04 19. " PC19 ,GPIO port pin clear 19" "No effect,Clear" bitfld.long 0x04 18. " PC18 ,GPIO port pin clear 18" "No effect,Clear" bitfld.long 0x04 17. " PC17 ,GPIO port pin clear 17" "No effect,Clear" bitfld.long 0x04 16. " PC16 ,GPIO port pin clear 16" "No effect,Clear" textline " " bitfld.long 0x04 15. " PC15 ,GPIO port pin clear 15" "No effect,Clear" bitfld.long 0x04 14. " PC14 ,GPIO port pin clear 14" "No effect,Clear" bitfld.long 0x04 13. " PC13 ,GPIO port pin clear 13" "No effect,Clear" bitfld.long 0x04 12. " PC12 ,GPIO port pin clear 12" "No effect,Clear" textline " " bitfld.long 0x04 11. " PC11 ,GPIO port pin clear 11" "No effect,Clear" bitfld.long 0x04 10. " PC10 ,GPIO port pin clear 10" "No effect,Clear" bitfld.long 0x04 9. " PC9 ,GPIO port pin clear 9" "No effect,Clear" bitfld.long 0x04 8. " PC8 ,GPIO port pin clear 8" "No effect,Clear" textline " " bitfld.long 0x04 7. " PC7 ,GPIO port pin clear 7" "No effect,Clear" bitfld.long 0x04 6. " PC6 ,GPIO port pin clear 6" "No effect,Clear" bitfld.long 0x04 5. " PC5 ,GPIO port pin clear 5" "No effect,Clear" bitfld.long 0x04 4. " PC4 ,GPIO port pin clear 4" "No effect,Clear" textline " " bitfld.long 0x04 3. " PC3 ,GPIO port pin clear 3" "No effect,Clear" bitfld.long 0x04 2. " PC2 ,GPIO port pin clear 2" "No effect,Clear" bitfld.long 0x04 1. " PC1 ,GPIO port pin clear 1" "No effect,Clear" bitfld.long 0x04 0. " PC0 ,GPIO port pin clear 0" "No effect,Clear" group (ad:0x90040000+0x10)++0x0F line.long 0x00 "GRER,GPIO rising-edge detect register" bitfld.long 0x00 27. " RE27 ,GPIO port pin rising-edge detect 27" "Disabled,Enabled" bitfld.long 0x00 26. " RE26 ,GPIO port pin rising-edge detect 26" "Disabled,Enabled" bitfld.long 0x00 25. " RE25 ,GPIO port pin rising-edge detect 25" "Disabled,Enabled" bitfld.long 0x00 24. " RE24 ,GPIO port pin rising-edge detect 24" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " RE23 ,GPIO port pin rising-edge detect 23" "Disabled,Enabled" bitfld.long 0x00 22. " RE22 ,GPIO port pin rising-edge detect 22" "Disabled,Enabled" bitfld.long 0x00 21. " RE21 ,GPIO port pin rising-edge detect 21" "Disabled,Enabled" bitfld.long 0x00 20. " RE20 ,GPIO port pin rising-edge detect 20" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " RE19 ,GPIO port pin rising-edge detect 19" "Disabled,Enabled" bitfld.long 0x00 18. " RE18 ,GPIO port pin rising-edge detect 18" "Disabled,Enabled" bitfld.long 0x00 17. " RE17 ,GPIO port pin rising-edge detect 17" "Disabled,Enabled" bitfld.long 0x00 16. " RE16 ,GPIO port pin rising-edge detect 16" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " RE15 ,GPIO port pin rising-edge detect 15" "Disabled,Enabled" bitfld.long 0x00 14. " RE14 ,GPIO port pin rising-edge detect 14" "Disabled,Enabled" bitfld.long 0x00 13. " RE13 ,GPIO port pin rising-edge detect 13" "Disabled,Enabled" bitfld.long 0x00 12. " RE12 ,GPIO port pin rising-edge detect 12" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " RE11 ,GPIO port pin rising-edge detect 11" "Disabled,Enabled" bitfld.long 0x00 10. " RE10 ,GPIO port pin rising-edge detect 10" "Disabled,Enabled" bitfld.long 0x00 9. " RE9 ,GPIO port pin rising-edge detect 9" "Disabled,Enabled" bitfld.long 0x00 8. " RE8 ,GPIO port pin rising-edge detect 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " RE7 ,GPIO port pin rising-edge detect 7" "Disabled,Enabled" bitfld.long 0x00 6. " RE6 ,GPIO port pin rising-edge detect 6" "Disabled,Enabled" bitfld.long 0x00 5. " RE5 ,GPIO port pin rising-edge detect 5" "Disabled,Enabled" bitfld.long 0x00 4. " RE4 ,GPIO port pin rising-edge detect 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " RE3 ,GPIO port pin rising-edge detect 3" "Disabled,Enabled" bitfld.long 0x00 2. " RE2 ,GPIO port pin rising-edge detect 2" "Disabled,Enabled" bitfld.long 0x00 1. " RE1 ,GPIO port pin rising-edge detect 1" "Disabled,Enabled" bitfld.long 0x00 0. " RE0 ,GPIO port pin rising-edge detect 0" "Disabled,Enabled" line.long 0x04 "GFER,GPIO falling-edge detect register" bitfld.long 0x04 27. " FE27 ,GPIO port pin falling-edge detect 27" "Disabled,Enabled" bitfld.long 0x04 26. " FE26 ,GPIO port pin falling-edge detect 26" "Disabled,Enabled" bitfld.long 0x04 25. " FE25 ,GPIO port pin falling-edge detect 25" "Disabled,Enabled" bitfld.long 0x04 24. " FE24 ,GPIO port pin falling-edge detect 24" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " FE23 ,GPIO port pin falling-edge detect 23" "Disabled,Enabled" bitfld.long 0x04 22. " FE22 ,GPIO port pin falling-edge detect 22" "Disabled,Enabled" bitfld.long 0x04 21. " FE21 ,GPIO port pin falling-edge detect 21" "Disabled,Enabled" bitfld.long 0x04 20. " FE20 ,GPIO port pin falling-edge detect 20" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " FE19 ,GPIO port pin falling-edge detect 19" "Disabled,Enabled" bitfld.long 0x04 18. " FE18 ,GPIO port pin falling-edge detect 18" "Disabled,Enabled" bitfld.long 0x04 17. " FE17 ,GPIO port pin falling-edge detect 17" "Disabled,Enabled" bitfld.long 0x04 16. " FE16 ,GPIO port pin falling-edge detect 16" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " FE15 ,GPIO port pin falling-edge detect 15" "Disabled,Enabled" bitfld.long 0x04 14. " FE14 ,GPIO port pin falling-edge detect 14" "Disabled,Enabled" bitfld.long 0x04 13. " FE13 ,GPIO port pin falling-edge detect 13" "Disabled,Enabled" bitfld.long 0x04 12. " FE12 ,GPIO port pin falling-edge detect 12" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " FE11 ,GPIO port pin falling-edge detect 11" "Disabled,Enabled" bitfld.long 0x04 10. " FE10 ,GPIO port pin falling-edge detect 10" "Disabled,Enabled" bitfld.long 0x04 9. " FE9 ,GPIO port pin falling-edge detect 9" "Disabled,Enabled" bitfld.long 0x04 8. " FE8 ,GPIO port pin falling-edge detect 8" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " FE7 ,GPIO port pin falling-edge detect 7" "Disabled,Enabled" bitfld.long 0x04 6. " FE6 ,GPIO port pin falling-edge detect 6" "Disabled,Enabled" bitfld.long 0x04 5. " FE5 ,GPIO port pin falling-edge detect 5" "Disabled,Enabled" bitfld.long 0x04 4. " FE4 ,GPIO port pin falling-edge detect 4" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " FE3 ,GPIO port pin falling-edge detect 3" "Disabled,Enabled" bitfld.long 0x04 2. " FE2 ,GPIO port pin falling-edge detect 2" "Disabled,Enabled" bitfld.long 0x04 1. " FE1 ,GPIO port pin falling-edge detect 1" "Disabled,Enabled" bitfld.long 0x04 0. " FE0 ,GPIO port pin falling-edge detect 0" "Disabled,Enabled" line.long 0x08 "GEDR,GPIO edge detect status register" bitfld.long 0x08 27. " ED27 ,GPIO port pin edge detect status 27" "Not detected,Detected" bitfld.long 0x08 26. " ED26 ,GPIO port pin edge detect status 26" "Not detected,Detected" bitfld.long 0x08 25. " ED25 ,GPIO port pin edge detect status 25" "Not detected,Detected" bitfld.long 0x08 24. " ED24 ,GPIO port pin edge detect status 24" "Not detected,Detected" textline " " bitfld.long 0x08 23. " ED23 ,GPIO port pin edge detect status 23" "Not detected,Detected" bitfld.long 0x08 22. " ED22 ,GPIO port pin edge detect status 22" "Not detected,Detected" bitfld.long 0x08 21. " ED21 ,GPIO port pin edge detect status 21" "Not detected,Detected" bitfld.long 0x08 20. " ED20 ,GPIO port pin edge detect status 20" "Not detected,Detected" textline " " bitfld.long 0x08 19. " ED19 ,GPIO port pin edge detect status 19" "Not detected,Detected" bitfld.long 0x08 18. " ED18 ,GPIO port pin edge detect status 18" "Not detected,Detected" bitfld.long 0x08 17. " ED17 ,GPIO port pin edge detect status 17" "Not detected,Detected" bitfld.long 0x08 16. " ED16 ,GPIO port pin edge detect status 16" "Not detected,Detected" textline " " bitfld.long 0x08 15. " ED15 ,GPIO port pin edge detect status 15" "Not detected,Detected" bitfld.long 0x08 14. " ED14 ,GPIO port pin edge detect status 14" "Not detected,Detected" bitfld.long 0x08 13. " ED13 ,GPIO port pin edge detect status 13" "Not detected,Detected" bitfld.long 0x08 12. " ED12 ,GPIO port pin edge detect status 12" "Not detected,Detected" textline " " bitfld.long 0x08 11. " ED11 ,GPIO port pin edge detect status 11" "Not detected,Detected" bitfld.long 0x08 10. " ED10 ,GPIO port pin edge detect status 10" "Not detected,Detected" bitfld.long 0x08 9. " ED9 ,GPIO port pin edge detect status 9" "Not detected,Detected" bitfld.long 0x08 8. " ED8 ,GPIO port pin edge detect status 8" "Not detected,Detected" textline " " bitfld.long 0x08 7. " ED7 ,GPIO port pin edge detect status 7" "Not detected,Detected" bitfld.long 0x08 6. " ED6 ,GPIO port pin edge detect status 6" "Not detected,Detected" bitfld.long 0x08 5. " ED5 ,GPIO port pin edge detect status 5" "Not detected,Detected" bitfld.long 0x08 4. " ED4 ,GPIO port pin edge detect status 4" "Not detected,Detected" textline " " bitfld.long 0x08 3. " ED3 ,GPIO port pin edge detect status 3" "Not detected,Detected" bitfld.long 0x08 2. " ED2 ,GPIO port pin edge detect status 2" "Not detected,Detected" bitfld.long 0x08 1. " ED1 ,GPIO port pin edge detect status 1" "Not detected,Detected" bitfld.long 0x08 0. " ED0 ,GPIO port pin edge detect status 0" "Not detected,Detected" line.long 0x0C "GAFR,GPIO alternate function register" bitfld.long 0x0C 27. " AF27 ,GPIO port pin alternate function 27" "GPIO,AF" bitfld.long 0x0C 26. " AF26 ,GPIO port pin alternate function 26" "GPIO,AF" bitfld.long 0x0C 25. " AF25 ,GPIO port pin alternate function 25" "GPIO,AF" bitfld.long 0x0C 24. " AF24 ,GPIO port pin alternate function 24" "GPIO,AF" textline " " bitfld.long 0x0C 23. " AF23 ,GPIO port pin alternate function 23" "GPIO,AF" bitfld.long 0x0C 22. " AF22 ,GPIO port pin alternate function 22" "GPIO,AF" bitfld.long 0x0C 21. " AF21 ,GPIO port pin alternate function 21" "GPIO,AF" bitfld.long 0x0C 20. " AF20 ,GPIO port pin alternate function 20" "GPIO,AF" textline " " bitfld.long 0x0C 19. " AF19 ,GPIO port pin alternate function 19" "GPIO,AF" bitfld.long 0x0C 18. " AF18 ,GPIO port pin alternate function 18" "GPIO,AF" bitfld.long 0x0C 17. " AF17 ,GPIO port pin alternate function 17" "GPIO,AF" bitfld.long 0x0C 16. " AF16 ,GPIO port pin alternate function 16" "GPIO,AF" textline " " bitfld.long 0x0C 15. " AF15 ,GPIO port pin alternate function 15" "GPIO,AF" bitfld.long 0x0C 14. " AF14 ,GPIO port pin alternate function 14" "GPIO,AF" bitfld.long 0x0C 13. " AF13 ,GPIO port pin alternate function 13" "GPIO,AF" bitfld.long 0x0C 12. " AF12 ,GPIO port pin alternate function 12" "GPIO,AF" textline " " bitfld.long 0x0C 11. " AF11 ,GPIO port pin alternate function 11" "GPIO,AF" bitfld.long 0x0C 10. " AF10 ,GPIO port pin alternate function 10" "GPIO,AF" bitfld.long 0x0C 9. " AF9 ,GPIO port pin alternate function 9" "GPIO,AF" bitfld.long 0x0C 8. " AF8 ,GPIO port pin alternate function 8" "GPIO,AF" textline " " bitfld.long 0x0C 7. " AF7 ,GPIO port pin alternate function 7" "GPIO,AF" bitfld.long 0x0C 6. " AF6 ,GPIO port pin alternate function 6" "GPIO,AF" bitfld.long 0x0C 5. " AF5 ,GPIO port pin alternate function 5" "GPIO,AF" bitfld.long 0x0C 4. " AF4 ,GPIO port pin alternate function 4" "GPIO,AF" textline " " bitfld.long 0x0C 3. " AF3 ,GPIO port pin alternate function 3" "GPIO,AF" bitfld.long 0x0C 2. " AF2 ,GPIO port pin alternate function 2" "GPIO,AF" bitfld.long 0x0C 1. " AF1 ,GPIO port pin alternate function 1" "GPIO,AF" bitfld.long 0x0C 0. " AF0 ,GPIO port pin alternate function 0" "GPIO,AF" width 0x0B tree.end ;COMPLETE tree "Interrupt Controller" width 0x06 rgroup (ad:0x90050000+0x00)++0x03 line.long 0x00 "ICIP,Interrupt controller IRQ pending register (Read Access)" bitfld.long 0x00 31. " IP31 ,IRQ 31 Request" "Not pending,Pending" bitfld.long 0x00 30. " IP30 ,IRQ 30 Request" "Not pending,Pending" bitfld.long 0x00 29. " IP29 ,IRQ 29 Request" "Not pending,Pending" bitfld.long 0x00 28. " IP28 ,IRQ 28 Request" "Not pending,Pending" textline " " bitfld.long 0x00 27. " IP27 ,IRQ 27 Request" "Not pending,Pending" bitfld.long 0x00 26. " IP26 ,IRQ 26 Request" "Not pending,Pending" bitfld.long 0x00 25. " IP25 ,IRQ 25 Request" "Not pending,Pending" bitfld.long 0x00 24. " IP24 ,IRQ 24 Request" "Not pending,Pending" textline " " bitfld.long 0x00 23. " IP23 ,IRQ 23 Request" "Not pending,Pending" bitfld.long 0x00 22. " IP22 ,IRQ 22 Request" "Not pending,Pending" bitfld.long 0x00 21. " IP21 ,IRQ 21 Request" "Not pending,Pending" bitfld.long 0x00 20. " IP20 ,IRQ 20 Request" "Not pending,Pending" textline " " bitfld.long 0x00 19. " IP19 ,IRQ 19 Request" "Not pending,Pending" bitfld.long 0x00 18. " IP18 ,IRQ 18 Request" "Not pending,Pending" bitfld.long 0x00 17. " IP17 ,IRQ 17 Request" "Not pending,Pending" bitfld.long 0x00 16. " IP16 ,IRQ 16 Request" "Not pending,Pending" textline " " bitfld.long 0x00 15. " IP15 ,IRQ 15 Request" "Not pending,Pending" bitfld.long 0x00 14. " IP14 ,IRQ 14 Request" "Not pending,Pending" bitfld.long 0x00 13. " IP13 ,IRQ 13 Request" "Not pending,Pending" bitfld.long 0x00 12. " IP12 ,IRQ 12 Request" "Not pending,Pending" textline " " bitfld.long 0x00 11. " IP11 ,IRQ 11 Request" "Not pending,Pending" bitfld.long 0x00 10. " IP10 ,IRQ 10 Request" "Not pending,Pending" bitfld.long 0x00 9. " IP9 ,IRQ 9 Request" "Not pending,Pending" bitfld.long 0x00 8. " IP8 ,IRQ 8 Request" "Not pending,Pending" textline " " bitfld.long 0x00 7. " IP7 ,IRQ 7 Request" "Not pending,Pending" bitfld.long 0x00 6. " IP6 ,IRQ 6 Request" "Not pending,Pending" bitfld.long 0x00 5. " IP5 ,IRQ 5 Request" "Not pending,Pending" bitfld.long 0x00 4. " IP4 ,IRQ 4 Request" "Not pending,Pending" textline " " bitfld.long 0x00 3. " IP3 ,IRQ 3 Request" "Not pending,Pending" bitfld.long 0x00 2. " IP2 ,IRQ 2 Request" "Not pending,Pending" bitfld.long 0x00 1. " IP1 ,IRQ 1 Request" "Not pending,Pending" bitfld.long 0x00 0. " IP0 ,IRQ 0 Request" "Not pending,Pending" wgroup (ad:0x90050000+0x00)++0x03 line.long 0x00 "ICIP,Interrupt controller IRQ pending register (Write Access)" bitfld.long 0x00 31. " IP31 ,IRQ 31 Request" "No effect,Clear" bitfld.long 0x00 30. " IP30 ,IRQ 30 Request" "No effect,Clear" bitfld.long 0x00 29. " IP29 ,IRQ 29 Request" "No effect,Clear" bitfld.long 0x00 28. " IP28 ,IRQ 28 Request" "No effect,Clear" textline " " bitfld.long 0x00 27. " IP27 ,IRQ 27 Request" "No effect,Clear" bitfld.long 0x00 26. " IP26 ,IRQ 26 Request" "No effect,Clear" bitfld.long 0x00 25. " IP25 ,IRQ 25 Request" "No effect,Clear" bitfld.long 0x00 24. " IP24 ,IRQ 24 Request" "No effect,Clear" textline " " bitfld.long 0x00 23. " IP23 ,IRQ 23 Request" "No effect,Clear" bitfld.long 0x00 22. " IP22 ,IRQ 22 Request" "No effect,Clear" bitfld.long 0x00 21. " IP21 ,IRQ 21 Request" "No effect,Clear" bitfld.long 0x00 20. " IP20 ,IRQ 20 Request" "No effect,Clear" textline " " bitfld.long 0x00 19. " IP19 ,IRQ 19 Request" "No effect,Clear" bitfld.long 0x00 18. " IP18 ,IRQ 18 Request" "No effect,Clear" bitfld.long 0x00 17. " IP17 ,IRQ 17 Request" "No effect,Clear" bitfld.long 0x00 16. " IP16 ,IRQ 16 Request" "No effect,Clear" textline " " bitfld.long 0x00 15. " IP15 ,IRQ 15 Request" "No effect,Clear" bitfld.long 0x00 14. " IP14 ,IRQ 14 Request" "No effect,Clear" bitfld.long 0x00 13. " IP13 ,IRQ 13 Request" "No effect,Clear" bitfld.long 0x00 12. " IP12 ,IRQ 12 Request" "No effect,Clear" textline " " bitfld.long 0x00 11. " IP11 ,IRQ 11 Request" "No effect,Clear" bitfld.long 0x00 10. " IP10 ,IRQ 10 Request" "No effect,Clear" bitfld.long 0x00 9. " IP9 ,IRQ 9 Request" "No effect,Clear" bitfld.long 0x00 8. " IP8 ,IRQ 8 Request" "No effect,Clear" textline " " bitfld.long 0x00 7. " IP7 ,IRQ 7 Request" "No effect,Clear" bitfld.long 0x00 6. " IP6 ,IRQ 6 Request" "No effect,Clear" bitfld.long 0x00 5. " IP5 ,IRQ 5 Request" "No effect,Clear" bitfld.long 0x00 4. " IP4 ,IRQ 4 Request" "No effect,Clear" textline " " bitfld.long 0x00 3. " IP3 ,IRQ 3 Request" "No effect,Clear" bitfld.long 0x00 2. " IP2 ,IRQ 2 Request" "No effect,Clear" bitfld.long 0x00 1. " IP1 ,IRQ 1 Request" "No effect,Clear" bitfld.long 0x00 0. " IP0 ,IRQ 0 Request" "No effect,Clear" rgroup (ad:0x90050000+0x10)++0x03 line.long 0x00 "ICFP,Interrupt controller FIQ pending register (Read Access)" bitfld.long 0x00 31. " FP31 ,FIQ 31 Request" "Not pending,Pending" bitfld.long 0x00 30. " FP30 ,FIQ 30 Request" "Not pending,Pending" bitfld.long 0x00 29. " FP29 ,FIQ 29 Request" "Not pending,Pending" bitfld.long 0x00 28. " FP28 ,FIQ 28 Request" "Not pending,Pending" textline " " bitfld.long 0x00 27. " FP27 ,FIQ 27 Request" "Not pending,Pending" bitfld.long 0x00 26. " FP26 ,FIQ 26 Request" "Not pending,Pending" bitfld.long 0x00 25. " FP25 ,FIQ 25 Request" "Not pending,Pending" bitfld.long 0x00 24. " FP24 ,FIQ 24 Request" "Not pending,Pending" textline " " bitfld.long 0x00 23. " FP23 ,FIQ 23 Request" "Not pending,Pending" bitfld.long 0x00 22. " FP22 ,FIQ 22 Request" "Not pending,Pending" bitfld.long 0x00 21. " FP21 ,FIQ 21 Request" "Not pending,Pending" bitfld.long 0x00 20. " FP20 ,FIQ 20 Request" "Not pending,Pending" textline " " bitfld.long 0x00 19. " FP19 ,FIQ 19 Request" "Not pending,Pending" bitfld.long 0x00 18. " FP18 ,FIQ 18 Request" "Not pending,Pending" bitfld.long 0x00 17. " FP17 ,FIQ 17 Request" "Not pending,Pending" bitfld.long 0x00 16. " FP16 ,FIQ 16 Request" "Not pending,Pending" textline " " bitfld.long 0x00 15. " FP15 ,FIQ 15 Request" "Not pending,Pending" bitfld.long 0x00 14. " FP14 ,FIQ 14 Request" "Not pending,Pending" bitfld.long 0x00 13. " FP13 ,FIQ 13 Request" "Not pending,Pending" bitfld.long 0x00 12. " FP12 ,FIQ 12 Request" "Not pending,Pending" textline " " bitfld.long 0x00 11. " FP11 ,FIQ 11 Request" "Not pending,Pending" bitfld.long 0x00 10. " FP10 ,FIQ 10 Request" "Not pending,Pending" bitfld.long 0x00 9. " FP9 ,FIQ 9 Request" "Not pending,Pending" bitfld.long 0x00 8. " FP8 ,FIQ 8 Request" "Not pending,Pending" textline " " bitfld.long 0x00 7. " FP7 ,FIQ 7 Request" "Not pending,Pending" bitfld.long 0x00 6. " FP6 ,FIQ 6 Request" "Not pending,Pending" bitfld.long 0x00 5. " FP5 ,FIQ 5 Request" "Not pending,Pending" bitfld.long 0x00 4. " FP4 ,FIQ 4 Request" "Not pending,Pending" textline " " bitfld.long 0x00 3. " FP3 ,FIQ 3 Request" "Not pending,Pending" bitfld.long 0x00 2. " FP2 ,FIQ 2 Request" "Not pending,Pending" bitfld.long 0x00 1. " FP1 ,FIQ 1 Request" "Not pending,Pending" bitfld.long 0x00 0. " FP0 ,FIQ 0 Request" "Not pending,Pending" wgroup (ad:0x90050000+0x10)++0x03 line.long 0x00 "ICFP,Interrupt controller FIQ pending register (Write Access)" bitfld.long 0x00 31. " FP31 ,FIQ 31 Request" "No effect,Clear" bitfld.long 0x00 30. " FP30 ,FIQ 30 Request" "No effect,Clear" bitfld.long 0x00 29. " FP29 ,FIQ 29 Request" "No effect,Clear" bitfld.long 0x00 28. " FP28 ,FIQ 28 Request" "No effect,Clear" textline " " bitfld.long 0x00 27. " FP27 ,FIQ 27 Request" "No effect,Clear" bitfld.long 0x00 26. " FP26 ,FIQ 26 Request" "No effect,Clear" bitfld.long 0x00 25. " FP25 ,FIQ 25 Request" "No effect,Clear" bitfld.long 0x00 24. " FP24 ,FIQ 24 Request" "No effect,Clear" textline " " bitfld.long 0x00 23. " FP23 ,FIQ 23 Request" "No effect,Clear" bitfld.long 0x00 22. " FP22 ,FIQ 22 Request" "No effect,Clear" bitfld.long 0x00 21. " FP21 ,FIQ 21 Request" "No effect,Clear" bitfld.long 0x00 20. " FP20 ,FIQ 20 Request" "No effect,Clear" textline " " bitfld.long 0x00 19. " FP19 ,FIQ 19 Request" "No effect,Clear" bitfld.long 0x00 18. " FP18 ,FIQ 18 Request" "No effect,Clear" bitfld.long 0x00 17. " FP17 ,FIQ 17 Request" "No effect,Clear" bitfld.long 0x00 16. " FP16 ,FIQ 16 Request" "No effect,Clear" textline " " bitfld.long 0x00 15. " FP15 ,FIQ 15 Request" "No effect,Clear" bitfld.long 0x00 14. " FP14 ,FIQ 14 Request" "No effect,Clear" bitfld.long 0x00 13. " FP13 ,FIQ 13 Request" "No effect,Clear" bitfld.long 0x00 12. " FP12 ,FIQ 12 Request" "No effect,Clear" textline " " bitfld.long 0x00 11. " FP11 ,FIQ 11 Request" "No effect,Clear" bitfld.long 0x00 10. " FP10 ,FIQ 10 Request" "No effect,Clear" bitfld.long 0x00 9. " FP9 ,FIQ 9 Request" "No effect,Clear" bitfld.long 0x00 8. " FP8 ,FIQ 8 Request" "No effect,Clear" textline " " bitfld.long 0x00 7. " FP7 ,FIQ 7 Request" "No effect,Clear" bitfld.long 0x00 6. " FP6 ,FIQ 6 Request" "No effect,Clear" bitfld.long 0x00 5. " FP5 ,FIQ 5 Request" "No effect,Clear" bitfld.long 0x00 4. " FP4 ,FIQ 4 Request" "No effect,Clear" textline " " bitfld.long 0x00 3. " FP3 ,FIQ 3 Request" "No effect,Clear" bitfld.long 0x00 2. " FP2 ,FIQ 2 Request" "No effect,Clear" bitfld.long 0x00 1. " FP1 ,FIQ 1 Request" "No effect,Clear" bitfld.long 0x00 0. " FP0 ,FIQ 0 Request" "No effect,Clear" group (ad:0x90050000+0x04)++0x07 line.long 0x00 "ICMR,Interrupt controller mask register" bitfld.long 0x00 31. " IM31 ,Interrupt 31 Mask" "Masked,Not Masked" bitfld.long 0x00 30. " IM30 ,Interrupt 30 Mask" "Masked,Not Masked" bitfld.long 0x00 29. " IM29 ,Interrupt 29 Mask" "Masked,Not Masked" bitfld.long 0x00 28. " IM28 ,Interrupt 28 Mask" "Masked,Not Masked" textline " " bitfld.long 0x00 27. " IM27 ,Interrupt 27 Mask" "Masked,Not Masked" bitfld.long 0x00 26. " IM26 ,Interrupt 26 Mask" "Masked,Not Masked" bitfld.long 0x00 25. " IM25 ,Interrupt 25 Mask" "Masked,Not Masked" bitfld.long 0x00 24. " IM24 ,Interrupt 24 Mask" "Masked,Not Masked" textline " " bitfld.long 0x00 23. " IM23 ,Interrupt 23 Mask" "Masked,Not Masked" bitfld.long 0x00 22. " IM22 ,Interrupt 22 Mask" "Masked,Not Masked" bitfld.long 0x00 21. " IM21 ,Interrupt 21 Mask" "Masked,Not Masked" bitfld.long 0x00 20. " IM20 ,Interrupt 20 Mask" "Masked,Not Masked" textline " " bitfld.long 0x00 19. " IM19 ,Interrupt 19 Mask" "Masked,Not Masked" bitfld.long 0x00 18. " IM18 ,Interrupt 18 Mask" "Masked,Not Masked" bitfld.long 0x00 17. " IM17 ,Interrupt 17 Mask" "Masked,Not Masked" bitfld.long 0x00 16. " IM16 ,Interrupt 16 Mask" "Masked,Not Masked" textline " " bitfld.long 0x00 15. " IM15 ,Interrupt 15 Mask" "Masked,Not Masked" bitfld.long 0x00 14. " IM14 ,Interrupt 14 Mask" "Masked,Not Masked" bitfld.long 0x00 13. " IM13 ,Interrupt 13 Mask" "Masked,Not Masked" bitfld.long 0x00 12. " IM12 ,Interrupt 12 Mask" "Masked,Not Masked" textline " " bitfld.long 0x00 11. " IM11 ,Interrupt 11 Mask" "Masked,Not Masked" bitfld.long 0x00 10. " IM10 ,Interrupt 10 Mask" "Masked,Not Masked" bitfld.long 0x00 9. " IM9 ,Interrupt 9 Mask" "Masked,Not Masked" bitfld.long 0x00 8. " IM8 ,Interrupt 8 Mask" "Masked,Not Masked" textline " " bitfld.long 0x00 7. " IM7 ,Interrupt 7 Mask" "Masked,Not Masked" bitfld.long 0x00 6. " IM6 ,Interrupt 6 Mask" "Masked,Not Masked" bitfld.long 0x00 5. " IM5 ,Interrupt 5 Mask" "Masked,Not Masked" bitfld.long 0x00 4. " IM4 ,Interrupt 4 Mask" "Masked,Not Masked" textline " " bitfld.long 0x00 3. " IM3 ,Interrupt 3 Mask" "Masked,Not Masked" bitfld.long 0x00 2. " IM2 ,Interrupt 2 Mask" "Masked,Not Masked" bitfld.long 0x00 1. " IM1 ,Interrupt 1 Mask" "Masked,Not Masked" bitfld.long 0x00 0. " IM0 ,Interrupt 0 Mask" "Masked,Not Masked" line.long 0x04 "ICLR,Interrupt controller level register" bitfld.long 0x04 31. " IM31 ,Interrupt 31 Level" "IRQ,FIQ" bitfld.long 0x04 30. " IM30 ,Interrupt 30 Level" "IRQ,FIQ" bitfld.long 0x04 29. " IM29 ,Interrupt 29 Level" "IRQ,FIQ" bitfld.long 0x04 28. " IM28 ,Interrupt 28 Level" "IRQ,FIQ" textline " " bitfld.long 0x04 27. " IM27 ,Interrupt 27 Level" "IRQ,FIQ" bitfld.long 0x04 26. " IM26 ,Interrupt 26 Level" "IRQ,FIQ" bitfld.long 0x04 25. " IM25 ,Interrupt 25 Level" "IRQ,FIQ" bitfld.long 0x04 24. " IM24 ,Interrupt 24 Level" "IRQ,FIQ" textline " " bitfld.long 0x04 23. " IM23 ,Interrupt 23 Level" "IRQ,FIQ" bitfld.long 0x04 22. " IM22 ,Interrupt 22 Level" "IRQ,FIQ" bitfld.long 0x04 21. " IM21 ,Interrupt 21 Level" "IRQ,FIQ" bitfld.long 0x04 20. " IM20 ,Interrupt 20 Level" "IRQ,FIQ" textline " " bitfld.long 0x04 19. " IM19 ,Interrupt 19 Level" "IRQ,FIQ" bitfld.long 0x04 18. " IM18 ,Interrupt 18 Level" "IRQ,FIQ" bitfld.long 0x04 17. " IM17 ,Interrupt 17 Level" "IRQ,FIQ" bitfld.long 0x04 16. " IM16 ,Interrupt 16 Level" "IRQ,FIQ" textline " " bitfld.long 0x04 15. " IM15 ,Interrupt 15 Level" "IRQ,FIQ" bitfld.long 0x04 14. " IM14 ,Interrupt 14 Level" "IRQ,FIQ" bitfld.long 0x04 13. " IM13 ,Interrupt 13 Level" "IRQ,FIQ" bitfld.long 0x04 12. " IM12 ,Interrupt 12 Level" "IRQ,FIQ" textline " " bitfld.long 0x04 11. " IM11 ,Interrupt 11 Level" "IRQ,FIQ" bitfld.long 0x04 10. " IM10 ,Interrupt 10 Level" "IRQ,FIQ" bitfld.long 0x04 9. " IM9 ,Interrupt 9 Level" "IRQ,FIQ" bitfld.long 0x04 8. " IM8 ,Interrupt 8 Level" "IRQ,FIQ" textline " " bitfld.long 0x04 7. " IM7 ,Interrupt 7 Level" "IRQ,FIQ" bitfld.long 0x04 6. " IM6 ,Interrupt 6 Level" "IRQ,FIQ" bitfld.long 0x04 5. " IM5 ,Interrupt 5 Level" "IRQ,FIQ" bitfld.long 0x04 4. " IM4 ,Interrupt 4 Level" "IRQ,FIQ" textline " " bitfld.long 0x04 3. " IM3 ,Interrupt 3 Level" "IRQ,FIQ" bitfld.long 0x04 2. " IM2 ,Interrupt 2 Level" "IRQ,FIQ" bitfld.long 0x04 1. " IM1 ,Interrupt 1 Level" "IRQ,FIQ" bitfld.long 0x04 0. " IM0 ,Interrupt 0 Level" "IRQ,FIQ" rgroup (ad:0x90050000+0x20)++0x03 line.long 0x00 "ICPR,Interrupt controller pending register" bitfld.long 0x00 31. " IP31 ,RTC equals alarm register IRQ & FIQ pending - IRQ & FIQ pending" "Not pending,Pending" bitfld.long 0x00 30. " IP30 ,One Hz clock TIC occurred - IRQ & FIQ pending" "Not pending,Pending" bitfld.long 0x00 29. " IP29 ,OS timer equals match register 3 - IRQ & FIQ pending" "Not pending,Pending" bitfld.long 0x00 28. " IP28 ,OS timer equals match register 2 - IRQ & FIQ pending" "Not pending,Pending" textline " " bitfld.long 0x00 27. " IP27 ,OS timer equals match register 1 - IRQ & FIQ pending" "Not pending,Pending" bitfld.long 0x00 26. " IP26 ,OS timer equals match register 0 - IRQ & FIQ pending" "Not pending,Pending" bitfld.long 0x00 25. " IP25 ,Channel 5 service request - IRQ & FIQ pending" "Not pending,Pending" bitfld.long 0x00 24. " IP24 ,Channel 4 service request - IRQ & FIQ pending" "Not pending,Pending" textline " " bitfld.long 0x00 23. " IP23 ,Channel 3 service request - IRQ & FIQ pending" "Not pending,Pending" bitfld.long 0x00 22. " IP22 ,Channel 2 service request - IRQ & FIQ pending" "Not pending,Pending" bitfld.long 0x00 21. " IP21 ,Channel 1 service request - IRQ & FIQ pending" "Not pending,Pending" bitfld.long 0x00 20. " IP20 ,Channel 0 service request - IRQ & FIQ pending" "Not pending,Pending" textline " " bitfld.long 0x00 19. " IP19 ,Serial port 4b - SSP service request - IRQ & FIQ pending" "Not pending,Pending" bitfld.long 0x00 18. " IP18 ,Serial port 4a - MCP service request - IRQ & FIQ pending" "Not pending,Pending" bitfld.long 0x00 17. " IP17 ,Serial port 3 - UART service request - IRQ & FIQ pending" "Not pending,Pending" bitfld.long 0x00 16. " IP16 ,Serial port 2 - UART/HSSP service request - IRQ & FIQ pending" "Not pending,Pending" textline " " bitfld.long 0x00 15. " IP15 ,Serial port 1b - UART service request - IRQ & FIQ pending" "Not pending,Pending" bitfld.long 0x00 13. " IP13 ,Serial port 0 - UDC service request - IRQ & FIQ pending" "Not pending,Pending" bitfld.long 0x00 12. " IP12 ,LCD controller service request - IRQ & FIQ pending" "Not pending,Pending" bitfld.long 0x00 11. " IP11 ,OR of GPIO edge detects 27-11 - IRQ & FIQ pending" "Not pending,Pending" textline " " bitfld.long 0x00 10. " IP10 ,GPIO 10 edge detect - IRQ & FIQ pending" "Not pending,Pending" bitfld.long 0x00 9. " IP9 ,GPIO 9 edge detect - IRQ & FIQ pending" "Not pending,Pending" bitfld.long 0x00 8. " IP8 ,GPIO 8 edge detect - IRQ & FIQ pending" "Not pending,Pending" bitfld.long 0x00 7. " IP7 ,GPIO 7 edge detect - IRQ & FIQ pending" "Not pending,Pending" textline " " bitfld.long 0x00 6. " IP6 ,GPIO 6 edge detect - IRQ & FIQ pending" "Not pending,Pending" bitfld.long 0x00 5. " IP5 ,GPIO 5 edge detect - IRQ & FIQ pending" "Not pending,Pending" bitfld.long 0x00 4. " IP4 ,GPIO 4 edge detect - IRQ & FIQ pending" "Not pending,Pending" bitfld.long 0x00 3. " IP3 ,GPIO 3 edge detect - IRQ & FIQ pending" "Not pending,Pending" textline " " bitfld.long 0x00 2. " IP2 ,GPIO 2 edge detect - IRQ & FIQ pending" "Not pending,Pending" bitfld.long 0x00 1. " IP1 ,GPIO 1 edge detect - IRQ & FIQ pending" "Not pending,Pending" bitfld.long 0x00 0. " IP0 ,GPIO 0 edge detect - IRQ & FIQ pending" "Not pending,Pending" group (ad:0x90050000+0x0C)++0x03 line.long 0x00 "ICCR,Interrupt controller control register" bitfld.long 0x00 0. " DIM ,Disable idle mask" "All enabled,Only enabled and unmasked" width 0x0B tree.end ;COMPLETE tree "Real-Time Clock" width 0x06 group (ad:0x90010000+0x00)++0x13 line.long 0x00 "RTAR,RTC alarm register" line.long 0x04 "RCNR,RTC count register" line.long 0x08 "RTTR,RTC timer trim register" hexmask.long.word 0x08 16.--25. 1. " D ,Trim delete count" hexfld.word 0x08 " C ,Clock divider count" line.long 0x10 "RTSR,RTC status register" bitfld.long 0x10 3. " HZE ,1-Hz interrupt enable" "Disabled,Enabled" bitfld.long 0x10 2. " ALE ,RTC alarm interrupt enable" "Disabled,Enabled" bitfld.long 0x10 1. " HZ ,1-Hz rising-edge interrupt detected" "Not detected,Detected" bitfld.long 0x10 0. " AL ,RTC alarm interrupt detected" "Not detected,Detected" width 0x0B tree.end ;COMPLETE tree "Operating System Timer" width 0x07 group (ad:0x90000000+0x00)++0x13 line.long 0x00 "OSMR0,OS timer match register 0" line.long 0x04 "OSMR1,OS timer match register 1" line.long 0x08 "OSMR2,OS timer match register 2" line.long 0x0C "OSMR3,OS timer match register 3" line.long 0x10 "OSCR,OS timer counter register" rgroup (ad:0x90000000+0x14)++0x03 line.long 0x00 "OSSR,OS timer status register (Read Access)" bitfld.long 0x00 3. " M3 ,Match status channel 3" "Not matched,Matched" bitfld.long 0x00 2. " M2 ,Match status channel 2" "Not matched,Matched" bitfld.long 0x00 1. " M1 ,Match status channel 1" "Not matched,Matched" bitfld.long 0x00 0. " M0 ,Match status channel 0" "Not matched,Matched" wgroup (ad:0x90000000+0x14)++0x03 line.long 0x00 "OSSR,OS timer status register (Write Access)" bitfld.long 0x00 3. " M3 ,Match status channel 3" "No effect,Clear" bitfld.long 0x00 2. " M2 ,Match status channel 2" "No effect,Clear" bitfld.long 0x00 1. " M1 ,Match status channel 1" "No effect,Clear" bitfld.long 0x00 0. " M0 ,Match status channel 0" "No effect,Clear" group (ad:0x90000000+0x18)++0x07 line.long 0x00 "OWER,OS timer watchdog enable register" bitfld.long 0x00 0. " WME ,Watchdog match enable" "Interrupt,Reset" line.long 0x04 "OIER,OS timer interrupt enable register" bitfld.long 0x04 3. " E3 ,Interrupt enable channel 3" "Disabled,Enabled" bitfld.long 0x04 2. " E2 ,Interrupt enable channel 2" "Disabled,Enabled" bitfld.long 0x04 1. " E1 ,Interrupt enable channel 1" "Disabled,Enabled" bitfld.long 0x04 0. " E0 ,Interrupt enable channel 0" "Disabled,Enabled" width 0x0B tree.end ;COMPLETE tree "Power Manager" width 0x06 group (ad:0x90020000+0x00)++0x03 line.long 0x00 "PMCR,Power manager control register" bitfld.long 0x00 0. " SF ,Sleep force" "Not forced,Forced" rgroup (ad:0x90020000+0x04)++0x03 line.long 0x00 "PSSR,Power manager sleep status register (Read Access)" bitfld.long 0x00 4. " PH ,Peripheral control hold" "Not held,Held" bitfld.long 0x00 3. " DH ,DRAM control hold" "Not held,Held" bitfld.long 0x00 2. " VFS ,VDD fault status" "Not asserted,Asserted" bitfld.long 0x00 1. " BFS ,Battery fault status" "Not asserted,Asserted" textline " " bitfld.long 0x00 0. " SSS ,Software sleep status" "Not placed,Placed" wgroup (ad:0x90020000+0x04)++0x03 line.long 0x00 "PSSR,Power manager sleep status register (Write Access)" bitfld.long 0x00 4. " PH ,Peripheral control hold" "No effect,Clear" bitfld.long 0x00 3. " DH ,DRAM control hold" "No effect,Clear" bitfld.long 0x00 2. " VFS ,VDD fault status" "No effect,Clear" bitfld.long 0x00 1. " BFS ,Battery fault status" "No effect,Clear" textline " " bitfld.long 0x00 0. " SSS ,Software sleep status" "No effect,Clear" group (ad:0x90020000+0x08)++0x13 line.long 0x00 "PSPR,Power manager scratch pad register" line.long 0x04 "PWER,Power manager wake-up enable register" bitfld.long 0x04 31. " WE31 ,Sleep wake-up enable 31" "Disabled,Enabled" bitfld.long 0x04 27. " WE27 ,Sleep state of GPIO 27" "Disabled,Enabled" bitfld.long 0x04 26. " WE26 ,Sleep state of GPIO 26" "Disabled,Enabled" bitfld.long 0x04 25. " WE25 ,Sleep state of GPIO 25" "Disabled,Enabled" textline " " bitfld.long 0x04 24. " WE24 ,Sleep state of GPIO 24" "Disabled,Enabled" bitfld.long 0x04 23. " WE23 ,Sleep state of GPIO 23" "Disabled,Enabled" bitfld.long 0x04 22. " WE22 ,Sleep state of GPIO 22" "Disabled,Enabled" bitfld.long 0x04 21. " WE21 ,Sleep state of GPIO 21" "Disabled,Enabled" textline " " bitfld.long 0x04 20. " WE20 ,Sleep state of GPIO 20" "Disabled,Enabled" bitfld.long 0x04 19. " WE19 ,Sleep state of GPIO 19" "Disabled,Enabled" bitfld.long 0x04 18. " WE18 ,Sleep state of GPIO 18" "Disabled,Enabled" bitfld.long 0x04 17. " WE17 ,Sleep state of GPIO 17" "Disabled,Enabled" textline " " bitfld.long 0x04 16. " WE16 ,Sleep state of GPIO 16" "Disabled,Enabled" bitfld.long 0x04 15. " WE15 ,Sleep state of GPIO 15" "Disabled,Enabled" bitfld.long 0x04 14. " WE14 ,Sleep state of GPIO 14" "Disabled,Enabled" bitfld.long 0x04 13. " WE13 ,Sleep state of GPIO 13" "Disabled,Enabled" textline " " bitfld.long 0x04 12. " WE12 ,Sleep state of GPIO 12" "Disabled,Enabled" bitfld.long 0x04 11. " WE11 ,Sleep state of GPIO 11" "Disabled,Enabled" bitfld.long 0x04 10. " WE10 ,Sleep state of GPIO 10" "Disabled,Enabled" bitfld.long 0x04 9. " WE9 ,Sleep state of GPIO 9" "Disabled,Enabled" textline " " bitfld.long 0x04 8. " WE8 ,Sleep state of GPIO 8" "Disabled,Enabled" bitfld.long 0x04 7. " WE7 ,Sleep state of GPIO 7" "Disabled,Enabled" bitfld.long 0x04 6. " WE6 ,Sleep state of GPIO 6" "Disabled,Enabled" bitfld.long 0x04 5. " WE5 ,Sleep state of GPIO 5" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " WE4 ,Sleep state of GPIO 4" "Disabled,Enabled" bitfld.long 0x04 3. " WE3 ,Sleep state of GPIO 3" "Disabled,Enabled" bitfld.long 0x04 2. " WE2 ,Sleep state of GPIO 2" "Disabled,Enabled" bitfld.long 0x04 1. " WE1 ,Sleep state of GPIO 1" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " WE0 ,Sleep state of GPIO 0" "Disabled,Enabled" line.long 0x08 "PCFR,Power manager general configuration register" bitfld.long 0x08 3. " FO ,Force 32-kHz oscillator enable on" "Off,On" bitfld.long 0x08 2. " FS ,Float static chip selects during sleep mode" "Driven high,Floated" bitfld.long 0x08 1. " FP ,Float PCMCIA controls during sleep mode" "Driven high,Floated" bitfld.long 0x08 0. " OPDE ,3.6864-MHz oscillator power-down enable" "Disabled,Enabled" line.long 0x0C "PPCR,Power manager PLL configuration register" bitfld.long 0x0C 0.--4. " CCF ,Clock speed configuration (3.6864-MHz/3.5795-MHz)" "59.0/57.3,73.7/71.6,88.5/85.9,103.2/100.2,118.0/114.5,132.7/128.9,147.5/143.2,162.2/157.5,176.9/171.8,191.7/186.1,206.4/200.5,221.2/214.8,?..." line.long 0x10 "PGSR,Power manager GPIO sleep state register" bitfld.long 0x10 27. " SS27 ,Sleep state of GPIO 27" "Low,High" bitfld.long 0x10 26. " SS26 ,Sleep state of GPIO 26" "Low,High" bitfld.long 0x10 25. " SS25 ,Sleep state of GPIO 25" "Low,High" bitfld.long 0x10 24. " SS24 ,Sleep state of GPIO 24" "Low,High" textline " " bitfld.long 0x10 23. " SS23 ,Sleep state of GPIO 23" "Low,High" bitfld.long 0x10 22. " SS22 ,Sleep state of GPIO 22" "Low,High" bitfld.long 0x10 21. " SS21 ,Sleep state of GPIO 21" "Low,High" bitfld.long 0x10 20. " SS20 ,Sleep state of GPIO 20" "Low,High" textline " " bitfld.long 0x10 19. " SS19 ,Sleep state of GPIO 19" "Low,High" bitfld.long 0x10 18. " SS18 ,Sleep state of GPIO 18" "Low,High" bitfld.long 0x10 17. " SS17 ,Sleep state of GPIO 17" "Low,High" bitfld.long 0x10 16. " SS16 ,Sleep state of GPIO 16" "Low,High" textline " " bitfld.long 0x10 15. " SS15 ,Sleep state of GPIO 15" "Low,High" bitfld.long 0x10 14. " SS14 ,Sleep state of GPIO 14" "Low,High" bitfld.long 0x10 13. " SS13 ,Sleep state of GPIO 13" "Low,High" bitfld.long 0x10 12. " SS12 ,Sleep state of GPIO 12" "Low,High" textline " " bitfld.long 0x10 11. " SS11 ,Sleep state of GPIO 11" "Low,High" bitfld.long 0x10 10. " SS10 ,Sleep state of GPIO 10" "Low,High" bitfld.long 0x10 9. " SS9 ,Sleep state of GPIO 9" "Low,High" bitfld.long 0x10 8. " SS8 ,Sleep state of GPIO 8" "Low,High" textline " " bitfld.long 0x10 7. " SS7 ,Sleep state of GPIO 7" "Low,High" bitfld.long 0x10 6. " SS6 ,Sleep state of GPIO 6" "Low,High" bitfld.long 0x10 5. " SS5 ,Sleep state of GPIO 5" "Low,High" bitfld.long 0x10 4. " SS4 ,Sleep state of GPIO 4" "Low,High" textline " " bitfld.long 0x10 3. " SS3 ,Sleep state of GPIO 3" "Low,High" bitfld.long 0x10 2. " SS2 ,Sleep state of GPIO 2" "Low,High" bitfld.long 0x10 1. " SS1 ,Sleep state of GPIO 1" "Low,High" bitfld.long 0x10 0. " SS0 ,Sleep state of GPIO 0" "Low,High" rgroup (ad:0x90020000+0x1C)++0x03 line.long 0x00 "POSR,Power manager oscillator status register" bitfld.long 0x00 0. " OOK ,Oscillator OK" "Not stabilized,Stabilized" width 0x0B tree.end ;COMPLETE tree "Reset Controller" width 0x06 wgroup (ad:0x90030000+0x00)++0x03 line.long 0x00 "RSRR,Reset controller software reset register" bitfld.long 0x00 0. " SWR ,Software reset" "Do not invoke,Invoke" rgroup (ad:0x90030000+0x04)++0x03 line.long 0x00 "RCSR,Reset controller status register (Read Access)" bitfld.long 0x00 3. " SMR ,Sleep mode reset" "Not occured,Occured" bitfld.long 0x00 2. " WDR ,Watchdog reset" "Not occured,Occured" bitfld.long 0x00 1. " SWR ,Software reset" "Not occured,Occured" bitfld.long 0x00 0. " HWR ,Hardware reset" "Not occured,Occured" wgroup (ad:0x90030000+0x04)++0x03 line.long 0x00 "RCSR,Reset controller status register (Write Access)" bitfld.long 0x00 3. " SMR ,Sleep mode reset" "No effect,Clear" bitfld.long 0x00 2. " WDR ,Watchdog reset" "No effect,Clear" bitfld.long 0x00 1. " SWR ,Software reset" "No effect,Clear" bitfld.long 0x00 0. " HWR ,Hardware reset" "No effect,Clear" group (ad:0x90030000+0x08)++0x03 line.long 0x00 "TUCR,Test Unit Control Register" bitfld.long 0x00 29.--31. " TSEL ,Test selects" "32-kHz oscillator,3.6864-MHz oscillator,VDD ring oscillator/16,96-MHz PLL/4,32-kHz oscillator,3.6864-MHz oscillator,Main PLL/16,VDDL ring oscillator/4" bitfld.long 0x00 10. " MR ,Memory request mode" "Not used for AF,MBGNT and MBREQ" bitfld.long 0x00 9. " PMD ,Power management" "Enabled,Disabled" width 0x0B tree.end ;COMPLETE tree "Memory and PC-Card Control Module" width 0x09 group (ad:0xA0000000+0x00)++0x33 line.long 0x00 "MDCNFG,DRAM configuration register" bitfld.long 0x00 30.--31. " TWR2 ,SDRAM write recovery (write data to precharge delay) for bank pair 2/3" "0,1,2,3" bitfld.long 0x00 28.--29. " TDL2 ,Data input latch after CAS deassertion for bank 2/3" "0 clocks,1 clock,2 clocks,3 clocks" bitfld.long 0x00 24.--27. " TRP2 ,RAS precharge for bank pair 2/3" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 23. " CDB22 ,Clock divide by 2 for bank pair 2/3" "Disabled,Enabled" textline " " bitfld.long 0x00 20.--22. " DRAC2 ,DRAM row address bit count for bank pair 2/3" "9,10,11,12,13,14,15,?..." bitfld.long 0x00 19. " DWID2 ,DRAM data bus width for bank pair 2/3" "32-bit,16-bit" bitfld.long 0x00 18. " DTIM2 ,DRAM timing type for bank pair 2/3" "Asynchronous,Synchronous" bitfld.long 0x00 17. " DE3 ,DRAM enable for bank 3" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " DE2 ,DRAM enable for bank 2" "Disabled,Enabled" bitfld.long 0x00 14.--15. " TWR0 ,SDRAM write recovery (write data to precharge delay) for bank pair 0/1" "0,1,2,3" bitfld.long 0x00 12.--13. " TDL0 ,Data input latch after CAS deassertion for bank 0/1" "0 clocks,1 clock,2 clocks,3 clocks" bitfld.long 0x00 8.--11. " TRP0 ,RAS precharge for bank pair 0/1" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" textline " " bitfld.long 0x00 7. " CDB20 ,Clock divide by 2 for bank pair 0/1" "Disabled,Enabled" bitfld.long 0x00 4.--6. " DRAC0 ,DRAM row address bit count for bank pair 0/1" "9,10,11,12,13,14,15,?..." bitfld.long 0x00 3. " DWID0 ,DRAM data bus width for bank pair 0/1" "32-bit,16-bit" bitfld.long 0x00 2. " DTIM0 ,DRAM timing type for bank pair 0/1" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 1. " DE1 ,DRAM enable for bank 1" "Disabled,Enabled" bitfld.long 0x00 0. " DE0 ,DRAM enable for bank 0" "Disabled,Enabled" line.long 0x18 "MECR,Expansion bus configuration register" bitfld.long 0x18 31. " FAST1 ,Fast mode bit for access to slot 1 I/O, attribute, or memory." "Disabled,Enabled" bitfld.long 0x18 26.--30. " BSM1 ,Memory clock count for accesses to PC-Card card slot 1, common memory space." "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x18 21.--25. " BSA1 ,Memory clock count for accesses to PC-Card card slot 1, attribute space." "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x18 16.--20. " BSIO1 ,Memory clock count for accesses to PC-Card card slot 1, I/O space." "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x18 15. " FAST0 ,Fast mode bit for access to slot 0 I/O, attribute, or memory." "Disabled,Enabled" bitfld.long 0x18 10.--14. " BSM0 ,Memory clock count for accesses to PC-Card card slot 0, common memory space." "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x18 5.--9. " BSA0 ,Memory clock count for accesses to PC-Card card slot 0, attribute space." "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x18 0.--4. " BSIO0 ,Memory clock count for accesses to PC-Card card slot 0, I/O space." "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x1C "MDREFR,DRAM refresh control register" bitfld.long 0x1C 31. " SLFRSH ,SDRAM self-refresh control/status" "Disabled,Enabled" bitfld.long 0x1C 29. " KAPD ,SDRAM/SMROM clock pin (SDCLK [2:0]) auto-power-down enable" "Disabled,Enabled" bitfld.long 0x1C 28. " EAPD ,SDRAM/SMROM clock enable pin (SDCKE [1:0]) auto-power-down enable" "Disabled,Enabled" bitfld.long 0x1C 26. " K2DB2 ,SDRAM clock pin 2 (SDCLK 2) divide by 2 control/status" "Disabled,Enabled" textline " " bitfld.long 0x1C 25. " K2RUN ,SDRAM clock pin 2 (SDCLK 2) run control/status" "Not run,Run" bitfld.long 0x1C 22. " K1DB2 ,SDRAM clock pin 1 (SDCLK 1) divide by 2 control/status" "Disabled,Enabled" bitfld.long 0x1C 21. " K1RUN ,SDRAM clock pin 1 (SDCLK 1) run control/status" "Not run,Run" bitfld.long 0x1C 20. " E1PIN ,SDRAM clock enable pin 1 (SDCKE 1) level control/status" "Disabled,Enabled" textline " " bitfld.long 0x1C 18. " K0DB2 ,SMROM clock pin 0 (SDCLK 0) divide by 2 control/status" "Disabled,Enabled" bitfld.long 0x1C 17. " K0RUN ,SMROM clock pin 0 (SDCLK 0) run control/status" "Not run,Run" bitfld.long 0x1C 16. " E0PIN ,SMROM clock enable pin 0 (SDCKE 0) level control/status" "Disabled,Enabled" hexmask.long.word 0x1C 4.--15. 1. " DRI ,DRAM refresh interval, all banks" textline " " bitfld.long 0x1C 0.--3. " TRASR ,RAS assertion during CBR, all banks" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x30 "SMCNFG,SMROM configuration register" bitfld.long 0x30 31. " RL2 ,RAS latency for bank pair 2/3" "1 clock,2 clocks" bitfld.long 0x30 28.--30. " CL2 ,CAS latency for bank pair 2/3" "Reserved,2,3,4,5,6,7,?..." bitfld.long 0x30 20.--22. " RA2 ,SMROM row address bit count for bank pair 2/3" "Reserved,Reserved,Reserved,Reserved,13 bits,?..." bitfld.long 0x30 17. " SM3 ,SMROM enables for bank 3" "Disabled,Enabled" textline " " bitfld.long 0x30 16. " SM2 ,SMROM enables for bank 2" "Disabled,Enabled" bitfld.long 0x30 15. " RL0 ,RAS latency for bank pair 0/1" "1 clock,2 clocks" bitfld.long 0x30 12.--14. " CL0 ,CAS latency for bank pair 0/1" "Reserved,2,3,4,5,6,7,?..." bitfld.long 0x30 4.--6. " RA0 ,SMROM row address bit count for bank pair 0/1" "Reserved,Reserved,Reserved,Reserved,13 bits,?..." textline " " bitfld.long 0x30 1. " SM1 ,SMROM enables for bank 1" "Disabled,Enabled" bitfld.long 0x30 0. " SM0 ,SMROM enables for bank 0" "Disabled,Enabled" line.long 0x04 "MDCAS00,DRAM CAS waveform rotate register 0 for DRAM bank pair 0/1" bitfld.long 0x04 31. " C00_31 ,CAS00 Waveform Rotate bit 31" "Low,High" bitfld.long 0x04 30. " C00_30 ,CAS00 Waveform Rotate bit 30" "Low,High" bitfld.long 0x04 29. " C00_29 ,CAS00 Waveform Rotate bit 29" "Low,High" bitfld.long 0x04 28. " C00_28 ,CAS00 Waveform Rotate bit 28" "Low,High" textline " " bitfld.long 0x04 27. " C00_27 ,CAS00 Waveform Rotate bit 27" "Low,High" bitfld.long 0x04 26. " C00_26 ,CAS00 Waveform Rotate bit 26" "Low,High" bitfld.long 0x04 25. " C00_25 ,CAS00 Waveform Rotate bit 25" "Low,High" bitfld.long 0x04 24. " C00_24 ,CAS00 Waveform Rotate bit 24" "Low,High" textline " " bitfld.long 0x04 23. " C00_23 ,CAS00 Waveform Rotate bit 23" "Low,High" bitfld.long 0x04 22. " C00_22 ,CAS00 Waveform Rotate bit 22" "Low,High" bitfld.long 0x04 21. " C00_21 ,CAS00 Waveform Rotate bit 21" "Low,High" bitfld.long 0x04 20. " C00_20 ,CAS00 Waveform Rotate bit 20" "Low,High" textline " " bitfld.long 0x04 19. " C00_19 ,CAS00 Waveform Rotate bit 19" "Low,High" bitfld.long 0x04 18. " C00_18 ,CAS00 Waveform Rotate bit 18" "Low,High" bitfld.long 0x04 17. " C00_17 ,CAS00 Waveform Rotate bit 17" "Low,High" bitfld.long 0x04 16. " C00_16 ,CAS00 Waveform Rotate bit 16" "Low,High" textline " " bitfld.long 0x04 15. " C00_15 ,CAS00 Waveform Rotate bit 15" "Low,High" bitfld.long 0x04 14. " C00_14 ,CAS00 Waveform Rotate bit 14" "Low,High" bitfld.long 0x04 13. " C00_13 ,CAS00 Waveform Rotate bit 13" "Low,High" bitfld.long 0x04 12. " C00_12 ,CAS00 Waveform Rotate bit 12" "Low,High" textline " " bitfld.long 0x04 11. " C00_11 ,CAS00 Waveform Rotate bit 11" "Low,High" bitfld.long 0x04 10. " C00_10 ,CAS00 Waveform Rotate bit 10" "Low,High" bitfld.long 0x04 9. " C00_9 ,CAS00 Waveform Rotate bit 9" "Low,High" bitfld.long 0x04 8. " C00_8 ,CAS00 Waveform Rotate bit 8" "Low,High" textline " " bitfld.long 0x04 7. " C00_7 ,CAS00 Waveform Rotate bit 7" "Low,High" bitfld.long 0x04 6. " C00_6 ,CAS00 Waveform Rotate bit 6" "Low,High" bitfld.long 0x04 5. " C00_5 ,CAS00 Waveform Rotate bit 5" "Low,High" bitfld.long 0x04 4. " C00_4 ,CAS00 Waveform Rotate bit 4" "Low,High" textline " " bitfld.long 0x04 3. " C00_3 ,CAS00 Waveform Rotate bit 3" "Low,High" bitfld.long 0x04 2. " C00_2 ,CAS00 Waveform Rotate bit 2" "Low,High" bitfld.long 0x04 1. " C00_1 ,CAS00 Waveform Rotate bit 1" "Low,High" bitfld.long 0x04 0. " C00_0 ,CAS00 Waveform Rotate bit 0" "Low,High" line.long 0x08 "MDCAS01,DRAM CAS waveform rotate register 1 for DRAM bank pair 0/1" bitfld.long 0x08 31. " C01_31 ,CAS01 Waveform Rotate bit 31" "Low,High" bitfld.long 0x08 30. " C01_30 ,CAS01 Waveform Rotate bit 30" "Low,High" bitfld.long 0x08 29. " C01_29 ,CAS01 Waveform Rotate bit 29" "Low,High" bitfld.long 0x08 28. " C01_28 ,CAS01 Waveform Rotate bit 28" "Low,High" textline " " bitfld.long 0x08 27. " C01_27 ,CAS01 Waveform Rotate bit 27" "Low,High" bitfld.long 0x08 26. " C01_26 ,CAS01 Waveform Rotate bit 26" "Low,High" bitfld.long 0x08 25. " C01_25 ,CAS01 Waveform Rotate bit 25" "Low,High" bitfld.long 0x08 24. " C01_24 ,CAS01 Waveform Rotate bit 24" "Low,High" textline " " bitfld.long 0x08 23. " C01_23 ,CAS01 Waveform Rotate bit 23" "Low,High" bitfld.long 0x08 22. " C01_22 ,CAS01 Waveform Rotate bit 22" "Low,High" bitfld.long 0x08 21. " C01_21 ,CAS01 Waveform Rotate bit 21" "Low,High" bitfld.long 0x08 20. " C01_20 ,CAS01 Waveform Rotate bit 20" "Low,High" textline " " bitfld.long 0x08 19. " C01_19 ,CAS01 Waveform Rotate bit 19" "Low,High" bitfld.long 0x08 18. " C01_18 ,CAS01 Waveform Rotate bit 18" "Low,High" bitfld.long 0x08 17. " C01_17 ,CAS01 Waveform Rotate bit 17" "Low,High" bitfld.long 0x08 16. " C01_16 ,CAS01 Waveform Rotate bit 16" "Low,High" textline " " bitfld.long 0x08 15. " C01_15 ,CAS01 Waveform Rotate bit 15" "Low,High" bitfld.long 0x08 14. " C01_14 ,CAS01 Waveform Rotate bit 14" "Low,High" bitfld.long 0x08 13. " C01_13 ,CAS01 Waveform Rotate bit 13" "Low,High" bitfld.long 0x08 12. " C01_12 ,CAS01 Waveform Rotate bit 12" "Low,High" textline " " bitfld.long 0x08 11. " C01_11 ,CAS01 Waveform Rotate bit 11" "Low,High" bitfld.long 0x08 10. " C01_10 ,CAS01 Waveform Rotate bit 10" "Low,High" bitfld.long 0x08 9. " C01_9 ,CAS01 Waveform Rotate bit 9" "Low,High" bitfld.long 0x08 8. " C01_8 ,CAS01 Waveform Rotate bit 8" "Low,High" textline " " bitfld.long 0x08 7. " C01_7 ,CAS01 Waveform Rotate bit 7" "Low,High" bitfld.long 0x08 6. " C01_6 ,CAS01 Waveform Rotate bit 6" "Low,High" bitfld.long 0x08 5. " C01_5 ,CAS01 Waveform Rotate bit 5" "Low,High" bitfld.long 0x08 4. " C01_4 ,CAS01 Waveform Rotate bit 4" "Low,High" textline " " bitfld.long 0x08 3. " C01_3 ,CAS01 Waveform Rotate bit 3" "Low,High" bitfld.long 0x08 2. " C01_2 ,CAS01 Waveform Rotate bit 2" "Low,High" bitfld.long 0x08 1. " C01_1 ,CAS01 Waveform Rotate bit 1" "Low,High" bitfld.long 0x08 0. " C01_0 ,CAS01 Waveform Rotate bit 0" "Low,High" line.long 0x0C "MDCAS02,DRAM CAS waveform rotate register 2 for DRAM bank pair 0/1" bitfld.long 0x0C 31. " C02_31 ,CAS02 Waveform Rotate bit 31" "Low,High" bitfld.long 0x0C 30. " C02_30 ,CAS02 Waveform Rotate bit 30" "Low,High" bitfld.long 0x0C 29. " C02_29 ,CAS02 Waveform Rotate bit 29" "Low,High" bitfld.long 0x0C 28. " C02_28 ,CAS02 Waveform Rotate bit 28" "Low,High" textline " " bitfld.long 0x0C 27. " C02_27 ,CAS02 Waveform Rotate bit 27" "Low,High" bitfld.long 0x0C 26. " C02_26 ,CAS02 Waveform Rotate bit 26" "Low,High" bitfld.long 0x0C 25. " C02_25 ,CAS02 Waveform Rotate bit 25" "Low,High" bitfld.long 0x0C 24. " C02_24 ,CAS02 Waveform Rotate bit 24" "Low,High" textline " " bitfld.long 0x0C 23. " C02_23 ,CAS02 Waveform Rotate bit 23" "Low,High" bitfld.long 0x0C 22. " C02_22 ,CAS02 Waveform Rotate bit 22" "Low,High" bitfld.long 0x0C 21. " C02_21 ,CAS02 Waveform Rotate bit 21" "Low,High" bitfld.long 0x0C 20. " C02_20 ,CAS02 Waveform Rotate bit 20" "Low,High" textline " " bitfld.long 0x0C 19. " C02_19 ,CAS02 Waveform Rotate bit 19" "Low,High" bitfld.long 0x0C 18. " C02_18 ,CAS02 Waveform Rotate bit 18" "Low,High" bitfld.long 0x0C 17. " C02_17 ,CAS02 Waveform Rotate bit 17" "Low,High" bitfld.long 0x0C 16. " C02_16 ,CAS02 Waveform Rotate bit 16" "Low,High" textline " " bitfld.long 0x0C 15. " C02_15 ,CAS02 Waveform Rotate bit 15" "Low,High" bitfld.long 0x0C 14. " C02_14 ,CAS02 Waveform Rotate bit 14" "Low,High" bitfld.long 0x0C 13. " C02_13 ,CAS02 Waveform Rotate bit 13" "Low,High" bitfld.long 0x0C 12. " C02_12 ,CAS02 Waveform Rotate bit 12" "Low,High" textline " " bitfld.long 0x0C 11. " C02_11 ,CAS02 Waveform Rotate bit 11" "Low,High" bitfld.long 0x0C 10. " C02_10 ,CAS02 Waveform Rotate bit 10" "Low,High" bitfld.long 0x0C 9. " C02_9 ,CAS02 Waveform Rotate bit 9" "Low,High" bitfld.long 0x0C 8. " C02_8 ,CAS02 Waveform Rotate bit 8" "Low,High" textline " " bitfld.long 0x0C 7. " C02_7 ,CAS02 Waveform Rotate bit 7" "Low,High" bitfld.long 0x0C 6. " C02_6 ,CAS02 Waveform Rotate bit 6" "Low,High" bitfld.long 0x0C 5. " C02_5 ,CAS02 Waveform Rotate bit 5" "Low,High" bitfld.long 0x0C 4. " C02_4 ,CAS02 Waveform Rotate bit 4" "Low,High" textline " " bitfld.long 0x0C 3. " C02_3 ,CAS02 Waveform Rotate bit 3" "Low,High" bitfld.long 0x0C 2. " C02_2 ,CAS02 Waveform Rotate bit 2" "Low,High" bitfld.long 0x0C 1. " C02_1 ,CAS02 Waveform Rotate bit 1" "Low,High" bitfld.long 0x0C 0. " C02_0 ,CAS02 Waveform Rotate bit 0" "Low,High" line.long 0x20 "MDCAS20,DRAM CAS waveform rotate register 0 for DRAM bank pair 2/3" bitfld.long 0x20 31. " C20_31 ,CAS20 Waveform Rotate bit 31" "Low,High" bitfld.long 0x20 30. " C20_30 ,CAS20 Waveform Rotate bit 30" "Low,High" bitfld.long 0x20 29. " C20_29 ,CAS20 Waveform Rotate bit 29" "Low,High" bitfld.long 0x20 28. " C20_28 ,CAS20 Waveform Rotate bit 28" "Low,High" textline " " bitfld.long 0x20 27. " C20_27 ,CAS20 Waveform Rotate bit 27" "Low,High" bitfld.long 0x20 26. " C20_26 ,CAS20 Waveform Rotate bit 26" "Low,High" bitfld.long 0x20 25. " C20_25 ,CAS20 Waveform Rotate bit 25" "Low,High" bitfld.long 0x20 24. " C20_24 ,CAS20 Waveform Rotate bit 24" "Low,High" textline " " bitfld.long 0x20 23. " C20_23 ,CAS20 Waveform Rotate bit 23" "Low,High" bitfld.long 0x20 22. " C20_22 ,CAS20 Waveform Rotate bit 22" "Low,High" bitfld.long 0x20 21. " C20_21 ,CAS20 Waveform Rotate bit 21" "Low,High" bitfld.long 0x20 20. " C20_20 ,CAS20 Waveform Rotate bit 20" "Low,High" textline " " bitfld.long 0x20 19. " C20_19 ,CAS20 Waveform Rotate bit 19" "Low,High" bitfld.long 0x20 18. " C20_18 ,CAS20 Waveform Rotate bit 18" "Low,High" bitfld.long 0x20 17. " C20_17 ,CAS20 Waveform Rotate bit 17" "Low,High" bitfld.long 0x20 16. " C20_16 ,CAS20 Waveform Rotate bit 16" "Low,High" textline " " bitfld.long 0x20 15. " C20_15 ,CAS20 Waveform Rotate bit 15" "Low,High" bitfld.long 0x20 14. " C20_14 ,CAS20 Waveform Rotate bit 14" "Low,High" bitfld.long 0x20 13. " C20_13 ,CAS20 Waveform Rotate bit 13" "Low,High" bitfld.long 0x20 12. " C20_12 ,CAS20 Waveform Rotate bit 12" "Low,High" textline " " bitfld.long 0x20 11. " C20_11 ,CAS20 Waveform Rotate bit 11" "Low,High" bitfld.long 0x20 10. " C20_10 ,CAS20 Waveform Rotate bit 10" "Low,High" bitfld.long 0x20 9. " C20_9 ,CAS20 Waveform Rotate bit 9" "Low,High" bitfld.long 0x20 8. " C20_8 ,CAS20 Waveform Rotate bit 8" "Low,High" textline " " bitfld.long 0x20 7. " C20_7 ,CAS20 Waveform Rotate bit 7" "Low,High" bitfld.long 0x20 6. " C20_6 ,CAS20 Waveform Rotate bit 6" "Low,High" bitfld.long 0x20 5. " C20_5 ,CAS20 Waveform Rotate bit 5" "Low,High" bitfld.long 0x20 4. " C20_4 ,CAS20 Waveform Rotate bit 4" "Low,High" textline " " bitfld.long 0x20 3. " C20_3 ,CAS20 Waveform Rotate bit 3" "Low,High" bitfld.long 0x20 2. " C20_2 ,CAS20 Waveform Rotate bit 2" "Low,High" bitfld.long 0x20 1. " C20_1 ,CAS20 Waveform Rotate bit 1" "Low,High" bitfld.long 0x20 0. " C20_0 ,CAS20 Waveform Rotate bit 0" "Low,High" line.long 0x24 "MDCAS21,DRAM CAS waveform rotate register 1 for DRAM bank pair 2/3" bitfld.long 0x24 31. " C21_31 ,CAS21 Waveform Rotate bit 31" "Low,High" bitfld.long 0x24 30. " C21_30 ,CAS21 Waveform Rotate bit 30" "Low,High" bitfld.long 0x24 29. " C21_29 ,CAS21 Waveform Rotate bit 29" "Low,High" bitfld.long 0x24 28. " C21_28 ,CAS21 Waveform Rotate bit 28" "Low,High" textline " " bitfld.long 0x24 27. " C21_27 ,CAS21 Waveform Rotate bit 27" "Low,High" bitfld.long 0x24 26. " C21_26 ,CAS21 Waveform Rotate bit 26" "Low,High" bitfld.long 0x24 25. " C21_25 ,CAS21 Waveform Rotate bit 25" "Low,High" bitfld.long 0x24 24. " C21_24 ,CAS21 Waveform Rotate bit 24" "Low,High" textline " " bitfld.long 0x24 23. " C21_23 ,CAS21 Waveform Rotate bit 23" "Low,High" bitfld.long 0x24 22. " C21_22 ,CAS21 Waveform Rotate bit 22" "Low,High" bitfld.long 0x24 21. " C21_21 ,CAS21 Waveform Rotate bit 21" "Low,High" bitfld.long 0x24 20. " C21_20 ,CAS21 Waveform Rotate bit 20" "Low,High" textline " " bitfld.long 0x24 19. " C21_19 ,CAS21 Waveform Rotate bit 19" "Low,High" bitfld.long 0x24 18. " C21_18 ,CAS21 Waveform Rotate bit 18" "Low,High" bitfld.long 0x24 17. " C21_17 ,CAS21 Waveform Rotate bit 17" "Low,High" bitfld.long 0x24 16. " C21_16 ,CAS21 Waveform Rotate bit 16" "Low,High" textline " " bitfld.long 0x24 15. " C21_15 ,CAS21 Waveform Rotate bit 15" "Low,High" bitfld.long 0x24 14. " C21_14 ,CAS21 Waveform Rotate bit 14" "Low,High" bitfld.long 0x24 13. " C21_13 ,CAS21 Waveform Rotate bit 13" "Low,High" bitfld.long 0x24 12. " C21_12 ,CAS21 Waveform Rotate bit 12" "Low,High" textline " " bitfld.long 0x24 11. " C21_11 ,CAS21 Waveform Rotate bit 11" "Low,High" bitfld.long 0x24 10. " C21_10 ,CAS21 Waveform Rotate bit 10" "Low,High" bitfld.long 0x24 9. " C21_9 ,CAS21 Waveform Rotate bit 9" "Low,High" bitfld.long 0x24 8. " C21_8 ,CAS21 Waveform Rotate bit 8" "Low,High" textline " " bitfld.long 0x24 7. " C21_7 ,CAS21 Waveform Rotate bit 7" "Low,High" bitfld.long 0x24 6. " C21_6 ,CAS21 Waveform Rotate bit 6" "Low,High" bitfld.long 0x24 5. " C21_5 ,CAS21 Waveform Rotate bit 5" "Low,High" bitfld.long 0x24 4. " C21_4 ,CAS21 Waveform Rotate bit 4" "Low,High" textline " " bitfld.long 0x24 3. " C21_3 ,CAS21 Waveform Rotate bit 3" "Low,High" bitfld.long 0x24 2. " C21_2 ,CAS21 Waveform Rotate bit 2" "Low,High" bitfld.long 0x24 1. " C21_1 ,CAS21 Waveform Rotate bit 1" "Low,High" bitfld.long 0x24 0. " C21_0 ,CAS21 Waveform Rotate bit 0" "Low,High" line.long 0x28 "MDCAS22,DRAM CAS waveform rotate register 2 for DRAM bank pair 2/3" bitfld.long 0x28 31. " C22_31 ,CAS22 Waveform Rotate bit 31" "Low,High" bitfld.long 0x28 30. " C22_30 ,CAS22 Waveform Rotate bit 30" "Low,High" bitfld.long 0x28 29. " C22_29 ,CAS22 Waveform Rotate bit 29" "Low,High" bitfld.long 0x28 28. " C22_28 ,CAS22 Waveform Rotate bit 28" "Low,High" textline " " bitfld.long 0x28 27. " C22_27 ,CAS22 Waveform Rotate bit 27" "Low,High" bitfld.long 0x28 26. " C22_26 ,CAS22 Waveform Rotate bit 26" "Low,High" bitfld.long 0x28 25. " C22_25 ,CAS22 Waveform Rotate bit 25" "Low,High" bitfld.long 0x28 24. " C22_24 ,CAS22 Waveform Rotate bit 24" "Low,High" textline " " bitfld.long 0x28 23. " C22_23 ,CAS22 Waveform Rotate bit 23" "Low,High" bitfld.long 0x28 22. " C22_22 ,CAS22 Waveform Rotate bit 22" "Low,High" bitfld.long 0x28 21. " C22_21 ,CAS22 Waveform Rotate bit 21" "Low,High" bitfld.long 0x28 20. " C22_20 ,CAS22 Waveform Rotate bit 20" "Low,High" textline " " bitfld.long 0x28 19. " C22_19 ,CAS22 Waveform Rotate bit 19" "Low,High" bitfld.long 0x28 18. " C22_18 ,CAS22 Waveform Rotate bit 18" "Low,High" bitfld.long 0x28 17. " C22_17 ,CAS22 Waveform Rotate bit 17" "Low,High" bitfld.long 0x28 16. " C22_16 ,CAS22 Waveform Rotate bit 16" "Low,High" textline " " bitfld.long 0x28 15. " C22_15 ,CAS22 Waveform Rotate bit 15" "Low,High" bitfld.long 0x28 14. " C22_14 ,CAS22 Waveform Rotate bit 14" "Low,High" bitfld.long 0x28 13. " C22_13 ,CAS22 Waveform Rotate bit 13" "Low,High" bitfld.long 0x28 12. " C22_12 ,CAS22 Waveform Rotate bit 12" "Low,High" textline " " bitfld.long 0x28 11. " C22_11 ,CAS22 Waveform Rotate bit 11" "Low,High" bitfld.long 0x28 10. " C22_10 ,CAS22 Waveform Rotate bit 10" "Low,High" bitfld.long 0x28 9. " C22_9 ,CAS22 Waveform Rotate bit 9" "Low,High" bitfld.long 0x28 8. " C22_8 ,CAS22 Waveform Rotate bit 8" "Low,High" textline " " bitfld.long 0x28 7. " C22_7 ,CAS22 Waveform Rotate bit 7" "Low,High" bitfld.long 0x28 6. " C22_6 ,CAS22 Waveform Rotate bit 6" "Low,High" bitfld.long 0x28 5. " C22_5 ,CAS22 Waveform Rotate bit 5" "Low,High" bitfld.long 0x28 4. " C22_4 ,CAS22 Waveform Rotate bit 4" "Low,High" textline " " bitfld.long 0x28 3. " C22_3 ,CAS22 Waveform Rotate bit 3" "Low,High" bitfld.long 0x28 2. " C22_2 ,CAS22 Waveform Rotate bit 2" "Low,High" bitfld.long 0x28 1. " C22_1 ,CAS22 Waveform Rotate bit 1" "Low,High" bitfld.long 0x28 0. " C22_0 ,CAS22 Waveform Rotate bit 0" "Low,High" textline "" line.long 0x10 "MSC0,Static memory control register 0" bitfld.long 0x10 13.--15. " RRR0 ,ROM/SRAM recovery time" "000,001,010,011,100,101,110,111" bitfld.long 0x10 8.--12. " RDN0 ,ROM delay next access" "00000,00001,00010,00011,00100,00101,00110,00111,01000,01001,01010,01011,01100,01101,01110,01111,10000,10001,10010,10011,10100,10101,10110,10111,11000,11001,11010,11011,11100,11101,11110,11111" bitfld.long 0x10 3.--7. " RDF0 ,ROM delay first access" "00000,00001,00010,00011,00100,00101,00110,00111,01000,01001,01010,01011,01100,01101,01110,01111,10000,10001,10010,10011,10100,10101,10110,10111,11000,11001,11010,11011,11100,11101,11110,11111" bitfld.long 0x10 2. " RBW0 ,ROM bus width" "32 bits,16 bits" bitfld.long 0x10 0.--1. " RT0 ,ROM type timings" "Nonburst ROM or Flash,Nonburst ROM or SRAM,Burst-of-four ROM or Flash,Burst-of-eight ROM or Flash" textline " " bitfld.long 0x10 29.--31. " RRR1 ,ROM/SRAM recovery time" "000,001,010,011,100,101,110,111" bitfld.long 0x10 24.--28. " RDN1 ,ROM delay next access" "00000,00001,00010,00011,00100,00101,00110,00111,01000,01001,01010,01011,01100,01101,01110,01111,10000,10001,10010,10011,10100,10101,10110,10111,11000,11001,11010,11011,11100,11101,11110,11111" bitfld.long 0x10 19.--23. " RDF1 ,ROM delay first access" "00000,00001,00010,00011,00100,00101,00110,00111,01000,01001,01010,01011,01100,01101,01110,01111,10000,10001,10010,10011,10100,10101,10110,10111,11000,11001,11010,11011,11100,11101,11110,11111" bitfld.long 0x10 18. " RBW1 ,ROM bus width" "32 bits,16 bits" bitfld.long 0x10 16.--17. " RT1 ,ROM type timings" "Nonburst ROM or Flash,Nonburst ROM or SRAM,Burst-of-four ROM or Flash,Burst-of-eight ROM or Flash" line.long 0x14 "MSC1,Static memory control register 1" bitfld.long 0x14 13.--15. " RRR2 ,ROM/SRAM recovery time" "000,001,010,011,100,101,110,111" bitfld.long 0x14 8.--12. " RDN2 ,ROM delay next access" "00000,00001,00010,00011,00100,00101,00110,00111,01000,01001,01010,01011,01100,01101,01110,01111,10000,10001,10010,10011,10100,10101,10110,10111,11000,11001,11010,11011,11100,11101,11110,11111" bitfld.long 0x14 3.--7. " RDF2 ,ROM delay first access" "00000,00001,00010,00011,00100,00101,00110,00111,01000,01001,01010,01011,01100,01101,01110,01111,10000,10001,10010,10011,10100,10101,10110,10111,11000,11001,11010,11011,11100,11101,11110,11111" bitfld.long 0x14 2. " RBW2 ,ROM bus width" "32 bits,16 bits" bitfld.long 0x14 0.--1. " RT2 ,ROM type timings" "Nonburst ROM or Flash,Nonburst ROM or SRAM,Burst-of-four ROM or Flash,Burst-of-eight ROM or Flash" textline " " bitfld.long 0x14 29.--31. " RRR3 ,ROM/SRAM recovery time" "000,001,010,011,100,101,110,111" bitfld.long 0x14 24.--28. " RDN3 ,ROM delay next access" "00000,00001,00010,00011,00100,00101,00110,00111,01000,01001,01010,01011,01100,01101,01110,01111,10000,10001,10010,10011,10100,10101,10110,10111,11000,11001,11010,11011,11100,11101,11110,11111" bitfld.long 0x14 19.--23. " RDF3 ,ROM delay first access" "00000,00001,00010,00011,00100,00101,00110,00111,01000,01001,01010,01011,01100,01101,01110,01111,10000,10001,10010,10011,10100,10101,10110,10111,11000,11001,11010,11011,11100,11101,11110,11111" bitfld.long 0x14 18. " RBW3 ,ROM bus width" "32 bits,16 bits" bitfld.long 0x14 16.--17. " RT3 ,ROM type timings" "Nonburst ROM or Flash,Nonburst ROM or SRAM,Burst-of-four ROM or Flash,Burst-of-eight ROM or Flash" line.long 0x2C "MSC2,Static memory control register 2" bitfld.long 0x2C 13.--15. " RRR4 ,ROM/SRAM recovery time" "000,001,010,011,100,101,110,111" bitfld.long 0x2C 8.--12. " RDN4 ,ROM delay next access" "00000,00001,00010,00011,00100,00101,00110,00111,01000,01001,01010,01011,01100,01101,01110,01111,10000,10001,10010,10011,10100,10101,10110,10111,11000,11001,11010,11011,11100,11101,11110,11111" bitfld.long 0x2C 3.--7. " RDF4 ,ROM delay first access" "00000,00001,00010,00011,00100,00101,00110,00111,01000,01001,01010,01011,01100,01101,01110,01111,10000,10001,10010,10011,10100,10101,10110,10111,11000,11001,11010,11011,11100,11101,11110,11111" bitfld.long 0x2C 2. " RBW4 ,ROM bus width" "32 bits,16 bits" bitfld.long 0x2C 0.--1. " RT4 ,ROM type timings" "Nonburst ROM or Flash,Nonburst ROM or SRAM,Burst-of-four ROM or Flash,Burst-of-eight ROM or Flash" textline " " bitfld.long 0x2C 29.--31. " RRR5 ,ROM/SRAM recovery time" "000,001,010,011,100,101,110,111" bitfld.long 0x2C 24.--28. " RDN5 ,ROM delay next access" "00000,00001,00010,00011,00100,00101,00110,00111,01000,01001,01010,01011,01100,01101,01110,01111,10000,10001,10010,10011,10100,10101,10110,10111,11000,11001,11010,11011,11100,11101,11110,11111" bitfld.long 0x2C 19.--23. " RDF5 ,ROM delay first access" "00000,00001,00010,00011,00100,00101,00110,00111,01000,01001,01010,01011,01100,01101,01110,01111,10000,10001,10010,10011,10100,10101,10110,10111,11000,11001,11010,11011,11100,11101,11110,11111" bitfld.long 0x2C 18. " RBW5 ,ROM bus width" "32 bits,16 bits" bitfld.long 0x2C 16.--17. " RT5 ,ROM type timings" "Nonburst ROM or Flash,Nonburst ROM or SRAM,Burst-of-four ROM or Flash,Burst-of-eight ROM or Flash" width 0x0B tree.end textline ""